JP2018085826A - Multiphase power conversion circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable both bidirectional step-up operation and step-down operation between two DC power supplies, using one current sensor for controlling currents in respective phrases.SOLUTION: A multiphase power conversion circuit comprises: a first converter 1 and a second converter 2 connected with each other through inductors thereof in common thereto, provided in respective phases; a controller for performing a PWM control by determining a duty ratio dof an upper switch on the first converter 1 side and a duty ratio dof an upper switch on the second converter 2 side; and a current sensor 4 for providing a measured current imeasured at a common bus 1 a of the first converter 1 to the controller, The controller performs the PWM control on the converters 1 and 2 by: adjusting the duty ratios dand dto make a bidirectional step-up operation or a step-down operation between a connection side of the common bus 1a of the converter 1 and a connection side of a common bus 2a of the converter 2; as well as estimating a value of a current flowing in the inductor on the basis of the measured current isampled at timing determined according to a relationship between a waveform of a PWM controlled carrier wave of the first converter 1 and the duty ratio d.SELECTED DRAWING: Figure 3

Description

  The present invention relates to a multi-phase power conversion circuit.

In high-power DC-DC converter circuits, when high-frequency switching is difficult due to restrictions on the switching devices used, an interleaved circuit configuration may be used to improve the quality of the input current and output voltage of the converter circuit. In an interleaved DC-DC converter circuit, the current of each phase may become unbalanced due to variations in elements such as switches and coils constituting the circuit of each phase. Therefore, as in the example of the n-phase interleaved bidirectional DC-DC converter circuit shown in FIG. 16 and the three-phase interleaved bidirectional DC-DC converter circuit shown in FIG. Current control is performed using current values i ₁ , i ₂ , i ₃ ,..., I _n obtained from the sensor. For example, there is a method disclosed in Non-Patent Document 1 for the current balance control of the inductor of each phase related to the three-phase interleaved boost chopper circuit.

  By the way, in an inverter for driving an AC motor, a method for obtaining a three-phase current by detecting the value of a DC link current using a current sensor or a shunt resistor has been proposed in Patent Document 1 or the like. In the case of a general AC motor, estimation is easy because the sum of three-phase currents becomes zero on connection.

  In recent years, residential electrification systems and electric vehicles are becoming widespread, and not only in the event of a power outage, but also on a daily basis, the electric vehicle battery can be used as a household power source. It is considered to charge the battery of an electric vehicle.

Takahiro Kawashima, Masayoshi Yamamoto, Shigeyuki Tsuji, Mamoru Tsuruya: “Current Balancing Control of Interleaved Chopper Circuits”, 2006 China Federation of Electrical and Information Society, p.484

JP 2003-219678 A

  In the interleave type DC-DC power conversion circuit, even if the switches of each phase are driven with the same duty ratio, the current of each phase is unbalanced due to variations in the characteristics of the elements constituting the circuit. As a countermeasure, a method of detecting and controlling the current flowing in each phase with a current sensor has been proposed (see FIGS. 16 and 17). However, this method has a problem that the cost increases by attaching a current sensor to each phase.

  In order to solve this problem, a method of reproducing a three-phase AC current by considering the DC link current proposed in Patent Document 1 and the conduction / non-conduction state of the switch as a method for driving the AC motor can be considered. However, in a circuit having an interleaved DC-DC converter circuit and a plurality of power supplies and a common high-voltage bus, unlike a general AC motor, the sum of three-phase currents is not always zero. Therefore, the method of Patent Document 1 cannot be applied as it is.

  In addition, when connecting an electric vehicle battery to a residential electrification system, etc., the voltage is stepped down when discharging (car battery → home electrification system) and boosted during charging (housing electrification system → car battery). In addition, there is a demand to increase the voltage during discharging and to decrease the voltage during charging.

  The present invention has been made based on such a demand, and relates to a multi-phase power conversion circuit capable of performing both a step-up operation and a step-down operation between a first DC power source and a second DC power source. It is an object to control the current of each phase using one current sensor.

Multiphase power conversion circuit of the present invention, the first converter and the second converter with and connect to their inductor in common provided for each phase, the duty ratio of the upper switch of the first converter d _a and a controller for PWM controlling the first converter and the second converter determines the duty ratio d _b of the upper switch of the second converter, the measured current i _h measured at the common bus of the first converter to the controller a current sensor for supplying the controller, the bidirectional step-up between the first converter connection side of the connection end of the common bus and common bus of the second converter by adjusting the duty ratio d _a, the d _b in conjunction to perform the operation and the step-down operation, obtained in accordance with the relationship between the waveform and the duty ratio d _a carrier in PWM control of the first converter timing Estimating a current value flowing through the inductor based on the sampled measurement current i _h, the first converter and the second converter is to PWM control.

  According to the present invention, it is possible to perform both a bidirectional step-up operation and a step-down operation between the first DC power source and the second DC power source. For example, when it is provided between an electric vehicle battery (first direct current power supply) and a residential electrification system (second direct current power supply), the voltage is increased or decreased during discharging from the electric vehicle battery to the residential electrical system. In addition, it is possible to increase and decrease the voltage when charging a battery of an electric vehicle from a residential electrification system.

  Moreover, the current of each phase can be controlled independently with only one current sensor. For example, even when there are variations in the characteristics of the circuit elements constituting each phase, it is possible to perform control to maintain the current balance of each phase with only one current sensor. By sampling the value of the current sensor connected to the high voltage side in synchronization with the carrier wave of each phase (for example, at the peak of the carrier wave or at the peak of the peak and valley), the current value of each phase is obtained from that value. The effect of eliminating the need to provide a current sensor for each phase is obtained.

It is a figure which illustrates the n phase interleave bidirectional DC-DC converter circuit comprised as a 1st example of the multiphase power converter circuit of this invention. It is a figure which illustrates an n phase interleave bidirectional DC-DC conversion circuit at the time of providing a current sensor in another position. It is a figure which illustrates the three-phase interleave bidirectional DC-DC converter circuit comprised as the 2nd example of the multiphase power converter circuit of this invention. FIG. 3 is a circuit diagram illustrating a controller for a three-phase interleaved bidirectional DC-DC conversion circuit. FIG. 5A is a diagram for explaining a carrier wave and a sampling signal generated by shifting phases by 120 (= 360/3) degrees, and FIG. 5A shows carrier waves V _{carr_a1} and V _{carr_a2} for driving each switch of the first converter. , V _{carr_a3} , and sampling signal smpl, (B) is a diagram illustrating carrier waves V _{carr_b1} , V _{carr_b2} , and V _{carr_b3} for driving each switch of the second converter. It is a figure explaining the estimation principle (estimation method 1) of the electric current value which flows into an inductor. It is a figure explaining the estimation principle (estimation method 2) of the electric current value which flows into an inductor. It is a figure explaining the estimation principle (estimation method 3) of the electric current value which flows into an inductor. It is a figure explaining the estimation principle (estimation method 4) of the electric current value which flows into an inductor. It is a figure which shows the result of Example 1 performed in order to confirm the effect of this invention. It is a figure which shows the result of Example 2 performed in order to confirm the effect of this invention. It is a figure which shows the result of Example 3 performed in order to confirm the effect of this invention. It is a figure which shows the result of Example 4 performed in order to confirm the effect of this invention. It is a figure which shows the result of Example 5 performed in order to confirm the effect of this invention. It is a figure which shows the result of Example 6 performed in order to confirm the effect of this invention. It is a figure which shows the conventional n phase interleaved bidirectional DC-DC converter circuit. It is a figure which shows the conventional three-phase interleave bidirectional | two-way DC-DC converting circuit.

  Hereinafter, the present invention will be described based on examples. FIG. 1 is a diagram illustrating an n-phase interleaved bidirectional DC-DC conversion circuit configured as a first embodiment of the multiphase power conversion circuit of the present invention. The multiphase power conversion circuit of the present embodiment is used, for example, in a HEMS (Home Energy Management System), and is used, for example, for connection between an electric vehicle and a residential electrification system.

As shown in FIG. 1, the first converter 1 and the second converter 2 are connected with inductors L ₁ , L ₂ ,..., L _n in common. The first converter 1 and the second converter 2 are provided for each phase. A first DC power source V _in (for example, a battery of an electric vehicle) is connected to the connection side of the common bus 1a of the first converter 1, and a second side is connected to the connection side of the common bus 2a of the second converter 2. A DC power source (for example, a house electrification system) 3 is connected. The common bus 1a of the first converter 1 is provided with a current sensor 4, and a controller described later uses a value i _h obtained by the current sensor 4 to use the inductor current of each phase (each phase inductor L ₁ , L ₂ ,..., L _n are estimated. Each switch S _a1u , S _a2u ,..., S _anu , S _a1l , S _a2l ,..., S _anl , S _b1u , S _b2u ,..., S _bnu , S _b1l , S _b2l,. , S _bnl can be generated by PWM (pulse width modulation) control. At this time, a triangular wave is generally used as a carrier wave. In addition, the carrier waves of each phase are shifted from each other by 360 / n degrees.

  Here, of the two converters 1 and 2, the converter in which the current sensor 4 is provided in the common buses 1 a and 2 a is referred to as the first converter 1, and the current sensor 4 is provided in the common buses 1 a and 2 a. The other converter is the second converter 2. Therefore, as shown in FIG. 1, when the current sensor 4 is provided in the common bus of the converter on the first DC power source Vin side, the converter on the first DC power source Vin side is the first converter 1, and The converter on the side of the DC power source 2 is the second converter 2. Further, as shown in FIG. 2, when the current sensor 4 is provided in the common bus of the converter on the second DC power source 3 side, the converter on the second DC power source 3 side is the first converter 1, The first converter 2 on the side of the DC power source Vin is the second converter 2.

  If necessary, the component of the first converter 1 is given a subscript “a”, and the component of the second converter 2 is given a subscript “b”. The elements are distinguished from the components of the second converter 2.

First converter 1 of each phase, the upper switch _{S a1u, S a2u, ...,} S anu and the upper switch _{S a1u, S a2u, ...,} S anu serially connected the lower switch _{S A1L, S A2L,} ... includes a _{S anl,} and the upper switch _{S a1u, S a2u, ...,} S anu a lower switch _{S A1L,} S A2L, _..., inductor _{L 1,} L 2 at the midpoint of the _{S anl,} ..., a _{L n} with connecting one end, upper switch _S A1U connected in _{series, S a2u, ...,} S _anu a lower switch _{S A1L,} S A2L, _..., a first converter of each phase commonly connected ends of _{S anl} 1 is an outer connection end. Also, the second converter 2 of each phase has upper switch _{S b1u, S b2u, ...,} S bnu and the upper switch _{S b1u, S b2u, ...,} lower switch connected in series to the _{S bnu S b1l, S b2l} , _..., includes a _{S BNL,} and the upper switch _{S b1u, S b2u, ...,} S bnu and lower switch _{S B1L,} S B2L, _..., inductors at the midpoint of the _{S bnl L 1, L 2,} ..., L with connecting _n other end of the upper switch _S B1u connected in _{series, S b2u, ...,} S _bnu and lower switch _{S b1l, S b2l, ...,} the respective phases commonly connected at both ends of the _{S BNL} 2 is an outer connection end of the converter 2.

Hereinafter, a description will be given by taking a three-phase circuit as an example in the case of n = 3. FIG. 3 is a diagram illustrating a three-phase interleaved bidirectional DC-DC conversion circuit configured as a third example of the multiphase power conversion circuit of the present invention. In FIG. 3, for the first converter 1, the inductor L ₁ , the lower switch S _a1l, and the upper switch S _a1u constitute a phase 1 converter. The inductor _{L 2} and the lower switch _{S A2L} and upper switch _{S A2U,} constitute a converter phase 2. Inductor L ₃ , lower switch S _a3l, and upper switch S _a3u constitute a phase 3 converter. The outer ends of the phase 1 to phase 3 converters are connected to each other to form an interleaved converter.

Also, the second converter 2, the inductor _{L 1} and the lower switch _{S B1L} and the upper switch _{S B1u,} constitute a converter of phase 1. The inductor _{L 2} and the lower switch _{S B2L} and upper switch _{S b2u,} constitute a converter phase 2. The inductor _{L 3} and the lower switch _{S B3l} and upper switch _{S b3u,} constitute a converter phase 3. The outer ends of the phase 1 to phase 3 converters are connected to each other to form an interleaved converter.

That is, the first converter 1 and the second converter 2 are connected with their inductors L _{1 to} L ₃ in common for each phase.
The first converter 1 of the lower switch _{S a1l, S a2l, S a3l} the outer end and the second converter 2 of the lower switch _{S B1L,} S _B2L, the outer end of the _{S B3l} are connected.

One end of the inductors (reactors) L _{1 to} L ₃ of the phase 1 to phase 3 is connected to the upper switches S _a1u , S _a2u , S _a3u and the lower switches S _a1l , S _a2l , of the first converter 1 connected in a three-phase bridge. Each is connected to the midpoint of _Sa3l . The other _{ends of} the inductors L _{1 to} L ₃ are at the _midpoints of the upper switches S _b1u , S _b2u , S _b3u and the lower switches S _b1l , S _b2l , S _b3l of the second converter 2 connected in a three-phase bridge. Connect each one. These switches include, for example, switching elements such as MOSFETs and freewheeling diodes, but are not limited thereto.

The outer end of the first converter 1 power V _in as a first DC power source, the outer end of the second converter 2 Load as a second DC power supply 3 are connected. A capacitor C is connected to the outer end of the second converter 2 on the Load side. The output current ih detected by the current sensor 4 provided on the common bus 1a of the first converter 1 is guided to a controller (see FIG. 4) described later. This controller includes upper switches S _a1u , S _a2u , S _a3u , S _b1u , S _b2u , S _b3u and lower switches S _a1l , S _a2l , S _a3l , S _b1l , first and second converters 1, 2. A drive signal for driving S _b2l and S _b3l is generated and output to the gate of the corresponding switch.

FIG. 4 is a circuit diagram illustrating a controller for a three-phase interleaved bidirectional DC-DC conversion circuit. The illustrated controller controls the output voltage of the three-phase interleaved bidirectional DC-DC conversion circuit and the current of each phase. The controller receives the output current i _h and the output voltage v _h and outputs a drive signal to the gates of the switching elements constituting the three-phase bridge. The output voltage v _h is supplied from a host control device (HEMS controller). The controller includes a first control unit 5 that controls the first converter 1 and a second control unit 6 that controls the second converter 2. The first controller 5 includes a voltage controller AVR (for example, a PI controller, but not limited to PI, P control and other control methods can be applied) 7, an inductor current estimator 8, a carrier wave, and a sampling signal generation 9, current controller ACR (for example, PI controller, but not limited to PI, P control and other control methods can be applied) 10, limiter 11, PWM circuit (comparator) 12, and dead time generator 13 is provided.

Voltage controller AVR7 amplifies the error between the output voltage v _h and the reference voltage V _{h *} ^(supplied from the higher-order control device) The error amplification signal is output to the current controller ACR10. When the value (difference) obtained by subtracting the high-voltage side output voltage v _h from the reference voltage V _h ^* is positive, the error amplification signal increases as the absolute value of the difference increases, and the change in value decreases as the difference decreases. Become. On the other hand, when the difference is negative, it decreases as the absolute value of the difference increases, and the change in value decreases as the difference decreases. Thus, high-voltage output voltage v _h duty ratio of the switch to stabilize is controlled. The current controller ACR10, the limiter 11, and the PWM circuit 12 are provided for each phase. The error amplification signal from the voltage controller AVR7 is branched for each phase via a 1/3 divider (not shown) if necessary, and the same error amplification signal is used as a current command value for each inductor for each phase. Output toward the current controller ACR10. The carrier wave and sampling signal generator 9 outputs the sampling signal smpl to the inductor current estimator 8 and outputs a carrier wave (for example, a triangular wave) generated in synchronization with the sampling signal to each phase PWM circuit 12.

FIG. 5A illustrates carrier waves V _{carr_a1} , V _{carr_a2} , V _{carr_a3} , and the sampling signal smpl generated by shifting the phase by 120 (= _360/3 ) degrees by the carrier wave and sampling signal generator 9. is there. The inductor current estimator 8 measures the output current i _h of the current sensor 4 on the basis of the carrier wave and the sampling signal smpl supplied from the sampling signal generator 9, and the duty ratios d _{a1 to} d _a3 of the upper switch of each phase. As described later, the estimation method is switched according to the value of each of the phase inductor currents to determine the estimated values i _{est1 to} i _est3 . The output current estimated for each phase is output to the current controller ACR10.

Current controller ACR10 provided in each phase, enter the difference signal of the error amplified signal from the voltage controller AVR7 each phase estimated output current (estimated value _i est1 _{through i est3} of each phase inductor current), the difference signal Is amplified as necessary to perform PI control and the like. That is, the deviation signal is integrated and multiplied by the integral gain, and the deviation signal multiplied by the proportional gain is added and the value is output. The output voltage from the current controller ACR10, after limiting the upper limit value via a limiter 11, a voltage command signal _{V ref_a1, V ref_a2, V ref_a3} ( voltage signal corresponding to the duty ratio _{d a1, d a2, d a3} ), When the carrier voltage exceeds the output voltage of the PI controller (current controller ACR10) in the comparator (PWM circuit 12) as compared with the carrier wave (triangular wave) voltage, the upper switches S _a1u , S _a2u,. , _Sanu is turned off (see FIG. 6 described later), and a driving signal for turning on the lower switches S _a1l , S _a2l ,..., _Sanl is generated from the driving circuit (dead time generator 13). That is, PWM control is performed to control the pulse width at which the switch is turned on by the output voltage from the PI controller. Lower switch _{S a1l, S a2l, S a3l} each upper switch _{S A1U,} S _A2U, the on-off signal obtained by inverting the _{S A3U.} The dead time generator 13 inserts a dead time between the lower switches S _a1l , S _a2l , S _a3l and the upper switches S _a1u , S _a2u , S _a3u as necessary. The dead time generator 13 generates a drive signal for driving the switch based on the comparison signal from the PWM circuit 12, and outputs the corresponding switch S _a1u , S _a2u , S _a3u , S _a1l , S _a2l , S _a3l . Output to the gate.

FIG. 6 is a diagram illustrating a state in which the PWM circuit 12 generates a switch drive signal. In FIG. 6, the description of S _a side and S _b side means the first converter 1 side and the second converter 2 side, and carrier a _{1 of} S a ₁ , carrier a _{2 of} S a ₂ , carrier a _{3 of} S a ₃ , carrier _{b1 ofS b1, carrier b2 ofS b2} , carrier b3 ofS described with _b3 is _{V carr_a1, V carr_a2, V carr_a3} , V carr_b1, V carr_b2, means _{V carr_b3, S a1, S a2} , S a3, S b1, The description of S _b2 and S _b3 means S _a1u , S _a2u , S _a3u , S _b1u , S _b2u and S _b3u . PWM circuit 12 compares the first converter 1, the duty ratio _d a1 _{to d} a3 for each phase _{(V ref_a1, V ref_a2, V} ref_a3) the carrier (triangular wave _{V carr_a1, V carr_a2, V carr_a3} ) and, When the carrier wave exceeds the duty ratio (when the voltage value exceeds), a drive signal is generated that turns off the upper switches S _a1u , S _a2u , S _a3u and turns on the lower switches S _a1l , S _a2l , S _a3l . That is, PWM control is performed to control the pulse width at which the switch is turned on by the output voltage from the current controller ACR10. The lower switches S _a1l , S _a2l and S _a3l are signals _obtained by inverting the upper switches S _a1u , S _a2u and S _a3u , respectively. The dead time generator 13 inserts a dead time between the lower switches S _a1l , S _a2l , S _a3l and the upper switches S _a1u , S _a2u , S _a3u as necessary.

In FIG. 6, for ease understanding, although expressed as _{d a} collectively each phase of the duty ratio _d a1 _{to d a3,} indeed duty ratio for each phase to _d a1 _{to d a3} and carrier V _Comparison with _{carr_a1} , _{Vcarr_a2,} and _{Vcarr_a3} is performed. There follows, represents a _{d a} collectively phase duty ratio _d a1 _{to d a3} of the first converter 1, also be expressed as _{d b} are collectively phase duty ratio _d b1 _{to d b3} of the second converter 2 .

The inductor current estimator 8 estimates each phase inductor current by sampling and calculating the output current i _h by the supplied sampling signal smpl. The estimated values i _{est1 to} i _est3 of the inductor current estimated for each phase are output to the current controller ACR10.

As shown in FIG. 5, since the carrier waves of each phase are used that are shifted by 360/3 degrees from each other, when the characteristics of the circuit elements constituting each phase are equal and the values of the estimated output currents of each phase are the same, Although the drive signals have the same duty ratio and different phases by 360/3 degrees for each phase, the phase at which the switches are turned on and off is adjusted for each switch by the estimated values i _{est1 to} i _est3 of the respective phase inductor currents.

The duty ratios d _{a1 to} d _a3 are values of 0.0 to 1.0, and are actually indicated by voltages. The voltage that is the same as the voltage at the valley of the voltage waveform of the carrier wave generated by the PWM circuit 12 is set to 0.0, and the voltage that is the same as the voltage at the peak of the voltage waveform of the carrier wave is set to 1.0. The

The second control unit 6 includes a carrier wave generator 14, a limiter 15, a PWM circuit (comparator) 16, and a dead time generator 17. The limiter 15 and the PWM circuit 16 are provided for each phase. The limiter 15 receives a difference signal between the output voltage from the current controller ACR 10 of the first controller 5 and the command voltage 18. After the upper limit value of this difference signal is limited via the limiter 15, the voltage command signals V _{ref_b1} , V _{ref_b2} , V _{ref_b3} (voltage signals corresponding to the duty ratios d _b1 , d _b2 , d _b3 ) are used as comparators. (PWM circuit 16) When the carrier voltage exceeds the output voltage of the PI controller (current controller ACR10) compared to the carrier wave (triangular wave) voltage, the upper switches S _b1u , S _b2u , S _b3u are turned off ( A dead time generator 17 generates a drive signal for turning on the lower switches S _b1l , S _b2l , S _b3l . That is, PWM control is performed to control the pulse width at which the switch is turned on by the output voltage from the PI controller. Lower switch _{S b1l, S b2l, S b3l} each upper switch _{S b1u, S b2u,} the on-off signal obtained by inverting the _{S b3u.} The dead time generator 17 inserts a dead time between the lower switches S _b1l , S _b2l , S _b3l and the upper switches S _b1u , S _b2u , S _b3u as necessary. The dead time generator 17 generates a drive signal for driving the switch based on the comparison signal from the PWM circuit 16, and outputs the corresponding switch _Sb1u , _Sb2u , _Sb3u , _Sb1l , _Sb2l , _Sb3l . Output to the gate.

The command voltage 18 is supplied from a host controller (not shown). In the example of FIG. 4, 0.8 is set as the duty ratio db of the upper switches S _b1u , S _b2u , S _b3u of the second converter 2 by the _{host controller} , and a command voltage having a value corresponding to this value is set. 18 is supplied to the PWM circuit 16 via the limiter 15.

FIG. 5B is a diagram illustrating carrier waves V _{carr_b1} , V _{carr_b2} , and V _{carr_b3} generated by the carrier wave generator 14 with phases shifted by 120 (= _360/3 ) degrees.

FIG. 6 is a diagram illustrating a state in which the PWM circuit 16 generates a switch drive signal. PWM circuit 16, the first converter 2, compares the duty ratio _{d b1 ~d b3 (V ref_b1 ~V} ref_b3) for each phase carrier (triangular wave _{V carr_b1, V carr_b2, V carr_b3} ) and the duty carrier When the ratio is exceeded (when the voltage value exceeds), a drive signal for turning off the upper switches S _b1u , S _b2u , S _b3u and turning on the lower switches S _b1l , S _b2l , S _b3l is generated. That is, PWM control is performed to control the pulse width at which the switch is turned on by voltage. The lower switches S _b1l , S _b2l , and S _b3l are signals _obtained by turning on and off the upper switches S _b1u , S _b2u , and S _b3u , respectively. The dead time generator 17 inserts a dead time between on and off of the lower switches S _b1l , S _b2l , S _b3l and the upper switches S _b1u , S _b2u , S _b3u as necessary.

During discharge from the first DC power supply V _in to the second DC power source 3, it converts the voltage is represented by Equation 4.
[Equation 4]
V _b = (d _a / (1−d _b )) V _a
As for the charging from the second DC power supply 3 to the first DC power supply V _in, the conversion of the voltage is represented by Equation 5.
[Equation 5]
V _a = ((1−d _b ) / d _a ) V _b
Here, _{V a:} the voltage of the first DC power supply _{V in, V b:} the second voltage of the DC power source 3, _{d a:} duty ratio of the first converter 1, _{d b:} the second converter 2 duty Ratio.

That is, by setting the duty ratios d _a and d _b , both the step-up operation and the step-down operation can be performed both during discharging and during charging. Switching between discharging and charging is controlled by a host control device.

FIG. 6 is a diagram illustrating the principle of estimating the inductor current (estimated output current). As shown in the upper and middle stages of FIG. 6, in the case of three phases, carriers V _{carr — a1} , V _{carr — a2} , V _{carr — a3} , V _{carr — b1} , V _{carr — b2} , V _{carr — b3} (the phase is shifted by 120 (= _360/3 ) degrees. in the figure, described as _{carrier a1 ofS a1, carrier a2 ofS} a2, carrier a3 ofS a3, carrier b1 ofS b1, carrier b2 ofS b2, carrier b3 ofS b3) is used. V _{carr — a1} and V _{carr — b1} are carriers corresponding to phase 1, V _{carr — a2} and V _{carr — b2} are phases 2, and V _{carr — a3} and V _{carr — b3} are carriers corresponding to phase 3. The illustrated d _a and d _b are the duty ratios of the first and second converters 1 and 2. However, as described above, the duty ratios d _a and d _b described in FIG. 6 are actually d _a1 to d _a3 and d _{b1 to} db ₃ that are different for each phase.

Further, the upper switches S _b1u , S _b2u , S _b3u , S _a1u , S _a2u , S _a3u (in the figure, S _a1 , S _a2 , S _{a3) of} the second converter 2 and the first converter 1. , S _b1 , S _b2 , and S _b3 ) are shown in the lower part of FIG. Note that the lower switches S _b1l , S _b2l , S _b3l , S _a1l , S _a2l , S _a3l (illustration of the on / off signal is omitted) of the phases 1 to 3 are respectively the upper switches S _b1u , S _b2u , S _b3u , S _{This is} an on / off signal _obtained by inverting _a1u , _Sa2u , and _Sa3u .

In the present invention, the measurement current i _h of the current sensor 4 is sampled at a phase synchronized with the carrier wave of each phase of the first converter 1. This sampling is performed at least once in each period of the carrier wave for each phase. I _D1 , i _D2 , i _D3 , i ′ _D1 , i ′ _D2 , i ′ _D3 shown in the figure are the timings at which the measured current i _h is indicated by vertical lines in the figure, that is, the carrier wave of the first converter 1. It represents the current value sampled at the timing of the valley of the waveform. In the present invention, the sampled current values i _D1 , i _D2 , i _D3 , i ′ _D1 , i ′ _D2 , i ′ _D3 are used to calculate the inductor current flowing in the inductors L ₁ , L ₂ , L ₃ of each phase. The values i ₁ , i ₂ , i ₃ are calculated and estimated.

[Estimation method 1]
In the estimation method 1, when the number of phases is an integer n of 2 or more and da <((n−1) / n), measurement is performed at the timing of the valley of the waveform of the carrier wave of the first converter 1 of each phase. The current i _h is estimated to be a current value flowing through the inductor of each phase.

As shown in FIG. 6, when the number of phases is an integer n of 2 or more and da <((n−1) / n), measurement is performed at the timing of the valley of the waveform of the carrier wave of each phase of the first converter 1. Sampling the current i _h facilitates the estimation calculation of the inductor current (estimated output current).

The measurement current i _h is the sum of the inductor current values i ₁ , i ₂ , i ₃ of each phase. At the timing of the valley of the waveform of the carrier wave V _{carr — a1 in} FIG. 6 (vertical lines labeled i _D1 , i ′ _D1 ), only the phase 1 switch S _a1u is on in the upper switch of the first converter 1, and the phase 2 and phase 3 switches S _a2u , S _a3u are off. Therefore, if sampling is performed at timings i _D1 and i ′ _D1 at the valley portions of the waveform of the carrier wave V _{carr_a1} of phase 1, only the inductor current value i ₁ of the inductor L ₁ of phase 1 can be detected. Similarly, when _sampling is performed at the timings i _D2 , i _D3 , i ′ _D2 , i ′ _D3 of the valleys of the waveforms of the carrier waves V _{carr — a2} and V _{carr — a3} of phase 2 and phase 3, inductors L ₂ and L _{3 of} phase 2 and phase 3 are sampled. Inductor current values i ₂ and i ₃ can be detected.

Thus, in the case of da <((n−1) / n), at the timing of the valley of the carrier waveform of the first converter 1, the value of the inductor current of that phase matches the value of the measurement current i _h. ing. At this timing, in the upper switches S _a1u , S _a2u , S _a3u of the first converter 1, it can be confirmed that only the switch of the corresponding phase is conducting. Therefore, the measured current i _h of the current sensor 4 is sampled at the timing when the waveform of the carrier wave is a valley, and the value of the inductor current of the phase can be detected.

_V carr_a1, V carr_a2, the value obtained by the current sensor 4 sampled at the timing of the valley of the waveform of the _{V carr_a3,} respectively _{i h1b, i h2b,} When _{i H3B,} the value _i 1 of each phase of the inductor current, i ₂ and i ₃ are obtained by Expression 6 to Expression 8.
[Equation 6]
i ₁ = i _h1b
[Equation 7]
i ₂ = i _h2b
[Equation 8]
i ₃ = i _h3b

In the case of n phase, the value obtained by the current sensor 4, when i _HKB, it is possible to obtain the inductor current i _k phase k in Equation 9.
[Equation 9]
i _k = i _hkb

であると推定する。 [Estimation method 2]
In estimation method 2, and 3 or more integer n the number of phases, (1 / n) ≦ d For _a, the measured current i _h measured in angle of the timing of the first converter 1 carrier waveform of each phase _Is i _hkt , the output current ik flowing through the inductor of phase k is

It is estimated that.

Figure 7 is a three or more integer n the number of phases is a diagram for explaining the estimation principle of the inductor current when the _{(1 / n) ≦ d a} . In FIG. 7, the description of S _a side and S _b side means the first converter 1 side and the second converter 2 side, and carrier a _{1 of} S a ₁ , carrier a _{2 of} S a ₂ , carrier a _{3 of} S a ₃ , carrier _{b1 ofS b1, carrier b2 ofS b2} , carrier b3 ofS described with _b3 is _{V carr_a1, V carr_a2, V carr_a3} , V carr_b1, V carr_b2, means _{V carr_b3, S a1, S a2} , S a3, S b1, The description of S _b2 and S _b3 means S _a1u , S _a2u , S _a3u , S _b1u , S _b2u and S _b3u . As in FIG. 6, in the case of three phases, carriers V _{carr_a1} , V _{carr_a2} , V _{carr_a3} , V _{carr_b1} , V _{carr_b2} , and V _{carr_b3} are used that are shifted in phase by 120 (= _360/3 ) degrees.

As shown in FIG. 7, and 3 or more integer n the number of phases, (1 / n) ≦ d For _a, the mountains of the timing of the first converter 1 of each phase of the carrier wave, measured current i _h Is sampled, an estimation calculation of the inductor current value becomes possible.

When the measurement current i _h is sampled at the timing of the peak of the carrier waveform of the first converter 1 in FIG. 7 (vertical lines labeled i _U1 , i _U2 , i _U3 ), the upper switch S of the first converter 1 _{In a1u} , _Sa2u , and _Sa3u , the upper switches of the phases other than the phase corresponding to the timing of the peak of the carrier shape are turned on. For example, the timing of the mountain shape of the carrier phase 1 _{(i U1} and display the vertical lines), upper switch _S A2U excluding the upper switch _{S A1U} phase _1, becomes _{S A3U} conductive state, the measured current at this time When i _h is sampled, the sum (i ₂ + i ₃ ) of the inductance current excluding the inductance current i ₁ of phase 1 is obtained.

Measurements Similarly, the mountain timing of the shape of the carrier phase 2 _{(i U2} and display the vertical lines), upper switch _S A1U excluding the upper switch _{S A2U} phase _{2, S A3U} becomes conductive, this time When the current i _h is sampled, the sum of the inductance currents (i ₁ + i ₃ ) excluding the phase 2 inductance current i ₂ is obtained, and the timing of the peaks of the phase 3 carrier shape (vertical line labeled i _U3 ) in the upper switch _S A1U excluding the upper switch _{S A3U} phase _{3, S A2U} is conductive, the sum of the sampling the measured current _{i h} this time, inductance current excluding the inductance current _{i 3} phase 3 ( i ₁ + i ₂ ).

_Here, the measurement current _{i h} sampled at _{i U1 i h1t, i U2} of sampled measured current _{i h} a _{i H2T,} when the measured current _{i h} sampled at _{i U3} and _{i H3T,} each phase of The inductor current values i ₁ , i ₂ , and i ₃ can be obtained by Expressions 11, 12, and 13.
[Equation 11]
_{i 1 = (i h2t + i} h3t -i h1t) / 2
[Equation 12]
i ₂ = (i _h1t + i _h3t −i _h2t ) / 2
[Equation 13]
i ₃ = (i _h1t + i _h2t −i _h3t ) / 2

In the case of n-phase, the inductor current of phase k can be obtained by Equation 14.

[Estimation method 3]
In the estimation method 3, if the number of phases is an integer n of 3 or more and the switching points S1 and S2 are (1 / n) ≦ S1 <S2 <((n−1) / n), the controller calculates the duty ratio. If d _a is ready for d _{a <S2} S2 ≦ d _a from the state by an increase in d _a of the measured current i _h measured in angle of the timing of the first converter 1 carrier waveform of each phase When the the _{i HKT,} the output current _{i k} flowing through the inductor of phase k estimated to be equation 15, the state of _{d a} ≦ S1 by a reduction in _{d a} from the state of the duty ratio _{d a} is S1 _{<d a} In this case, the measured current i _h measured at the timing of the trough of the waveform of the carrier wave of the first converter 1 of each phase is estimated to be the value of the current flowing through the inductor of each phase.

That is, the above estimation method 1 can be applied when d _a <((n−1) / n), and the above estimation method 2 can be applied when (1 / n) ≦ d _a . This relationship is shown in FIG. For example, in the case of three phases (n = 3), estimation method 1 can be applied when d _a <0.66 (= 2/3), and estimation method 2 is used when 0.33 (= 1/3) ≦ d _a. Applicable. Therefore, in the case of 0.33 (= 1/3) ≦ d _a <0.66 (= 2/3), both estimation methods 1 and 2 can be applied.

In estimation method 3, to set the two switching points S1, S2 ranges applicable both estimation method 1, the duty ratio d _a exceeds the switch point S2 to the arrow A direction (increasing direction) in FIG. 8 In this case, the estimation method is switched from the estimation method 1 to the estimation method 2. However, even if the switching point S2 is exceeded in the arrow B direction (decreasing direction), the estimation method is not switched and the estimation method 2 is maintained. Although switches the estimation method in the case where the duty ratio d _a exceeds the switching points S1 in the direction of arrow B (decreasing direction) in FIG. 8 to estimation method 2 → estimation method 1, in the direction of arrow A (increasing direction) Even if the switching point S1 is exceeded, the estimation method is not switched and the estimation method 1 is maintained.

In this way, by setting the switching point S2 from the estimation method 1 to the estimation method 2 and the switching point S1 from the estimation method 2 to the estimation method 1 to different values, hysteresis characteristics can be provided, and d _a is Even if there is a fine increase / decrease near the switching point, frequent switching of the estimation method can be prevented, and control of the bidirectional buck-boost DC-DC converter circuit can be stabilized.

であると推定する。 [Estimation method 4]
In the estimation method 4, assuming that the number of phases is an integer n of 3 or more and the switching point S3 is (1 / n) ≦ S3 ≦ ((n−1) / n), the controller has a duty ratio d _a of d for _{a <S3,} estimated to be the value of the current flowing through the measured current i _h measured at the timing of the valley of the first converter 1 carrier waveform of each phase to each phase of the inductor, the duty ratio d _a is for S3 ≦ d _a, when the measured current i _h measured in angle of the timing of the first converter 1 carrier waveform of each phase and i _HKT, the output current i _k flowing through the inductor of phase k,

It is estimated that.

As described above, in the case of (1 / n) ≦ d _a <((n−1) / n), both estimation methods 1 and 2 can be applied. In estimation method 4, to set the switching point S3 is a range that can be applied both estimation method 1, estimation method when the duty ratio d _a exceeds the switch point S3 is the direction of arrow A (increasing direction) in FIG. 9 Is switched from the estimation method 1 to the estimation method 2, and conversely, when the switching point S3 is exceeded in the arrow B direction (decreasing direction), the estimation method is switched from the estimation method 2 to the estimation method 1. In the example of FIG. 9, the switching point S3 is set to 0.5. In this way, when the number of switching points is one, the control can be simplified.

  10 to 15 show simulation results when the estimation method 1 is applied to the three-phase interleaved bidirectional DC-DC converter circuit (see FIG. 3) during charging. 10 to 15, the frequency of the carrier wave of the first converter 1 and the frequency of the carrier wave of the second converter 2 are the same. However, they are not necessarily the same. For example, the frequency of the carrier wave of the first converter 1 may be doubled or four times the frequency of the carrier wave of the second converter 2. 10 to 15, the phase of the carrier wave of the first converter 1 and the carrier wave of the second converter 2 are shifted by 180 degrees, but the present invention is not limited to this.

  In each figure, the upper stage is the carrier wave of the first converter 1 (phase 1: 1 dotted line, phase 2: two-dot chain line, phase 3: broken line) and the duty ratio da (solid line), and the middle stage is the carrier wave of the second converter 2. (Phase 1: 1 dot-dash line, phase 2: 2-dot chain line, phase 3: dashed line) and duty ratio db (solid line), lower stage is inductor current (phase 1: 1 dot-dash line, phase 2: 2-dot chain line, phase 3: Broken line) and measurement current ih (solid line).

[Example 1]
FIG. 10 shows simulation results when the duty ratio d _a of the first converter 1 is 0.3 and the duty ratio d _b of the second converter 2 is 0.9. In the relationship between d _a and n (= 3), d _a <((n−1) / n) where the estimation method 1 can be applied.

At the trough timing of the phase 1 carrier waveform of the first converter 1, the measurement current i _h is the inductor current of the phase L inductor L ₁ , and at the trough timing of the phase 2 carrier waveform, the measurement current i _h is phase 2 of the inductor current of the inductor L _2, the timing of the valley of the carrier wave phase 3, the measured current i _h is the inductor current of the phase 3 of the inductor L _3. Therefore, it was confirmed that the current value flowing through each phase inductor can be estimated based on the measurement current i _h of one current sensor 4 by applying the estimation method 1.

[Example 2]
FIG. 11 shows simulation results when the duty ratio d _a of the first converter 1 is 0.5 and the duty ratio d _b of the second converter 2 is 0.9. To Example 1, by changing the duty ratio d _a. In the relationship between d _a and n (= 3), d _a <((n−1) / n) where the estimation method 1 can be applied.

Similar to Example 1, at the timing of the trough of the phase 1 carrier waveform of the first converter 1, the measured current i _h is the inductor current of the phase L inductor L ₁ and the trough of the phase 2 carrier waveform. At timing, the measured current i _h is the inductor current of the phase 2 inductor L ₂ , and at the timing of the trough of the phase 3 carrier waveform, the measured current i _h is the inductor current of the phase 3 inductor L ₃ . Therefore, it was confirmed that the current value flowing through each phase inductor can be estimated based on the measurement current i _h of one current sensor 4 by applying the estimation method 1.

[Example 3]
FIG. 12 shows simulation results when the duty ratio d _a of the first converter 1 is 0.7 and the duty ratio d _b of the second converter 2 is 0.9. To Examples 1 and 2, and by changing the duty ratio _{d a.} The relationship between d _a and n (= 3), which can be applied estimation method 2 (1 / n) has a ≦ _{d a.}

At the timing of the peak of the phase 1 carrier waveform of the first converter 1, the measured current i _h is the sum of the inductor current of the phase 2 inductor L _{2 and} the inductor current of the phase 3 inductor L ₃ , and the phase 2 , The measured current i _h is the sum of the inductor current of phase 1 inductor L _{1 and} the inductor current of phase 3 inductor L ₃ , and the timing of the peak of the phase 3 carrier waveform. Then, the measured current i _h is the sum of the inductor current of the phase 1 inductor L _{1 and} the inductor current of the phase 2 inductor L ₂ . Therefore, it was confirmed that the value of the current flowing through each phase inductor can be estimated based on the measured current i _h of one current sensor 4 by applying the estimation method 2.

[Example 4]
FIG. 13 shows simulation results when the duty ratio d _a of the first converter 1 is 0.3 and the duty ratio d _b of the second converter 2 is 0.1. And varying the duty ratio d _b to Example 1. In the relationship between d _a and n (= 3), d _a <((n−1) / n) where the estimation method 1 can be applied.

At the trough timing of the phase 1 carrier waveform of the first converter 1, the measurement current i _h is the inductor current of the phase L inductor L ₁ , and at the trough timing of the phase 2 carrier waveform, the measurement current i _h is phase 2 of the inductor current of the inductor L _2, the timing of the valley of the carrier wave phase 3, the measured current i _h is the inductor current of the phase 3 of the inductor L _3. Therefore, it was confirmed that the current value flowing through each phase inductor can be estimated based on the measurement current i _h of one current sensor 4 by applying the estimation method 1.

[Example 5]
FIG. 14 shows simulation results when the duty ratio d _a of the first converter 1 is 0.5 and the duty ratio d _b of the second converter 2 is 0.1. To Example 2, by changing the duty ratio d _a. In the relationship between d _a and n (= 3), d _a <((n−1) / n) where the estimation method 1 can be applied.

As in Example 4, at the timing of the trough of the phase 1 carrier waveform of the first converter 1, the measured current i _h is the inductor current of the phase L inductor L ₁ and the trough of the phase 2 carrier waveform. At timing, the measured current i _h is the inductor current of the phase 2 inductor L ₂ , and at the timing of the trough of the phase 3 carrier waveform, the measured current i _h is the inductor current of the phase 3 inductor L ₃ . Therefore, it was confirmed that the current value flowing through each phase inductor can be estimated based on the measurement current i _h of one current sensor 4 by applying the estimation method 1.

[Example 6]
FIG. 15 shows simulation results when the duty ratio d _a of the first converter 1 is 0.7 and the duty ratio d _b of the second converter 2 is 0.1. To Examples 4 and 5, and by changing the duty ratio _{d a.} The relationship between d _a and n (= 3), which can be applied estimation method 2 (1 / n) has a ≦ _{d a.}

At the timing of the peak of the phase 1 carrier waveform of the first converter 1, the measured current i _h is the sum of the inductor current of the phase 2 inductor L _{2 and} the inductor current of the phase 3 inductor L ₃ , and the phase 2 , The measured current i _h is the sum of the inductor current of phase 1 inductor L _{1 and} the inductor current of phase 3 inductor L ₃ , and the timing of the peak of the phase 3 carrier waveform. Then, the measured current i _h is the sum of the inductor current of the phase 1 inductor L _{1 and} the inductor current of the phase 2 inductor L ₂ . Therefore, it was confirmed that the value of the current flowing through each phase inductor can be estimated based on the measured current i _h of one current sensor 4 by applying the estimation method 2.

Further, from Examples 1 to 6, it was confirmed that it is possible to apply the same estimation method by changing _{d b} 0.1 0.9. when changing the d _b to other values is the same. Accordingly, without being affected by the value of d _b, it was confirmed to be able to determine the estimation method based on the value of d _a.

1: first converter 1a: common bus 2 of first converter 1: second converter 2a: common bus of second converter 2: current sensor 5: first controller 6 of controller: first controller 2 control units L ₁ , L ₂ , L ₃ , L _n : inductors for each phase

Claims (6)

The first converter and the second converter are connected to each other with their inductors in common, and are provided for each phase.
A controller for PWM controlling said first converter upper switch of the duty ratio d _a and the second converter of the first to determine the duty ratio d _b of the upper switches of the converter and the second converter, the A current sensor for supplying the controller with a measured current i _h measured on a common bus of the first converter;
Wherein the controller, the duty ratio d _a, a bi-directional boost operation between the connection side of the common bus of the second converter and to adjust the d _b connection side of the common bus of said first converter Buck together to perform the operation, through the inductor based on the first converter the measured current i _h sampled at a timing determined in accordance with the relationship between the carrier wave of the PWM control and the duty ratio d _a of A multiphase power conversion circuit characterized by estimating a current value and performing PWM control on the first converter and the second converter. When the number of phases is an integer n of 2 or more, and d _a <((n−1) / n), the controller is sampled at the timing of the valley of the waveform of the carrier wave of the first converter of each phase. multiphase power conversion circuit of claim 1, wherein the estimating and the measured current i _h is a value of current flowing through each phase of the inductor. The number of phases and an integer of three or more n, (1 / n) ≦ d For _a, the controller, the measured current i _h measured in angle of the timing of each phase of the first converter carrier waveform _Is i _hkt , the output current i _k flowing through the inductor of phase k is

The multi-phase power conversion circuit according to claim 1, wherein The number of phases is three or more integer n, when the switching point S1, S2 is assumed to be (1 / n) ≦ S1 < S2 <((n-1) / n), the controller, the duty ratio _{d a} is When the state of d _a <S 2 is changed to _a state of S 2 ≦ d _a due to an increase in da, the measured current i _h measured at the timing of the peak of the carrier waveform of the first converter of each phase is i _{If hkt} , the output current i _k flowing through the inductor of phase k is

Is assumed to be
If the duty ratio d _a is ready for d _a ≦ S1 by a reduction in d _a from the state of S1 <d _a, the measured timing of the valley of each phase of the first converter carrier waveform multiphase power conversion circuit of claim 1, wherein the estimating and the measured current i _h is a value of current flowing through each phase of the inductor. The number of phases is three or more integer n, the switching point S3 is assumed to be (1 / n) ≦ S3 ≦ ((n-1) / n), the controller, the duty ratio _{d a} is _d a <S3 cases, it estimates that a current value flowing in the measurement current i _h measured at the timing of the valley of each phase of the first converter carrier waveforms to each phase of the inductor, the duty ratio d _a is S3 for ≦ d _a, when the measuring current i _h measured at the timings of the peaks of each phase of the first converter carrier waveform and i _HKT, the output current i _k flowing through the inductor of phase k,

The multi-phase power conversion circuit according to claim 1, wherein The first converter of each phase includes an upper switch and a lower switch connected in series to the upper switch, and connects one end of the inductor to a midpoint of the upper switch and the lower switch, and in series. Both ends of the connected upper switch and lower switch are connected in common to form an outer connection end of the first converter of each phase,
The second converter of each phase includes an upper switch and a lower switch connected in series to the upper switch, and connects the other end of the inductor to a midpoint of the upper switch and the lower switch, 6. The multiple connection according to claim 1, wherein both ends of the upper switch and the lower switch connected in series are commonly connected to form an outer connection end of the second converter of each phase. Phase power conversion circuit.

Images