JP2018078135A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide having a substrate structure which prevents mounting failure of an element and improve positioning accuracy when mounting an element.SOLUTION: A semiconductor device 10A includes: a mounting substrate 11 having an element mounting surface 11S; an element mounting pad 13 which is arranged on the element mounting surface and has a base pad 13A and a metal layer 13B on a top face; and a semiconductor element 15 which is mounted on the element mounting pad and includes a support substrate 15A having on a top face, a plurality of semiconductor layers 15B which are arranged in a direction along two sides opposite to each other in an in-plane direction of the element mounting surface and arranged at a distance from each other. The semiconductor device 10A has on a top face of the base pad, a groove structure which is provided under a region between the plurality of semiconductor layers adjacent to each other in the direction along the two sides and includes a first groove with both ends reaching the two sides, respectively.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a substrate structure on which a semiconductor element such as a light emitting element is mounted.

  An electronic device having a semiconductor element is formed, for example, by mounting the semiconductor element on a substrate using a conductive adhesive such as solder. At the time of mounting, there is a problem that a defective mounting of the element occurs due to an excessive conductive adhesive, or a short circuit of the wiring occurs.

  Patent Document 1 discloses a substrate in which a solder pool including through holes or recesses is formed on a soldering pad. Patent Document 2 discloses a configuration in which a third land is formed on one of conductor patterns extending from each of two surface mounting lands to prevent solder accumulation. Patent Document 3 discloses a substrate in which a recess for storing a conductive adhesive is formed at a place where a light emitting element array is placed.

JP-A-4-87393 JP-A-5-267833 JP-A-9-174923

  An element in which a metal layer for bonding is formed at the bottom of a metal pad (land) of a substrate as described in Patent Documents 1 to 3, and the metal pad and the metal layer for bonding are reduced with a reducing agent such as a flux. Consider the case of fusion bonding via In this case, in the bonding process, there is a problem that the liquid flux flows out from the metal pad to the outside in a non-uniform manner, and the device moves accordingly.

  In addition, when a plurality of elements are juxtaposed in close proximity, there is a problem in that adjacent elements come close to each other when the fluxes used for joining adjacent elements come into contact with each other at the time of joining. there were.

  The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor device having a substrate structure that can prevent mounting failure of an element and increase positioning accuracy when mounting the element. Yes.

  In order to achieve the above-described object, a semiconductor device of the present invention has a mounting substrate having an element mounting surface, and is disposed on the element mounting surface, has a metal layer on the upper surface, and each of the upper surfaces has each other. An element mounting pad having two sides facing each other in the in-plane direction of the element mounting surface, and mounted on the element mounting pad, and a plurality of elements are arranged on the upper surface in the direction along the two sides and separated from each other A semiconductor element including a support substrate having a plurality of semiconductor layers, and provided on an upper surface of the element mounting pad under a region between the plurality of semiconductor layers adjacent in the direction along the two sides; A groove structure including a first groove having both end portions reaching each of the two sides is formed.

3 is a plan view of the substrate structure of the semiconductor device of Example 1. FIG. 3 is a partial side view of the substrate structure of the semiconductor device of Example 1. FIG. 1 is a side view of a substrate structure of a semiconductor device of Example 1. FIG. 3 is a partial plan view when a semiconductor element is mounted on the substrate structure of Example 1. FIG. 2 is a partial side view when a semiconductor element is mounted on the substrate structure of Example 1. FIG. It is a partial side view of a semiconductor device. It is a fragmentary top view of the substrate structure of the semiconductor device of a modification. It is a fragmentary top view of the substrate structure of the semiconductor device of a modification. It is a fragmentary top view of the substrate structure of the semiconductor device of a modification. It is a fragmentary top view of the substrate structure of the semiconductor device of a modification. It is a partial side view of the board | substrate structure of the semiconductor device of a modification.

  Hereinafter, preferred embodiments of the present invention will be described in detail. In the following description and the accompanying drawings, substantially the same or equivalent parts are denoted by the same reference numerals.

[Substrate structure]
Hereinafter, the substrate structure 10 used in the semiconductor device of this example will be described.

  FIG. 1A is a plan view of the substrate structure 10. FIG. 1B is a partial side view of the substrate structure 10. FIG. 1C is a side view of the substrate structure 10 as seen from a different direction than FIG. 1B. In the following description, a substrate structure in which three semiconductor elements are arranged in a row on one substrate will be described as an example.

  The substrate 11 as a mounting substrate is a Si substrate having a flat element mounting surface 11S on one surface. The substrate 11 may be a substrate made of another material, a sintered body substrate such as AlN, or a resin substrate.

  The element mounting pad 13 is provided on the element mounting surface 11S, and has a rectangular planar shape having two sides RS facing each other. The element mounting pads 13 are formed to be separated from each other in the region where the semiconductor element is mounted on the element mounting surface 11S. That is, the element mounting pads 13 are arranged in a row on the element mounting surface 11S so as to be separated from each other. The element mounting pads 13 are arranged on the element mounting surface 11S so that the arrangement direction is parallel to the direction of the two sides RS.

  Note that the center line of each element mounting pad 13 along the arrangement direction of the element mounting pads 13 is XC. That is, the direction along the center line XC is the arrangement direction of the element mounting pads 13.

  In the present embodiment, as an example, the element mounting pads 13 are arranged in a straight line, and the center line XC of the three element mounting pads 13 is common. The center line of each element mounting pad 13 in the direction perpendicular to the arrangement direction of the element mounting pads 13 is YC. Further, in this embodiment, since the case where three semiconductor elements are arranged in a row as described above is taken as an example, three element mounting pads 13 are also arranged in a row.

  A semiconductor layer arrangement region R is provided on the upper surface of the element mounting pad 13. The semiconductor layer arrangement regions R are arranged in two rows in the direction along the center line XC on the upper surface of the element mounting pad 13. In the present embodiment, two semiconductor layer arrangement regions R are arranged in one row. That is, in this embodiment, four semiconductor layer arrangement regions R are arranged on the upper surface of the element mounting pad 13.

  On the upper surface of the element mounting pad 13, a pad groove 13G which is an elongated groove is formed. The pad groove 13G has a groove part G1 formed in a region between the semiconductor layer arrangement region elements R adjacent in the center line XC direction. In other words, the groove part G1 extends in a direction along the center line YC in the in-plane direction of the mounting surface 11S, that is, perpendicular to the two sides RS of the element mounting pad 13.

  The groove part G1 is formed so that each of the end parts reaches the two sides RS. The pad groove 13G has a groove part G2 formed in a region between adjacent semiconductor layer arrangement regions R in the direction of the center line YC. The groove part G2 extends from the center of the groove part G1 in the in-plane direction of the element mounting surface 11S in a direction along the center line XC, that is, a direction parallel to the two sides RS of the element mounting pad 13. The groove portion G2 terminates in the upper surface of the element mounting pad 13 and does not reach the end portion of the element mounting pad 13.

  As described above, the pad groove 13G has a cross-shaped planar shape composed of G1 and G2 extending vertically. In other words, on the upper surface of the element mounting pad 13, four semiconductor layer arrangement regions R delimited by the cross-shaped pad groove 13G are provided.

  FIG. 1B shows a side view seen from the direction along the center line YC. In FIG. 1B, among the three element mounting pads 13, the central element mounting pad 13 and its periphery are shown in an enlarged manner. As shown in FIG. 1B, the element mounting pad 13 includes a base pad 13A made of a metal material such as Au or Cu, and a bonding pad 13B formed on the base pad 13A. The base pad 13A is formed by depositing a metal material such as Au or Cu on the element mounting surface 11S by patterning by photolithography or the like.

  A base pad groove 13AG, which is an elongated rectangular parallelepiped groove, is formed on the upper surface of the base pad 13A. The base pad groove 13AG has a planar shape corresponding to the pad groove 13G. That is, the base pad groove 13AG is mounted on the element from the center of the groove part AG1 as the first groove part extending in a direction perpendicular to the two sides RS of the element mounting pad 13 in the in-plane direction of the element mounting surface 11S and the groove part AG1. It consists of a groove part AG2 as a second groove part extending in parallel with the two sides RS of the pad 13. In other words, the base pad groove 13AG has a cross-shaped planar shape composed of AG1 and AG2 extending perpendicularly to each other.

  The groove part AG1 is formed so that each end reaches the two sides RS (see FIG. 1A), similarly to the groove part G1 described above. Further, the groove part AG2 terminates in the upper surface of the base pad 13A and does not reach the end part of the base pad 13. Similar to the pad groove 13G, the base pad groove 13AG is formed symmetrically with respect to the center line XC and the center line YC of the element mounting pad 13.

  The base pad groove 13AG is formed by, for example, machining and grinding the upper surface of the base pad 13A. Further, the base pad groove 13AG may be formed by performing wet etching or dry etching on the upper surface of the base pad groove 13A.

  The bonding pad 13B is a layer made of a metal material formed on the base pad 13A. The bonding pad 13B is made of, for example, AuSn. The bonding pad 13B is formed by depositing a metal material such as AuSn on the base pad 13A by patterning by photolithography or the like.

  The bonding pad 13B is formed by uniformly forming a metal material on the base pad 13A. Therefore, on the surface of the bonding pad 13B, that is, the upper surface of the element mounting pad 13, the above-described pad groove 13G is formed as a groove structure having a shape derived from the base pad groove 13AG on the upper surface of the base pad 13A.

  As described above, the bonding pad groove 13G has a shape derived from the base pad groove 13AG. Accordingly, the pad groove 13G is an elongated rectangular parallelepiped groove, like the base pad groove 13AG.

  The substrate groove 11G is a groove formed in the element mounting surface 11S of the substrate 11. The substrate groove 11G continuously extends from both ends of the groove part G1 of the pad groove 13G when viewed from a direction perpendicular to the element mounting surface 11S (hereinafter also referred to as “when viewed from above”). The substrate groove 11G extends from the two sides RS in a direction perpendicular to the two sides RS, that is, a direction perpendicular to the arrangement direction of the element mounting pads 13.

  FIG. 1C shows a side view seen from the direction along the center line XC. As shown in FIGS. 1A and 1C, the substrate groove 11G is formed from an element mounting surface 11S immediately below both ends of the pad groove 13G, and in a top view, a direction perpendicular to the two sides RS, that is, an element mounting pad 13 extends perpendicularly to the arrangement direction of 13 and terminates without reaching the end of the element mounting surface 11S.

  As shown in FIG. 1B, the width W1 of the substrate groove 11G is preferably larger than the width W2 of the groove part G1 of the pad groove 13G at the end part in contact with the pad groove 13G in a top view. This is to prevent the flux flowing out from the end of the groove G1 from flowing out to a region other than the substrate groove 11G on the element mounting surface 11S in the manufacture of the semiconductor device described later.

[Semiconductor device and its manufacture]
Hereinafter, a semiconductor device 10A manufactured by mounting a semiconductor element such as a light emitting element on the substrate 11 and the manufacturing thereof will be described. Here, a case where a light emitting element is mounted as a semiconductor element will be described as an example.

  FIG. 2 shows a partial plan view when the semiconductor element 15 is placed on the substrate 11. In this plan view, only one of the three element mounting pads 13 shown in FIG. 1A and its peripheral part are shown. 3 shows a side view of the substrate 11 and the semiconductor element 15 as seen from the direction along the central axis YC of FIG.

  As shown in FIG. 2, the semiconductor element 15 has a support substrate 15A made of Si or the like, and a semiconductor layer 15B having an active layer (not shown) formed on one surface of the support substrate 15A. Yes. In the semiconductor element 15, the semiconductor layer 15B serves as a light emitting portion. The semiconductor layer 15B emits light and generates heat when the semiconductor device 10A is driven, for example, during a lighting operation as an LED device.

  The planar shape of the support substrate 15 </ b> A is substantially the same as the planar shape of the element mounting pad 13. A total of four semiconductor layers 15B are arranged along each of the center line XC and the center line YC. The support substrate 15 </ b> A is arranged so as to overlap the element mounting pad 13 as viewed from above, and the semiconductor layer 15 </ b> B is brought on the semiconductor layer arrangement region R. In other words, the semiconductor layer arrangement region R is provided so as to exist immediately below the semiconductor layer 13 </ b> B when the light emitting element 15 is mounted on the element mounting pad 13.

  As shown in FIGS. 2 and 3, when mounting the semiconductor element 15 on the substrate 11, first, a flux FL, which is a liquid as a reducing / fixing material, is applied on the element mounting pad 13. Thereafter, the semiconductor element 15 is mounted on the applied flux FL using a die bonder or the like.

  As shown in FIG. 3, the semiconductor element 15 has a bonding layer 15C provided on the other surface of the support substrate 15A opposite to the one surface. The bonding layer 15C is formed of a metal eutectic with the metal forming the bonding pad 13B, such as Au or AuSn. The bonding layer 15C has the same planar shape as the bonding pad 13B.

  The semiconductor element 15 is placed on the element mounting pad 13 so that the upper surface of the bonding pad 13B faces the surface of the bonding layer 15C. In the case of this mounting, when the flux FL does not spread in the pad groove 13G at the time of the application, the flux FL may spread in the bonding pad groove 13G during the mounting.

  Further, when there is an excessive flux FL, the excessive flux FL is pushed out from the groove portion G1 of the pad groove 13G toward the side surface of the element mounting pad 13. The extruded flux FL flows into the substrate groove 11G from the end portion of the groove portion G1 through the side surface of the element mounting pad 13, and accumulates in the substrate groove 11G.

  After this placement, the substrate 11 on which the semiconductor element 15 is placed is heated in, for example, a constant temperature furnace so that the bonding pad 13B and the bonding layer 15C are eutectic. The semiconductor element 15 is fixed on the element mounting pad 13 by metal bonding. During the bonding and fixing, the bonding pad 13B is melted by heating.

  In the initial stage before the melting of the bonding pad 13B at the time of fixing by heating, the flux FL applied onto the bonding pad 13B melts and spreads further to the surface of the bonding pad 13B including the pad groove 13G.

  At this time, if there is surplus flux FL, it flows out in the direction of the arrow in FIG. That is, the surplus flux is pushed out from the pad groove 13 </ b> G toward the side surface along the two sides RS of the element mounting pad 13. In other words, the surplus flux does not flow out to a region between adjacent element mounting pads 13 on the element mounting surface 11S.

  The extruded flux FL flows along the side surface of the element mounting pad 13 into the substrate groove 11G and accumulates in the substrate groove 11G. That is, the substrate groove 11G functions as a flux reservoir that accumulates the extruded flux FL.

  As described above, the width W1 of the substrate groove 11G is preferably larger than the width W2 of the pad groove 13G immediately below the pad groove 13G (see FIG. 2). By doing in this way, it can prevent that the flux which flows out from the edge part of the pad groove | channel 13G flows out to area | regions other than the board | substrate groove | channel 11G of the element mounting surface 11S.

  FIG. 4 shows a partial side view of the semiconductor device 10A completed by the fixing. 4 is a side view as seen from the direction along the central axis YC of FIG. 2, as in FIG. As shown in FIG. 4, the bonding pad 13B is melted by heating when the semiconductor element 15 is fixed, the bonding pad 13 completely fills the base pad groove 13AG, and the upper surface of the bonding pad 13 becomes flat.

  Thereby, the bonding is fixed in a state in which the contact area between the bonding pad 13B and the bonding layer 15C is larger than that at the time of mounting, and a strong bonding between the bonding pad 13B and the bonding layer 15C is realized.

  Further, since the base pad groove 13AG is formed in the base pad 13A, the contact area between the bonding pad 13B and the base pad groove 13AG is larger than when the upper surface of the base pad 13AG is flat. As a result, the bonding strength between the bonding pad 13B and the base pad groove 13A increases, and the thermal resistance between the bonding pad 13B and the base pad 13A also decreases.

  Here, as exemplified above, a case is considered where the base pad 13A is formed of a material having high thermal conductivity such as Au or Cu, and the bonding pad 13B is formed of AuSn which is a material having lower thermal conductivity than these. .

  As described above, in the substrate structure 10, the semiconductor layer arrangement region R is provided in a region where the pad groove 13G is not formed. Further, the semiconductor layer arrangement region R is provided so as to exist immediately below the semiconductor layer 13 </ b> B when the light emitting element 15 is mounted on the element mounting pad 13.

  Thereby, when the light emitting element 15 is mounted on the element mounting pad 13, the thickness of the bonding pad 13B and the thickness of the base pad 13A are constant in the region immediately below the semiconductor layer 15B. That is, in the region immediately below the semiconductor layer 15B, the thermal resistance between the upper surface and the lower surface of the element mounting pad 13 in contact with the semiconductor layer 15B is constant in the in-plane direction of the element mounting surface 11S.

  As a result, heat generated from the semiconductor layer 15B when the semiconductor device 10A is driven moves evenly toward the substrate 11, and the temperature of the semiconductor layer 15B becomes equal in the in-plane direction of the element mounting surface 11S.

Accordingly, it is possible to reduce a change in luminance in the in-plane direction of the element mounting surface 11S due to temperature unevenness in the semiconductor layer 15. In addition, it is possible to prevent alteration of the semiconductor layer 15B, change in characteristics, alteration of electrodes provided in the light-emitting element 15 and the like due to a partial rise in temperature in the semiconductor layer 15B. Is mounted on the element mounting pad 13, immediately below the semiconductor layer 15B, the thickness of the bonding pad 13B made of a material having poor thermal conductivity is thinner than the region where the pad groove 13G is formed. .

  As a result, the thermal resistance between the semiconductor layer 15B and the lower surface of the element mounting pad 13 is kept low, and the heat generated from the semiconductor layer 15B when the semiconductor device 10A is driven is satisfactorily transmitted to the outside via the element mounting pad 13. Dissipated.

  In addition, power supply to the semiconductor element 15 in the semiconductor device 10A is appropriately performed by connecting an electrode (not shown) of the semiconductor element 15 and a power supply electrode (not shown) on the substrate 11 or outside by wire bonding or the like. It is good as well.

  As described above, when the semiconductor element 15 is mounted on the substrate 11 of this embodiment, the fluidity of the flux FL when the semiconductor element 15 is placed on the bonding pad 13 and at the initial stage of bonding and fixing by heating thereafter. Increase. The flux FL with increased fluidity flows into the substrate groove 11G via the pad groove 13G formed so as to be symmetric with respect to the center lines XC and YC, and accumulates there (the hatched portion in the figure). .

  That is, the flux FL uniformly flows from the pad groove 13G formed symmetrically on the element mounting pad 13 into the substrate groove 11G. At this time, a force for moving the semiconductor element 15 in a direction along the extending direction of the pad groove 13G is generated by the flux FL flowing from the element mounting pad 13 to each of the substrate grooves 11G. At this time, the flux FL does not flow out from the portion other than the end portion of the groove portion G1 of the pad groove 13G.

  The flux FL that has flowed out from each end of the groove G1 of the pad groove 13G flows into a separate substrate groove 11G. Therefore, fluxes flowing out from different end portions of the pad groove 13G do not contact each other. Further, flux flows flowing out from adjacent element mounting pads 13 do not merge. This can prevent the flux flows flowing out from the different ends of the symmetrically formed pad grooves 13G from becoming uneven with respect to each other.

  Further, the flux FL flow that flows out from the region other than the end of the pad groove 13G on the two sides RS (see FIG. 1) does not occur, and a force that prevents the movement of the semiconductor element 15 occurs in the region. Accordingly, the region other than the end portion of the pad groove 13G on the two sides RS prevents the movement of the semiconductor element 15 and functions as a stopper against the movement of the semiconductor element 15.

  Further, since the pad groove 13G is formed symmetrically with respect to the center line XC of the element mounting pad 13, the forces for moving the semiconductor element 15 along the extending direction of the groove part G1 of the pad groove 13G cancel each other. Therefore, when the semiconductor element 15 is mounted on the substrate 11, that is, when the semiconductor element 15 is bonded and fixed by heating, the semiconductor element 15 is fixed on the element mounting pad 13 without shifting from the upper surface of the element mounting pad 13. In other words, the semiconductor element 15 can be accurately arranged at a predetermined position, that is, on the element mounting pad 13 in the present embodiment.

  As described above, according to the substrate structure 10 and the light emitting device 10A of the first embodiment, the semiconductor element 15 can be accurately arranged at a desired position. Therefore, when a large number of semiconductor elements 15 are arranged on the substrate 11, the semiconductor elements 15 can be accurately arranged at a high density, and the degree of integration of the semiconductor device can be increased.

Further, according to the substrate structure 10 and the light emitting device 10A of Example 1, it is possible to prevent temperature unevenness and partial temperature rise in the semiconductor layer 15B. Thereby, it is possible to prevent uneven brightness of the semiconductor layer 15B in the in-plane direction of the element mounting surface 11S. In addition, it is possible to prevent alteration of the semiconductor layer 15B, change in characteristics, alteration of electrodes provided in the light emitting element 15, and the like.
[Other examples]
In the above embodiment, when four semiconductor layer arrangement regions R are formed on the element mounting pads 13 in two rows and two columns, that is, four semiconductor layers 15B are formed on the support substrate 15A in two rows and two columns. This is illustrated and described. However, the semiconductor layer arrangement region R is changed according to the number and arrangement of the semiconductor layers 15B formed on the support substrate 15A of the light emitting element 15 to be mounted.

  Three or more semiconductor layers 15B may be arranged along the center line XC or the center line YC, and three or more semiconductor layer arrangement regions R may be arranged along the center line XC or the center line YC. In this case, the groove part G1 and the groove part G2 can be formed in a region between the semiconductor layers 15B adjacent to each other along the center line XC or YC, that is, each region between the semiconductor layer arrangement regions R.

  FIG. 5 shows a top view of the substrate structure 10 in which three semiconductor arrangement regions R are formed along the center line XC direction and three along the center line YC direction. As in FIG. 2 in the above description, the direction of the arrow in the figure is the direction in which the surplus flux FL flows.

  In this case, one groove portion G1 is formed in each region between the semiconductor arrangement regions R adjacent in the direction along the center line XC. Further, the substrate groove 11G extends continuously from the both ends of each groove part G1 of the pad groove 13G in a top view.

  That is, X-1 trenches G1 can be formed, where X is the number of semiconductor layer arrangement regions R arranged in the direction along the XC direction. Moreover, Y-1 groove portions G2 can be formed, where Y is the number of semiconductor layer arrangement regions R arranged in the direction along the YC direction.

  In the above embodiment, the pad groove 13G including the groove part G1 and the groove part G2 formed between the semiconductor layer arrangement regions R has been described as an example. However, a groove portion may be further added to the pad groove 13G.

  For example, as illustrated in FIG. 6, a groove portion G <b> 3 that extends along the center line XC may be formed in an end region along the center line YC on the upper surface of the element mounting pad 13. Further, as shown in FIG. 7, a groove portion G <b> 4 that extends along the periphery of the upper surface of the element mounting pad 13 may be formed. By doing so, the amount of flux that can be held in the pad groove 13G can be increased, and the amount of flux that flows out from the element mounting pad 13 onto the substrate 11 can be reduced.

  In the case where grooves such as the groove portion G3 or the groove portion G4 are formed in the end region on the upper surface of the element mounting pad 13 as described above, these groove portions may partially overlap the semiconductor layer arrangement region R in a top view. . This is because even if the temperature of the semiconductor layer 15B as the light emitting portion rises at the peripheral portion of the light emitting element 15 and there is a difference in luminance from other portions, it is not so conspicuous.

  Further, in the above embodiment, the case where the substrate groove 11G is formed from the element mounting surface 11S immediately below both end portions of one pad groove 13G and functions as a flux reservoir has been described. However, in order to prevent the fluxes FL flowing out from the adjacent element mounting pads 13 from contacting each other, it is possible to adopt another structure.

  FIG. 8 shows a partial plan view of the substrate structure 10 in which the planar shape of the substrate groove 11G is changed. FIG. 8 shows only one of the element mounting pads 13 as in FIG. Further, as in FIG. 2 in the above description, the direction of the arrow in the figure is the direction in which the surplus flux FL flows.

  In the example of FIG. 8, a flux pool region 11AR as a flux pool surrounded by the substrate groove 11G is formed on the element mounting surface 11S. The substrate structure is the same as that of the substrate structure 10 of Example 1 except for the planar shape of the substrate groove 11G.

  In the example of FIG. 8, each of the substrate grooves 11 </ b> G is in contact with each of the two regions of the two sides RS outside the end of the pad groove 13 </ b> G when viewed from the center line YC in the top view. Is formed. That is, a flux accumulation region 11AR surrounded by the side surface of the element mounting pad 13 and the substrate groove 11G is formed on the element mounting surface 11S.

  In the substrate structure 10 of FIG. 8, the flux that has flowed out from the element mounting pad 13 through the pad groove 13G during heating at the time of bonding and fixing the semiconductor element 15 to the element mounting pad 13 enters the flux accumulation region 11AR. It reaches.

  Since the flux accumulation area AR is surrounded by the substrate groove 11G, the flux flowing out to the flux accumulation area 11AR does not flow outside the substrate groove 11G. Therefore, it is possible to prevent the flux flowing out from one element mounting pad 13 from coming into contact with the flux flowing out from another adjacent element mounting pad 13. This can prevent the flux flowing out from each of the pad grooves 13G from becoming non-uniform.

  Moreover, by doing in this way, even if more surplus flux than the case of Example 1 generate | occur | produces, it is possible to prevent the contact of the fluxes which flowed out from the other element mounting pad 13 adjacent. Therefore, an allowable error amount at the time of flux application increases, management of the flux application amount becomes easy, and as a result, the yield at the time of manufacturing the semiconductor device 10A can be improved.

  Further, in the above embodiment, the pad groove 13A has been illustrated and described so that the bottom of the pad 13A has a predetermined depth. However, the depth of the pad groove 13G can be changed.

  FIG. 9 shows a side view of the substrate structure 10 as an example when the depth of the pad groove 13G is changed as viewed from the direction along the center line YC. Thus, the pad groove 13G may reach the lower surface of the base pad 13A. That is, the base pad 13A may be cut by the groove part G1. In other words, one light emitting element 15 may be mounted on a plurality of base pads spaced apart from each other.

  In the above-described embodiment, the configuration in which three element mounting pads 13 on which the semiconductor elements 15 are placed is arranged on one substrate 11 is described as an example. However, the element mounting pads 13 are arranged in one line. It is good also as arranging 1, 2 or 4 or more. Also, a plurality of rows of element mounting pads 13 may be formed on one substrate 11.

  In the above embodiment, the semiconductor layer arrangement region R formed on the surface (upper surface) of the element mounting pad 13 is formed symmetrically with respect to the center lines XC and YC. That is, the pad groove 13G is formed symmetrically with respect to the center line XC and the center line YC.

  However, the semiconductor layer arrangement region R can be freely changed depending on the planar arrangement of the semiconductor layer 15B of the light emitting element 15 mounted on the element mounting pad 13. Therefore, when the planar arrangement of the semiconductor layer 15B is not symmetric with respect to the center line XC or the center line YC, the pad groove 13G may not be formed symmetrically with respect to the center line XC or the center line YC.

  Moreover, in the said Example, although the case where the board | substrate groove | channel 11G was formed was demonstrated to the example, the board | substrate groove | channel 11G does not need to be formed. Even in this case, if there is surplus flux FL, it flows out from the pad groove 13G to the element mounting surface 11S in the direction of the arrow in FIG. Therefore, it is possible to prevent the semiconductor element 15 from moving with respect to the element mounting pad 13 due to the excess flux when the semiconductor element 15 is bonded and fixed.

  Even when there is no substrate groove 11G, the excess flux is pushed out from the pad groove 13G toward the side surface of the element mounting pad 13 along the two sides RS. In other words, the surplus flux does not flow out directly to a region between adjacent element mounting pads 13 on the element mounting surface 11S. Therefore, the possibility that the fluxes flowing out from the adjacent element mounting pads 13 come into contact with each other is low, and it is possible to prevent the flux flow uniformity from being lowered.

  Further, the planar shapes of the pad groove 13G and the substrate groove 11G in the above-described embodiments and modifications can be appropriately combined.

  In the above embodiment, the bonding pad 13 is made of AuSn, and the bonding layer 15C is made of Au or AuSn. However, the bonding pad 13 and the bonding layer 15C may be formed of other materials as long as they can be bonded to each other by heating, for example, by eutectic crystal.

  Further, in the above-described embodiment, the case where the groove portion G2 extending along the center line XC and terminating without reaching the end portion on the element mounting pad 13 is described as an example. However, in order to release the flux when the light emitting element 15 is mounted on the element mounting pad 13, the pad groove 13G may include at least one groove portion G1. That is, the groove part G2 may not be formed.

  Various configurations, materials, and the like in the above-described embodiments are merely examples, and can be appropriately selected depending on the application, the device to be manufactured, and the like.

  In the above-described embodiments, the substrate structure and the semiconductor device in which the semiconductor element is mounted on the substrate structure have been described. However, the substrate structure of the present invention can be applied to other than the semiconductor device. That is, the substrate structure of the present invention can also be used when elements other than semiconductor elements are bonded via a flux. The substrate structure of the present invention can also be used when a semiconductor element or other elements are mounted using a type of adhesive that liquefies during adhesion fixation.

DESCRIPTION OF SYMBOLS 10 Substrate structure 10A Semiconductor device 11 Substrate 11G Substrate groove 11S Element mounting surface 11AR Flux accumulation area 13 Element mounting pad 13A Base pad 13B Bonding pad 13AG Base pad groove 13G Pad groove 15 Semiconductor element FL Flux G1 Groove part G2 Groove part AG1 Groove part AG2 Groove part

Claims (6)

A mounting substrate having an element mounting surface;
An element mounting pad disposed on the element mounting surface, having a metal layer on the upper surface, and having two sides on the upper surface that are opposed to each other in the in-plane direction of the element mounting surface;
A semiconductor element including a support substrate mounted on the element mounting pad and having a plurality of semiconductor layers arranged on the upper surface in a direction along the two sides and spaced apart from each other;
A top surface of the element mounting pad is provided below a region between the plurality of semiconductor layers adjacent to each other in the direction along the two sides, and both end portions respectively reach the two sides. A semiconductor device having a groove structure including a groove.   The plurality of semiconductor layers are arranged in a direction perpendicular to the two sides in the in-plane direction of the upper surface of the support substrate, and the plurality of semiconductors are adjacent in the direction perpendicular to the two sides 2. The semiconductor device according to claim 1, wherein a second groove is formed below the region between the layers and ends at both ends without reaching each of the two sides.   2. A substrate groove formed on the element mounting surface continuously from both ends of the first groove when viewed from a direction perpendicular to the element mounting surface. Or the semiconductor device according to 2;   4. The groove structure according to claim 1, wherein the groove structure has a symmetric shape with respect to a center line of the element mounting pad perpendicular to the two sides in an in-plane direction of the element mounting surface. The semiconductor device as described in any one.   5. The semiconductor according to claim 1, wherein the groove structure has a symmetric shape with respect to a center line of the element mounting pad in a direction along the two sides. 6. apparatus.   6. The semiconductor device according to claim 1, wherein a plurality of the element mounting pads are arranged on the element mounting surface in a direction along the two sides.

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