JP2018049973A - Semiconductor device manufacturing method and semiconductor manufacturing apparatus - Google Patents

Semiconductor device manufacturing method and semiconductor manufacturing apparatus Download PDF

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JP2018049973A
JP2018049973A JP2016185300A JP2016185300A JP2018049973A JP 2018049973 A JP2018049973 A JP 2018049973A JP 2016185300 A JP2016185300 A JP 2016185300A JP 2016185300 A JP2016185300 A JP 2016185300A JP 2018049973 A JP2018049973 A JP 2018049973A
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semiconductor wafer
adhesive
grinding
semiconductor
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JP2018049973A5 (en
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貴彦 三井
Takahiko Mitsui
貴彦 三井
山本　栄一
Eiichi Yamamoto
栄一 山本
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Okamoto Machine Tool Works Ltd
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Priority to CN201710865633.2A priority patent/CN107866724A/en
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B27/00—Other grinding machines or devices
    • B24B27/0076—Other grinding machines or devices grinding machines comprising two or more grinding tools
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B21/00—Machines or devices using grinding or polishing belts; Accessories therefor
    • B24B21/002—Machines or devices using grinding or polishing belts; Accessories therefor for grinding edges or bevels
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B21/00—Machines or devices using grinding or polishing belts; Accessories therefor
    • B24B21/008—Machines comprising two or more tools or having several working posts
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B55/00—Safety devices for grinding or polishing machines; Accessories fitted to grinding or polishing machines for keeping tools or parts of the machine in good working condition
    • B24B55/06—Dust extraction equipment on grinding or polishing machines
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B55/00—Safety devices for grinding or polishing machines; Accessories fitted to grinding or polishing machines for keeping tools or parts of the machine in good working condition
    • B24B55/06—Dust extraction equipment on grinding or polishing machines
    • B24B55/08—Dust extraction equipment on grinding or polishing machines specially designed for belt grinding machines
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B7/00—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
    • B24B7/20—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground
    • B24B7/22—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
    • B24B7/228—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain for grinding thin, brittle parts, e.g. semiconductors, wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02013—Grinding, lapping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02016—Backside treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02021—Edge treatment, chamfering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052—Wet cleaning only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67028—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
    • H01L21/6704—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing
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    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding

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  • Engineering & Computer Science (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Grinding Of Cylindrical And Plane Surfaces (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
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Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method and a semiconductor manufacturing apparatus which achieve the semiconductor wafer having a uniform thickness and which can thin a semiconductor wafer while inhibiting chips and cracks on an edge of the semiconductor wafer.SOLUTION: A semiconductor device manufacturing method comprises: a step S20 of coating an adhesive 12 on a surface 10a of a semiconductor wafer 10 where convex shapes 11 are formed; a step S30 of grinding a surface of the adhesive 12 coated on the semiconductor wafer 10; a step S40 of trimming a peripheral edge of the semiconductor wafer 10 coated with the adhesive 12 together with the adhesive 12; a step S50 of attaching the semiconductor wafer 10 where the surface of the adhesive 12 is ground and the peripheral edge is trimmed to a support substrate 13 via the adhesive 12; and a step S60 of grinding a rear face 10B of the semiconductor wafer 10 attached to the support substrate 13. This makes it possible to achieve the semiconductor wafer 10 having a uniform thickness and thin the semiconductor wafer 10 while inhibiting chips and cracks on the edge of the semiconductor wafer 10.SELECTED DRAWING: Figure 1

Description

本発明は、半導体装置の製造方法及び半導体製造装置に関する。   The present invention relates to a semiconductor device manufacturing method and a semiconductor manufacturing apparatus.

従来、半導体装置の集積率を高めるために、表面に回路等が形成された半導体ウエハの回路等が形成されていない裏面を研削することにより、半導体ウエハを薄化することが行われている。また、複数枚の半導体チップを積層して３次元実装される半導体装置の製造方法においては、貫通電極（ＴＳＶ：Ｔｈｒｏｕｇｈ Ｓｉｓｉｃｏｎ Ｖｉａ）が形成された半導体ウエハの裏面を研削して貫通電極の頭出しを行うことが知られている。   Conventionally, in order to increase the integration rate of a semiconductor device, the semiconductor wafer is thinned by grinding the back surface of the semiconductor wafer on which the circuit or the like is formed on the front surface, where the circuit or the like is not formed. Further, in a method of manufacturing a semiconductor device in which a plurality of semiconductor chips are stacked and mounted three-dimensionally, the back surface of the semiconductor wafer on which a through electrode (TSV: Through Sicon Via) is formed is ground to find the through electrode. Is known to do.

例えば、特許文献１には、半導体装置の製造方法において、銅貫通電極が形成されたシリコン基板の裏面をカップホイール型砥石によって研削し、シリコン及び銅を同時に除去して銅貫通電極の頭出し加工を行うことが記載されている。同文献に記載された半導体装置の製造方法では、シリコン基板の裏面を研削する前に、接着剤シート材または接着剤を用いてシリコン基板の表面を研削装置の基板チャックに貼付している。   For example, in Patent Document 1, in the method of manufacturing a semiconductor device, the back surface of a silicon substrate on which a copper penetrating electrode is formed is ground with a cup wheel type grindstone, and silicon and copper are simultaneously removed to cue the copper penetrating electrode. It is described to do. In the method for manufacturing a semiconductor device described in this document, the surface of the silicon substrate is attached to the substrate chuck of the grinding apparatus using an adhesive sheet material or an adhesive before grinding the back surface of the silicon substrate.

特開２０１５−３２６７９号公報JP2015-32679A

しかしながら、上記した従来技術のようにシリコン基板の表面に接着剤シート材等を貼付する方法では、半導体チップを薄化して半導体装置の集積率を高めるために改善すべき点があった。   However, in the method of attaching an adhesive sheet material or the like to the surface of the silicon substrate as in the above-described prior art, there is a point to be improved in order to thin the semiconductor chip and increase the integration rate of the semiconductor device.

具体的には、半導体ウエハの表面にバンプ等の凸形状が形成される場合、該凸形状の影響を受けて、半導体ウエハの表面に貼り付けられる接着剤シート等の表面に凹凸が生じてしまう。そのため、基板チャックに半導体ウエハを貼付して半導体ウエハの裏面を研削した際に、半導体ウエハの厚みにばらつきが生じてしまうという問題点があった。   Specifically, when a convex shape such as a bump is formed on the surface of the semiconductor wafer, the surface of the adhesive sheet or the like attached to the surface of the semiconductor wafer is uneven due to the convex shape. . Therefore, when the semiconductor wafer is attached to the substrate chuck and the back surface of the semiconductor wafer is ground, there is a problem that the thickness of the semiconductor wafer varies.

このように、半導体ウエハの厚みにばらつきが生じることは、半導体装置の品質を低下させる要因となり、特に、３次元実装される半導体装置においては、各層間の接点不良を引き起こす恐れがある。従来技術の製造方法では、半導体ウエハの厚みのばらつきを抑えつつ更なる薄化を図ることが容易ではなかったので、半導体ウエハの裏面を均一的に研削する技術を開発することが半導体装置の集積率を高める上で課題となっていた。   Thus, the variation in the thickness of the semiconductor wafer becomes a factor of deteriorating the quality of the semiconductor device. In particular, in a semiconductor device mounted three-dimensionally, there is a risk of causing a contact failure between the layers. In the prior art manufacturing method, it was not easy to further reduce the thickness while suppressing the variation in the thickness of the semiconductor wafer. Therefore, it is necessary to develop a technique for uniformly grinding the back surface of the semiconductor wafer. It was an issue in raising the rate.

また、半導体ウエハの厚みを均一にするために、研削中に半導体ウエハの厚さ等を測定し、その測定結果に基づいてといしと半導体ウエハの接触方法等を変化させることが考えられる。しかしながら、半導体ウエハの厚さを測定する装置やといしの位置を高度に調整するための装置等が必要となり、研削装置が高価になってしまう。   In order to make the thickness of the semiconductor wafer uniform, it is conceivable to measure the thickness of the semiconductor wafer during grinding and change the contact method of the semiconductor wafer based on the measurement result. However, an apparatus for measuring the thickness of the semiconductor wafer, an apparatus for highly adjusting the position of the wheel, and the like are required, and the grinding apparatus becomes expensive.

また、半導体ウエハの裏面を研削する前の状態において、半導体ウエハの周囲端部近傍には、エッジ部に丸みや端面に傾斜等が形成されて薄肉になっている部分がある。そのため、半導体ウエハの裏面を研削した際に、半導体ウエハの端部近傍には、他の部分よりも薄く形成されてしまう箇所があり、端部の欠け、即ちチッピングが発生し易いという問題点があった。   Further, in a state before the back surface of the semiconductor wafer is ground, there is a thin portion in the vicinity of the peripheral edge of the semiconductor wafer where the edge is rounded and the end surface is inclined. For this reason, when the back surface of the semiconductor wafer is ground, there is a portion near the end portion of the semiconductor wafer that is formed thinner than other portions, and there is a problem that chipping of the end portion, that is, chipping is likely to occur. there were.

本発明は、上記の事情に鑑みてなされたものであり、その目的とするところは、半導体ウエハの厚みを均一にすると共に端部の欠けを抑制しつつ半導体ウエハを薄化することができる半導体装置の製造方法及び半導体製造装置を提供することにある。   The present invention has been made in view of the above-described circumstances, and an object of the present invention is to make a semiconductor wafer thin while making the thickness of the semiconductor wafer uniform and suppressing chipping at the end. An object of the present invention is to provide an apparatus manufacturing method and a semiconductor manufacturing apparatus.

本発明の半導体装置の製造方法は、凸形状が形成された半導体ウエハの表面に接着剤を塗布する工程と、前記半導体ウエハに塗布された前記接着剤の表面を研削する工程と、前記接着剤が塗布された前記半導体ウエハの周囲端部を前記接着剤と共にトリミングする工程と、前記接着剤の表面が研削されて前記周囲端部がトリミングされた前記半導体ウエハを、前記接着剤を介してサポート基板に貼付する工程と、前記サポート基板に貼付された前記半導体ウエハの裏面を研削する工程と、を具備することを特徴とする。   The method for manufacturing a semiconductor device of the present invention includes a step of applying an adhesive to a surface of a semiconductor wafer on which a convex shape is formed, a step of grinding the surface of the adhesive applied to the semiconductor wafer, and the adhesive Trimming the peripheral edge of the semiconductor wafer coated with the adhesive together with the adhesive, and supporting the semiconductor wafer with the peripheral edge trimmed by grinding the surface of the adhesive via the adhesive A step of affixing to the substrate; and a step of grinding the back surface of the semiconductor wafer affixed to the support substrate.

また、本発明の半導体製造装置は、表面に凸形状を有し前記表面に接着剤が塗布された半導体ウエハを吸着保持するチャックテーブルと、前記半導体ウエハが前記チャックテーブルに吸着保持された状態で前記接着剤の表面を研削する接着剤研削工具と、前記半導体ウエハが前記チャックテーブルに吸着保持された状態で前記半導体ウエハの周囲端部を前記接着剤と共にトリミングする研磨テープと、を備えることを特徴とする。   The semiconductor manufacturing apparatus according to the present invention includes a chuck table that holds and holds a semiconductor wafer having a convex shape on the surface and coated with an adhesive on the surface, and the semiconductor wafer that is held by suction on the chuck table. An adhesive grinding tool for grinding the surface of the adhesive, and a polishing tape for trimming a peripheral edge of the semiconductor wafer together with the adhesive in a state where the semiconductor wafer is held by suction on the chuck table. Features.

本発明の半導体装置の製造方法によれば、凸形状が形成された半導体ウエハの表面に接着剤を塗布する工程と、前記半導体ウエハに塗布された前記接着剤の表面を研削する工程と、を具備する。これにより、塗布された接着剤の表面を平坦にすると共に、接着剤層の厚さを均一にすることができる。よって、裏面を研削された後の半導体ウエハの厚みを高精度に揃えることができる。   According to the semiconductor device manufacturing method of the present invention, the step of applying an adhesive to the surface of the semiconductor wafer on which the convex shape is formed, and the step of grinding the surface of the adhesive applied to the semiconductor wafer. It has. Thereby, the surface of the applied adhesive can be flattened and the thickness of the adhesive layer can be made uniform. Therefore, the thickness of the semiconductor wafer after the back surface is ground can be made highly accurate.

また、前記接着剤が塗布された前記半導体ウエハの周囲端部を前記接着剤と共にトリミングする工程を具備する。これにより、半導体ウエハの周囲端部近傍の丸みや傾斜を除去することができる。そのため、半導体ウエハを薄く研削する際の端部近傍のチッピングを抑制することできる。また、接着剤が塗布された後に半導体ウエハの周囲端部をトリミングすることにより、半導体ウエハの周囲端部と共に接着剤の端部をトリミングすることができる。そのため、接着剤層の端部近傍の丸みを除去し、接着剤層の厚みを均一にして、半導体ウエハの端部近傍が薄く形成されることを抑制できる。   And a step of trimming the peripheral edge of the semiconductor wafer coated with the adhesive together with the adhesive. Thereby, roundness and inclination near the peripheral edge of the semiconductor wafer can be removed. Therefore, chipping in the vicinity of the end portion when the semiconductor wafer is thinly ground can be suppressed. Further, by trimming the peripheral edge of the semiconductor wafer after the adhesive is applied, the edge of the adhesive can be trimmed together with the peripheral edge of the semiconductor wafer. Therefore, it is possible to remove the roundness in the vicinity of the end portion of the adhesive layer, make the thickness of the adhesive layer uniform, and suppress the formation of the thin portion in the vicinity of the end portion of the semiconductor wafer.

また、前記接着剤の表面が研削されて周囲端部がトリミングされた前記半導体ウエハを、前記接着剤を介してサポート基板に貼付する工程と、前記サポート基板に貼付された前記半導体ウエハの裏面を研削する工程と、を具備する。このように、接着剤の表面が研削されて周囲端部がトリミングされた後にサポート基板を貼付して半導体ウエハの裏面を研削することにより、半導体ウエハの厚みを均一にすることができ、半導体ウエハの破損を抑制することができる。その結果、半導体ウエハを従来技術の半導体ウエハよりも薄く高品質に形成することができる。   A step of affixing the semiconductor wafer, the peripheral edge of which has been ground and trimmed at the peripheral edge, to a support substrate via the adhesive; and a back surface of the semiconductor wafer affixed to the support substrate. Grinding. Thus, the thickness of the semiconductor wafer can be made uniform by affixing the support substrate and grinding the back surface of the semiconductor wafer after the surface of the adhesive is ground and the peripheral edge is trimmed. Can be prevented from being damaged. As a result, the semiconductor wafer can be formed thinner and with higher quality than the conventional semiconductor wafer.

また、本発明の半導体装置の製造方法によれば、前記接着剤の表面を研削する工程では、前記接着剤の表面を研削する接着剤研削工具に洗浄水を吹き付けながら前記接着剤の表面を研削しても良い。これにより、接着剤研削工具に付着した接着剤の削り屑を洗浄水で除去しつつ接着剤を研削することができるので、接着剤の表面を高精度且つ容易に研削することができる。   According to the method for manufacturing a semiconductor device of the present invention, in the step of grinding the surface of the adhesive, the surface of the adhesive is ground while spraying cleaning water on an adhesive grinding tool for grinding the surface of the adhesive. You may do it. As a result, the adhesive can be ground while removing the adhesive shavings adhering to the adhesive grinding tool with the washing water, so that the surface of the adhesive can be ground with high accuracy and easily.

また、本発明の半導体装置の製造方法によれば、前記洗浄水は、前記接着剤研削工具の研削加工に供していないといしの刃先に吹き付けられても良い。これにより、接着剤の削り屑が接着剤の表面に再付着することが抑制され、接着剤の表面を平坦にし、接着剤層の厚みを高精度に仕上げることができる。   Moreover, according to the manufacturing method of the semiconductor device of this invention, the said washing | cleaning water may be sprayed on the blade edge | tip of the wheel which is not used for the grinding process of the said adhesive agent grinding tool. Thereby, it is suppressed that the shavings of an adhesive adhere to the surface of an adhesive agent, the surface of an adhesive agent can be made flat, and the thickness of an adhesive bond layer can be finished with high precision.

また、本発明の半導体装置の製造方法によれば、前記半導体ウエハは、貫通電極を有し、前記半導体ウエハの裏面を研削する工程では、前記半導体ウエハの裏面を研削するウエハ研削工具に洗浄水を吹き付けながら前記半導体ウエハと前記貫通電極を同時に研削しても良い。これにより、半導体ウエハの薄化工程と貫通電極の頭出し工程とを同時に効率良く行うことができると共に、半導体ウエハだけでなく、半導体ウエハに形成された貫通電極の高さを均一に揃えることができる。また、ウエハ研削工具に洗浄水を吹き付けることにより、半導体ウエハの汚染を抑制することができる。よって、高集積率で小型の３次元実装される半導体装置を効率良く高品質に製造することができる。   According to the method for manufacturing a semiconductor device of the present invention, the semiconductor wafer has a through electrode, and in the step of grinding the back surface of the semiconductor wafer, cleaning water is added to the wafer grinding tool for grinding the back surface of the semiconductor wafer. The semiconductor wafer and the through electrode may be ground simultaneously while spraying. Thereby, the thinning process of the semiconductor wafer and the cueing process of the through electrode can be performed efficiently at the same time, and not only the semiconductor wafer but also the height of the through electrode formed on the semiconductor wafer can be made uniform. it can. Moreover, contamination of the semiconductor wafer can be suppressed by spraying cleaning water on the wafer grinding tool. Thus, a small three-dimensionally mounted semiconductor device with a high integration rate can be efficiently manufactured with high quality.

また、本発明の半導体製造装置によれば、表面に凸形状を有し前記表面に接着剤が塗布された半導体ウエハを吸着保持するチャックテーブルと、前記半導体ウエハが前記チャックテーブルに吸着保持された状態で前記接着剤の表面を研削する接着剤研削工具と、前記半導体ウエハが前記チャックテーブルに吸着保持された状態で前記半導体ウエハの周囲端部を前記接着剤と共にトリミングする研磨テープと、を備える。これにより、１つの装置で、半導体ウエハの表面に塗布された接着剤の表面の研削と、半導体ウエハの周囲端部のトリミングと、を効率的に行うことができる。よって、半導体ウエハを高精度に薄化する製造方法における生産効率を高めることができると共に設備費用の増大を抑えることができる。   Further, according to the semiconductor manufacturing apparatus of the present invention, the chuck table that holds the semiconductor wafer having a convex shape on the surface and coated with the adhesive on the surface, and the semiconductor wafer is held on the chuck table by suction. An adhesive grinding tool for grinding the surface of the adhesive in a state, and a polishing tape for trimming the peripheral edge of the semiconductor wafer together with the adhesive in a state where the semiconductor wafer is sucked and held by the chuck table. . Thereby, the grinding | polishing of the surface of the adhesive agent apply | coated to the surface of a semiconductor wafer and the trimming of the peripheral edge part of a semiconductor wafer can be performed efficiently with one apparatus. Therefore, it is possible to increase the production efficiency in the manufacturing method for thinning the semiconductor wafer with high accuracy, and to suppress an increase in equipment cost.

また、本発明の半導体製造装置によれば、前記接着剤研削工具に洗浄水を吹き付ける洗浄液噴射装置を備えても良い。これにより、接着剤の表面を高精度、高品質且つ容易に研削することができる。   Moreover, according to the semiconductor manufacturing apparatus of this invention, you may provide the washing | cleaning liquid injection apparatus which sprays washing water on the said adhesive grinding tool. Thereby, the surface of an adhesive agent can be ground with high precision, high quality and easily.

本発明の実施形態に係る半導体装置の製造工程を示すフローチャートである。3 is a flowchart showing a manufacturing process of a semiconductor device according to an embodiment of the present invention. 本発明の実施形態に係る半導体装置の製造方法で用いられる接着剤研削装置の概略構成を示す正面図である。It is a front view which shows schematic structure of the adhesive agent grinding apparatus used with the manufacturing method of the semiconductor device which concerns on embodiment of this invention. 本発明の実施形態に係る半導体装置の製造方法で用いられるエッジトリミング装置の概略構成を示す正面図である。It is a front view which shows schematic structure of the edge trimming apparatus used with the manufacturing method of the semiconductor device which concerns on embodiment of this invention. 本発明の実施形態に係る半導体装置の製造方法で用いられる接着剤研削装置の他の例を示す（Ａ）正面図、（Ｂ）平面図である。It is the (A) front view and (B) top view which show the other example of the adhesive grinding device used with the manufacturing method of the semiconductor device which concerns on embodiment of this invention. 本発明の実施形態に係る半導体装置の製造方法に係る半導体ウエハを示す図であり、（Ａ）は、回路が形成された状態、（Ｂ）は、接着剤が塗布された状態、（Ｃ）は、接着剤が研削される状態、を示す概略図である。It is a figure which shows the semiconductor wafer which concerns on the manufacturing method of the semiconductor device which concerns on embodiment of this invention, (A) is the state in which the circuit was formed, (B) is the state in which the adhesive agent was apply | coated, (C) FIG. 3 is a schematic view showing a state where an adhesive is ground. 本発明の実施形態に係る半導体装置の製造方法に係る半導体ウエハを示す図であり、（Ａ）は、周囲端部がトリミングされる状態、（Ｂ）サポート基板が貼り付けられた状態、（Ｃ）裏面が研削される状態、を示す概略図である。It is a figure which shows the semiconductor wafer which concerns on the manufacturing method of the semiconductor device which concerns on embodiment of this invention, (A) is the state where a peripheral edge part is trimmed, (B) The state where the support substrate was affixed, (C ) It is the schematic which shows the state where the back surface is ground.

以下、本発明の実施形態に係る半導体装置の製造方法及び半導体製造装置を図面に基づき詳細に説明する。
図１は、本発明の実施形態に係る半導体装置の製造工程を示すフローチャートであり、詳しくは、表面１０ａ（図５（Ａ）参照）に回路が形成された半導体ウエハ１０（図５（Ａ）参照）を薄化する工程に関するフローチャートである。本実施形態に係る半導体装置の製造方法は、特に、表面１０ａに凸形状が形成された半導体ウエハ１０の裏面１０ｂ（図５（Ａ）参照）を研削する場合に適している。 Hereinafter, a semiconductor device manufacturing method and a semiconductor manufacturing apparatus according to embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a flowchart showing a manufacturing process of a semiconductor device according to an embodiment of the present invention. Specifically, a semiconductor wafer 10 (FIG. 5A) having a circuit formed on a surface 10a (see FIG. 5A). It is a flowchart regarding the process of thinning (refer). The method for manufacturing a semiconductor device according to the present embodiment is particularly suitable for grinding the back surface 10b (see FIG. 5A) of the semiconductor wafer 10 having a convex shape formed on the front surface 10a.

図１に示すように、本実施形態に係る半導体装置の製造方法は、回路形成工程Ｓ１０と、接着剤塗布工程Ｓ２０と、接着剤研削工程Ｓ３０と、端部トリミング工程Ｓ４０と、サポート基板貼付工程Ｓ５０と、裏面研削工程Ｓ６０と、サポート基板取り外し工程Ｓ７０と、を具備する。   As shown in FIG. 1, the manufacturing method of the semiconductor device according to this embodiment includes a circuit formation step S10, an adhesive application step S20, an adhesive grinding step S30, an end trimming step S40, and a support substrate pasting step. S50, back grinding process S60, and support substrate removal process S70 are comprised.

先ず、回路形成工程Ｓ１０では、従来の方法に基づいて、半導体ウエハ１０の表面１０ａに回路が形成される。半導体ウエハ１０としては、例えば、厚さ７２０μｍから７７０μｍのシリコン（Ｓｉ）基板等が用いられる。また、半導体ウエハ１０には貫通電極が形成されても良く、その場合、貫通電極は回路形成工程Ｓ１０で形成される。   First, in the circuit formation step S10, a circuit is formed on the surface 10a of the semiconductor wafer 10 based on a conventional method. For example, a silicon (Si) substrate having a thickness of 720 μm to 770 μm is used as the semiconductor wafer 10. Further, a through electrode may be formed in the semiconductor wafer 10, and in this case, the through electrode is formed in the circuit forming step S10.

次に、接着剤塗布工程Ｓ２０では、半導体ウエハ１０の回路等が形成された面、即ち表面１０ａに接着剤１２（図５（Ｂ）参照）が塗布される。半導体ウエハ１０の表面１０ａに接着剤１２を塗布することにより、接着剤１２によって半導体ウエハ１０の表面１０ａに形成された回路が保護されると共に、半導体ウエハ１０を後述するサポート基板１３（図６（Ｂ）参照）に貼り付けることができる。   Next, in the adhesive application step S20, the adhesive 12 (see FIG. 5B) is applied to the surface of the semiconductor wafer 10 on which the circuits and the like are formed, that is, the surface 10a. By applying the adhesive 12 to the surface 10a of the semiconductor wafer 10, the circuit formed on the surface 10a of the semiconductor wafer 10 is protected by the adhesive 12, and the support substrate 13 (described later with reference to FIG. B) see).

半導体ウエハ１０の表面１０ａに塗布された接着剤１２が硬化した後、接着剤研削工程Ｓ３０が行われる。接着剤研削工程Ｓ３０では、後述する接着剤研削装置２０（図２参照）を用いて、接着剤１２の表面が研削される。   After the adhesive 12 applied to the surface 10a of the semiconductor wafer 10 is cured, an adhesive grinding step S30 is performed. In the adhesive grinding step S30, the surface of the adhesive 12 is ground using an adhesive grinding device 20 (see FIG. 2) described later.

そして次に、端部トリミング工程Ｓ４０では、後述するエッジトリミング装置４０（図３参照）によって半導体ウエハ１０の端部が研削若しくは研磨される。このとき、接着剤１２も同時に研削若しくは研磨される。なお、接着剤研削工程Ｓ３０と端部トリミング工程Ｓ４０は、順番を入れ替えて実行されても良い。即ち、半導体ウエハ１０の表面１０ａに接着剤１２が塗布された後に、半導体ウエハ１０の端部のトリミングが行われ、その後に接着剤１２の表面が研削されても良い。   Then, in the end trimming step S40, the end of the semiconductor wafer 10 is ground or polished by an edge trimming apparatus 40 (see FIG. 3) described later. At this time, the adhesive 12 is also ground or polished simultaneously. Note that the adhesive grinding step S30 and the end trimming step S40 may be executed in the reverse order. That is, after the adhesive 12 is applied to the surface 10a of the semiconductor wafer 10, the end of the semiconductor wafer 10 may be trimmed, and then the surface of the adhesive 12 may be ground.

次に、サポート基板貼付工程Ｓ５０では、半導体ウエハ１０の表面１０ａ側に、サポート基板１３が貼り付けられる。サポート基板１３が貼付されることにより、半導体ウエハ１０の表面１０ａ側を、裏面研削装置等に固定することができ、これにより、半導体ウエハ１０の研削や、薄く研削された後の半導体ウエハ１０の搬送等を容易にすることができる。   Next, in the support substrate pasting step S <b> 50, the support substrate 13 is pasted on the surface 10 a side of the semiconductor wafer 10. By attaching the support substrate 13, the front surface 10 a side of the semiconductor wafer 10 can be fixed to a back surface grinding device or the like, whereby the semiconductor wafer 10 is ground or thinly ground. Transport and the like can be facilitated.

そして次に、裏面研削工程Ｓ６０では、半導体ウエハ１０の裏面１０ｂが研削若しくは研磨され、半導体ウエハ１０が薄化される。なお、半導体ウエハ１０に貫通電極が形成されている場合には、裏面研削の際に、半導体ウエハ１０と貫通電極とが同時に研削される。また、裏面研削工程Ｓ６０では、接着剤研削装置２０と同等の装置が用いられる。即ち、半導体ウエハ１０の裏面１０ｂの研削と接着剤１２の研削は、同じ装置が用いられても良い。   Next, in the back surface grinding step S60, the back surface 10b of the semiconductor wafer 10 is ground or polished, and the semiconductor wafer 10 is thinned. When the through electrode is formed on the semiconductor wafer 10, the semiconductor wafer 10 and the through electrode are ground at the same time when the back surface is ground. In the back grinding step S60, an apparatus equivalent to the adhesive grinding apparatus 20 is used. That is, the same apparatus may be used for grinding the back surface 10 b of the semiconductor wafer 10 and grinding the adhesive 12.

なお、半導体ウエハ１０の裏面１０ｂの研削が終わった後、貫通電極の頭面にキャップ層を形成する工程、キャップ層の形成されていないシリコン面をアルカリエッチングまたは化学的機械研磨（ＣＭＰ）加工して貫通電極の第二次頭出しを行う工程、絶縁膜を堆
積した後に、研磨加工またはエッチング加工により貫通電極の頭面の絶縁膜を除去する工程等の仕上げ工程や、その他検査工程等が実行されても良い。 After the grinding of the back surface 10b of the semiconductor wafer 10, the step of forming a cap layer on the head surface of the through electrode, the silicon surface where the cap layer is not formed is subjected to alkali etching or chemical mechanical polishing (CMP) processing. The second cueing process of the through electrode, the deposition process after the insulating film is deposited, the finishing process such as the process of removing the insulating film on the head surface of the through electrode by polishing or etching, and other inspection processes are executed May be.

サポート基板取り外し工程Ｓ７０では、半導体ウエハ１０からサポート基板１３が取り外される。このとき、使用している接着剤１２の特性に応じて、接着剤１２の接着力を低下させるべく、例えば、紫外線照射、溶剤や剥離剤等の供給等が行われる。   In the support substrate removal step S <b> 70, the support substrate 13 is removed from the semiconductor wafer 10. At this time, in order to reduce the adhesive strength of the adhesive 12 according to the characteristics of the adhesive 12 being used, for example, ultraviolet irradiation, supply of a solvent, a release agent, or the like is performed.

取り外された半導体ウエハ１０は、他の半導体ウエハ等に積層されても良く、その後、ダイシング工程、チップマウンティング工程、ワイヤーボンディング工程、モールド工程、トリム工程、検査工程等の各種後工程を経て、半導体装置が完成する。   The removed semiconductor wafer 10 may be laminated on other semiconductor wafers, etc., and then undergoes various post-processes such as a dicing process, a chip mounting process, a wire bonding process, a molding process, a trimming process, an inspection process, etc. The device is completed.

図２は、接着剤研削装置２０の概略構成を示す正面図である。接着剤研削装置２０は、前述の図１に示す接着剤研削工程Ｓ３０において、接着剤１２の表面を研削する装置である。   FIG. 2 is a front view showing a schematic configuration of the adhesive grinding apparatus 20. The adhesive grinding device 20 is a device for grinding the surface of the adhesive 12 in the adhesive grinding step S30 shown in FIG.

図２に示すように、接着剤研削装置２０は、接着剤１２を研削するための接着剤研削工具であるといし２２を有する。といし２２は、例えば、カップホイール型研削といし等であり、回転軸２３に接続されて回転駆動される研削ヘッド２１の略水平な下面に設けられる。   As shown in FIG. 2, the adhesive grinding device 20 has a wheel 22 that is an adhesive grinding tool for grinding the adhesive 12. The wheel 22 is, for example, a cup wheel grinding wheel or the like, and is provided on a substantially horizontal lower surface of the grinding head 21 connected to the rotary shaft 23 and driven to rotate.

といし２２の砥粒としては、研削する接着剤１２に応じて適宜選定され、例えば、砥番＃３００〜＃１，２００のダイヤモンドや、立方晶窒化ホウ素（ｃＢＮ）、炭化珪素（ＳｉＣ）等が用いられる。また砥粒を固定する結合材としては、ビトリファイドボンドや、メタルボンド、レジンボンド等が用いられる。   The abrasive grains of the wheel 22 are appropriately selected according to the adhesive 12 to be ground. For example, diamonds having abrasive numbers # 300 to # 1,200, cubic boron nitride (cBN), silicon carbide (SiC), etc. Is used. Vitrified bonds, metal bonds, resin bonds, and the like are used as the binder for fixing the abrasive grains.

研削ヘッド２１の上部に接続される回転軸２３には、例えば、図示しないモータ等が接続され、該モータが駆動することにより、回転軸２３及び研削ヘッド２１が回転する。これにより、といし２２が所定の速さで回転移動し、といし２２の刃先が接着剤１２の表面に摺擦されて、所定量の接着剤１２が除去される。   For example, a motor (not shown) or the like is connected to the rotating shaft 23 connected to the upper portion of the grinding head 21, and the rotating shaft 23 and the grinding head 21 are rotated by driving the motor. As a result, the wheel 22 rotates and moves at a predetermined speed, and the cutting edge of the wheel 22 is rubbed against the surface of the adhesive 12 to remove a predetermined amount of the adhesive 12.

また、接着剤研削装置２０は、半導体ウエハ１０を載置するためのチャックテーブル３０を有する。チャックテーブル３０の上面には、半導体ウエハ１０を保持するための基板チャック３１が設けられ、基板チャック３１の上面及びそれを取り囲むチャックテーブル３０の上面は、略面一に略水平に形成される。   Further, the adhesive grinding device 20 has a chuck table 30 for placing the semiconductor wafer 10 thereon. A substrate chuck 31 for holding the semiconductor wafer 10 is provided on the upper surface of the chuck table 30, and the upper surface of the substrate chuck 31 and the upper surface of the chuck table 30 surrounding it are formed substantially flush with each other.

基板チャック３１は、例えば、ポーラスセラミックから成る板状体等である。基板チャック３１の下方となるチャックテーブル３０の内部には、基板チャック３１につながる流体室３３が形成され、流体室３３には、脱気管３４及び給水管３５が接続される。脱気管３４には、図示しない真空ポンプ等が接続され、給水管３５には、図示しない給水ポンプ等が接続される。   The substrate chuck 31 is, for example, a plate-like body made of porous ceramic. A fluid chamber 33 connected to the substrate chuck 31 is formed inside the chuck table 30 below the substrate chuck 31, and a deaeration pipe 34 and a water supply pipe 35 are connected to the fluid chamber 33. A vacuum pump (not shown) is connected to the deaeration pipe 34, and a water supply pump (not shown) is connected to the water supply pipe 35.

このような構成により、前記真空ポンプ等よって脱気管３４を介して流体室３３内の空気を排出して流体室３３を減圧することにより、基板チャック３１に半導体ウエハ１０の裏面１０ｂが吸着され保持される。即ち、チャックテーブル３０の上面に、基板チャック３１を介して半導体ウエハ１０が固定される。   With such a configuration, the back surface 10b of the semiconductor wafer 10 is adsorbed and held on the substrate chuck 31 by discharging the air in the fluid chamber 33 through the deaeration pipe 34 by the vacuum pump or the like and depressurizing the fluid chamber 33. Is done. That is, the semiconductor wafer 10 is fixed to the upper surface of the chuck table 30 via the substrate chuck 31.

基板チャック３１による吸着を解除して半導体ウエハ１０を取り外す際には、脱気管３４に接続される真空ポンプ等が停止され、若しくは真空ポンプ等につながる図示しないバルブ等が閉じられ、給水管３５に接続される給水ポンプ等によって給水管３５を介して流体室３３に純水が供給される。これにより、半導体ウエハ１０を容易に取り外すことができる。   When releasing the suction by the substrate chuck 31 and removing the semiconductor wafer 10, the vacuum pump or the like connected to the deaeration pipe 34 is stopped, or a valve (not shown) connected to the vacuum pump or the like is closed, and the water supply pipe 35 is closed. Pure water is supplied to the fluid chamber 33 through the water supply pipe 35 by a connected water supply pump or the like. Thereby, the semiconductor wafer 10 can be easily removed.

また、チャックテーブル３０の下部には、チャックテーブル３０を支持する回転軸３２が接続され、回転軸３２には、例えば、図示しないモータ等が接続される。該モータが駆動することにより、回転軸３２及びチャックテーブル３０が回転する。これにより、半導体ウエハ１０を所定の速さで回転させることができ、接着剤１２の表面全体を研削することができる。   In addition, a rotating shaft 32 that supports the chuck table 30 is connected to the lower portion of the chuck table 30, and a motor (not shown) or the like is connected to the rotating shaft 32, for example. When the motor is driven, the rotating shaft 32 and the chuck table 30 are rotated. Thereby, the semiconductor wafer 10 can be rotated at a predetermined speed, and the entire surface of the adhesive 12 can be ground.

また、接着剤研削装置２０は、研削液を供給する研削液供給ノズル２６と、洗浄液噴射装置２７と、を有する。研削液供給ノズル２６は、例えば、接着剤１２の表面、即ち研削若しくは研磨される面に研削液を供給する。研削液としては、例えば、純水や、エタノールアミン水溶液、テトラメチルアンモニウムヒドロキシド水溶液、苛性アルカリ水溶液、セリア水分散液、アルミナ水分散液等が用いられる。   The adhesive grinding apparatus 20 includes a grinding liquid supply nozzle 26 that supplies a grinding liquid and a cleaning liquid ejecting apparatus 27. The grinding fluid supply nozzle 26 supplies the grinding fluid to the surface of the adhesive 12, that is, the surface to be ground or polished, for example. As the grinding liquid, for example, pure water, ethanolamine aqueous solution, tetramethylammonium hydroxide aqueous solution, caustic alkaline aqueous solution, ceria water dispersion, alumina water dispersion, or the like is used.

洗浄液噴射装置２７は、といし２２を洗浄するための装置であり、といし２２に洗浄液を吹き付けるための噴射ノズル２８を有する。洗浄液噴射装置２７は、噴射ノズル２８から、例えば、３ＭＰａから１７ＭＰａの圧力で、研削加工に供していないといし２２の刃先に洗浄水を噴射する。これにより、接着剤１２の研削若しくは研磨の際に、といし２２に付着した削り屑を洗い流すことができる。これにより、接着剤１２の表面を高精度、高品質且つ容易に研削することができる。   The cleaning liquid ejecting apparatus 27 is an apparatus for cleaning the wheel 22 and includes a spray nozzle 28 for spraying the cleaning liquid onto the wheel 22. The cleaning liquid injection device 27 injects the cleaning water from the injection nozzle 28 onto the cutting edge of the wheel 22 when not subjected to grinding at a pressure of 3 MPa to 17 MPa, for example. Thereby, the shavings adhering to the wheel 22 can be washed away when the adhesive 12 is ground or polished. As a result, the surface of the adhesive 12 can be easily ground with high accuracy, high quality, and the like.

なお、噴射ノズル２８から噴射される洗浄液としては、前述の研削液と同じものを用いることができる。例えば、洗浄液として、純水や、エタノールアミン水溶液、テトラメチルアンモニウムヒドロキシド水溶液、苛性アルカリ水溶液、セリア水分散液、アルミナ水分散液等を用いることができる。   Note that the same cleaning liquid as that described above can be used as the cleaning liquid sprayed from the spray nozzle 28. For example, pure water, ethanolamine aqueous solution, tetramethylammonium hydroxide aqueous solution, caustic alkaline aqueous solution, ceria water dispersion, alumina water dispersion, or the like can be used as the cleaning liquid.

なお、図示を省略するが、裏面研削工程Ｓ６０で使用される半導体ウエハ１０の裏面１０ｂを研削する裏面研削装置は、図２を参照して説明した接着剤１２の表面を研削するための接着剤研削装置２０と略同等の構成である。   In addition, although illustration is abbreviate | omitted, the back surface grinding apparatus which grinds the back surface 10b of the semiconductor wafer 10 used by back surface grinding process S60 is the adhesive agent for grinding the surface of the adhesive agent 12 demonstrated with reference to FIG. The configuration is substantially the same as that of the grinding device 20.

また、半導体ウエハ１０の裏面１０ｂを研削するためのウエハ研削工具についても前述の接着剤１２を研削するためのといし２２と略同様の構成のといしが用いられる。但し、ウエハ研削工具の砥粒や結合剤については、半導体ウエハ１０のシリコン及び貫通電極を切削するために好適な仕様が選定される。   Further, a wheel grinding tool for grinding the back surface 10b of the semiconductor wafer 10 uses a wheel having substantially the same structure as the above-described wheel 22 for grinding the adhesive 12. However, for the abrasive grains and binder of the wafer grinding tool, suitable specifications are selected for cutting the silicon and the through electrode of the semiconductor wafer 10.

また、裏面研削装置は、前述のチャックテーブル３０と略同等のチャックテーブルを有し、裏面研削工程Ｓ６０においては、このチャックテーブルの上面に、半導体ウエハ１０の表面１０ａ側に貼付されたサポート基板１３（図６（Ｃ）参照）が吸着保持される。   The back grinding apparatus has a chuck table that is substantially the same as the chuck table 30 described above. In the back grinding step S60, the support substrate 13 attached to the top surface of the semiconductor wafer 10 on the top surface of the chuck table. (See FIG. 6C) is held by suction.

図３は、エッジトリミング装置４０の概略構成を示す正面図である。図３に示すように、エッジトリミング装置４０は、前述のとおり、半導体ウエハ１０の周囲端部をトリミングする装置であり、半導体ウエハ１０の周囲端部を研削若しくは研磨する研磨テープ４２を有するトリミングヘッド４１を備える。   FIG. 3 is a front view showing a schematic configuration of the edge trimming apparatus 40. As shown in FIG. 3, the edge trimming device 40 is a device for trimming the peripheral edge of the semiconductor wafer 10 as described above, and includes a trimming head having a polishing tape 42 for grinding or polishing the peripheral edge of the semiconductor wafer 10. 41 is provided.

研磨テープ４２は、例えば、厚みが１００μｍから１５０μｍのポリエチレンテレフタレート等のフィルム基材に、炭化珪素やダイヤモンド等の砥粒が設けられた略帯状の部材である。前記砥粒は、研磨テープ４２の半導体ウエハ１０に摺擦する面、即ち研磨面に設けられる。研磨テープ４２は、図示しない供給リール及び巻取リールに巻回されており、半導体ウエハ１０の端部をトリミングする際には、供給リールから送り出されて巻取リールに巻き取られる。   The polishing tape 42 is a substantially band-shaped member in which, for example, a film base material such as polyethylene terephthalate having a thickness of 100 μm to 150 μm is provided with abrasive grains such as silicon carbide and diamond. The abrasive grains are provided on the surface of the polishing tape 42 that rubs against the semiconductor wafer 10, that is, the polishing surface. The polishing tape 42 is wound around a supply reel and a take-up reel (not shown). When trimming the end portion of the semiconductor wafer 10, the polishing tape 42 is sent out from the supply reel and wound around the take-up reel.

研磨テープ４２は、トリミングヘッド４１の所定の位置に配列される複数のガイドローラ４４に掛けられることにより、その研磨面が半導体ウエハ１０の所定の位置に摺擦するよう配置さる。なお、トリミングヘッド４１は、図示しないサーボモータ等によって位置調整自在に設けられている。   The polishing tape 42 is placed on a plurality of guide rollers 44 arranged at a predetermined position of the trimming head 41 so that the polishing surface slides on a predetermined position of the semiconductor wafer 10. The trimming head 41 is provided such that its position can be adjusted by a servo motor (not shown).

また、エッジトリミング装置４０は、研磨テープ４２と半導体ウエハ１０の端部とを当接させるための当て板４３を有する。当て板４３は、例えば、発泡シリコン樹脂等から形成され、研磨テープ４２の研磨面の反対側の面、即ち裏面から研磨テープ４２に当接し、研磨テープ４２の研磨面を、半導体ウエハ１０の側方から端部に押し当てる。即ち、研磨テープ４２は、当て板４３と半導体ウエハ１０の端部の間に挟まれた状態で半導体ウエハ１０の端部を研削若しくは研磨する。   Further, the edge trimming device 40 has a contact plate 43 for bringing the polishing tape 42 and the end of the semiconductor wafer 10 into contact with each other. The backing plate 43 is made of, for example, foamed silicon resin or the like, contacts the polishing tape 42 from the surface opposite to the polishing surface of the polishing tape 42, that is, from the back surface, and the polishing surface of the polishing tape 42 is arranged on the side of the semiconductor wafer 10. Press against the edge from the side. That is, the polishing tape 42 grinds or polishes the end of the semiconductor wafer 10 while being sandwiched between the backing plate 43 and the end of the semiconductor wafer 10.

また、エッジトリミング装置４０は、前述の接着剤研削装置２０（図２参照）と同様に、半導体ウエハ１０を吸着して保持するためのチャックテーブル４５及びそれを回転駆動自在に支持する回転軸４６を備えている。図示しないモータ等によって回転軸４６及びチャックテーブル４５を回転させることにより、半導体ウエハ１０を回転させて、半導体ウエハ１０の全周端部をトリミングすることができる。なお、チャックテーブル４５の半導体ウエハ１０を吸着保持するための吸着チャック機構については、既に説明したチャックテーブル３０と同様の構成を採用することができる。   In addition, the edge trimming device 40 is similar to the above-described adhesive grinding device 20 (see FIG. 2), and a chuck table 45 for attracting and holding the semiconductor wafer 10 and a rotating shaft 46 for rotatably supporting the chuck table 45. It has. By rotating the rotating shaft 46 and the chuck table 45 by a motor or the like (not shown), the semiconductor wafer 10 can be rotated to trim the entire peripheral edge of the semiconductor wafer 10. Note that the chuck chuck mechanism for chucking and holding the semiconductor wafer 10 of the chuck table 45 can employ the same configuration as the chuck table 30 described above.

エッジトリミング装置４０は、冷却水噴射ノズル４９を有する。これにより、エッジトリミング装置４０は、冷却水噴射ノズル４９から、研磨テープ４２と半導体ウエハ１０とが摺擦する面に冷却水を噴射しつつ、半導体ウエハ１０の端部を研削若しくは研磨する。このような構成により、半導体ウエハ１０の周囲端部を接着剤１２と共に高精度にトリミングすることができる。   The edge trimming device 40 has a cooling water injection nozzle 49. As a result, the edge trimming device 40 grinds or polishes the end portion of the semiconductor wafer 10 while spraying the cooling water from the cooling water spray nozzle 49 onto the surface where the polishing tape 42 and the semiconductor wafer 10 rub against each other. With such a configuration, the peripheral edge of the semiconductor wafer 10 can be trimmed with the adhesive 12 with high accuracy.

なお、接着剤研削装置２０とエッジトリミング装置４０は、それぞれ別々の装置として構成されても良いし、それらの機能が一体的に組み込まれた１つの装置として構成されて良い。   The adhesive grinding device 20 and the edge trimming device 40 may be configured as separate devices, or may be configured as one device in which those functions are integrated.

以下、図４（Ａ）及び（Ｂ）を参照して、接着剤研削装置２０の構成とエッジトリミング装置４０の構成が１つの装置に一体的に組み込まれた例について説明する。
図４（Ａ）は、接着剤研削装置１２０の概略構成を示す正面図であり、図４（Ｂ）は、同平面図である。なお、図４では、既に説明した実施形態と同一若しくは同様の作用、効果を奏する構成要素については、同一の符号を付している。 Hereinafter, an example in which the configuration of the adhesive grinding device 20 and the configuration of the edge trimming device 40 are integrated into one device will be described with reference to FIGS. 4 (A) and 4 (B).
FIG. 4A is a front view showing a schematic configuration of the adhesive grinding apparatus 120, and FIG. 4B is a plan view thereof. In FIG. 4, the same reference numerals are given to components that exhibit the same or similar functions and effects as those of the already described embodiment.

図４（Ａ）及び（Ｂ）に示すように、接着剤研削装置１２０は、接着剤１２の表面を研削するための接着剤研削工具であるといし２２を有する研削ヘッド２１と、半導体ウエハ１０の周囲端部を研削若しくは研磨するための研磨テープ４２を有するトリミングヘッド４１と、を備える。   As shown in FIGS. 4A and 4B, the adhesive grinding apparatus 120 includes a grinding head 21 having a wheel 22 that is an adhesive grinding tool for grinding the surface of the adhesive 12, and the semiconductor wafer 10. And a trimming head 41 having a polishing tape 42 for grinding or polishing the peripheral edge of the head.

また、接着剤研削装置１２０は、半導体ウエハ１０を吸着保持するためのチャックテーブル４５を備える。チャックテーブル４５の構成及び機能については既に説明したとおりであるが、接着剤研削装置１２０では、接着剤研削工程Ｓ３０及び端部トリミング工程Ｓ４０の両工程において共通のチャックテーブル４５が用いられる。   The adhesive grinding device 120 includes a chuck table 45 for attracting and holding the semiconductor wafer 10. The configuration and function of the chuck table 45 are as described above. In the adhesive grinding device 120, the common chuck table 45 is used in both the adhesive grinding step S30 and the end trimming step S40.

ここで、チャックテーブル４５の外径は、半導体ウエハ１０の外径よりも小さいことを特徴とする。これにより、チャックテーブル４５とトリミングヘッド４１が接触することなく、チャックテーブル４５の上面に載置され吸着保持された半導体ウエハ１０の周囲端部をトリミングヘッド４１の研磨テープ４２でトリミングすることができる。   Here, the outer diameter of the chuck table 45 is smaller than the outer diameter of the semiconductor wafer 10. As a result, the peripheral edge of the semiconductor wafer 10 placed on the upper surface of the chuck table 45 and held by suction can be trimmed with the polishing tape 42 of the trimming head 41 without the chuck table 45 and the trimming head 41 coming into contact. .

その他、接着剤研削装置１２０は、研削液供給ノズル２６、洗浄液噴射装置２７、冷却水噴射ノズル４９等、既に説明した接着剤研削装置２０及びエッジトリミング装置４０と略同等の構成を備えている。   In addition, the adhesive grinding device 120 has substantially the same configuration as the previously described adhesive grinding device 20 and edge trimming device 40, such as the grinding fluid supply nozzle 26, the cleaning fluid ejection device 27, and the cooling water ejection nozzle 49.

上記の構成を有する接着剤研削装置１２０によれば、１つの装置で、接着剤１２の表面を研削する接着剤研削工程Ｓ３０と、半導体ウエハ１０の周囲端部をトリミングする端部トリミング工程Ｓ４０と、を実行することができる。これにより、半導体ウエハ１０の搬送やセット工程を削減して生産効率を高めることができると共に設備費用を削減することができる。   According to the adhesive grinding apparatus 120 having the above-described configuration, the adhesive grinding process S30 for grinding the surface of the adhesive 12 with one apparatus, and the end trimming process S40 for trimming the peripheral edge of the semiconductor wafer 10; , Can be performed. As a result, it is possible to increase the production efficiency by reducing the transfer and setting process of the semiconductor wafer 10 and to reduce the equipment cost.

次に、図５及び図６を参照して、図１に示す半導体装置の製造方法について詳細に説明する。
図５（Ａ）は、表面１０ａに回路が形成された半導体ウエハ１０の概略図であり、図５（Ｂ）は、表面１０ａに接着剤１２が塗布された半導体ウエハ１０の概略図であり、図５（Ｃ）は、接着剤１２が研磨される状態を示す半導体ウエハ１０の概略図である。また、図６（Ａ）は、端部がトリミングされる状態を示す半導体ウエハ１０の概略図であり、図６（Ｂ）は、サポート基板１３が貼り付けられた半導体ウエハ１０の概略図であり、図６（Ｃ）は、裏面１０ｂが研削される状態を示す半導体ウエハ１０の概略図である。 Next, a method for manufacturing the semiconductor device shown in FIG. 1 will be described in detail with reference to FIGS.
5A is a schematic view of the semiconductor wafer 10 having a circuit formed on the surface 10a, and FIG. 5B is a schematic view of the semiconductor wafer 10 in which the adhesive 12 is applied to the surface 10a. FIG. 5C is a schematic view of the semiconductor wafer 10 showing a state in which the adhesive 12 is polished. FIG. 6A is a schematic view of the semiconductor wafer 10 in a state where the edge is trimmed, and FIG. 6B is a schematic view of the semiconductor wafer 10 to which the support substrate 13 is attached. FIG. 6C is a schematic view of the semiconductor wafer 10 showing a state where the back surface 10b is ground.

図５（Ａ）に示すように、回路形成工程Ｓ１０では、半導体ウエハ１０の表面１０ａに、例えば、フォトレジスト塗布工程、フォトマスクによるパターン焼き付け工程、エッチング工程、酸化、拡散、化学気相蒸着（ＣＶＤ）、イオン注入工程、ＣＭＰ工程等の所定の工程を繰り返して、回路が形成される。   As shown in FIG. 5A, in the circuit forming process S10, for example, a photoresist coating process, a pattern baking process using a photomask, an etching process, oxidation, diffusion, chemical vapor deposition (on the surface 10a of the semiconductor wafer 10 ( A circuit is formed by repeating predetermined processes such as CVD), ion implantation process, and CMP process.

また、回路形成工程Ｓ１０では、半導体ウエハ１０に図示しない貫通電極が形成され、凸形状として、例えば、貫通電極に接続されるバンプ１１等が形成される。例えば、回路が形成された半導体ウエハ１０に、エッチング加工やレーザ加工等によって複数の孔が形成され、形成された該孔の内面に絶縁膜が設けられた後、タンタルまたはチタンによってメタルシード層が形成される。そして、メタルシード層の更に内側に銅樹脂ペースト等を充填することにより貫通電極が形成される。そして、表面１０ａ側の貫通電極の頭面に凸形状のバンプ１１が形成される。   Further, in the circuit forming step S10, through electrodes (not shown) are formed on the semiconductor wafer 10, and bumps 11 connected to the through electrodes are formed as convex shapes, for example. For example, a plurality of holes are formed in the semiconductor wafer 10 on which a circuit is formed by etching or laser processing, and an insulating film is provided on the inner surface of the formed holes, and then a metal seed layer is formed with tantalum or titanium. It is formed. A through electrode is formed by filling a copper resin paste or the like further inside the metal seed layer. And the convex-shaped bump 11 is formed in the head surface of the penetration electrode by the surface 10a side.

なお、半導体ウエハ１０は、上記のような貫通電極が形成されたものに限定されず、貫通電極が形成されていないものであっても良い。また、半導体ウエハ１０の表面１０ａの凸形状は、貫通電極に接続されるバンプ１１に限定されるものではなく、その他の回路やマーキング等によって形成される種々の凸状部等であっても良い。   The semiconductor wafer 10 is not limited to the one on which the through electrode as described above is formed, and may be one on which the through electrode is not formed. The convex shape of the surface 10a of the semiconductor wafer 10 is not limited to the bump 11 connected to the through electrode, and may be various convex portions formed by other circuits, markings, or the like. .

図５（Ｂ）に示すように、接着剤塗布工程Ｓ２０では、半導体ウエハ１０の表面１０ａに、接着剤１２が塗布される。接着剤１２は、例えば、アクリル樹脂系、ゴム系、シリコン樹脂系、フェノール樹脂系等の各種樹脂ボンドや接合剤、粘着剤等が用いられ、紫外線硬化型粘着剤等であっても良い。接着剤１２は、例えば、スピンコート等の方法によって塗布される。なお、接着剤１２は、接着剤１２によって形成される層の厚さが、バンプ１１の高さよりも厚くなるように塗布される。
そして、接着剤１２が塗布された後、使用している接着剤１２の種類に応じた所定の方法によって、接着剤１２を硬化させる処理が行われる。 As shown in FIG. 5B, the adhesive 12 is applied to the surface 10a of the semiconductor wafer 10 in the adhesive application step S20. As the adhesive 12, for example, various resin bonds such as acrylic resin, rubber, silicon resin, and phenol resin, a bonding agent, an adhesive, and the like are used, and an ultraviolet curable adhesive may be used. The adhesive 12 is applied by a method such as spin coating. The adhesive 12 is applied so that the layer formed by the adhesive 12 is thicker than the bump 11.
And after the adhesive agent 12 is apply | coated, the process which hardens the adhesive agent 12 by the predetermined method according to the kind of adhesive agent 12 currently used is performed.

このように、半導体ウエハ１０の表面１０ａに接着剤１２を塗布することにより、半導体ウエハ１０の表面１０ａに形成された回路が接着剤１２によって保護されると共に、半導体ウエハ１０を後述するサポート基板１３（図６（Ｂ）参照）に貼り付けることができる。   Thus, by applying the adhesive 12 to the surface 10a of the semiconductor wafer 10, the circuit formed on the surface 10a of the semiconductor wafer 10 is protected by the adhesive 12, and the support substrate 13 described later is used for the semiconductor wafer 10. (See FIG. 6B).

ここで、接着剤１２は、半導体ウエハ１０の表面１０ａに形成されたバンプ１１を覆うので、接着剤１２の表面は、バンプ１１によって一部が僅かに盛り上がった状態になり易い。   Here, since the adhesive 12 covers the bumps 11 formed on the surface 10 a of the semiconductor wafer 10, a part of the surface of the adhesive 12 tends to be slightly raised by the bumps 11.

半導体ウエハ１０の表面１０ａに塗布された接着剤１２が硬化した後、接着剤研削工程Ｓ３０が行われる。図５（Ｃ）に示すように、接着剤研削工程Ｓ３０では、図２を参照して説明した接着剤研削装置２０の研削ヘッド２１を用いて接着剤１２の表面が研削される。これにより、接着剤１２の表面に形成された盛り上がり等が除去され、接着剤１２の表面が平坦になる。なお、接着剤１２の厚みはバンプ１１の高さよりも厚いので、接着剤１２の表面を研削した際に、接着剤１２と一緒にバンプ１１が研削されることはない。   After the adhesive 12 applied to the surface 10a of the semiconductor wafer 10 is cured, an adhesive grinding step S30 is performed. As shown in FIG. 5C, in the adhesive grinding step S30, the surface of the adhesive 12 is ground using the grinding head 21 of the adhesive grinding apparatus 20 described with reference to FIG. Thereby, the swelling etc. which were formed in the surface of the adhesive agent 12 are removed, and the surface of the adhesive agent 12 becomes flat. In addition, since the thickness of the adhesive 12 is thicker than the height of the bump 11, the bump 11 is not ground together with the adhesive 12 when the surface of the adhesive 12 is ground.

このように、半導体ウエハ１０の表面１０ａに塗布された接着剤１２の表面を研削することにより、半導体ウエハ１０の表面１０ａから接着剤１２の表面までの高さ、即ち接着剤１２の厚さ、を均一にして、厚さ寸法を高精度に揃えることができる。   Thus, by grinding the surface of the adhesive 12 applied to the surface 10a of the semiconductor wafer 10, the height from the surface 10a of the semiconductor wafer 10 to the surface of the adhesive 12, that is, the thickness of the adhesive 12; Can be made uniform and the thickness dimension can be aligned with high accuracy.

図６（Ａ）に示すように、端部トリミング工程Ｓ４０では、図３を参照して説明したエッジトリミング装置４０を用いて、半導体ウエハ１０の周囲端部のトリミングを行う。端部トリミング工程Ｓ４０では、半導体ウエハ１０の端部と接着剤１２とが同時に研削若しくは研磨される。これにより、半導体ウエハ１０と接着剤１２の端部の丸みや傾斜が除去される。これにより、半導体ウエハ１０の裏面１０ｂを研削して半導体ウエハ１０を薄化する際に、半導体ウエハ１０の端部近傍が他の部分よりも薄く形成されることが抑制される。よって、半導体ウエハ１０の端部近傍のチッピングを抑制することできる。   As shown in FIG. 6A, in the edge trimming step S40, the peripheral edge of the semiconductor wafer 10 is trimmed using the edge trimming apparatus 40 described with reference to FIG. In the end trimming step S40, the end of the semiconductor wafer 10 and the adhesive 12 are ground or polished simultaneously. Thereby, the roundness and inclination of the end portions of the semiconductor wafer 10 and the adhesive 12 are removed. Thereby, when the semiconductor wafer 10 is thinned by grinding the back surface 10b of the semiconductor wafer 10, it is possible to suppress the vicinity of the end of the semiconductor wafer 10 from being formed thinner than the other portions. Therefore, chipping near the end of the semiconductor wafer 10 can be suppressed.

図６（Ｂ）に示すように、サポート基板貼付工程Ｓ５０では、接着剤１２が塗布された半導体ウエハ１０の表面１０ａ側にサポート基板１３が貼り付けられる。即ち、サポート基板１３は、半導体ウエハ１０の表面１０ａに塗布された接着剤１２によって、半導体ウエハ１０の表面１０ａ側に接着される。   As shown in FIG. 6B, in the support substrate sticking step S50, the support substrate 13 is stuck on the surface 10a side of the semiconductor wafer 10 to which the adhesive 12 is applied. That is, the support substrate 13 is bonded to the surface 10 a side of the semiconductor wafer 10 by the adhesive 12 applied to the surface 10 a of the semiconductor wafer 10.

サポート基板１３は、ガラス、金属、セラミック、合成樹脂等から形成される高剛性の板状体である。なお、接着剤１２の表面にサポート基板１３を接着する方法は、使用している接着剤１２の特性等に応じて種々の方法が採用される。   The support substrate 13 is a highly rigid plate-like body formed from glass, metal, ceramic, synthetic resin, or the like. Various methods may be employed for bonding the support substrate 13 to the surface of the adhesive 12 depending on the characteristics of the adhesive 12 being used.

前述のとおり、接着剤研削工程Ｓ３０（図５（Ｃ）参照）で接着剤１２の表面が平坦にされて接着剤１２の厚みは均一化されており、その上に、高剛性のサポート基板１３が貼り付けられることにより、半導体ウエハ１０の裏面１０ｂは、サポート基板１３の主面に対して略平行になる。   As described above, the surface of the adhesive 12 is flattened in the adhesive grinding step S30 (see FIG. 5C), and the thickness of the adhesive 12 is made uniform. Is attached, the back surface 10 b of the semiconductor wafer 10 becomes substantially parallel to the main surface of the support substrate 13.

図６（Ｃ）に示すように、裏面研削工程Ｓ６０では、図２に示す接着剤研削装置２０と略同等の裏面研削装置を用いて、半導体ウエハ１０の裏面１０ｂの研削が行われる。半導体ウエハ１０は、サポート基板１３を下にして裏面研削装置のチャックテーブルの上面に載置され、基板チャックによって吸着され保持される。即ち、半導体ウエハ１０は、その裏面１０ｂが上方を向くように、チャックテーブルの上面にセットされる。そして、半導体ウエハ１０の裏面１０ｂは、ウエハ研削工具によって、研削される。   As shown in FIG. 6C, in the back surface grinding step S60, the back surface 10b of the semiconductor wafer 10 is ground using a back surface grinding device substantially equivalent to the adhesive grinding device 20 shown in FIG. The semiconductor wafer 10 is placed on the upper surface of the chuck table of the back grinding apparatus with the support substrate 13 facing down, and is sucked and held by the substrate chuck. That is, the semiconductor wafer 10 is set on the upper surface of the chuck table so that the back surface 10b faces upward. Then, the back surface 10b of the semiconductor wafer 10 is ground by a wafer grinding tool.

前述のとおり、接着剤研削工程Ｓ３０（図５（Ｃ）参照）で接着剤１２の厚みが均一化され、半導体ウエハ１０の裏面１０ｂは、サポート基板１３の主面に対して略平行になっているので、半導体ウエハ１０の裏面１０ｂは、裏面研削装置のチャックテーブルの上面に対して略平行になる。即ち、半導体ウエハ１０は、チャックテーブルの上面に略水平に載置されることになる。   As described above, the thickness of the adhesive 12 is made uniform in the adhesive grinding step S30 (see FIG. 5C), and the back surface 10b of the semiconductor wafer 10 is substantially parallel to the main surface of the support substrate 13. Therefore, the back surface 10b of the semiconductor wafer 10 is substantially parallel to the top surface of the chuck table of the back surface grinding apparatus. That is, the semiconductor wafer 10 is placed substantially horizontally on the upper surface of the chuck table.

以上のように、接着剤１２の表面が研削されて周囲端部がトリミングされた後に、サポート基板１３を貼付して半導体ウエハ１０の裏面１０ｂを研削することにより、半導体ウエハ１０の厚みを均一にすることができ、半導体ウエハ１０の破損を抑制することができる。その結果、半導体ウエハ１０を従来技術の半導体ウエハよりも薄く高品質に形成することができる。   As described above, after the surface of the adhesive 12 is ground and the peripheral edge is trimmed, the support substrate 13 is pasted and the back surface 10b of the semiconductor wafer 10 is ground, thereby making the thickness of the semiconductor wafer 10 uniform. And damage to the semiconductor wafer 10 can be suppressed. As a result, the semiconductor wafer 10 can be formed thinner and with higher quality than the conventional semiconductor wafer.

また、裏面研削工程Ｓ６０では、半導体ウエハ１０と貫通電極が同時に研削される。これにより、半導体ウエハの薄化工程と貫通電極の頭出し工程とを同時に効率良く行うことができると共に、半導体ウエハ１０だけでなく、半導体ウエハ１０に形成された貫通電極の高さを均一に揃えることができる。また、半導体ウエハ１０の裏面１０ｂを研削するウエハ研削工具に洗浄水を吹き付けることにより、半導体ウエハ１０の汚染を抑制することができる。よって、高集積率で小型の３次元実装される半導体装置を効率良く製造することができる。   In the back grinding step S60, the semiconductor wafer 10 and the through electrode are ground simultaneously. Accordingly, the thinning process of the semiconductor wafer and the cueing process of the through electrode can be efficiently performed at the same time, and the heights of the through electrodes formed on the semiconductor wafer 10 as well as the semiconductor wafer 10 are made uniform. be able to. Further, by spraying cleaning water onto a wafer grinding tool for grinding the back surface 10b of the semiconductor wafer 10, contamination of the semiconductor wafer 10 can be suppressed. Therefore, a small three-dimensionally mounted semiconductor device with a high integration rate can be efficiently manufactured.

なお、半導体ウエハ１０の裏面１０ｂが研削された後、裏面１０ｂに絶縁膜を形成する等、仕上げのための各種工程が実行されても良い。
具体的には、半導体ウエハ１０の裏面１０ｂのシリコン面より露出した貫通電極の頭面にのみ選択的にキャップ層を形成するニッケル（Ｎｉ）無電解メッキが行われても良い。ニッケル無電解メッキ液は、ニッケル（Ｎｉ）の他に硼素（Ｂ）、燐（Ｐ）またはコバルト（Ｃｏ）等を含有していても良い。 In addition, after the back surface 10b of the semiconductor wafer 10 is ground, various processes for finishing, such as forming an insulating film on the back surface 10b, may be performed.
Specifically, nickel (Ni) electroless plating that selectively forms a cap layer only on the head surface of the through electrode exposed from the silicon surface of the back surface 10b of the semiconductor wafer 10 may be performed. The nickel electroless plating solution may contain boron (B), phosphorus (P), cobalt (Co), or the like in addition to nickel (Ni).

次に、キャップ層が形成されていないシリコン面をアルカリエッチングまたはＣＭＰ加工することにより、貫通電極の第二次頭出しが行われても良い。
そして、貫通電極の第二次頭出し加工が行われた半導体ウエハ１０の裏面１０ｂに絶縁膜（ｉｎｓｕｌａｔｏｒ）を堆積する処理が行われ、その後に、ＣＭＰ組成物、研磨バフを用いて研磨加工が行われ、貫通電極の頭面の前記絶縁膜が除去されても良い。 Next, secondary cueing of the through electrode may be performed by performing alkali etching or CMP processing on the silicon surface on which the cap layer is not formed.
And the process which deposits an insulating film (insulator) on the back surface 10b of the semiconductor wafer 10 in which the second cueing process of the penetration electrode was performed is performed, and then the polishing process is performed using the CMP composition and the polishing buff. The insulating film on the top surface of the through electrode may be removed.

なお、本発明は、上記実施形態に限定されるものではなく、その他、本発明の要旨を逸脱しない範囲で、種々の変更実施が可能である。   In addition, this invention is not limited to the said embodiment, In addition, a various change implementation is possible in the range which does not deviate from the summary of this invention.

１０ 半導体ウエハ
１０ａ 表面
１０ｂ 裏面
１１ バンプ
１２ 接着剤
１３ サポート基板
２０ 接着剤研削装置
２１ 研削ヘッド
２２ といし
２７ 洗浄液噴射装置
２８ 噴射ノズル
４０ エッジトリミング装置
４１ トリミングヘッド
４２ 研磨テープ
１２０ 接着剤研削装置 DESCRIPTION OF SYMBOLS 10 Semiconductor wafer 10a Front surface 10b Back surface 11 Bump 12 Adhesive 13 Support substrate 20 Adhesive grinding device 21 Grinding head 22 Wheel 27 Cleaning liquid injection device 28 Injection nozzle 40 Edge trimming device 41 Trimming head 42 Polishing tape 120 Adhesive grinding device

Claims (6)

凸形状が形成された半導体ウエハの表面に接着剤を塗布する工程と、
前記半導体ウエハに塗布された前記接着剤の表面を研削する工程と、
前記接着剤が塗布された前記半導体ウエハの周囲端部を前記接着剤と共にトリミングする工程と、
前記接着剤の表面が研削されて前記周囲端部がトリミングされた前記半導体ウエハを、前記接着剤を介してサポート基板に貼付する工程と、
前記サポート基板に貼付された前記半導体ウエハの裏面を研削する工程と、を具備することを特徴とする半導体装置の製造方法。 Applying an adhesive to the surface of the semiconductor wafer on which the convex shape is formed;
Grinding the surface of the adhesive applied to the semiconductor wafer;
Trimming the peripheral edge of the semiconductor wafer coated with the adhesive together with the adhesive;
Pasting the semiconductor wafer, the surface of the adhesive being ground and the peripheral edge being trimmed, to the support substrate via the adhesive; and
Grinding a back surface of the semiconductor wafer attached to the support substrate. A method for manufacturing a semiconductor device, comprising: 前記接着剤の表面を研削する工程では、前記接着剤の表面を研削する接着剤研削工具に洗浄水を吹き付けながら前記接着剤の表面を研削することを特徴とする請求項１に記載の半導体装置の製造方法。   2. The semiconductor device according to claim 1, wherein in the step of grinding the surface of the adhesive, the surface of the adhesive is ground while spraying cleaning water on an adhesive grinding tool for grinding the surface of the adhesive. Manufacturing method. 前記洗浄水は、前記接着剤研削工具の研削加工に供していないといしの刃先に吹き付けられることを特徴とする請求項２に記載の半導体装置の製造方法。   The method of manufacturing a semiconductor device according to claim 2, wherein the cleaning water is sprayed on a blade edge of a wheel when the adhesive grinding tool is not used for grinding. 前記半導体ウエハは、貫通電極を有し、
前記半導体ウエハの裏面を研削する工程では、前記半導体ウエハの裏面を研削するウエハ研削工具に洗浄水を吹き付けながら前記半導体ウエハと前記貫通電極を同時に研削することを特徴とする請求項１ないし請求項３の何れか１項に記載の半導体装置の製造方法。 The semiconductor wafer has a through electrode,
The step of grinding the back surface of the semiconductor wafer comprises grinding the semiconductor wafer and the through electrode simultaneously while spraying cleaning water on a wafer grinding tool for grinding the back surface of the semiconductor wafer. 4. A method for manufacturing a semiconductor device according to any one of 3 above. 表面に凸形状を有し前記表面に接着剤が塗布された半導体ウエハを吸着保持するチャックテーブルと、
前記半導体ウエハが前記チャックテーブルに吸着保持された状態で前記接着剤の表面を研削する接着剤研削工具と、
前記半導体ウエハが前記チャックテーブルに吸着保持された状態で前記半導体ウエハの周囲端部を前記接着剤と共にトリミングする研磨テープと、を備えることを特徴とする半導体製造装置。 A chuck table for sucking and holding a semiconductor wafer having a convex shape on the surface and coated with an adhesive on the surface;
An adhesive grinding tool for grinding the surface of the adhesive in a state where the semiconductor wafer is held by suction on the chuck table;
A semiconductor manufacturing apparatus, comprising: a polishing tape for trimming a peripheral edge of the semiconductor wafer together with the adhesive in a state where the semiconductor wafer is held by suction on the chuck table. 前記接着剤研削工具に洗浄水を吹き付ける洗浄液噴射装置を備えることを特徴とする請求項５に記載の半導体製造装置。   The semiconductor manufacturing apparatus according to claim 5, further comprising a cleaning liquid ejecting apparatus that sprays cleaning water onto the adhesive grinding tool.
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019204940A (en) * 2018-05-25 2019-11-28 力成科技股▲分▼有限公司 Wafer processing method using full edge trimming
CN110856900A (en) * 2018-08-21 2020-03-03 株式会社冈本工作机械制作所 Method and apparatus for manufacturing semiconductor device
US20200198083A1 (en) * 2018-12-20 2020-06-25 Okamoto Machine Tool Works, Ltd. Grinding method of composite substrate including resin and grinding apparatus thereof
WO2022045278A1 (en) * 2020-08-27 2022-03-03 富士フイルム株式会社 Method for manufacturing processed substrate, method for manufacturing semiconductor element, and composition for forming temporary adhesive layer
CN115302345A (en) * 2022-08-30 2022-11-08 福建融玻科技有限公司 Flat grinding and polishing machine for repairing scratches of anti-glare glass display screen thin plate

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108857601A (en) * 2018-07-25 2018-11-23 浙江工业大学 The photocatalysis processing method and its equipment of cobalt-base alloys
KR102455146B1 (en) * 2020-02-10 2022-10-17 주식회사 나노인 Reversible Coating Method for Encapsulating and Filling Structures on Substrates

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05109679A (en) * 1991-10-15 1993-04-30 Nec Corp Manufacture of semiconductor device
JP2004207459A (en) * 2002-12-25 2004-07-22 Disco Abrasive Syst Ltd Method for grinding semiconductor wafer
JP2007042811A (en) * 2005-08-02 2007-02-15 Tokyo Seimitsu Co Ltd Grinding method and apparatus of wafer periphery
WO2009104614A1 (en) * 2008-02-22 2009-08-27 日本ミクロコーティング株式会社 Method and apparatus for polishing outer circumferential end section of semiconductor wafer
JP2012074545A (en) * 2010-09-29 2012-04-12 Okamoto Machine Tool Works Ltd Method of grinding back surface of protection film attached semiconductor substrate
JP2013008915A (en) * 2011-06-27 2013-01-10 Toshiba Corp Substrate processing method and substrate processing apparatus
JP2013084770A (en) * 2011-10-11 2013-05-09 Disco Abrasive Syst Ltd Grinding method for wafer
JP2013118324A (en) * 2011-12-05 2013-06-13 Disco Abrasive Syst Ltd Wafer processing method
JP2013247135A (en) * 2012-05-23 2013-12-09 Disco Abrasive Syst Ltd Wafer processing method
JP2014033159A (en) * 2012-08-06 2014-02-20 Disco Abrasive Syst Ltd Method for processing wafer
JP2015032679A (en) * 2013-08-02 2015-02-16 株式会社岡本工作機械製作所 Semiconductor device manufacturing method

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004311767A (en) * 2003-04-08 2004-11-04 Disco Abrasive Syst Ltd Manufacturing method of semiconductor wafer
JP2005116610A (en) * 2003-10-03 2005-04-28 Nitto Denko Corp Processing method of semiconductor wafer, and adhesive sheet for processing semiconductor wafer
JP4447280B2 (en) * 2003-10-16 2010-04-07 リンテック株式会社 Surface protection sheet and semiconductor wafer grinding method
JP2010023119A (en) * 2008-07-15 2010-02-04 Okamoto Machine Tool Works Ltd Flattening device and flattening method for semiconductor substrate
JP2014053351A (en) * 2012-09-05 2014-03-20 Disco Abrasive Syst Ltd Wafer processing method

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05109679A (en) * 1991-10-15 1993-04-30 Nec Corp Manufacture of semiconductor device
JP2004207459A (en) * 2002-12-25 2004-07-22 Disco Abrasive Syst Ltd Method for grinding semiconductor wafer
JP2007042811A (en) * 2005-08-02 2007-02-15 Tokyo Seimitsu Co Ltd Grinding method and apparatus of wafer periphery
WO2009104614A1 (en) * 2008-02-22 2009-08-27 日本ミクロコーティング株式会社 Method and apparatus for polishing outer circumferential end section of semiconductor wafer
JP2012074545A (en) * 2010-09-29 2012-04-12 Okamoto Machine Tool Works Ltd Method of grinding back surface of protection film attached semiconductor substrate
JP2013008915A (en) * 2011-06-27 2013-01-10 Toshiba Corp Substrate processing method and substrate processing apparatus
JP2013084770A (en) * 2011-10-11 2013-05-09 Disco Abrasive Syst Ltd Grinding method for wafer
JP2013118324A (en) * 2011-12-05 2013-06-13 Disco Abrasive Syst Ltd Wafer processing method
JP2013247135A (en) * 2012-05-23 2013-12-09 Disco Abrasive Syst Ltd Wafer processing method
JP2014033159A (en) * 2012-08-06 2014-02-20 Disco Abrasive Syst Ltd Method for processing wafer
JP2015032679A (en) * 2013-08-02 2015-02-16 株式会社岡本工作機械製作所 Semiconductor device manufacturing method

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110534422A (en) * 2018-05-25 2019-12-03 力成科技股份有限公司 The wafer processing method of full side cutting
JP2019204940A (en) * 2018-05-25 2019-11-28 力成科技股▲分▼有限公司 Wafer processing method using full edge trimming
US11735411B2 (en) 2018-08-21 2023-08-22 Okamoto Machine Tool Works, Ltd. Method and apparatus for manufacturing semiconductor device
CN110856900A (en) * 2018-08-21 2020-03-03 株式会社冈本工作机械制作所 Method and apparatus for manufacturing semiconductor device
US20200198083A1 (en) * 2018-12-20 2020-06-25 Okamoto Machine Tool Works, Ltd. Grinding method of composite substrate including resin and grinding apparatus thereof
JP2020102481A (en) * 2018-12-20 2020-07-02 株式会社岡本工作機械製作所 Grinding method and grinding apparatus for resin-containing composite substrate
JP7270373B2 (en) 2018-12-20 2023-05-10 株式会社岡本工作機械製作所 Grinding method and grinding apparatus for composite substrate containing resin
CN111347304A (en) * 2018-12-20 2020-06-30 株式会社冈本工作机械制作所 Grinding method and grinding device for composite substrate containing resin
US11745299B2 (en) * 2018-12-20 2023-09-05 Okamoto Machine Tool Works, Ltd. Grinding method of composite substrate including resin and grinding apparatus thereof
CN111347304B (en) * 2018-12-20 2023-12-22 株式会社冈本工作机械制作所 Grinding method and grinding device for composite substrate containing resin
WO2022045278A1 (en) * 2020-08-27 2022-03-03 富士フイルム株式会社 Method for manufacturing processed substrate, method for manufacturing semiconductor element, and composition for forming temporary adhesive layer
EP4205902A4 (en) * 2020-08-27 2024-03-06 FUJIFILM Corporation Method for manufacturing processed substrate, method for manufacturing semiconductor element, and composition for forming temporary adhesive layer
CN115302345A (en) * 2022-08-30 2022-11-08 福建融玻科技有限公司 Flat grinding and polishing machine for repairing scratches of anti-glare glass display screen thin plate
CN115302345B (en) * 2022-08-30 2024-03-15 福建融玻科技有限公司 Anti-dazzle glass display screen sheet scratch repair flat grinding polisher

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