JP2018040801A - Testing circuit board and operation method for the same - Google Patents

Testing circuit board and operation method for the same Download PDF

Info

Publication number
JP2018040801A
JP2018040801A JP2017172398A JP2017172398A JP2018040801A JP 2018040801 A JP2018040801 A JP 2018040801A JP 2017172398 A JP2017172398 A JP 2017172398A JP 2017172398 A JP2017172398 A JP 2017172398A JP 2018040801 A JP2018040801 A JP 2018040801A
Authority
JP
Japan
Prior art keywords
circuit board
electrical connection
test
connection points
probe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2017172398A
Other languages
Japanese (ja)
Other versions
JP6484310B2 (en
Inventor
勝▲ユ▼ 曾
Sheng Yu Tseng
勝▲ユ▼ 曾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SV Probe Pte Ltd
Original Assignee
SV Probe Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SV Probe Pte Ltd filed Critical SV Probe Pte Ltd
Publication of JP2018040801A publication Critical patent/JP2018040801A/en
Application granted granted Critical
Publication of JP6484310B2 publication Critical patent/JP6484310B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2818—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP] using test structures on, or modifications of, the card under test, made for the purpose of testing, e.g. additional components or connectors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0491—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets for testing integrated circuits on wafers, e.g. wafer-level test cartridge
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
    • G01R31/318511—Wafer Test

Abstract

PROBLEM TO BE SOLVED: To provide a testing circuit board and its operation method.SOLUTION: Testing contact points of a testing machine are arranged in a peripheral area of a circuit board body intensively, a plurality of second electric contact points are arranged around the testing contact points, and a plurality of first electrical connection points are arranged around a probe. Since a first electrical connection point and a second electrical connection point can be connected via a conductive wire of the circuit board body, a test signal can be transmitted to a testing device simply by connecting the testing contact point to the second electrical connection point around when performing electric detection. In a conventional universal board structure, it is possible to avoid by using a jumper the problem that signal transmission quality is deteriorated.SELECTED DRAWING: Figure 2

Description

本発明は、電気検出装置に関し、特に電気検出用の回路板に関するものである。   The present invention relates to an electric detection device, and more particularly to a circuit board for electric detection.

従来のプローブカードは、そのプローブでチップの信号接点に接触し、チップの回路が正常であるか否かをテストしていた。通常、チップの回路のレイアウトはチップ内の回路素子特性によって異なるため、それに応じてテストするチップの信号接点は、そのチップの回路のレイアウトによって異なる。従って、テストするチップの回路素子のレイアウトに対応するために、プローブカードのサプライヤーは、通常、特定のプローブカードを製造し、当該特定のプローブカードの回路板がテストするチップの回路素子特性に対応する回路配置及びプローブ分布構造を有するようにする必要があった。   In the conventional probe card, the probe contacts the signal contact of the chip to test whether the circuit of the chip is normal. Usually, the circuit layout of a chip varies depending on the characteristics of circuit elements in the chip, and the signal contact of the chip to be tested varies depending on the circuit layout of the chip. Therefore, to accommodate the circuit element layout of the chip being tested, probe card suppliers typically manufacture a specific probe card and the circuit board of the specific probe card supports the circuit element characteristics of the chip being tested. It was necessary to have a circuit arrangement and a probe distribution structure.

しかしながら、上述したような特定のプローブカードは、製造費が高く、テストする特定のチップに対してしかテストできないため、実際に適用した場合、プローブカードのサプライヤーは、プローブカード回路板の回路配線を特定チップの回路素子に対応する専用ボード構造として配置するほか、ユニバーサルボード構造の回路板を予め製造することがよくある。そのうち、ユニバーサルボード構造の回路板平面には、周縁から中央まで複数の半田接点がそれぞれ設置されている。より詳しくは、ユニバーサルボード構造の回路板は、径方向に分布し、周縁から中央までテスト領域の半田接点、スイッチング領域の半田接点、及びプローブ領域の半田接点がそれぞれ設けられている。そのうち、該プローブ領域の半田接点は、直接回路板下方に設けられたプローブに導通される。該テスト領域とスイッチング領域の半田接点との間は簡単な径方向配線設計であり、テスト領域上にテスト機が接触される半田接点がスイッチング領域に導通し電気的に接続するものである。そして、顧客から提供されたチップ回路素子のレイアウトに基づいて、スイッチング領域の半田接点とプローブ領域の半田接点との間に設けられる回路のジャンパーによりスイッチング領域の半田接点はプローブ領域の半田接点に導通され、プローブと電気的に接続される。   However, the specific probe card as described above is expensive to manufacture and can only be tested against the specific chip to be tested. In addition to being arranged as a dedicated board structure corresponding to a circuit element of a specific chip, a circuit board having a universal board structure is often manufactured in advance. Among them, on the circuit board plane of the universal board structure, a plurality of solder contacts are respectively installed from the periphery to the center. More specifically, the circuit board of the universal board structure is distributed in the radial direction, and is provided with solder contacts in the test area, solder contacts in the switching area, and solder contacts in the probe area from the periphery to the center. Among them, the solder contact in the probe region is directly conducted to a probe provided below the circuit board. A simple radial wiring design is provided between the test area and the solder contact in the switching area, and a solder contact that contacts the test machine on the test area is electrically connected to and electrically connected to the switching area. Based on the layout of the chip circuit element provided by the customer, the solder contact in the switching area is connected to the solder contact in the probe area by a circuit jumper provided between the solder contact in the switching area and the solder contact in the probe area. And electrically connected to the probe.

上記のユニバーサルボード構造を有する回路板のプローブカードは、製造コストが低いが、プローブがジャンパーによりスイッチング領域の半田接点に電気的に接続されているため、信号伝送の品質が悪くなる。   The circuit board probe card having the above universal board structure is low in manufacturing cost, but the quality of signal transmission is deteriorated because the probe is electrically connected to the solder contact in the switching region by a jumper.

従って、上記課題を解決することは、現在解決すべき極めて重要な課題となっている。   Therefore, solving the above problems is an extremely important problem that should be solved now.

従って、従来技術の種々の欠点に鑑み、本発明は、中央領域と周縁領域とが定義された回路板本体と、回路板本体の中央領域に設けられた複数の第１の電気接続点と、回路板本体の周縁領域に設けられた複数の第２の電気接続点と、回路板本体に予め設けられる前記複数の第１の電気接続点のうちの対応するものと前記複数の第２の電気接続点のうちの対応するものに接続される複数の回路と、テスト信号を受信し回路板本体の周縁領域であって複数の第２の電気接続点の付近に設けられる複数のテスト接点と、を備えるテスト用回路板を提供する。   Accordingly, in view of various drawbacks of the prior art, the present invention provides a circuit board body having a central region and a peripheral region defined therein, and a plurality of first electrical connection points provided in the central region of the circuit board body, A plurality of second electrical connection points provided in the peripheral region of the circuit board body, a corresponding one of the plurality of first electrical connection points provided in advance in the circuit board body, and the plurality of second electrical connections A plurality of circuits connected to corresponding ones of the connection points; a plurality of test contacts that receive test signals and are provided in the vicinity of the plurality of second electrical connection points in the peripheral region of the circuit board body; A test circuit board is provided.

また、本発明は、前記テスト用回路板を提供し、前記回路板本体の中央領域で前記複数の第１の電気接続点の周囲に位置して前記複数の第１の電気接続点と電気的に接続するように複数のプローブを設ける工程と、前記複数のテスト接点を導電部材を介して前記第２の電気接続点のうちの対応するものに電気的に接続する工程と、前記テスト信号を、前記テスト接点、前記複数の第２の電気接続点、前記回路板本体の回路、前記複数の第１の電気接続点のうちの対応するもの、および前記複数のプローブを介してテストする装置に伝送する工程と、を備えるテスト用回路板の操作方法をさらに提供する。   The present invention also provides the test circuit board, wherein the test circuit board is located around the plurality of first electrical connection points in a central region of the circuit board body and electrically connected to the plurality of first electrical connection points. Providing a plurality of probes so as to be connected to each other; electrically connecting the plurality of test contacts to corresponding ones of the second electrical connection points through conductive members; and The test contact, the plurality of second electrical connection points, the circuit of the circuit board body, a corresponding one of the plurality of first electrical connection points, and a device for testing via the plurality of probes And a method for operating the test circuit board.

上記のテスト用回路板及びその操作方法において、プローブの周囲には複数の導電接点がさらに設けられており、プローブは、複数の第１の電気接続点と複数の導電接点とに電気的に接続されている。   In the test circuit board and the operation method thereof, a plurality of conductive contacts are further provided around the probe, and the probe is electrically connected to the plurality of first electrical connection points and the plurality of conductive contacts. Has been.

上記のテスト用回路板及びその操作方法において、第１の電気接続点、第２の電気接続点とテスト接点は、接地接点、電源接点または信号接点である。   In the test circuit board and the operation method thereof, the first electrical connection point, the second electrical connection point, and the test contact are a ground contact, a power contact, or a signal contact.

上記のテスト用回路板及びその操作方法において、回路板本体は、ユニバーサルボード構造である。   In the test circuit board and the operation method thereof, the circuit board body has a universal board structure.

上記のテスト用回路板及びその操作方法において、プローブは、ケーブルを介して第１の電気接続点に電気的に接続されており、テスト接点は、例えば導電ペースト、ピン、ジャンパー、スイッチングボード、スイッチまたは接続ソケット等の導電部材を介して第２の電気接続点に電気的に接続されている。   In the above test circuit board and its operation method, the probe is electrically connected to the first electrical connection point via the cable, and the test contact is, for example, conductive paste, pin, jumper, switching board, switch Alternatively, it is electrically connected to the second electrical connection point through a conductive member such as a connection socket.

上記のように、本発明に係るテスト用回路板及びその操作方法は、主にテスト機のテスト接点を回路板本体の周縁領域に集中的に設置し、テスト接点周囲に対して複数の第２の電気接続点を設置し、プローブ周囲に対して複数の第１の電気接続点を設置し、第１の電気接続点及び第２の電気接続点が回路板本体の回路を介して接続可能にしているため、テストする装置の電気検出をする場合、テスト接点を導電部材（例えば導電ペースト、ピン、ジャンパー、スイッチングボード、スイッチまたは接続ソケット）を介して周囲の第２の電気接続点に接続するだけで、テスト機のテスト信号は、該テスト接点、第２の電気接続点、回路板本体の回路、対応する第１の電気接続点、及びプローブを介してテストする装置に伝送されるとともに信号のフィードバックを行うことができる。これにより、信号伝送品質の向上及び操作工程の単純化が達成可能であり、従来のユニバーサルボード構造ではプローブをジャンパーによりスイッチング領域半田接点に電気的に接続させることによる信号伝送品質の不良及び作業の煩雑が発生するという課題を回避することができるとともにユニバーサルボード構造の低コスト、高自由度の利点を有することができる。   As described above, the test circuit board and the operation method thereof according to the present invention are mainly configured such that the test contacts of the test machine are concentratedly installed in the peripheral area of the circuit board body, and a plurality of second contact points are provided around the test contact. And a plurality of first electrical connection points are installed around the probe so that the first electrical connection point and the second electrical connection point can be connected via the circuit of the circuit board body. Therefore, when performing electrical detection of the device to be tested, the test contact is connected to the surrounding second electrical connection point via a conductive member (eg, conductive paste, pin, jumper, switching board, switch or connection socket). Only the test signal of the test machine is transmitted to the test device via the test contact, the second electrical connection point, the circuit board body circuit, the corresponding first electrical connection point, and the probe and the signal. It is possible to perform the feedback. As a result, improvement in signal transmission quality and simplification of the operation process can be achieved. In the conventional universal board structure, the probe is electrically connected to the switching area solder contact by a jumper, so that the signal transmission quality is poor and the work is not performed. It is possible to avoid the problem of complications and to have the advantages of the low cost and high degree of freedom of the universal board structure.

本発明に係るテスト用回路板の平面模式図である。It is a plane schematic diagram of the circuit board for a test concerning the present invention. 本発明に係るテスト用回路板の操作方法模式図である。It is a schematic diagram of the method for operating the test circuit board according to the present invention.

以下、具体的な実施例を用いて本発明の実施形態を説明する。この技術分野を熟知する者は、本明細書の記載内容によって簡単に本発明のその他の利点や効果を理解できる。   Hereinafter, embodiments of the present invention will be described using specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention based on the description of the present specification.

また、明細書に添付された図面に示す構造、比例、寸法等は、この技術分野を熟知する者が理解できるように明細書に記載の内容に合わせて説明されるものであり、本発明の実施を制限するものではないため、技術上の実質的な意味を有せず、いかなる構造の修飾、比例関係の変更または寸法の調整は、本発明の効果及び目的に影響を与えるものでなければ、本発明に開示された技術内容の範囲に入る。また、明細書に記載された例えば「上」、「一」等の用語は、説明が容易に理解できるようにするためのものであり、本発明の実施可能な範囲を限定するものではなく、その相対関係の変更または調整は、技術内容の実質的変更がなければ、本発明の実施可能の範囲と見なされる。   Further, the structure, proportion, dimensions, etc. shown in the drawings attached to the specification are explained according to the contents described in the specification so that those skilled in the art can understand them. Since it does not limit the implementation, it does not have any substantial technical meaning, and any modification of the structure, change of proportionality or adjustment of dimensions should not affect the effect and purpose of the present invention. Falls within the scope of the technical content disclosed in the present invention. In addition, terms such as “above” and “one” described in the specification are intended to make the explanation easy to understand, and do not limit the scope of the present invention, Any change or adjustment of the relative relationship is considered to be within the scope of the present invention unless there is a substantial change in the technical contents.

図１に示すように、本発明に係るテスト用回路板１は、回路板本体１０と、複数の第１の電気接続点Ｄ１、Ｄ２、Ｄ３、Ｄ４と、複数の第２の電気接続点ｄ１、ｄ２、ｄ３、ｄ４と、複数の回路Ｌ１、Ｌ２、Ｌ３、Ｌ４と、テスト接点Ｔ１、Ｔ２、Ｔ３、Ｔ４とを含む。テスト用回路板１は、ウェハ／チップのプローブカードまたはパッケージテストのためのテストロードボード（ｌｏａｄ ｂｏａｒｄ）等で、テスト機用の回路板に使用可能である。   As shown in FIG. 1, a test circuit board 1 according to the present invention includes a circuit board body 10, a plurality of first electrical connection points D1, D2, D3, D4, and a plurality of second electrical connection points d1. , D2, d3, d4, a plurality of circuits L1, L2, L3, L4, and test contacts T1, T2, T3, T4. The test circuit board 1 is a wafer / chip probe card or a test load board for package test, and can be used as a circuit board for a test machine.

この実施例において、回路板本体１０は、ユニバーサルボード構造であってもよく、専用ボード構造であってもよい。回路板本体１０には、中央領域と、周縁領域と、中央領域と周縁領域との間に介在する中間領域とが定義されている。   In this embodiment, the circuit board body 10 may have a universal board structure or a dedicated board structure. The circuit board main body 10 is defined with a central region, a peripheral region, and an intermediate region interposed between the central region and the peripheral region.

回路板本体１０の中央領域の中心箇所には、観察口１００が設けられており、観察口１００には複数のプローブ１１１が設けられている。   An observation port 100 is provided at the center of the central region of the circuit board body 10, and a plurality of probes 111 are provided in the observation port 100.

複数の第１の電気接続点Ｄ１、Ｄ２、Ｄ３、Ｄ４は、回路板本体１０の中央領域に設けられ、観察口１００（またはプローブ１１１）の周囲に位置する。この実施例において、第１の電気接続点Ｄ１、Ｄ２、Ｄ３、Ｄ４は接地接点である。ここで、４つの第１の電気接続点を例に説明する。その他の実施例において、第１の電気接続点は、電源接点または信号接点であってもよく、その数量は特に限定されるものではない。   The plurality of first electrical connection points D1, D2, D3, and D4 are provided in the central region of the circuit board body 10 and are located around the observation port 100 (or the probe 111). In this embodiment, the first electrical connection points D1, D2, D3, D4 are ground contacts. Here, four first electrical connection points will be described as an example. In other embodiments, the first electrical connection point may be a power contact or a signal contact, and the number thereof is not particularly limited.

また、回路板本体１０の中央領域には、観察口１００（またはプローブ１１１）に対向する周囲にも複数の導電接点Ｓ１、Ｓ２、Ｓ３、Ｓ４が設けられている。この実施例において、導電接点Ｓ１、Ｓ２、Ｓ３、Ｓ４は、信号接点である。ここで、４つの導電接点を例に説明する。その他の実施例において、導電接点は電源接点または接地接点であってもよく、その数量は特に限定されるものではない。   In the central region of the circuit board body 10, a plurality of conductive contacts S1, S2, S3, and S4 are also provided in the periphery facing the observation port 100 (or the probe 111). In this embodiment, the conductive contacts S1, S2, S3, S4 are signal contacts. Here, four conductive contacts will be described as an example. In other embodiments, the conductive contact may be a power contact or a ground contact, and the number thereof is not particularly limited.

複数の第２の電気接続点ｄ１、ｄ２、ｄ３、ｄ４は、回路板本体１０の周縁領域に設けられ、かつ複数の第１の電気接続点Ｄ１、Ｄ２、Ｄ３、Ｄ４に対して接続されている。この実施例において、複数の第２の電気接続点ｄ１、ｄ２、ｄ３、ｄ４は接地接点である。その他の実施例において、第２の電気接続点は、電源接点または信号接点であってもよい。   The plurality of second electrical connection points d1, d2, d3, d4 are provided in the peripheral region of the circuit board body 10 and connected to the plurality of first electrical connection points D1, D2, D3, D4. Yes. In this embodiment, the plurality of second electrical connection points d1, d2, d3, d4 are ground contacts. In other embodiments, the second electrical connection point may be a power contact or a signal contact.

複数の回路Ｌ１、Ｌ２、Ｌ３、Ｌ４は、回路板本体１０に予め設けられており、主に中間領域に配設されており、かつ第１の電気接続点Ｄ１、Ｄ２、Ｄ３、Ｄ４及び第２の電気接続点ｄ１、ｄ２、ｄ３、ｄ４に対して接続されている。   The plurality of circuits L1, L2, L3, and L4 are provided in advance in the circuit board main body 10, are mainly disposed in the intermediate region, and the first electrical connection points D1, D2, D3, D4, and the first 2 electrical connection points d1, d2, d3, d4.

複数のテスト接点Ｔ１、Ｔ２、Ｔ３、Ｔ４は、回路板本体１０の周縁領域に設けられており、かつ複数の第２の電気接続点ｄ１、ｄ２、ｄ３、ｄ４に隣接している。複数のテスト接点Ｔ１、Ｔ２、Ｔ３、Ｔ４は、テスト機のテスト信号を受信し、回路板本体１０の周縁領域に集中的に設けられ、それと同時に複数の第２の電気接続点ｄ１、ｄ２、ｄ３、ｄ４は複数のテスト接点Ｔ１、Ｔ２、Ｔ３、Ｔ４に対して位置している。この実施例において、複数のテスト接点Ｔ１、Ｔ２、Ｔ３、Ｔ４は、テスト機の接地テスト信号を受信する。ここで、４つのテスト接点を例に説明する。その他の実施例において、テスト接点は、テスト機の電源テスト信号まはた高、低周波のテスト信号を受信してもよく、その数量は特に限定されるものではない。   The plurality of test contacts T1, T2, T3, and T4 are provided in the peripheral region of the circuit board body 10 and are adjacent to the plurality of second electrical connection points d1, d2, d3, and d4. The plurality of test contacts T1, T2, T3, and T4 receive the test signal of the test machine and are concentrated on the peripheral area of the circuit board body 10, and at the same time, the plurality of second electrical connection points d1, d2, d3 and d4 are located with respect to a plurality of test contacts T1, T2, T3 and T4. In this embodiment, the plurality of test contacts T1, T2, T3, T4 receive a test machine ground test signal. Here, four test contacts will be described as an example. In other embodiments, the test contacts may receive a power test signal of a test machine or a high and low frequency test signal, and the number thereof is not particularly limited.

また、複数のテスト接点Ｔ１、Ｔ２、Ｔ３、Ｔ４に隣接した箇所には、複数の第２の電気接続点ｄ１’、ｄ２’がさらに設けられてもよい。そのうち、第２の電気接続点ｄ１’、ｄ２’は、回路板本体１０に予め設けられた回路Ｌ１’、Ｌ２’を介して第２の電気接続点ｄ１、ｄ２に電気的に接続されている。このように、テスト接点Ｔ１、Ｔ２、Ｔ３、Ｔ４は、その近傍で第２の電気接続点ｄ１、ｄ２または第２の電気接続点ｄ１’、ｄ２’を介して第１の電気接続点Ｄ１、Ｄ２と選択的に電気的に接続可能である。   A plurality of second electrical connection points d1 'and d2' may be further provided at locations adjacent to the plurality of test contacts T1, T2, T3, and T4. Among them, the second electrical connection points d1 ′ and d2 ′ are electrically connected to the second electrical connection points d1 and d2 via circuits L1 ′ and L2 ′ provided in advance in the circuit board body 10. . In this way, the test contacts T1, T2, T3, T4 are connected to the first electrical connection point D1, via the second electrical connection points d1, d2 or the second electrical connection points d1 ′, d2 ′ in the vicinity thereof. D2 can be selectively electrically connected.

図２は、本発明に係るテスト用回路板１の操作方法模式図であり、図１におけるテスト用回路板１がテストする装置（たとえばウェハ、チップまたはパッケージ等）の回路素子に対応する配置である様子を示している。プローブ１１１は、複数のケーブル１２０を介して第１の電気接続点Ｄ１、Ｄ２、Ｄ３、Ｄ４及び導電接点Ｓ１、Ｓ２、Ｓ３、Ｓ４に対して接続されている。それと同時にプローブ１１１に接続された第１の電気接続点Ｄ１、Ｄ２、Ｄ３、Ｄ４、テスト機のテスト信号送信位置に対応して、複数のテスト接点Ｔ１、Ｔ２、Ｔ３、Ｔ４は、導電部材１３０（例えば導電ペースト、ピン、ジャンパー、スイッチングボード、スイッチまたは接続ソケット等）を介して対応する第２の電気接続点ｄ１、ｄ４、ｄ３、ｄ２’に接続される。さらに、回路板本体１０に予め設けられた回路Ｌ１、Ｌ２、Ｌ３、Ｌ４（Ｌ２’）を介して第１の電気接続点Ｄ１、Ｄ２、Ｄ３、Ｄ４に電気的に接続される。このように、テスト機のテスト信号は、順次にテスト接点Ｔ１、Ｔ２、Ｔ３、Ｔ４、第２の電気接続点ｄ１、ｄ４、ｄ３、ｄ２’、第１の電気接続点Ｄ１、Ｄ２、Ｄ３、Ｄ４、プローブ１１１を介してテストする装置に伝送され、電気的テストが行われる。   FIG. 2 is a schematic diagram of an operation method of the test circuit board 1 according to the present invention. The test circuit board 1 in FIG. It shows a certain state. The probe 111 is connected to the first electrical connection points D1, D2, D3, D4 and the conductive contacts S1, S2, S3, S4 via a plurality of cables 120. At the same time, corresponding to the first electrical connection points D1, D2, D3, D4 connected to the probe 111 and the test signal transmission position of the test machine, the plurality of test contacts T1, T2, T3, T4 are connected to the conductive member 130. (For example, a conductive paste, a pin, a jumper, a switching board, a switch, or a connection socket) is connected to the corresponding second electrical connection points d1, d4, d3, d2 ′. Further, the circuit board body 10 is electrically connected to the first electrical connection points D1, D2, D3, and D4 via circuits L1, L2, L3, and L4 (L2 ') provided in advance. In this way, the test signal of the test machine sequentially includes the test contacts T1, T2, T3, T4, the second electrical connection points d1, d4, d3, d2 ′, the first electrical connection points D1, D2, D3, D4 is transmitted to the device to be tested via the probe 111, and an electrical test is performed.

上記のように、本発明に係るテスト用回路板及びその操作方法では、テスト機のテスト接点を回路板本体の周縁領域に集中的に設置し、テスト接点周囲に対して複数の第２の電気接続点を設置し、プローブ周囲に対して複数の第１の電気接続点を設置し、第１の電気接続点及び第２の電気接続点が回路板本体の回路を介して接続可能であるようにしているため、テストする装置の電気検出をする場合、テスト接点を導電部材（例えば導電ペースト、ピン、ジャンパー、スイッチングボード、スイッチまたは接続ソケット）を介して周囲の第２の電気接続点に接続するだけで、テスト機のテスト信号は、テスト接点、第２の電気接続点、回路板本体の回路、対応する第１の電気接続点、プローブを介してテストする装置に伝送するとともに信号のフィードバックを行うことができる。これにより、信号伝送品質の向上及び操作工程の単純化が達成可能であり、従来のユニバーサルボード構造ではプローブをジャンパーによりスイッチング領域半田接点に電気的に接続させることによる信号伝送品質の不良及び作業の煩雑が発生するという課題を回避することができるとともにユニバーサルボード構造の低コスト、高自由度の利点を保有することができる。   As described above, in the test circuit board and the operation method thereof according to the present invention, the test contacts of the test machine are concentratedly installed in the peripheral area of the circuit board main body, and a plurality of second electrical circuits are provided around the test contacts. Connection points are installed, and a plurality of first electrical connection points are installed around the probe so that the first electrical connection points and the second electrical connection points can be connected via the circuit of the circuit board body. Therefore, when conducting electrical detection of the device to be tested, connect the test contact to the surrounding second electrical connection point via a conductive member (eg conductive paste, pin, jumper, switching board, switch or connection socket) The test signal of the test machine is transmitted to the test device via the test contact, the second electrical connection point, the circuit board body circuit, the corresponding first electrical connection point, and the probe, and the signal. It is possible to perform the feedback. As a result, improvement in signal transmission quality and simplification of the operation process can be achieved. In the conventional universal board structure, the probe is electrically connected to the switching area solder contact by a jumper, so that the signal transmission quality is poor and the work is not performed. The problem of complications can be avoided, and the advantages of the low cost and high degree of freedom of the universal board structure can be retained.

上記のように、これらの実施形態は本発明の原理およびその効果を例示的に説明するに過ぎず、本発明は、これらによって限定されるものではない。上記実施形態は、この技術分野を熟知する者により本発明の主旨を逸脱しない範囲で種々に修正や変更されることが可能であり、本発明の権利保護範囲は、後述の特許請求の範囲に入るものである。   As described above, these embodiments are merely illustrative of the principles and effects of the present invention, and the present invention is not limited thereto. The above embodiments can be variously modified and changed by those skilled in the art without departing from the gist of the present invention, and the scope of protection of the present invention is within the scope of the following claims. Enter.

１ テスト用回路板
１０ 回路板本体
１００ 観察口
１１１ プローブ
１２０ ケーブル
Ｌ１、Ｌ２、Ｌ３、Ｌ４、Ｌ１’、Ｌ２’ 回路
１３０ 導電部材
Ｄ１、Ｄ２、Ｄ３、Ｄ４ 第１の電気接続点
ｄ１、ｄ２、ｄ３、ｄ４、ｄ１’、ｄ２’ 第２の電気接続点
Ｓ１、Ｓ２、Ｓ３、Ｓ４ 導電接点
Ｔ１、Ｔ２、Ｔ３、Ｔ４ テスト接点 DESCRIPTION OF SYMBOLS 1 Test circuit board 10 Circuit board main body 100 Observation port 111 Probe 120 Cable L1, L2, L3, L4, L1 ', L2' Circuit 130 Conductive member D1, D2, D3, D4 1st electrical connection point d1, d2, d3, d4, d1 ′, d2 ′ Second electrical connection points S1, S2, S3, S4 Conductive contacts T1, T2, T3, T4 Test contacts

Claims (13)

中央領域と周縁領域とが定義された回路板本体と、
前記回路板本体の前記中央領域に設けられた複数の第１の電気接続点と、
前記回路板本体の前記周縁領域に設けられた複数の第２の電気接続点と、
前記回路板本体に予め設けられ、前記第１の電気接続点のうちの対応するものと前記第２の電気接続点のうちの対応するものに接続された複数の回路と、
テスト信号を受信し、前記回路板本体の前記周縁領域であって前記複数の第２の電気接続点の付近に設けられる複数のテスト接点と、
を備えるテスト用回路板。 A circuit board body in which a central region and a peripheral region are defined;
A plurality of first electrical connection points provided in the central region of the circuit board body;
A plurality of second electrical connection points provided in the peripheral region of the circuit board body;
A plurality of circuits provided in advance in the circuit board body and connected to corresponding ones of the first electrical connection points and corresponding ones of the second electrical connection points;
Receiving a test signal, a plurality of test contacts provided in the peripheral region of the circuit board body and in the vicinity of the plurality of second electrical connection points;
Circuit board for testing. 前記中央領域には複数のプローブが設けられている請求項１に記載のテスト用回路板。   The test circuit board according to claim 1, wherein a plurality of probes are provided in the central region. 前記複数の第１の電気接続点は前記プローブの周囲に設けられている請求項２に記載のテスト用回路板。   The test circuit board according to claim 2, wherein the plurality of first electrical connection points are provided around the probe. 前記プローブの周囲には複数の導電接点がさらに設けられている請求項３に記載のテスト用回路板。   The test circuit board according to claim 3, wherein a plurality of conductive contacts are further provided around the probe. 前記プローブは、前記複数の第１の電気接続点と前記複数の導電接点とに電気的に接続されている請求項４に記載のテスト用回路板。   The test circuit board according to claim 4, wherein the probe is electrically connected to the plurality of first electrical connection points and the plurality of conductive contacts. 前記第１の電気接続点、前記第２の電気接続点と前記テスト接点は、接地接点、電源接点または信号接点である請求項１に記載のテスト用回路板。   The test circuit board according to claim 1, wherein the first electrical connection point, the second electrical connection point, and the test contact are a ground contact, a power contact, or a signal contact. 前記テスト接点は前記第２の電気接続点に電気的に接続されている請求項１に記載のテスト用回路板。   The test circuit board according to claim 1, wherein the test contact is electrically connected to the second electrical connection point. 前記回路板本体はユニバーサルボード構造である請求項１に記載のテスト用回路板。   The test circuit board according to claim 1, wherein the circuit board body has a universal board structure. 請求項１に記載のテスト用回路板を提供し、前記回路板本体の中央領域で前記複数の第１の電気接続点の周囲に位置して前記複数の第１の電気接続点と電気的に接続するように複数のプローブを設ける工程と、
前記複数のテスト接点を導電部材を介して前記第２の電気接続点のうちの対応するものに電気的に接続する工程と、
テスト信号を、前記テスト接点、前記第２の電気接続点、前記複数の回路、前記第１の電気接続点のうちの対応するもの、および前記プローブを介してテストする装置に伝送する工程と、
を備えるテスト用回路板の操作方法。 2. A test circuit board according to claim 1, wherein the test circuit board is located around the plurality of first electrical connection points in a central region of the circuit board body and electrically connected to the plurality of first electrical connection points. Providing a plurality of probes for connection;
Electrically connecting the plurality of test contacts to corresponding ones of the second electrical connection points via conductive members;
Transmitting a test signal to the test contact through the probe, the second electrical connection point, the plurality of circuits, a corresponding one of the first electrical connection points, and the probe;
A method for operating a test circuit board comprising: 前記プローブの周囲には複数の導電接点が設けられている請求項９に記載のテスト用回路板の操作方法。   The method for operating a test circuit board according to claim 9, wherein a plurality of conductive contacts are provided around the probe. 前記プローブはケーブルを介して前記第１の電気接続点に電気的に接続されている請求項９に記載のテスト用回路板の操作方法。   The method for operating a test circuit board according to claim 9, wherein the probe is electrically connected to the first electrical connection point via a cable. 前記第１の電気接続点、前記第２の電気接続点と前記テスト接点は、接地接点、電源接点または信号接点である請求項９に記載のテスト用回路板の操作方法。   The method for operating a test circuit board according to claim 9, wherein the first electrical connection point, the second electrical connection point, and the test contact are a ground contact, a power contact, or a signal contact. 前記テスト接点は、導電ペースト、ピン、ジャンパー、スイッチングボード、スイッチまたは接続ソケットを介して前記第２の電気接続点に電気的に接続されている請求項９に記載のテスト用回路板の操作方法。   The method for operating a test circuit board according to claim 9, wherein the test contact is electrically connected to the second electrical connection point through a conductive paste, a pin, a jumper, a switching board, a switch, or a connection socket. .
JP2017172398A 2016-09-07 2017-09-07 Test circuit board and operation method thereof Active JP6484310B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW105128888 2016-09-07
TW105128888A TWI595237B (en) 2016-09-07 2016-09-07 Test circuit board and method for operating the same

Publications (2)

Publication Number Publication Date
JP2018040801A true JP2018040801A (en) 2018-03-15
JP6484310B2 JP6484310B2 (en) 2019-03-13

Family

ID=60189227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017172398A Active JP6484310B2 (en) 2016-09-07 2017-09-07 Test circuit board and operation method thereof

Country Status (3)

Country Link
JP (1) JP6484310B2 (en)
KR (1) KR101989232B1 (en)
TW (1) TWI595237B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110133415A (en) * 2019-06-05 2019-08-16 珠海格力智能装备有限公司 Mechanism for testing and test device with it
CN116068380A (en) * 2023-03-01 2023-05-05 上海聚跃检测技术有限公司 Chip package testing method and device
CN116559628B (en) * 2023-06-12 2024-04-30 广东汉为信息技术有限公司 Circuit board module test fixture

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109471011A (en) * 2017-09-07 2019-03-15 新加坡商美亚国际电子有限公司 Test circuit board and its operating method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1126527A (en) * 1997-06-10 1999-01-29 Cascade Microtech Inc Low current pogo probing card
JP2003100820A (en) * 2001-09-27 2003-04-04 Oki Electric Ind Co Ltd Substrate for probe card
WO2012095997A1 (en) * 2011-01-16 2012-07-19 日本電子材料株式会社 Probe card and method for manufacturing same
US20150198631A1 (en) * 2014-01-15 2015-07-16 Taiwan Semiconductor Manufacturing Co., Ltd. Universal Probe Card PCB Design

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006138705A (en) * 2004-11-11 2006-06-01 Yamaha Corp Probe card and inspection method using the same
JP2007198930A (en) * 2006-01-27 2007-08-09 Renesas Technology Corp Semiconductor inspection system and semiconductor device
JP2007278828A (en) * 2006-04-06 2007-10-25 Sharp Corp Substrate for semiconductor chip evaluation
KR20080061735A (en) * 2006-12-28 2008-07-03 주식회사 하이닉스반도체 Device under test and system and method for testing the same
TWI413777B (en) * 2010-09-01 2013-11-01 Multi - power circuit board and its application probe card
TWI444625B (en) * 2012-03-20 2014-07-11 Mpi Corp High frequency probe card

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1126527A (en) * 1997-06-10 1999-01-29 Cascade Microtech Inc Low current pogo probing card
JP2003100820A (en) * 2001-09-27 2003-04-04 Oki Electric Ind Co Ltd Substrate for probe card
WO2012095997A1 (en) * 2011-01-16 2012-07-19 日本電子材料株式会社 Probe card and method for manufacturing same
US20150198631A1 (en) * 2014-01-15 2015-07-16 Taiwan Semiconductor Manufacturing Co., Ltd. Universal Probe Card PCB Design

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110133415A (en) * 2019-06-05 2019-08-16 珠海格力智能装备有限公司 Mechanism for testing and test device with it
CN116068380A (en) * 2023-03-01 2023-05-05 上海聚跃检测技术有限公司 Chip package testing method and device
CN116559628B (en) * 2023-06-12 2024-04-30 广东汉为信息技术有限公司 Circuit board module test fixture

Also Published As

Publication number Publication date
TWI595237B (en) 2017-08-11
JP6484310B2 (en) 2019-03-13
KR101989232B1 (en) 2019-06-13
TW201812307A (en) 2018-04-01

Similar Documents

Publication Publication Date Title
JP6484310B2 (en) Test circuit board and operation method thereof
US10753960B2 (en) Probe card and signal path switching module assembly
JPWO2009098770A1 (en) Product exchange unit and manufacturing method
JP2008185420A (en) Tester and probe card
US7288949B2 (en) Semiconductor test interface
KR20170011519A (en) Break Out Box
US20150168454A1 (en) Probe module
JPWO2009031394A1 (en) Electrical connection structure, terminal device, socket, electronic component testing device, and socket manufacturing method
US10101362B2 (en) Probe module with high stability
US20200341053A1 (en) Vertical ultra low leakage probe card for dc parameter test
US8988092B2 (en) Probing apparatus for semiconductor devices
JP2013145210A (en) Substrate-laminated type probe card
US9759746B2 (en) Probe module
JP5248898B2 (en) Test equipment and diagnostic performance board
KR101421048B1 (en) Device For Testing Semiconductor On Mounted Active Element Chip
KR20220072262A (en) Break out box
JP2008268124A (en) Test head
KR101498523B1 (en) Test board for burn-in testing
JP6199584B2 (en) Semiconductor integrated circuit and display panel driver
JP6812270B2 (en) Probe card
TWI413777B (en) Multi - power circuit board and its application probe card
JP2018112546A (en) Probe Card Module
US8878545B2 (en) Test apparatus with physical separation feature
CN109471011A (en) Test circuit board and its operating method
KR102035998B1 (en) Interface apparatus, manufacturing method and test apparatus

Legal Events

Date Code Title Description
A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20180703

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20180629

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20180928

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20190122

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20190215

R150 Certificate of patent or registration of utility model

Ref document number: 6484310

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250