JP2018032697A - Semiconductor element built-in substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor element built-in substrate capable of achieving its miniaturization.SOLUTION: A semiconductor element built-in substrate A includes: an insulation substrate 10 having a semiconductor element mounting region X; connection pads 11S, 11G, 11 P for signal, grounding and power supply formed on the underside of the insulation substrate 10; a positioning conductor 12 for semiconductor element formed along the outer periphery of the semiconductor element mounting region X; a semiconductor element 13 having electrodes 13S, 13G, 13P for signal, grounding and power supply; and a resin seal body 14 formed to cover the semiconductor element 13. The insulation substrate 10 is formed with a through-hole conductor 17S for connecting the connection pad 11S for signal and the positioning conductor 12. The resin seal body 14 is formed with a wiring conductor 15 for signal for connecting the electrode 13S for signal and the positioning conductor 12.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor element built-in substrate that incorporates a semiconductor element.

FIG. 2 is a schematic cross-sectional view of a conventional substrate B with a built-in semiconductor element.
A conventional semiconductor element-embedded substrate B includes an insulating substrate 30, a signal connection pad 31S, a ground connection pad 31G, a power connection pad 31P, a semiconductor element positioning conductor 32, a semiconductor element 33, and a resin. A sealing body 34 and a wiring conductor 35 are provided.

  The insulating substrate 30 has a semiconductor element mounting region Y at the center of the upper surface. The insulating substrate 30 has a plurality of through holes 36 having the connection pads 31S, 31G, and 31P as bottom surfaces. A wiring conductor 35 for an insulating substrate is formed on the surface of the insulating substrate 30 and inside the through hole 36.

  A plurality of connection pads 31S, 31G, and 31P are formed on the lower surface of the insulating substrate 30, and electrodes of an external substrate (not shown) on which the semiconductor element built-in substrate B is mounted are connected via solder.

  The positioning conductor 32 for the semiconductor element is formed in a frame shape in an area outside the semiconductor element mounting area Y.

  The semiconductor element 33 has an electrode formation surface V2 on which a plurality of signal electrodes 33S, grounding electrodes 33G, and power supply electrodes 33P are formed, and an electrode non-formation surface W2 on which no electrodes are formed. The semiconductor element 33 is placed such that the electrode non-forming surface W2 is in contact with the semiconductor element mounting region Y.

The resin sealing body 34 is formed on the entire upper surface of the insulating substrate 30 so as to cover the semiconductor element 33. The resin sealing body 34 has a first via hole 37 and a second via hole 38.
The first via hole 37 is formed with the signal electrode 33S, the ground electrode 33G, and the power supply electrode 33P as bottom surfaces.
The second via hole 38 is formed using a part of the wiring conductor 35 for the insulating substrate as a bottom surface.

  The wiring conductor 35 is formed on the surface and inside of the insulating substrate 30 and on the surface and inside of the resin sealing body 34. The wiring conductor 35 electrically connects the signal electrode 33S and the signal connection pad 31S, the ground electrode 33G and the ground connection pad 31G, and the power supply electrode 33P and the power supply connection pad 31P.

Incidentally, in recent years, as electronic devices typified by portable game machines and music players have been reduced in size, there has been an increasing demand for miniaturization of substrates with built-in semiconductor elements mounted on these electronic devices.
However, in the conventional semiconductor element-embedded substrate B, an area for forming the positioning conductor 32 for the semiconductor element is necessary in the area outside the semiconductor element mounting area Y.
For this reason, each connection pad 31S, 31G, and 31P must be formed in the area | region corresponding to the outer side of the positioning conductor 32, and there exists a problem that it is difficult to reduce a semiconductor element built-in board | substrate.

Japanese Patent Laid-Open No. 2005-236039

  It is an object of the present invention to provide a semiconductor element-embedded substrate that can be miniaturized by forming a part of connection pads close to a region corresponding to a semiconductor element mounting region.

  The substrate with a built-in semiconductor element according to the present invention includes an insulating substrate having a semiconductor element mounting region at the center of the upper surface, a signal connection pad, a ground connection pad and a power supply connection pad formed on the lower surface of the insulating substrate, and a semiconductor element mounting. A positioning conductor for a semiconductor element formed along a plurality of independent conductor patterns, an electrode forming surface on which a plurality of signal electrodes, grounding electrodes, and power supply electrodes are respectively formed, and electrodes A semiconductor element that has a non-electrode-formed surface and is placed so that the non-electrode-formed surface is in contact with the semiconductor element mounting region, and the entire upper surface of the insulating substrate is covered with the semiconductor element. And a resin-encapsulated body formed in the semiconductor device, wherein the signal connection pad and the positioning conductor are electrically connected to the insulating substrate. A signal through hole having a through hole conductor is formed, and the resin-sealed body has a first via hole for a signal whose bottom surface is the signal electrode and a signal for which the bottom surface is the top surface of the positioning conductor. A signal wiring conductor for electrically connecting the signal electrode and the positioning conductor is formed in the upper surface of the resin sealing body and in the first and second via holes for signals. It is characterized by being formed.

According to the semiconductor element-embedded substrate of the present invention, the signal connection pad and the signal electrode are electrically connected through the signal through-hole conductor and the wiring conductor connected to the positioning conductor.
As a result, the signal connection pads can be formed close to the region corresponding to the semiconductor element mounting region, so that a semiconductor element-embedded substrate that can be reduced in size can be provided.

FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor element built-in substrate according to the present invention. FIG. 2 is a schematic cross-sectional view showing a conventional semiconductor element-embedded substrate.

  First, an example of a semiconductor element built-in substrate according to the present invention will be described with reference to FIG.

  As shown in FIG. 1, a semiconductor element-embedded substrate A according to the present invention includes an insulating substrate 10, a signal connection pad 11S, a ground connection pad 11G, a power connection pad 11P, and a positioning conductor for a semiconductor element. 12, a semiconductor element 13, a resin sealing body 14, and a wiring conductor 15.

The insulating substrate 10 is formed, for example, by impregnating a glass cloth with a thermosetting resin such as a bismaleimide triazine resin or an epoxy resin.
The insulating substrate 10 has a semiconductor element mounting region X at the center of the upper surface, and a plurality of signal, ground and power connection pads 11S, 11G, and 11P are formed on the lower surface. The insulating substrate 10 has a plurality of through holes 16 having the connection pads 11S, 11G, and 11P as bottom surfaces. A wiring conductor 15 for an insulating substrate is formed on the surface of the insulating substrate 10, and a signal through-hole conductor 17 </ b> S, a grounding through-hole conductor 17 </ b> G, and a power supply through are formed inside the through-hole 16. A hole conductor 17P is formed.

Each connection pad 11S, 11G, and 11P is made of a highly conductive metal such as copper, for example. The signal connection pad 11S and the signal through-hole conductor 17S, the ground connection pad 11G and the ground through-hole conductor 17G, and the power connection pad 11P and the power through-hole conductor 17P are electrically connected. ing.
The connection pads 11S, 11G, and 11P are connected to electrodes of an external substrate (not shown) on which the semiconductor element built-in substrate B is mounted via solder.

The semiconductor element positioning conductor 12 is formed of a plurality of independent conductor patterns made of a highly conductive metal such as copper, and is disposed along the outer periphery of the semiconductor element mounting region X.
The positioning conductor 12 functions as a guide for accurately arranging the semiconductor element 13 in the semiconductor element mounting region X.
Further, the positioning conductor 12 includes one that is electrically connected to the signal through-hole conductor 17S.
The positioning conductor 12 is formed in, for example, a circular shape or a rectangular shape in a top view, and has a diameter or an outer dimension of about 100 to 200 μm and a thickness of about 30 to 50 μm.

  Examples of the semiconductor element 13 include a microprocessor and a semiconductor memory, and are made of silicon or germanium. The semiconductor element 13 has an electrode formation surface V1 on which a plurality of signal electrodes 13S, grounding electrodes 13G, and power supply electrodes 13P are formed, and an electrode non-formation surface W1 on which no electrodes are formed. The semiconductor element 13 is mounted such that the electrode non-forming surface W1 is in contact with the semiconductor element mounting region X.

The resin sealing body 14 is made of a thermosetting resin such as an epoxy resin or a polyurethane resin. The resin sealing body 14 is formed so as to cover the semiconductor element 13 over the entire upper surface of the insulating substrate 10 and protects the semiconductor element 13 from the external environment.
The resin sealing body 14 has a first via hole 18 and a second via hole 19. The first via hole 18 is formed with the signal electrode 13S, the ground electrode 13G, and the power supply electrode 13P as bottom surfaces.
The second via hole 19 is formed with the upper surface of the positioning conductor 12 or the upper surface of the wiring conductor 15 for the insulating substrate as the bottom surface.
The first and second via holes 18 and 19 are formed by, for example, laser processing or blast processing. The opening diameters of the first and second via holes 18 and 19 are approximately 50 to 100 μm.
The resin sealing body 14 is formed, for example, by disposing a mold surrounding the insulating substrate 10 and pouring a sealing resin into the mold to be cured.

The wiring conductor 15 is formed on the surface and inside of the insulating substrate 10 and on the surface and inside of the resin sealing body 14 by using a well-conductive metal such as electroless copper plating and electrolytic copper plating using a known semi-additive method, for example. Has been.
The wiring conductor 15 electrically connects the signal electrode 13S and the signal connection pad 11S, the ground electrode 13G and the ground connection pad 11G, and the power supply electrode 13P and the power supply connection pad 11P.

By the way, in the semiconductor element embedded substrate A according to the present invention, the signal connection pad 11S and the signal electrode 13S are electrically connected via the signal through-hole conductor 17S and the wiring conductor 15 connected to the positioning conductor 12. It is connected to the.
As a result, the signal connection pad 11S can be formed in the vicinity of the region corresponding to the semiconductor element mounting region X, so that the semiconductor element-embedded substrate A that can be reduced in size can be provided.

In addition, this invention is not limited to an example of above-mentioned embodiment, A various change is possible if it is a range which does not deviate from the summary of this invention. For example, in the example of the above-described embodiment, one insulating substrate 10 is formed, but a fan-out structure in which a plurality of insulating layers and wiring conductors are alternately stacked may be used.
Moreover, although the example which did not form the soldering resist layer in the surface of the insulated substrate 10 and the surface of the resin sealing body 14 was shown in the example of the above-mentioned embodiment, you may form a soldering resist layer.

10 Insulating Substrate 11G Ground Connection Pad 11P Power Connection Pad 11S Signal Connection Pad 12 Positioning Conductor 13 Semiconductor Element 13G Ground Electrode 13P Power Supply Electrode 13S Signal Electrode 14 Resin Encapsulant 15 Wiring Conductor 16 Through Hole 17 Through Hole Conductor 18 First via hole 19 Second via hole A Semiconductor element built-in substrate V1 Electrode formation surface W1 Electrode non-formation surface X Semiconductor element mounting region

Claims (1)

An insulating substrate having a semiconductor element mounting region at the center of the upper surface;
A signal connection pad, a ground connection pad, and a power connection pad formed on the lower surface of the insulating substrate;
A positioning conductor for a semiconductor element formed along the outer periphery of the semiconductor element mounting region, and comprising a plurality of independent conductor patterns;
A plurality of signal electrodes, ground electrodes, and power supply electrodes, and an electrode non-formation surface on which no electrode is formed, and the electrode non-formation surface is formed in the semiconductor element mounting region. A semiconductor element placed in contact;
A resin encapsulant formed on the entire top surface of the insulating substrate so as to cover the semiconductor element;
A semiconductor element-embedded substrate comprising:
In the insulating substrate, a signal through hole including a through hole conductor for electrically connecting the signal connection pad and the positioning conductor is formed, and
A first via hole for signals whose bottom surface is the signal electrode and a second via hole for signals whose bottom surface is the top surface of the positioning conductor are formed in the resin sealing body,
A signal wiring conductor for electrically connecting the signal electrode and the positioning conductor is formed in the upper surface of the resin sealing body and in the first and second via holes for signals. A semiconductor device built-in substrate.

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