JP2018022817A - Lead frame, resin-attached lead frame, optical semiconductor device, and method for manufacturing lead frame - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent an appearance defect such as unevenness in plating from being caused while avoiding the worsening of a brilliance degree of a lead frame required to have a high brilliance degree of 1.6 or higher.SOLUTION: A lead frame 50 to be used for an optical semiconductor device comprises: a die pad 30 to set the optical semiconductor element on; and a lead portion 40 which can be electrically connected to the optical semiconductor element. At least one of the die pad 30 and a part of the lead portion 40 has a surface with a plating layer provided thereon. The plating layer includes: a roughened Ni-plating layer 11, 12 composed of a roughened plating; a smoothed Ni-plating layer 12, 22 provided on the roughened Ni-plating layer and composed of a smoothed Ni plating; and an Ag plating layer 13, 23 on an outermost layer side, which is composed of an Ag plating having at least a brilliance degree of 1.3 or more.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a lead frame, a lead frame with resin, an optical semiconductor device, and a method for manufacturing a lead frame.

  Optical semiconductor devices equipped with optical semiconductor elements have come to be used in various devices such as general lighting and displays such as televisions, mobile phones, and OA devices. In these optical semiconductor devices, a package in which an optical semiconductor element is mounted and resin-sealed using a lead frame has been developed in order to meet demands for reduction in thickness and cost.

  In general, an optical semiconductor device using a lead frame has a structure as shown in Patent Document 1. That is, the lead frame has a die pad part for mounting the optical semiconductor element, and a lead part arranged at intervals around the die pad part, and precious metal plating is applied to the entire surface or a part of the die pad part and the lead part, It is configured by forming a plating layer. Then, an optical semiconductor element is mounted on the die pad portion, and the optical semiconductor element and the lead portion are bonded using a bonding wire or the like. An outer resin part (reflector) made of a resin that reflects light is disposed around the optical semiconductor element, and a sealing resin in which the periphery including the optical semiconductor element and the bonding wire is filled with a transparent resin. It consists of parts.

  Moreover, the state which has arrange | positioned the outer side resin part (reflector) to the lead frame which gave precious metal plating to the die pad part and the lead part is called lead frame with resin.

  It is important for an optical semiconductor device to efficiently reflect lateral and downward light from the optical semiconductor element along with its own light emission from the optical semiconductor element. In particular, the surface of the die pad portion and the lead portion having the sealing resin portion made of transparent resin on the upper surface is subjected to noble metal plating with high light reflectivity to reflect downward light from the optical semiconductor element. . As the noble metal plating layer, silver plating having a high light reflectance is generally used.

  For example, Patent Document 1 describes that a plated surface having a reflectance of 92% or more and a glossiness of 1.40 or more can be obtained by sequentially laminating a Ni plating layer, an Au strike plating layer, and an Ag plating layer. is there.

  In Patent Document 2, three layers of a bright Ni plating layer, a Pd plating layer, and an Ag plating layer, or a bright Ni plating layer, a Pd plating layer, an Au plating layer, and an Ag plating are used to prevent deterioration due to sulfide corrosion. A four-layer plating structure of layers has been proposed.

JP 2012-209367 A JP 2014-179492 A

  As described above, the plating surface of the lead frame for an optical semiconductor device is required to have a glossiness of 1.3 or more in order to efficiently reflect light from the optical semiconductor element. In the lead frame for general IC, it is not necessary to increase the glossiness of the plated surface to 1.3 or more. On the other hand, the surface of the lead frame for optical semiconductor devices has a dark color close to a mirror surface. For this reason, compared with the lead frame for general IC, it is easier to find the surface abnormality of the plating surface, and this part is often detected as a defect. In particular, a lead frame used in an optical semiconductor device such as an LED is required to have high glossiness, and unevenness of the plating surface, which is thought to be caused by the material of the lead frame, is easily found. Although there is no problem in the function of the lead frame, it is judged as an appearance-like plating unevenness, resulting in a failure and a deterioration in productivity.

  The present invention has been made in view of the above problems, and is a new and improved lead frame capable of preventing appearance defects such as uneven plating without reducing the glossiness, a lead frame with a resin, and an optical semiconductor. An object of the present invention is to provide an apparatus and a method for manufacturing a lead frame.

  One aspect of the present invention is a lead frame used in an optical semiconductor device, comprising: a die pad portion on which an optical semiconductor element is mounted; and a lead portion electrically connectable to the optical semiconductor element, the die pad portion And a plating layer is provided on at least one surface of a part of the lead portion, and the plating layer is a rough Ni plating layer made of rough plating and a smoothness provided on the rough Ni plating layer. It is characterized by a lead frame made of a plating layer including a smooth Ni plating layer made of pure Ni plating and an Ag plating layer made of Ag plating having a glossiness of 1.3 or more on the outermost layer side.

  If it does in this way, the smooth Ni plating layer which consists of roughening plating on the surface of at least any one part of a die pad part and the above-mentioned lead part, and smooth Ni provided on the roughening Ni plating layer By comprising a plating layer that includes a smooth Ni plating layer made of plating and an Ag plating layer made of Ag plating with a glossiness of 1.3 or more on the outermost layer side, the smooth Ni plating layer assists the gloss of the Ag plating layer Further, uneven plating on the plating surface having high glossiness can be prevented.

  At this time, in one aspect of the present invention, the surface roughness of the roughened Ni plating layer is 0.03 μm to 0.05 μm in Ra, and the surface roughness of the smooth Ni plating layer is less than 0.03 μm in Ra. It is good.

  In this way, variation in the crystal grain size of the roughened Ni plating layer is suppressed, and the gloss of the Ag plating layer is assisted without lowering the gloss of the Ag plating layer. The above high gloss can be maintained and plating unevenness on the plating surface can be prevented.

  In one embodiment of the present invention, the rough Ni plating layer may have a glossiness of 1.2 to 1.5, and the smooth Ni plating layer may have a glossiness of 1.5 to 1.7. .

  In this way, it is possible to prevent plating unevenness on the plating surface having a high glossiness without affecting the glossiness of the Ag plating and without causing a depression on the surface of the Ag plating layer.

  In one embodiment of the present invention, the plating thickness of the rough Ni plating layer may be 0.05 μm to 0.2 μm, and the plating thickness of the smooth Ni plating layer may be 1.0 μm or more.

  In this way, it is possible to suppress variation in crystal grain size and sulfidation corrosion of the Ni plating layer base made of roughened plating, to prevent reduction in productivity, and to suppress stress and prevent warping and plating peeling. Further, uneven plating on the plating surface can be prevented.

  In one embodiment of the present invention, an Au plating layer may be formed between the smooth Ni plating layer and the Ag plating layer.

  If it does in this way, the thermal diffusion prevention effect of Cu will also be acquired and the plating nonuniformity of the plating surface can be prevented.

  In one embodiment of the present invention, a Pd plating layer may be formed between the smooth Ni plating layer and the Au plating layer.

  If it does in this way, the thickness of an Au plating layer can be reduced simultaneously with prevention of thermal diffusion of Cu, and the usage-amount of expensive Au can also be reduced, and the plating unevenness of the plating surface can be prevented.

  According to another aspect of the present invention, there is provided a lead frame with a resin that includes a lead frame and includes a die pad portion on which an optical semiconductor element is mounted and an outer resin portion that covers a surface of the lead portion that can be electrically connected to the optical semiconductor element. It is good.

  If it does in this way, the plating nonuniformity of the plating surface in a lead frame with resin can be prevented.

  In another aspect of the present invention, a lead frame with resin, an optical semiconductor element mounted on a die pad portion, and a connection body in which the optical semiconductor element and the lead portion are electrically connected, and the optical semiconductor element and the connection It is good also as an optical semiconductor device provided with the sealing resin part with which the area | region containing a body and the area | region enclosed by the said outer side resin were filled with transparent resin.

  In this way, uneven plating on the plating surface in the optical semiconductor device can be prevented.

  According to another aspect of the present invention, there is provided a method of manufacturing a lead frame used in an optical semiconductor device, wherein a corresponding portion of a die pad portion on which an optical semiconductor element is mounted and a lead portion electrically connectable to the optical semiconductor element. Forming a rough Ni plating layer made of roughened plating on at least one surface of a part of the substrate, forming a smooth Ni plating layer made of smooth Ni plating on the roughed Ni plating layer, A lead frame manufacturing method is characterized in that an Ag plating layer having a glossiness of 1.3 or more is formed on the surface layer side.

  In this case, a rough Ni plating layer is formed on at least one surface of the die pad portion and the lead portion, a smooth Ni plating layer is formed on the Ni plating layer, and a glossiness of 1. is provided on the outermost layer. By constituting three or more Ag plating layers, the smooth Ni plating layer assists the gloss of the Ag plating layer, and the plating unevenness of the plating surface having a high glossiness can be prevented.

  In one embodiment of the present invention, the surface roughness of the rough Ni plating layer is 0.03 μm to 0.05 μm in Ra, and the surface roughness of the smooth Ni plating layer is less than 0.03 μm in Ra. It is good also as a manufacturing method of a lead frame.

  In this way, variation in the crystal grain size of the rough Ni plating layer base is suppressed, and the gloss is assisted without lowering the gloss of the Ag plating layer, and the Ag plating surface has a high gloss of 1.6 or more. Can be maintained, and uneven plating on the plating surface can be prevented.

In one embodiment of the present invention, the plating bath used to form the roughened Ni plating layer is a sulfamic acid bath that does not use a brightener, the current density is 3 to 10 A / dm ² , and the smooth Ni plating layer The lead bath may be a sulfamic acid bath using a brightener, and the current density may be 3 to 10 A / dm ² .

  In this way, rough Ni particles are grown to form a rough Ni plating surface, and smooth Ni particles are grown to form a smooth Ni plating surface, thereby preventing uneven plating on the plating surface. be able to.

  As described above, according to the present invention, in the lead frame for an optical semiconductor device, it is possible to prevent appearance defects such as uneven plating on the plating surface without reducing the glossiness. In particular, uneven plating can be prevented even in a lead frame for an optical semiconductor device that requires high glossiness of 1.6 or higher.

FIG. 1 is a cross-sectional view showing a configuration of an example of a lead frame for an optical semiconductor device according to an embodiment of the present invention. 2A and 2B are diagrams simulating an example of the plating configuration of an optical semiconductor device lead frame according to an embodiment of the present invention. FIG. 3 is a cross-sectional view showing an example of a lead frame with resin according to an embodiment of the present invention. FIG. 4 is a cross-sectional view showing a configuration of an example of an optical semiconductor device according to an embodiment of the present invention. 5A and 5B are surface photographs of the Ag plating layer, and FIGS. 5C and 5D are SIM photographs showing the state of the plating layer cross section. 6A and 6B are EBSD photographs of the metal plate surface. FIG. 7 is a SIM photograph showing the state of the plating cross section of the lead frame for an optical semiconductor device according to one embodiment of the present invention. 8A and 8B are model diagrams showing the particles of each plating layer. 9A to 9G are diagrams schematically showing a series of steps of an example of a lead frame manufacturing method according to an embodiment of the present invention. FIGS. 10A and 10B are diagrams schematically showing a series of steps of an example of a lead frame with a resin according to an embodiment of the present invention. 11A to 11D are diagrams schematically showing a series of steps of an example of a method for manufacturing an optical semiconductor device according to an embodiment of the present invention.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. The present embodiment described below does not unduly limit the contents of the present invention described in the claims, and all the configurations described in the present embodiment are essential as means for solving the present invention. Not necessarily.

[Lead frame, lead frame with resin, optical semiconductor device]
FIG. 1 is a cross-sectional view showing a configuration of an example of a lead frame for an optical semiconductor device according to an embodiment of the present invention. The optical semiconductor device lead frame 50 is configured by forming a die pad portion 30 and a lead portion 40 by etching a metal plate or the like. Generally, a copper alloy is used as the material of the metal plate. A metal plate having a thickness of 0.1 mm to 0.3 mm is often used. One or a plurality of lead portions 40 are arranged corresponding to the die pad portion 30. The die pad portion 30 is a region for mounting an optical semiconductor element. The lead portion 40 is a region that constitutes a terminal for electrically connecting the electrodes of the optical semiconductor element mounted on the die pad portion 30, and is thus arranged around the die pad portion 30.

  The die pad part 30 and the lead part 40 are plated on at least one part of the surface on the optical semiconductor element mounting surface side to form the die pad part surface plating layer 10 and the lead part surface plating layer 20. These plating layers not only are used for mounting an optical semiconductor element and for wire bonding, but also have a role of efficiently reflecting light downward from the optical semiconductor element when it becomes an optical semiconductor device. The lead frame for an optical semiconductor device according to an embodiment of the present invention is characterized by the structure of the die pad surface plating layer 10 and the lead surface plating layer 20. Hereinafter, the configurations of the die pad surface plating layer 10 and the lead surface plating layer 20 will be described.

  FIGS. 2A and 2B are views illustrating a plating configuration of an example of a lead frame for an optical semiconductor device according to an embodiment of the present invention. 2A and 2B are diagrams simulating the configurations of the die pad surface plating layer 10 and the lead surface plating layer 20. As shown in FIG. 2A, a plating layer is provided on at least one surface of a part of a die pad portion and a lead portion formed by processing a metal plate, and the plating layer is roughened. Rough Ni plating layers 11 and 21 (rough Ni plating layer) made of plating, and smooth Ni plating layers 12 and 22 (smooth Ni plating layer) made of smooth Ni plating provided on the rough Ni plating layer, It is made of a plating layer including Ag plating layers 13 and 23 made of Ag plating having a glossiness of 1.3 or more on the outermost layer side.

  Further, as shown in FIG. 2B, from the surface side of the metal plate, the rough Ni plating layers 11 and 21, the smooth Ni plating layers 12 and 22 provided on the rough Ni plating layer, and the Au plating layer 14 , 24, and a plating layer composed of Ag plating layers 13 and 23 may be formed. Or you may form the plating layer comprised by the rough Ni plating layer and the smooth Ni plating layer provided on the rough Ni plating layer, Pd plating, Au plating layer, and Ag plating layer. Details will be described later.

  Next, the lead frame 100 with resin according to the present embodiment will be described with reference to FIG. FIG. 3 is a cross-sectional view showing an example of a lead frame with resin according to an embodiment of the present invention. As shown in FIG. 3, on the surface side of the die pad portion 30 and the lead portion 40 so as to surround the optical semiconductor element mounting portion 10 a inside the die pad portion 30 and the connection portion 20 a such as a bonding wire inside the lead portion 40. The outer resin part 110 is formed. At the same time, the outer resin is filled in the gap 111 and the like where the die pad portion 30 and the lead portion 40 face each other. The outer resin portion 110 filled with the outer resin in this way has a role of reflecting the light in the lateral direction emitted from the optical semiconductor element upward.

  Next, an optical semiconductor device 150 according to an embodiment of the present invention will be described with reference to FIG. FIG. 4 is a cross-sectional view showing a configuration of an example of an optical semiconductor device according to an embodiment of the present invention. The optical semiconductor element 160 is mounted on the upper surface of the plating layer 10 formed on the surface of the die pad portion 30 using the lead frame with resin 100 produced in FIG. 3, and the electrode 161 and the lead portion 40 of the optical semiconductor element 160 are bonded to each other. It is electrically connected by a wire 170 or the like. A sealing resin portion 180 filled with a transparent resin is provided above the optical semiconductor element 160 and the bonding wire 170 surrounded by the outer resin portion 110.

  The optical semiconductor device lead frame 50 according to the embodiment of the present invention is characterized in that at least one of the die pad portion 30 mounted on the optical semiconductor element 160 and a part of the lead portion 40 that can be electrically connected to the optical semiconductor element 160. A plating layer is provided on the surface, and the plating layer is rough Ni plating layers 11 and 21 made of roughened plating, and smooth Ni plating made of smooth Ni plating provided on the roughened Ni plating layer. It consists of the plating layers including the layers 12 and 22 and the Ag plating layers 13 and 23 made of Ag plating having a glossiness of 1.3 or more on the outermost layer side.

  By adopting the configuration of the die pad surface plating layer 10 and the lead surface plating layer 20, uneven plating on the plating surface can be prevented. Hereinafter, the reason why the uneven plating can be prevented will be described in detail. First, the mechanism of uneven plating will be described with reference to FIGS.

  5A and 5B are surface photographs of the Ag plating layer, and FIGS. 5C and 5D are SIM photographs showing the state of the plating layer cross section. FIG. 5 (A) is a photograph of a normal part showing the state of the Ag plating surface without plating unevenness in the prior art. FIG. 5B is a photograph of the plating unevenness portion showing the state of the Ag plating surface in the presence of plating unevenness in the prior art. As shown in FIG. 5A, the Ag plating surface is a substantially smooth surface in the portion where the uneven plating does not occur. On the other hand, as shown in FIG. 5B, the surface with uneven plating was uneven with the surface rough. It is a very small unevenness that can be recognized by 5,000 times.

  Therefore, the crystal state of the cross section of the plating layer was confirmed. FIG. 5C is a SIM (Scanning Ion Microscope) photograph of a normal portion showing a state of a plating cross section without plating unevenness in the prior art. As described above, the conventional Ni plating layer 200 and the conventional Ag plating layer 250 are formed on the die pad portion 30 and the lead portion 40. FIG. 5D is a SIM photograph of the plating uneven portion showing the state of the plating cross section in the presence of uneven plating in the prior art. FIG. 5C shows no plating unevenness, and the upper surface of the Ag plating surface is almost flat.

  On the other hand, as shown in FIG. 5D, it can be seen that in the presence of plating unevenness, a recess 300 is formed on the upper surface of the Ag plating layer 250. Comparing FIG. 5C and FIG. 5D, the size of the crystal of the Cu material of the Ni plating layer 200, the die pad portion 30, and the lead portion 40 becomes large particularly in the region where the depression 300 is present in the Ag plating layer 250. ing. The size of the plating crystal can be controlled by the plating conditions, but when the plating conditions are the same, the size of the plating crystal tends to correlate with the size of the underlying crystal grains. . In this case, it depends on the crystal state of the Ni plating layer as the base plating layer and the metal plate as the lead frame material.

  6A and 6B are EBSD photographs of the metal plate surface. FIG. 6A is an EBSD photograph of a normal portion of the plating surface without plating unevenness in the prior art. FIG. 6B is an EBSD photograph of the plating surface in the presence of uneven plating in the prior art. EBSD (electron backscatter diffraction) is an analysis using backscattered electron diffraction. As can be seen from comparison between FIGS. 6A and 6B, fine crystal grains are spread almost uniformly as a whole where there is no plating unevenness. On the other hand, as shown in FIG. 6B, it was found that fine crystal grains and large crystal grains are mixed in a portion where uneven plating occurs.

  The plating layer grows in correlation with the size of crystal grains on the surface of the metal plate. When the crystal grains on the surface of the metal plate are fine, dense plating crystals grow, and when the crystal grains on the surface of the metal plate are large, the plating crystals also become coarse. Since each crystal volume grows almost equally in crystal volume, the height of the coarsened metal crystal is reduced. Therefore, the coarsened portion of the crystal grain is smaller than the finer portion than the surrounding portion. It becomes a depressed shape. This depression becomes unevenness on the plating surface, and compared to a smooth normal part, it becomes darker due to the unevenness, and there appears to be a difference in appearance, and it is judged as uneven plating.

  As a result of intensive studies to achieve the above-described object of the present invention, the inventor has a plating layer provided on a surface of at least one of the die pad portion 30 and the lead portion 40, The plating layers are rough Ni plating layers 11 and 21 made of rough plating, smooth Ni plating layers 12 and 22 made of smooth Ni plating provided on the rough Ni plating layer, and at least on the outermost layer side. It has been found that appearance defects such as plating unevenness can be prevented by comprising plating layers including Ag plating layers 13 and 23 made of Ag plating having a glossiness of 1.3 or more. Specifically, the plating layers were two types of Ni plating layers with different surface roughness and glossiness. And it was set as the Ag plating layer in the outermost layer side. Hereinafter, characteristics of the plating layer formed on the lead frame according to the embodiment of the present invention will be described.

  As described above, the plating layer on the optical semiconductor element mounting surface side of the lead frame is glossy with the outermost surface being an Ag plating layer, and the glossiness is 1.3 or more, so that the optical semiconductor element is directed downward. Light can be efficiently reflected by the plating surface. In addition, in order to maintain a high glossiness of 1.6 or more, particularly the Ag plating surface, not only the Ag plating layer but also the base plating layer is formed below the Ag plating layer, and the quality of the base plating layer is also improved. is important. An Ni plating layer is preferably formed on the base of the Ag plating layer in order to suppress sulfide corrosion or improve the luminous flux.

  The glossiness in this specification is a glossiness value measured using, for example, a micro color meter VSR400 manufactured by Nippon Denshoku Co., Ltd. under the conditions of a collimator diameter of 0.05 mmφ and a light source angle of 45 °.

  Conventionally, a base plating layer is formed with a bright Ni plating layer. As described above, the bright Ni plating layer basically forms dense and fine crystal grains, but is easily affected by the size of the crystal grains on the surface of the metal plate which is the lead frame material underneath. . Therefore, in the present embodiment, the Ni plating layers 11 and 21 obtained by roughening the Ni plating layer in contact with the metal plate are formed, and the smooth Ni plating layers 12 and 22 are formed thereon. By subjecting the surface in contact with the metal plate to roughened Ni plating, the size of the crystal grains becomes relatively large as compared with bright Ni plating. For this reason, even if the crystal grain size of the metal plate is large, the crystal grain size of the rough Ni plating layer is not large. Conversely, in the place where the crystal grain size is small, the crystal grain size of the rough Ni plating layer is small. As a result, the difference in the size of the crystal grains is reduced, resulting in a uniform crystal grain size as compared with the bright Ni plating. The mechanism will be described below.

  It is generally discussed that the Ni plating crystal growth is epitaxially grown according to the Cu crystal on the surface of the metal plate. In this case, the heterogeneous crystals of Cu, Ni, and Ag are called heteroepitaxial. In heteroepitaxial growth, it has been pointed out that there is a transition from layer growth to island growth, and crystal growth in a plane where the crystal lattice is matched is called the Frank van der Merve growth mode and is layer growth. On the other hand, when the crystal lattice is inconsistent, it is called a Former-Weber growth mode, which results in island growth. It can be said that this is a phenomenon in which the plated crystal at the point where the island has grown appears to be depressed on the surface due to the presence or absence of a work-affected layer on the surface of the metal plate and the difference in crystal growth direction. The uneven plating portion in FIGS. 5B and 5D shows a depressed surface state.

  The rough Ni plating layers 11 and 21 of the present embodiment have a structure in which the Ni plating growth is uniformly grown over the entire region and the layer growth is reduced by a method that makes the island growth dominant in the Ni plating crystal growth process. . A smooth Ni plating layer is grown on the layer structure in which island growth is made uniform. Further, a bright Ag plating layer is laminated thereon. By growing a smooth Ni plating layer and an Ag plating layer on the Ni plating layer roughened on the surface of the metal plate, crystal growth is made uniform, and mixing of layer growth and island growth is reduced. The final surface is made uniform. By reducing the layer growth at the metal plate contact surface, the crystal surface depression 300 due to island growth intervening in the layer growth is consequently reduced. The smooth Ni plating layer serves as a base plating for assisting the gloss of the bright Ag plating layer and is formed to suppress sulfur corrosion.

  FIG. 7 is a SIM photograph showing the state of the plating cross section of the lead frame for an optical semiconductor device according to one embodiment of the present invention. The die pad portion 30 and the lead portion 40 formed from the surface of the metal plate are large metal crystals, but the rough Ni plating layers 11 and 21 and the smooth Ni plating layers 12 and 22 are formed thereon, and FIG. There is no large Ni-plated crystal like that, and it is relatively uniform. The depression 300 on the upper surface of the Ag plating surface is not generated.

  Next, the mechanism for preventing uneven plating will be described with reference to a model diagram. 8A and 8B are model diagrams showing crystal particles of each plating layer. FIG. 8A shows the crystal particles of each plating layer with uneven plating in the prior art, and FIG. 8B shows the crystal particles of the plating layer of the lead frame for optical semiconductor devices according to one embodiment of the present invention. FIG. As shown in FIG. 8 (A), conventionally, depending on the size of the crystal grain size of the metal plate of the die pad portion 30 and the lead portion 40, the particles of the Ni plating layer 200 thereon are also affected by the size of the crystal size. It grows and further affects the Ag plating layer 250 thereon, and as a result, the Ag plating surface is depressed, resulting in uneven plating.

  On the other hand, in this embodiment, as shown in FIG. 8B, the Ni plating layers 11 and 21 made of the roughened plating are formed, so that the roughening is performed regardless of the crystal grain size of the metal plate. The difference in size of each Ni crystal grain size can be reduced. As a result, the Ag plating surface can be made smooth without being depressed, and uneven plating can be prevented. Then, by forming the dense and smooth Ni plating layers 12 and 22 on the Ni plating layer made of the roughened plating, the plating particles of the outermost Ag plating layers 13 and 23 become dense, and the Ag plating layer The glossiness of 13 and 23 is assisted, and plating unevenness can be prevented even on a highly glossy Ag plating surface having a glossiness of 1.6 or more on the Ag plating surface.

  By forming the Ni plating layer composed of the roughened plating as described above, etching roughening is not performed after the Ni plating layer is formed, so that the manufacturing efficiency can be improved and plating unevenness can be prevented. it can.

  The surface roughness of the roughened Ni plating layers 11 and 21 is the center line average roughness, and is in the range of Ra 0.03 μm to 0.05 μm. When the surface roughness is less than Ra 0.03 μm, it is easily affected by the size of the underlying crystal grains, and the occurrence of uneven plating cannot be prevented. When the surface roughness exceeds Ra 0.05 μm, a fine uneven shape is formed on the entire Ni plating surface, and the glossiness of the Ag plating layer formed thereon is lowered. Eventually, the reflectance of light also decreases. Preferably, the range is Ra 0.03 μm to 0.04 μm.

  In addition, the surface roughness in this specification is the centerline average roughness. For example, the value is measured with a scanning confocal laser microscope LEXT OLS3000 manufactured by Olympus.

  Moreover, the glossiness of the roughening Ni plating layers 11 and 21 is 1.2 to 1.5. Roughening Ni plating uses a sulfamic acid-based plating solution and does not use a brightener or the like. If the glossiness of the rough Ni plating layer is less than 1.2, the glossiness of the Ag plating that is the outermost surface is affected, and a predetermined glossiness cannot be obtained. If it exceeds 1.5, crystal growth on the surface of the metal plate is inherited, and there is a possibility that a depression is generated on the surface of the outermost Ag plating layer. Preferably, the glossiness of the roughened Ni plating is about 1.3.

  The plating thickness of the rough Ni plating layers 11 and 21 is 0.05 μm to 0.2 μm. If the plating thickness is less than 0.05 μm, the effect of suppressing variation in crystal grain size cannot be exhibited, and plating unevenness may occur. When the plating thickness exceeds 0.2 μm, the rough Ni plating has a slower plating speed than the bright Ni plating, and the thicker the rough Ni plating layer, the worse the productivity and the higher the cost. Preferably, the plating thickness is around 0.1 μm.

  A smooth Ni layer is formed on the rough Ni plating layers 11 and 21. As described above, the roughened Ni platings 11 and 21 are plating layers applied to prevent plating unevenness of Ag plating. On the other hand, the smooth Ni plating layers 12 and 22 are base plating layers that assist the glossiness of the outermost Ag plating layers 13 and 23 and suppress sulfur corrosion. When the glossiness of the Ag plating layers 13 and 23 is 1.3 or more, the surface roughness of the smooth Ni plating layer may be less than Ra 0.03 μm. However, in order to maintain a high gloss of 1.6 or more, the smoothness of the Ni layer is a fine and fine crystal grain because it is affected by the underlying plating layer under the Ag plating layer. The surface roughness is preferably about Ra 0.02 μm.

  Moreover, the glossiness of the smooth Ni plating layers 12 and 22 is 1.5 to 1.7. Smooth Ni plating uses a plating solution having a sulfamic acid-based brightener. The glossy material may not be used as long as it can be produced within the above gloss range. The glossy material can be increased in glossiness by adding a small amount of chemicals, but plating stress is likely to occur and it is likely to cause cracks. Also, the brightener itself is expensive, and it is better not to use the brightener if possible. When the glossiness of the smooth Ni plating layers 12 and 22 is less than 1.5, the glossiness of the Ag plating that is the outermost surface is affected, and a predetermined glossiness cannot be obtained. When it exceeds 1.7, it is difficult to stably produce the glossiness, and the amount of the brightener used is large and the cost becomes high. Preferably, the glossiness of the smooth Ni plating is around 1.6.

  The plating thickness of the smooth Ni plating layers 12 and 22 is 1.0 μm or more. More preferably, it is 1.0-3.0 micrometers. If the plating thickness is less than 1.0 μm, the effect of suppressing sulfurization corrosion of the underlying plating layer cannot be exhibited. When the plating thickness exceeds 3.0 μm, the production time of the plating layer becomes long and the productivity is lowered. Further, if the plating thickness is thick, plating stress is likely to occur, which tends to cause warpage. It may cause plating peeling. Therefore, about 2.0 μm is preferable.

  Glossy Ag plating layers 13 and 23 are formed above the smooth Ni plating layers 12 and 22, respectively. The Ag plating layers 13 and 23 are the outermost surface layers and need to reflect light from the optical semiconductor element efficiently. As for the reflectance, the reflectance of light having a wavelength of 460 nm is required to be 92% or more, and the glossiness of the plated surface is required to be 1.3 or more. In order to satisfy the above, the thickness of the glossy Ag plating is 1.5 μm to 3.5 μm.

  Further, a noble metal plating layer may be formed between the smooth Ni plating layers 12 and 22 and the outermost Ag plating layers 13 and 23. For example, the Au plating layers 14 and 24 may be formed. By adding the Au plating layer, there is an effect of preventing thermal diffusion to the outermost surface of Cu of the metal material. The thickness of the Au plating layer is 0.001 μm to 0.01 μm. If it is less than 0.001 μm, it cannot play the role of preventing thermal diffusion of the underlying Cu. When it exceeds 0.01 μm, the production time of the plating layer becomes long and the productivity is lowered. In addition, the amount of expensive Au used increases and the production cost increases. Preferably, it is around 0.005 μm.

  Further, a Pd plating layer and an Au plating layer may be formed between the smooth Ni plating layers 12 and 22 and the outermost Ag plating layers 13 and 23. The Pd plating layer serves to prevent the thermal diffusion of the underlying Cu and at the same time reduce the thickness of the Au plating layer and reduce the amount of expensive Au used. It is necessary to set the plating thickness so that the relatively uniform plating particle diameter of the rough Ni plating layer as the underlying plating layer is inherited as it is. The Pd plating layer has a thickness of 0.01 μm to 0.1 μm. When the plating thickness is less than 0.01 μm, it cannot play the role of preventing thermal diffusion of the underlying Cu. When the plating thickness exceeds 0.1 μm, the production time of the plating layer becomes long and the productivity is lowered. In addition, the amount of expensive Pd used increases and the production cost increases. Therefore, the plating thickness is preferably around 0.03 μm.

  Further, by using the lead frame 50 of this embodiment, the lead frame 100 with resin for an optical semiconductor device and the semiconductor device 150 using the same can be manufactured. In the semiconductor device, by forming the rough Ni plating layers 11 and 12 on the lead frame 50, unevenness (fine dents on the surface) generated in the reflective layer on the surface of the Ag plating layers 13 and 23 as the outermost layer can be reduced. Thus, the reflectance can be stabilized. Further, in the lead frame with resin 100 and the semiconductor device 150, the inspection yield placed on the Ag plating layer can be greatly improved.

[Lead frame manufacturing method]
Next, a method for manufacturing the lead frame 50 according to an embodiment of the present invention will be described. There are two main methods for producing a lead frame. After plating the lead frame on which a predetermined pattern has been formed, plating is applied to the necessary locations on the metal plate surface before forming the predetermined pattern, and then masked with a resist layer to form the predetermined pattern This is a pre-plating method for producing a lead frame. Hereinafter, a method for manufacturing a lead frame using a pre-plating method will be described.

  9A to 9G are diagrams schematically showing a series of steps of an example of a lead frame manufacturing method according to an embodiment of the present invention.

  FIG. 9A is a diagram showing an example of a metal plate preparation process. As shown in FIG. 9A, when manufacturing a lead frame for an optical semiconductor device according to an embodiment of the present invention, a metal plate 60 is first prepared. The material of the metal plate 60 to be used is not particularly limited as long as it is a lead frame material, but Cu alloy or Cu is generally used.

  FIG. 9B is a diagram showing an example of a plating mask forming process. In the plating mask forming step, a photoresist (for example, dry film resist) is laminated on the front and back surfaces of the metal plate 60 to provide a photoresist layer, and a mask on which a plating pattern is formed is placed thereon, exposed, and transferred to the resist. And developing the resist mask 70 for plating by developing.

  FIG. 9C is a diagram showing an example of the plating layer forming step. In the plating layer forming step, in order to form the die pad portion surface plating layer 10 and the lead portion surface plating layer 20 by electrolytic plating in the opening portion of the resist mask using the resist mask 70 for plating, FIG. And roughening Ni plating layers 11 and 12, smooth Ni plating layers 12 and 22, and Ag plating layers 13 and 23 as shown in (B) are formed. Alternatively, in order to form the die pad surface plating layer 10 and the lead surface plating layer 20, roughened Ni plating layers 11, 12, smooth Ni plating layers 12, 22, Au plating layers 14, 24, Ag plating layer 13, The plating layers are formed in the order of 23, or in the order of roughened Ni layer plating layer, smooth Ni plating layer, Pd plating layer, Au plating layer, and Ag plating layer.

The plating solution used for roughing Ni plating is plated using a plating solution that does not have a sulfamic acid-based brightener. Do not use brighteners. The current density is 3 to 10 (A / dm ² ) so that the crystal becomes coarse. The surface roughness is appropriately adjusted so as to have a predetermined surface roughness depending on the current density, the conveyance speed, and the like. The plating solution used for the smooth Ni plating solution is plated using a plating solution having a sulfamic acid-based brightener. The current density is 3 to 10 (A / dm ² ) so that the surface becomes smooth. The surface roughness is appropriately adjusted so as to have a predetermined surface roughness depending on the current density, the conveyance speed, and the like.

  FIG. 9D is a diagram illustrating an example of a plating mask peeling process. In the plating mask peeling step, the plating resist mask 70 formed on both surfaces of the metal plate is peeled off with a sodium hydroxide aqueous solution, and the die pad surface plating layer 10 and the lead surface plating layer 20 are formed on the metal plate at predetermined positions. Is formed.

  FIG. 9E is a diagram illustrating an example of an etching mask formation process. In the etching mask forming process, a photoresist is laminated again on the metal plate 60, and the glass mask on which the die pad part and the lead frame pattern of the lead part are formed is transferred to the resist in the photolithography process and developed, thereby being used for etching. A resist mask 75 is formed.

  FIG. 9F illustrates an example of an etching process. In the etching step, an excess metal portion is removed by etching using ferric chloride solution or the like to form the lead frame shape of the die pad portion 30 or the lead portion 40.

  FIG. 9G illustrates an example of an etching mask peeling process. In the etching mask peeling step, the etching resist mask 75 formed on both surfaces of the metal plate is peeled off with a sodium hydroxide aqueous solution, and the die pad portion surface plating layer 10 and the leads are formed at predetermined positions of the die pad portion 30 and the lead portion 40. A partial surface plating layer 20 is formed. The lead frame 50 made in this way is partially roughened Ni plated layer, smooth Ni plated layer, Ag plated or roughened Ni plated layer, smooth Ni plated layer, Au plated layer on the die pad part and the lead part, A die pad surface plating layer 10 and a lead portion surface plating layer 20 in which an Ag plating layer, or a roughened Ni plating layer, a smooth Ni plating layer, a Pd plating layer, an Au plating layer, and an Ag plating layer are laminated, are formed. A lead frame 50 according to an embodiment of the present invention is formed.

  As for the post-plating method, the pattern shape of the lead frame of the die pad portion and the lead portion in FIGS. 9E to 9G is formed by an etching method, and then plating as shown in FIG. 9C is performed. . In the case of partial plating, a portion other than plating is covered with a mechanical mask such as a rubber mask, a cover film, a mask such as a resist, and the like, and then the plating layers 10 and 20 are formed by the plating method shown in FIG. . When plating is performed on the entire surface, the mask is not used and plating is performed after the lead frame pattern is formed. In addition, the structure of the plating layer of this embodiment should just ensure the area | region which contacts the transparent resin part by the side of a semiconductor element mounting surface at least. Therefore, the plating layer of the external terminal portion may be the same plating layer or a different plating configuration. However, the same plating structure on the front and back sides can form the plating at the same time, which is advantageous in terms of productivity and cost. In addition, the formation of a predetermined lead frame pattern may be performed by a press method instead of an etching method.

[Production method of lead frame with resin]
Next, a method for manufacturing a resin-attached lead frame according to an embodiment of the present invention will be described. FIGS. 10A and 10B are diagrams schematically showing a series of steps of an example of a lead frame with a resin according to an embodiment of the present invention. In the lead frame manufacturing process with resin, a lead frame 50 is used as shown in FIG. Then, as shown in FIG. 10B, the outer resin part 110 is formed on the lead frame 50 by transfer molding or injection molding of the lead frame 50. As the outer resin, a thermoplastic resin is generally used. The outer resin portion 110 is formed on the lead frame 50 and is simultaneously filled in a gap portion where the die pad portion 30 and the lead portion 40 face each other. The outer resin part 110 is formed so as to surround the periphery of a connection part electrically connected to the lead part 40 by an optical semiconductor element 160 and a wire bonding 170 described later. Further, the peripheral surface is formed in a tapered shape so that light generated from the optical semiconductor element 160 is reflected upward by the outer resin portion 110. By this step, a resin-made lead frame 100 as shown in FIG. 10B is completed.

  Next, a method for manufacturing an optical semiconductor device according to an embodiment of the present invention will be described. 11A to 11D are diagrams schematically showing a series of steps of an example of a method for manufacturing an optical semiconductor device according to an embodiment of the present invention. FIG. 11A is a diagram showing an example of an optical semiconductor element mounting process. As shown in FIG. 11A, in the optical semiconductor element mounting process, the optical semiconductor element 160 is mounted on the die pad surface plating layer 10 using the lead frame with resin 100 obtained in FIG. In advance, an Ag paste or the like is applied to the surface of the die pad portion surface plating layer 10 to fix the optical semiconductor element 160 on the die pad portion surface plating layer 10.

  FIG. 11B is a diagram illustrating an example of a wire bonding process. As shown in FIG. 11B, in the wire bonding step, the electrodes of the optical semiconductor element 160 and the lead surface plating 20 are electrically connected using a connecting means such as a bonding wire 170 by a connecting method such as wire bonding. Connect to.

  FIG. 11C is a diagram illustrating an example of a resin sealing process. As shown in FIG. 11 (C), in the resin sealing process, the optical semiconductor element 160 surrounded by the outer resin part 110 and the connection part electrically connected to the lead part surface plating 20 by the bonding wire 170 or the like. The peripheral portion is sealed with a sealing resin 180 made of a transparent resin.

  FIG. 11D is a diagram illustrating an example of a cutting process. As shown in FIG. 11D, in the cutting process, finally, the chip is separated into pieces having a predetermined package size. If the resin is sealed at once, dicing or the like, and if individually resin-sealed, it is punched out with a press or the like and separated into individual pieces. Thereby, the optical semiconductor device 150 of the present embodiment is completed.

  Next, the lead frame, the lead frame with resin, and the optical semiconductor device according to one embodiment of the present invention will be described in detail with reference to examples. The present invention is not limited to these examples.

  For the lead frame for an optical semiconductor device in Example 1, after forming the pattern of the lead frame, the lead frame was manufactured by plating the entire surface of the pattern by plating after plating. First, as a metal plate, a Cu plate having a thickness of 0.2 mm (Furukawa Electric Co., Ltd .: EFTEC64-T) is processed into a long plate shape having a width of 140 mm, and then a photosensitive dry film resist having a thickness of 0.05 mm ( Asahi Kasei E-Materials Co., Ltd.) was pasted on both sides of the metal plate with a laminate roll.

  Next, on the front and back sides, a glass mask on which a predetermined pattern for forming a die pad portion and a lead portion was formed was placed on the dry film resist and exposed to ultraviolet light. Thereafter, using a sodium carbonate solution, development treatment was performed to dissolve uncured dry film resist that was not exposed to ultraviolet light and was not exposed to light.

  Next, the exposed surface of the metal plate in the opening from which the resist layer was removed was etched. As the etching solution, a ferric chloride solution was used. Next, the dry film resist was peeled off with a sodium hydroxide solution. Thereby, the shape of the die pad part and the lead part was formed.

Next, the entire surface was plated without using a plating mask or the like. First, roughened Ni plating was performed. Roughening Ni plating, using no plating solution of sulfamic acid based brightener, it was plated at a current density of 5A / dm ^2. A brightener or the like was not used. The plating conditions and the surface roughness of the roughened Ni plating were adjusted as appropriate so that the glossiness was as shown in Table 1. Next, smooth Ni plating was performed. For smooth Ni plating, a plating solution having a sulfamic acid-based brightener was used, and plating was performed at a current density of 5 A / dm ² . The plating conditions and the surface roughness of the smooth Ni plating were adjusted as appropriate so that the glossiness was as shown in Table 1. Then, gloss Ag plating was performed. Ag plating was performed with a cyan-based Ag plating solution at a current density of 7 A / dm ² . The plating thickness of the Ag plating surface was 2.5 μm. The plating solution conditions were appropriately adjusted so that the glossiness is as shown in Table 1. Then, the lead frame which concerns on Example 1 of one Embodiment of this invention was obtained by cut | disconnecting to a predetermined dimension.

  Next, an outer resin portion was formed on the lead frame. The outer resin portion was formed so as to surround the periphery of the connection portion electrically connected to the lead portion by an optical semiconductor element, wire bonding, or the like. At the same time, the outer resin was filled in the space between the die pad portion and the lead portion facing each other. This obtained the lead frame with resin which concerns on Example 1 of one Embodiment of this invention.

  Next, Ag paste or the like was applied to the surface of the die pad part of the produced lead frame with resin in advance, and the optical semiconductor element was mounted on the die pad part. Thereafter, the electrode of the optical semiconductor element and the lead portion were connected by wire bonding. Next, the opening of the outer resin part including the optical semiconductor element and the wire bonding part was sealed with a transparent resin.

  Finally, the optical semiconductor device according to Example 1 of one embodiment of the present invention was completed by cutting to a predetermined size of the optical semiconductor device. At that time, the thickness of the rough Ni plating was 0.1 μm and the surface roughness Ra was 0.04 μm, and the glossiness of the rough Ni plating at that time was 1.2. The thickness of the smooth Ni plating was 2.0 μm, the surface roughness Ra was 0.02 μm, and the glossiness of the smooth Ni plating at that time was 1.6. The gloss of Ag plating was 1.8.

  In Example 2, the thickness of the rough Ni plating is 0.05 μm, the roughness is Ra 0.04 μm, the glossiness is 1.4, the thickness of the smooth Ni plating is 2.0 μm, the roughness is Ra 0.02 μm, The glossiness was 1.6, and Ag plating was performed under the same conditions as in Example 1. The thickness of the Ag plating was 2.5 μm, and the glossiness was 1.7.

  In Example 3, the thickness of the rough Ni plating is 0.2 μm, the roughness is Ra 0.04 μm, the glossiness is 1.3, the thickness of the smooth Ni plating is 2.0 μm, the roughness is Ra 0.02 μm, The glossiness was 1.6, the thickness of the Ag plating was 2.5 μm, and the glossiness was 2.1. The other settings were the same as in Example 1.

  In Example 4, the thickness of the rough Ni plating is 0.1 μm, the roughness is Ra 0.03 μm, the glossiness is 1.5, the thickness of the smooth Ni plating is 2.0 μm, the roughness is Ra 0.02 μm, The glossiness was 1.6, the thickness of the Ag plating was 2.5 μm, and the glossiness was 1.7. The other settings were the same as in Example 1.

  In Example 5, the rough Ni plating has a thickness of 0.1 μm, the roughness Ra is 0.05 μm, the glossiness is 1.3, the smooth Ni plating thickness is 2.0 μm, the roughness is Ra 0.02 μm, The glossiness was 1.6, the thickness of the Ag plating was 2.5 μm, and the glossiness was 1.8. The other settings were the same as in Example 1.

  In Example 6, the thickness of the rough Ni plating is 0.1 μm, the roughness is Ra 0.04 μm, the glossiness is 1.4, the thickness of the smooth Ni plating is 2.0 μm, the roughness is Ra 0.02 μm, The glossiness was 1.6, the thickness of the Ag plating was 2.5 μm, and the glossiness was 1.6. The other settings were the same as in Example 1.

  In Example 7, the thickness of the rough Ni plating is 0.1 μm, the roughness is Ra 0.04 μm, the glossiness is 1.4, the thickness of the smooth Ni plating is 1.0 μm, the roughness is Ra 0.02 μm, The glossiness was 1.6, the thickness of the Ag plating was 2.5 μm, and the glossiness was 1.6. The other settings were the same as in Example 1.

  In Example 8, the thickness of the rough Ni plating is 0.1 μm, the roughness is Ra 0.04 μm, the glossiness is 1.4, the thickness of the smooth Ni plating is 3.0 μm, the roughness is Ra 0.02 μm, The glossiness was 1.6, the thickness of the Ag plating was 2.5 μm, and the glossiness was 1.8. The other settings were the same as in Example 1.

  In Example 9, the thickness of the rough Ni plating is 0.1 μm, the roughness is Ra 0.04 μm, the glossiness is 1.4, the thickness of the smooth Ni plating is 2.0 μm, the roughness is Ra 0.02 μm, The glossiness was 1.5, the thickness of the Ag plating was 2.5 μm, and the glossiness was 1.6. The other settings were the same as in Example 1.

  In Example 10, instead of the post-plating method in Example 1, a lead frame was manufactured by a pre-plating method in which a metal plate was first plated at a predetermined location and then a lead frame pattern was formed. A Cu plate (made by Furukawa Electric Co., Ltd .: EFTEC64-T) having a thickness of 0.2 mm was processed into a long plate shape having a width of 140 mm, and then a photosensitive dry film resist having a thickness of 0.05 mm (Asahi Kasei Corporation). (Made by Materials Co., Ltd.) was attached to both surfaces of the metal plate with a laminate roll.

  Next, on the front side, the pattern of the die pad part and the lead part not covered with the resin of the outer resin part formed so as to surround the optical semiconductor element mounting region, and on the back side, the external terminal part is plated. A glass mask having a predetermined pattern formed thereon was placed on a dry film resist and exposed to ultraviolet light. Then, the development processing which melt | dissolves the uncured dry film resist which was blocked | blocked and irradiated with the ultraviolet light using the sodium carbonate solution was performed.

Next, roughened Ni plating was applied to the exposed surface of the metal plate in the opening from which the resist layer was removed. Roughening Ni plating using plating solution of sulfamic acid were plated at a current density of 5A / dm ^2. The plating conditions such as pH adjustment of the plating solution having no sulfamic acid-based brightener were appropriately adjusted so that the thickness of the roughened Ni plating was 0.1 μm and the surface roughness of the roughened Ni plating was Ra 0.04 μm. The glossiness of the roughened Ni-plated surface was 1.4. Next, smooth Ni plating was performed. For smooth Ni plating, a plating solution having a sulfamic acid-based brightener was used, and plating was performed at a current density of 5 A / dm ² . The plating conditions such as pH adjustment of a plating solution having a sulfamic acid-based brightener were appropriately adjusted so that the plating had a thickness of 2.0 μm and the surface roughness of the smooth Ni plating was Ra 0.01 μm. The glossiness of the smooth Ni-plated surface was 1.7. Thereafter, Pd plating was applied to a thickness of 0.03 μm. Next, Au plating was applied to a thickness of 0.007 μm. Next, gloss Ag plating was performed. Ag plating was performed with a cyan-based Ag plating solution at a current density of 7 A / dm ² . The plating solution conditions were appropriately adjusted so that the Ag plating thickness was 2.5 μm and the glossiness of the Ag plating surface was 2.0.

  Next, the dry film resist was peeled off with a sodium hydroxide solution. Thereby, the plating layer was formed in the predetermined area | region of the die pad part and lead part of a metal plate. Next, a photosensitive dry film resist (AQ-5038 manufactured by Asahi Kasei E-Materials Co., Ltd.) having a thickness of 0.05 mm was again attached to both surfaces of the metal plate with a laminate roll.

  Next, on the front and back sides, a glass mask on which a predetermined pattern for forming a die pad portion and a lead portion was formed was placed on the dry film resist and exposed to ultraviolet light. Thereafter, a development treatment was performed using a sodium carbonate solution to dissolve uncured dry film resist that was not exposed to ultraviolet light. Next, the exposed surface of the metal plate in the opening from which the resist layer was removed was etched. As the etching solution, a ferric chloride solution was used. Thereby, the shape of the die pad part and the lead part was formed. Next, the dry film resist was peeled off with a sodium hydroxide solution. Then, the lead frame which concerns on Example 10 of one Embodiment of this invention was obtained by cut | disconnecting to a predetermined dimension.

  Next, an outer resin portion was formed on the lead frame. The outer resin portion was formed so as to surround the periphery of the connection portion electrically connected to the lead portion by an optical semiconductor element, wire bonding, or the like. At the same time, the outer resin was filled in the space between the die pad portion and the lead portion. This obtained the lead frame with resin which concerns on Example 10 of one Embodiment of this invention.

  Next, Ag paste or the like was applied to the surface of the die pad part of the produced lead frame with resin in advance, and the optical semiconductor element was mounted on the die pad part. Thereafter, the electrode of the optical semiconductor element and the lead portion were connected by wire bonding. Next, the opening of the outer resin part including the optical semiconductor element and the wire bonding part was sealed with a transparent resin. Finally, the optical semiconductor device according to Example 10 of one embodiment of the present invention was completed by cutting to a predetermined optical semiconductor device size.

[Comparative Example 1]
In Comparative Example 1, only the smooth Ni nickel plating was performed in place of the rough plating and smooth Ni plating in Example 1. Others are the same manufacturing methods as Example 1.

[Comparative Example 2] to [Comparative Example 3]
In Comparative Examples 2 to 3, the plating thickness, surface roughness, glossiness, and glossiness of Ag plating of roughened Ni plating and smooth Ni plating are shown in Table 1 below, and the other settings are the same as in Example 1. It was.

  Further, in order to confirm the appearance of the surface of the plating layer, 1000 sheets were inspected with an automatic appearance device at the lead frame stage.

  The results are shown in Table 1. The occurrence rate of plating unevenness was evaluated as ◎ when the rate was less than 0.3%, Δ when 0.3% or more and 1% or less, and × when 1% or more.

  In all of Examples 1 to 10, the presence or absence of uneven plating was ◎, and no uneven plating occurred.

  On the other hand, in Comparative Example 1, about 4% of appearance defects due to uneven plating occurred. In Comparative Example 2, uneven plating occurred as in Comparative Example 1. In Comparative Example 3, since the surface roughness of the Ni plating layer was rough and the glossiness was low, the glossiness of the Ag plating surface was less than 1.3.

  In addition, the resin-attached lead frame and the optical semiconductor device using the same could be produced without any problem in the process.

  Therefore, in the lead frame, the lead frame with resin, and the optical semiconductor device according to one embodiment of the present invention, the Ni plating layer made of rough plating and the Ag plating layer having a glossiness of 1.3 or more are formed on the outermost layer. By doing so, it was possible to prevent appearance defects such as uneven plating on the plating surface without reducing the glossiness.

  Although the embodiments and examples of the present invention have been described in detail as described above, it will be understood by those skilled in the art that many modifications can be made without departing from the novel matters and effects of the present invention. It will be easy to understand. Therefore, all such modifications are included in the scope of the present invention.

  For example, a term described with a different term having a broader meaning or the same meaning at least once in the specification or the drawings can be replaced with the different term in any part of the specification or the drawings. Also, the lead frame, the lead frame with resin, the optical semiconductor device, and the manufacturing method and operation of the lead frame are not limited to those described in the embodiments and examples of the present invention, and various modifications can be made. .

DESCRIPTION OF SYMBOLS 10 Die pad part surface plating layer 10a Optical semiconductor element mounting part 11 Die pad part roughening Ni plating layer 12 Die pad part smooth Ni plating layer 13 Die pad part Ag plating layer 14 Die pad part Au plating layer 20 Lead part surface plating layer 20a Bonding wire etc. Connection portion 21 Lead portion roughened Ni plating layer 22 Lead portion smooth Ni plating layer 23 Lead portion Ag plating layer 24 Lead portion Au plating layer 30 Die pad portion 40 Lead portion 50 Lead frame 60 Metal plate 70 Resist mask for plating 75 Etching resist Mask 100 Lead frame with resin 110 Outer resin part 111 Void part 150 Optical semiconductor device 160 Optical semiconductor element 161 Electrode of semiconductor element 170 Bonding wire 180 Sealing Resin part 200 Conventional Ni plating layer 250 Conventional Ag plating layer 300 Dimple

Claims (13)

A lead frame used in an optical semiconductor device,
A die pad portion for mounting an optical semiconductor element;
A lead portion electrically connectable to the optical semiconductor element,
A plating layer is provided on the surface of at least one of the part of the die pad part and the lead part,
The plating layer is a rough Ni plating layer made of rough plating,
A smooth Ni plating layer made of smooth Ni plating provided on the roughened Ni plating layer;
A lead frame comprising a plating layer including an Ag plating layer made of Ag plating having a glossiness of 1.3 or more on the outermost layer side. The surface roughness of the roughened Ni plating layer is 0.03 μm to 0.05 μm in Ra,
The lead frame according to claim 1, wherein the smooth Ni plating layer has a surface roughness Ra of less than 0.03 μm. The roughness of the roughened Ni plating layer is 1.2 to 1.5,
The lead frame according to claim 1 or 2, wherein the smooth Ni plating layer has a glossiness of 1.5 to 1.7. The plating thickness of the rough Ni plating layer is 0.05 μm to 0.2 μm,
The lead frame according to any one of claims 1 to 3, wherein a plating thickness of the smooth Ni plating layer is 1.0 µm or more.   The lead frame according to any one of claims 1 to 4, wherein an Au plating layer is formed between the smooth Ni plating layer and the Ag plating layer.   The lead frame according to claim 5, wherein a Pd plating layer is formed between the smooth Ni plating layer and the Au plating layer. A lead frame according to any one of claims 1 to 6, comprising:
A lead frame with a resin, comprising: a die pad portion on which an optical semiconductor element is mounted; and an outer resin portion that covers a surface of a lead portion that can be electrically connected to the optical semiconductor element. A lead frame with resin according to claim 7;
An optical semiconductor element mounted on the die pad portion, and a connection body in which the optical semiconductor element and the lead portion are electrically connected;
An optical semiconductor device comprising a sealing resin portion in which a region including the optical semiconductor element and the connection body and a region surrounded by the external resin are filled with a transparent resin. A method of manufacturing a lead frame used in an optical semiconductor device,
At least one surface of a part of a corresponding part of a lead part that can be electrically connected to the die pad part and the optical semiconductor element on which the optical semiconductor element is mounted,
Forming a rough Ni plating layer made of rough plating;
Forming a smooth Ni plating layer made of smooth Ni plating on the roughened Ni plating layer;
A lead frame manufacturing method in which an Ag plating layer having a glossiness of 1.3 or more is formed on the outermost layer side.   After forming the rough Ni plating layer, the smooth Ni plating layer, and the Ag plating layer on the surface of at least one of the corresponding portions of the die pad portion and the lead portion, the die pad portion The lead frame manufacturing method according to claim 9, wherein the lead portion is formed.   After forming the die pad portion and the lead portion, the rough Ni plating layer, the smooth Ni plating layer, and the Ag plating layer are formed on at least one of the surfaces of the die pad portion and the lead portion. The manufacturing method of the lead frame of Claim 9 which forms. The surface roughness of the roughened Ni plating layer is 0.03 μm to 0.05 μm in Ra,
The lead frame manufacturing method according to claim 9, wherein a surface roughness of the smooth Ni plating layer is less than 0.03 μm in Ra. The plating bath in forming the roughened Ni plating layer is a sulfamic acid bath that does not use a brightener, and the current density is 3 to 10 A / dm ² .
The lead frame manufacturing method according to claim 12, wherein a plating bath used to form the smooth Ni plating layer is a sulfamic acid bath using a brightener, and a current density is 3 to 10 A / dm ² .