JP2018005160A - Display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a highly reliable flexible organic EL display device in which less display defect is generated when the display device is broken by the deformation of a display area of the display device.SOLUTION: A display device including a first sub-pixel and a second sub-pixel adjacent to the first sub-pixel is provided. The first sub-pixel and the second sub-pixel have a semiconductor film, a gate electrode, a gate insulation film, an interlayer insulation film, a flattened film, and further a light-emitting element positioned on the flattened film. The display device includes a groove penetrating a barrier positioned between the first sub-pixel and the second sub-pixel and the flattened film.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a display device, for example, a flexible EL display device.

  Typical examples of the display device include a liquid crystal display device having a liquid crystal element and a light emitting element in each pixel, an organic EL (Electroluminescence) display device, and the like. These display devices each have a display element such as a liquid crystal element or an organic light emitting element (hereinafter referred to as a light emitting element) in each of a plurality of pixels formed on a substrate. A liquid crystal element or a light-emitting element has a layer containing a liquid crystal or an organic compound between a pair of electrodes, and is driven by applying a voltage or supplying a current between the pair of electrodes.

  Each pixel of the display device includes a semiconductor element such as a transistor, and driving of the liquid crystal element and the light emitting element is controlled by the transistor. By using such a so-called active matrix type display device, high-definition display is possible. For example, Patent Document 1 discloses an active matrix type organic EL display device including a plurality of pixels each having a light emitting element and a transistor having different emission colors.

JP 2012-216338 A

  An object of the present invention is to provide a display device having high reliability, for example, a flexible organic EL display device. Alternatively, it is an object of the present invention to provide a highly reliable flexible organic EL display device in which the display device is prevented from being damaged when a display area of the display device is deformed and display defects are prevented. . Alternatively, it is an object to provide an organic EL display device or a flexible organic EL display device in which deterioration in display quality is suppressed.

  A display device according to an embodiment of the present invention is located at a boundary between a first subpixel, a second subpixel adjacent to the first subpixel, and the first subpixel and the second subpixel. The first subpixel and the second subpixel each include a partition, a semiconductor film, a gate electrode, a thin film transistor including a source electrode and a drain electrode electrically connected to the semiconductor film, a semiconductor film, and a gate electrode Between the gate insulating film, the semiconductor film, the gate electrode, the gate insulating film, the interlayer insulating film positioned under the source electrode and the drain electrode, and the source electrode and the drain electrode. And a light-emitting element that is provided on the planarization film and includes an EL layer between the first electrode and the second electrode, and an end portion of the first electrode is covered with a partition wall. A part of the second electrode is located on the partition wall, and the first sub-pixel and the second sub-image An overlapping region in which the planarizing film and the partition overlap each other in plan view is located between the element and the trench, and a groove penetrating the planarizing film and the partition is positioned in the overlapping region, and the EL layer is It is characterized by being in contact with the interlayer insulating film through the groove.

  A display device according to an embodiment of the present invention includes a first pixel, a second pixel adjacent to the first pixel, and a partition located at a boundary between the first pixel and the second pixel, The first pixel and the second pixel both have a first sub-pixel, and the first sub-pixel of the first pixel and the second pixel are both a semiconductor film, a gate electrode, a semiconductor film, Thin film transistor having a source electrode and a drain electrode connected to each other, a gate insulating film between the semiconductor film and the gate electrode, and the source electrode and the drain located on the semiconductor film, the gate electrode, and the gate insulating film An interlayer insulating film located under the electrode, a planarization film located over the source electrode and the drain electrode, and an EL layer located over the planarization film and between the first electrode and the second electrode The end of the first electrode is covered with a partition wall, and the second electrode A part of the electrode is located on the partition wall, and an overlapping region in which the planarization film and the partition wall overlap each other in plan view is positioned between the first pixel and the second pixel. In the region, a groove that penetrates the partition and reaches at least a part of the planarization film is located, and the EL layer is in contact with the bottom surface of the groove.

1 is a schematic top view of a display device according to an embodiment. 1 is a schematic top view of a display device according to an embodiment. 1 is a schematic top view of a display device according to an embodiment. 1 is a schematic cross-sectional view of a display device according to an embodiment. 1 is a schematic cross-sectional view of a display device according to an embodiment. 1 is a schematic cross-sectional view of a display device according to an embodiment. 1 is a schematic cross-sectional view of a display device according to an embodiment. 1 is a schematic top view of a display device according to an embodiment. 1 is a schematic cross-sectional view of a display device according to an embodiment. 1 is a schematic cross-sectional view of a display device according to an embodiment. 1 is a schematic cross-sectional view of a display device according to an embodiment. 1 is a schematic cross-sectional view of a display device according to an embodiment. 1 is a schematic top view of a display device according to an embodiment. 1 is a schematic cross-sectional view of a display device according to an embodiment. 1 is a schematic top view of a display device according to an embodiment. 1 is a schematic top view of a display device according to an embodiment. 1 is a schematic top view of a display device according to an embodiment. 1 is a schematic top view of a display device according to an embodiment. 1 is a schematic top view of a display device according to an embodiment. 1 is a schematic cross-sectional view of a display device according to an embodiment. 1 is a schematic cross-sectional view of a display device according to an embodiment. 1 is a schematic top view of a display device according to an embodiment. FIG. 6 is a schematic diagram illustrating a method for manufacturing a display device according to one embodiment. FIG. 6 is a schematic diagram illustrating a method for manufacturing a display device according to one embodiment. FIG. 6 is a schematic diagram illustrating a method for manufacturing a display device according to one embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in various modes without departing from the gist thereof, and is not construed as being limited to the description of the embodiments exemplified below.

  In order to make the explanation clearer, the drawings may be schematically represented with respect to the width, thickness, shape, and the like of each part as compared to the actual embodiment, but are merely examples and limit the interpretation of the present invention. Not what you want. In this specification and each drawing, elements having the same functions as those described with reference to the previous drawings may be denoted by the same reference numerals, and redundant description may be omitted.

  In the present invention, when a plurality of films are formed by processing a certain film, the plurality of films may have different functions and roles. However, the plurality of films are derived from films formed as the same layer in the same process, and have the same layer structure and the same material. Therefore, these plural films are defined as existing in the same layer.

(First embodiment)
In this embodiment, a display device according to an embodiment of the present invention will be described with reference to FIGS.

  A top view of the display device 100 according to the present embodiment is shown in FIG. The display device 100 includes a display region 104 including a plurality of pixels 108 and a gate side driving circuit (hereinafter referred to as a driving circuit) 110 on one surface (upper surface) of the base material 102. A plurality of sub-pixels 106 included in one pixel 108 can be provided with light-emitting elements having different emission colors, whereby full color display can be performed. For example, light emitting elements that emit red, green, or blue light can be provided in the three sub-pixels 106, respectively. Alternatively, white light emitting elements may be used for all the subpixels 106, and red, green, or blue may be extracted for each subpixel 106 using a color filter to perform full color display. The color finally extracted is not limited to a combination of red, green, and blue. For example, one pixel 108 may be configured to include four subpixels 106, and four types of colors of red, green, blue, and white can be extracted from the four subpixels 106. The arrangement of the sub-pixels 106 is not limited, and a stripe arrangement, a delta arrangement, a mosaic arrangement, or the like can be adopted.

  The wiring 112 extends from the display region 104 toward the side surface of the base material 102 (in FIG. 1, the short side of the display device 100), the wiring 112 is exposed at the end of the base material 102, and the exposed portion is connected to the terminal 114. Form. The terminal 114 is connected to a connector (not shown) such as a flexible printed circuit (FPC). The display area 104 is also electrically connected to the IC chip 116 through the wiring 112. As a result, a video signal supplied from an external circuit (not shown) is applied to the subpixel 106 via the drive circuit 110 and the IC chip 116 to control the light emission of the subpixel 106, and the video is displayed on the display area 104. It is reproduced. Although not shown, the display device 100 may have a source side driver circuit around the display area 104 instead of the IC chip 116. In this embodiment, two drive circuits 110 are provided so as to sandwich the display region 104, but one drive circuit 110 may be provided. Alternatively, the drive circuit 110 provided on a different substrate may be formed on the connector without providing the drive circuit 110 on the base material 102.

  The base material 102 has a function of supporting the display region 104, the drive circuit 110, and the like provided thereon. By using the flexible base material 102, flexibility can be imparted to the entire display device 100, and the display device 100 can be deformed by being bent or curved. In this case, the base material 102 may be called a base film. The base material 102 can include a polymer material such as polyimide, polyester, polyamide, or acrylic resin. Preferably, a polymer material having chemical resistance and physical strength to a process when forming a layer (described later) provided on the base material 102, such as polyimide or polyamide, is used.

  FIG. 2A shows a schematic diagram of the display area. The pitch L1 of the subpixels 106 is preferably 20 μm or more and 80 μm or less, or 30 μm or more and 50 μm or less. The distance L2 between the adjacent sub-pixels 106 is preferably 5 μm or more and 30 μm or less, or 5 μm or more and 20 μm or less, and typically about 10 μm.

  The display device 100 shown in this embodiment includes a groove 180 between adjacent pixels 108. In the structure shown in FIG. 2A, the groove 180 extends in the vertical direction and the horizontal direction, that is, in the long side direction and the short side direction of the display device 100. Moreover, the groove | channel 180 extended in the vertical direction and the horizontal direction cross | intersects. In the present embodiment, one pixel 108 is included in the minimum area defined by the grooves 180 that intersect each other. However, the embodiment of the present invention is not limited to this structure, and a plurality of pixels 108 may be included in the minimum area defined by the grooves 180 intersecting each other. This structure will be described in Embodiment 4.

  The distance between the adjacent sub-pixels 106 may be different between a region where the groove 180 exists and a region where the groove 180 does not exist. For example, as shown in FIG. 2B, the distance L2 between the adjacent subpixels 106 in one pixel 108 may be smaller than the distance L3 between the adjacent subpixels 106 through the groove 180.

  FIG. 3 shows an enlarged schematic diagram of the pixel 108. As shown in FIG. 3, the display device 100 exemplified in this embodiment includes three subpixels 106 in one pixel 108. The pixel 108 includes a signal line 120, a current supply line 122, and a gate line 124. Although not shown, the pixel 108 may have a wiring other than the signal line 120, the current supply line 122, and the gate line 124.

  Each subpixel 106 is provided with two transistors including semiconductor films 126 and 136. The protruding portion of the gate line 124 (portion protruding downward in the figure) functions as the gate 128 of the transistor including the semiconductor film 126, and the protruding portion of the signal line 120 (portion protruding leftward in the drawing) is the same. It functions as the source 130 of the transistor. A signal supplied from the signal line 120 is transmitted to the drain 132 through the semiconductor film 126. The drain 132 is connected to the first capacitor electrode 134 via a contact (dotted circle in the drawing), and a part of the first capacitor electrode 134 (portion protruding downward in the drawing) is a semiconductor film. It functions as the gate 138 of the transistor including 136. The source 140 of the transistor is a convex portion of the current supply line 122 (a portion protruding in the right direction in the figure), and the drain 142 also functions as the second capacitor electrode 160 facing the first capacitor electrode 134. . The drain 142 is electrically connected to the first electrode 144 which is one electrode of the light emitting element through the contact. In order to facilitate understanding, the first electrode 144 is not illustrated in some of the subpixels 106. In the present embodiment, the sub-pixel 106 having two transistors and one point is taken as an example, but the sub-pixel 106 may further include a transistor or a capacitor.

  As shown in FIG. 3, in the pixel 108, one of the three signal lines 120 is electrically connected to a pixel circuit included in one corresponding subpixel 106 among the three subpixels 106. On the other hand, the gate line 124 is electrically connected to each of the pixel circuits included in the three subpixels 106.

  The display device 100 according to the present embodiment has a groove 180 between the adjacent pixels 108. For example, as shown in FIG. 3, a groove 180 is provided between the signal line 120 of one subpixel 106 in the pixel 108 and the current supply line 122 of one subpixel in the adjacent pixel 108. In addition, a groove 180 is provided between two adjacent gate lines 124. The groove 180 extends in a direction parallel to the signal line 120, that is, a direction perpendicular to the gate line 124, and intersects the gate line 124. Similarly, the groove 180 extends in a direction perpendicular to the signal line 120, that is, a direction parallel to the gate line 124, and intersects the signal line 120 and the current supply line 122.

  FIG. 4 shows a schematic diagram of a cross section taken along the chain line AB in FIG. The light emitting device 100 has an undercoat 150 on the substrate 102. The undercoat 150 is a film having a function of preventing impurities from diffusing from the base material 102 to the semiconductor films 126 and 136.

  The display device 100 further includes a gate insulating film 152 on the undercoat 150. As will be described later, the gate insulating film 152 extends to the transistor in the subpixel 106 and overlaps the gate 128. A first capacitor electrode 134 is provided on the gate insulating film 152. As will be described later, the first capacitor electrode 134 is provided in the same layer as the gate line 124 and has the same configuration.

  A first interlayer insulating film 156 and a second interlayer insulating film 158 are provided on the first capacitor electrode 134. As will be described later, these layers are provided over the gates 128 and 138 of the transistors in the sub-pixel 106 and have a function of protecting the transistors. For example, a layer containing silicon nitride can be used as the first interlayer insulating film 156, and a layer containing silicon oxide can be used as the second interlayer insulating film 158. In this case, the gate insulating film 152 is preferably a layer containing silicon oxide. This is because these films have a high barrier property, and high adhesion can be obtained between adjacent layers, and foreign matters are hardly generated during processing. Note that the first interlayer insulating film 156 and the second interlayer insulating film 158 function as a dielectric film of a capacitor.

  On the second interlayer insulating film 158, the signal line 120, the current supply line 122, and the second capacitor electrode 160 are provided. These layers can be in the same layer.

  The display device 100 further includes a planarization film 162. The planarization film 162 has a function of absorbing unevenness caused by each layer formed below and providing a flat surface. A first electrode 144 of the light emitting element is provided over the planarization film 162.

  A partition wall 164 is provided on the first electrode 144 so as to cover an end portion of the first electrode 144. The partition wall 164 has a function of preventing the EL layer 166 and the passivation film 170 (also referred to as a sealing film) formed thereon from being damaged by unevenness caused by the first electrode 144. Note that in this specification and claims, an EL layer is a layer that constitutes an EL element and indicates the entire layer sandwiched between a pair of electrodes. When carriers are injected from the pair of electrodes, recombination occurs in the EL layer, and light emission from an excited state generated thereby is given to the visible light region.

  As shown in FIG. 4, an opening reaching the second interlayer insulating film 158 is provided in the planarization film 162 and the partition 164, and this corresponds to the groove 180. The width W of the groove corresponds to the width of the opening on the upper surface of the partition wall 164, and is preferably 0.5 μm to 5 μm, 1 μm to 3 μm, or 2 μm to 3 μm. In the display device 100 illustrated in FIG. 4, the side surface of the groove 180 provided by the partition 164 and the side surface of the groove 180 provided by the planarization film 162 are on the same plane. In FIG. 4, the side surface of the groove 180 is inclined with respect to both the upper surface and the normal line of the base material 102, but may be parallel to the normal line of the base material 102. Specifically, as shown in FIG. 5A, the partition wall of the groove 180 may be parallel to the normal line of the substrate 102. In this case, the bottom area of the groove 180 is substantially the same as the opening area of the partition 164. On the other hand, as shown in FIG. 5B, the side wall of the groove 180 may have a step. In this case, the opening area of the upper surface of the planarizing film 162 is smaller than the bottom area of the partition 164 in the groove 180. Alternatively, as illustrated in FIG. 5C, the groove 180 may have a structure in which the partition wall 164 covers the side surface of the opening of the planarization film 162. In this case, part of the partition 164 is in contact with the second interlayer insulating film 158.

  Referring to FIG. 4, the display device 100 further includes an EL layer 166 and a second electrode 168 on the first electrode 144 and the partition 164. The first electrode 144, the EL layer 166, and the second electrode 168 form a light-emitting element. The EL layer 166 is in contact with the second interlayer insulating film 158 in the groove 180.

  In FIG. 4, the EL layer 166 is drawn to have a single-layer structure; however, the EL layer 166 may have a structure in which a plurality of layers containing different materials are stacked. For example, a charge injection layer, a charge transport layer, a light emitting layer, a charge blocking layer, and the like can be appropriately stacked.

  FIG. 6 is an enlarged view of a part of FIG. When obtaining different emission colors between adjacent subpixels 106, the layers 166_1 and 166_4 other than the light emitting layers 166_2 and 166_3 are shared by the adjacent subpixel 106 and the groove 180 as a common layer, as shown in FIG. What is necessary is just to form. Examples of the layers 166_1 and 166_4 include a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer. The adjacent sub-pixels 106 are provided with different light-emitting layers 166_2 and 166_3, respectively, and the light-emitting layers 166_2 and 166_3 are sandwiched between the layers 166_1 and 166_4. When the EL layer 166 is formed in this manner, the layer in contact with the second interlayer insulating film 158 in the groove 180 is the layer 166_1. Therefore, the structure of the EL layer 166 in the groove 180 is different from the structure of the EL layer 166 in each subpixel 106. The second electrode 168 can have a structure similar to that of the first electrode 144.

  Referring to FIG. 4, a passivation film 170 having a function of protecting the light emitting element is provided on the second electrode 168.

  Although not shown, a color filter, a light-shielding film, a substrate facing the base material 102 (opposing substrate), or the like may be further provided over the second electrode 168 or the passivation film 170 as an arbitrary configuration. In the case where a counter substrate is provided, an organic resin may be filled as a filler between the base material 102 and the counter substrate, or an inert gas may be filled. When the filler is provided, the filler is also contained in the groove 180. Note that a dotted line 182 in FIG. 4 is a center line, and indicates a position at a half of the thickness of the display device 100. Here, an intermediate position between the bottom surface of the substrate 102 and the top surface of the passivation film 170 is shown. In the embodiment of the present invention, as shown in FIG. 4, the base line 102 and the partition 164 are arranged so that the center line 182 coincides with or approaches the bottom surface of the groove 180 (that is, the upper surface of the second interlayer insulating film 162). The thickness of each layer such as the planarization film 162 is preferably adjusted.

  FIG. 7 shows a schematic cross-sectional view along the groove 180, that is, a cross-sectional view along the chain line CD shown in FIG. As shown in FIG. 7, in the region where the groove 180 exists, the undercoat 150, the gate insulating film 152, the gate line 124, the first interlayer insulating film 156, the second interlayer insulating film 158, An EL layer 166, a second electrode 168, and a passivation film 170 are provided in this order. Accordingly, the planarization film 162 and the partition 164 are not provided in the groove 180, and the second interlayer insulating film 158 and the EL layer 166 are in contact with each other.

  FIG. 8 shows two adjacent sub-pixels 106 provided so as to sandwich the gate line 124. FIG. 9 shows a cross-sectional view along the broken line EF in this figure. In FIG. 8, the first electrode 144 of one subpixel 106 is not shown.

  As shown in FIG. 9, the subpixel 106 includes a transistor, and the transistor includes a semiconductor film 126, a gate insulating film 152, and a gate 128. The subpixel 106 further includes a first interlayer insulating film 156 and a second interlayer insulating film 158 over the transistor, and a source 130 and a drain 132 are provided thereon. The source 130 and the drain 132 are electrically connected to the semiconductor film 126 through contacts provided in the first interlayer insulating film 156, the second interlayer insulating film 158, and the gate insulating film 152. Note that although a top-gate transistor is illustrated in FIG. 9, the transistor may be a bottom-gate transistor. Either an N-channel transistor or a P-channel transistor may be used.

  FIG. 10 shows a cross-sectional view along the signal line 120, that is, a cross-sectional view along the chain line GH in FIG. As shown in FIG. 10, the display device 100 has an undercoat 150, a gate insulating film 152, a gate line 124, a first interlayer insulating film 156, and a second interlayer insulating film 158 in this order on a base material 102. doing. The signal line 120 is provided on the second interlayer insulating film 158.

  The groove 180 shown in FIG. 8 extends in a direction parallel to the gate line 124 and intersects with the signal line 120 and the current supply line 122. In a region where the groove 180 overlaps, that is, a region where the groove 180 and the signal line 120 intersect, the signal line 120 is physically divided, and the divided signal lines 120 can be electrically connected to each other through the connection electrode 148. it can. The same applies to the current supply line 122, and the current supply line 122 is divided in a region overlapping with the groove 180, and the divided current supply lines 122 can be electrically connected to each other through the connection electrode 148. FIG. 10A shows a schematic cross-sectional view along the chain line GH in FIG. As shown in FIG. 10A, the connection electrode 148 can be provided between the first interlayer insulating film 156 and the second interlayer insulating film 158, for example, and is provided in the second interlayer insulating film 158. Through the contact, the divided signal line 120 and the connection electrode 148 can be electrically connected. In this case, the upper surface of the connection electrode 148 is covered with the second interlayer insulating film 158.

  On the other hand, as shown in FIG. 10B, the connection electrode 148 may exist in the same layer as the gate line 124. That is, both the gate line 124 and the connection electrode 148 may be formed so as to be sandwiched between the gate insulating film 152 and the first interlayer insulating film 156. At this time, the divided signal line 120 is connected to the connection electrode 148 through an opening provided in the first interlayer insulating film 156 and the second interlayer insulating film 158. Note that the signal line 120 and the current supply line 122 are not necessarily divided, and may be continuous over the two subpixels 106 sandwiching the groove 180.

  The groove 180 is formed by performing an etching process on the partition wall 164 and the planarization film 162 simultaneously or separately. In the case where the signal line 120 is not divided, the signal line 120 may be exposed to an etchant in the etching process, and the surface of the signal line 120 may be oxidized. However, by forming the connection electrode 148 and covering the upper surface thereof with the first interlayer insulating film 156 and / or the second interlayer insulating film 158, the signal line 120 can be prevented from being exposed to the etchant in the etching process. it can. In addition, direct contact between the signal line 120 and the EL layer 166 can be prevented.

  As described above, the display device 100 can be provided with flexibility by using the flexible base material 102. In this case, when the display device 100 is deformed by bending or bending, stress is applied to elements such as a light emitting element, a transistor, and a capacitor provided in the sub-pixel 106. When a large stress is applied to the sub-pixel 106, an interface with low adhesion, for example, an interface between the EL layer 166 and the first electrode 144, an interface between the EL layer 166 and the second electrode 168, or the second electrode 168 and the passivation film. Separation occurs at the interface of 170 and the like, which causes destruction of the light emitting element. In addition, peeling occurs at the interface between the layers constituting the transistor and the capacitor, or cracks are generated in these layers.

  However, by forming the groove 180 described above, even if the display device 100 is deformed, the groove 180 can be mainly responsible for deformation, and the deformation amount of the sub-pixel 106 itself can be reduced. Specifically, as shown in FIG. 11, when the display device 100 is curved so that the upper surface of the base material 102 on which the display region 104 is provided is located outside the lower surface, the region where the groove 180 exists is relatively Since the thickness is small, the opening of the groove 180 is widened. That is, although the shape of the groove 180 changes with the deformation of the display device 100, the deformation of the pixel 108 including the light emitting element, the transistor, and the like is suppressed. Accordingly, stress on the light emitting element and the transistor is reduced, and as a result, the reliability of the display device 100 can be improved.

As shown in FIGS. 4 and 6, when adjacent pixels 108 or sub-pixels 106 share the EL layer 166 or a part thereof, the inside of the EL layer 166 is in the horizontal direction (direction parallel to the surface of the substrate 102). Current may flow, and the current injected into one subpixel 106 may flow to the adjacent subpixel 106. This phenomenon is called crosstalk, and is a problem that cannot be ignored when the EL layer 166 includes a layer having relatively high conductivity and the distance between the sub-pixels 106 is small. However, the formation of the groove 180 increases the distance of the EL layer 166 between the subpixels 106 that are adjacent to each other through the groove 180. Therefore, the lateral resistance of the EL layer 166 is increased, and crosstalk can be effectively suppressed. As a result, it is possible to prevent the quality of the video reproduced in the display area 104 from being deteriorated.
(Second Embodiment)

  In this embodiment, a display device according to an embodiment of the present invention will be described with reference to FIG. A description of the same configuration as in the first embodiment may be omitted.

  A schematic cross-sectional view of the display device 200 of the present embodiment is shown in FIG. In addition, this cross-sectional schematic diagram is corresponded in the cross section along the dashed-dotted line AB of FIG. As shown in FIG. 12, in the display device 200 of this embodiment, a part of the planarization film 162 exists under the groove 180. Therefore, the EL layer 166 is in contact with the bottom surface of the trench 180, that is, the planarization film 162, and the thickness of the planarization film 162 in the trench 180 is smaller than that in the subpixel 106. Such a configuration can be formed by appropriately controlling the conditions of the etching process for forming the groove 180. Alternatively, the planarization film 162 can be formed by stacking two layers having different etching rates.

  In such a configuration, the signal line 120 and the current supply line 122 are not exposed when the groove 180 is formed, and oxidation of the surface is prevented without forming the connection electrode 148 described in the first embodiment. be able to. Further, when the thickness of the base material 102 is small and the center line 182 is located closer to the light emitting element, it is effective as a technique for bringing the bottom surface of the groove 180 closer to the center line 182.

(Third embodiment)
In the present embodiment, a display device according to an embodiment of the present invention will be described with reference to FIGS. The description of the same configuration as in the first and second embodiments may be omitted.

  FIG. 13 shows a top view of the display device 300 of the present embodiment. Similar to the first embodiment, in this embodiment, an example in which the pixel 108 includes three subpixels 106 will be described. In the display device 300, the gate line 124 is divided in a region intersecting with the groove 180, and the two divided gate lines 124 are electrically connected to each other through the connection electrode 146.

  More specifically, as shown in a schematic cross-sectional view (FIG. 14) along the chain line IJ in FIG. 13, the gate line 124 provided on the undercoat 150 and the gate insulating film 152 intersects with the groove 180. It is divided in the area to do. A first interlayer insulating film 156 is provided on the divided gate line 124, and the first interlayer insulating film 156 has an opening that exposes the gate line 124. A connection electrode 146 is provided on the first interlayer insulating film 156, and the two gate lines 124 separated through the opening are electrically connected to each other. A second interlayer insulating film 158 is provided on the connection electrode 146, and the signal line 120 and the current supply line 122 are provided thereon. In such a configuration, by controlling the thickness of the connection electrode 146, the center line 182 can coincide with or be close to the bottom surface of the groove 180, and higher resistance to deformation of the display device can be provided. Can do.

(Fourth embodiment)
In this embodiment, a display device according to an embodiment of the present invention will be described with reference to FIGS. The description of the same configuration as in the first to third embodiments may be omitted.

  In the display device 100 of the first embodiment, one pixel 108 having a plurality of sub-pixels 106 is included in the minimum area defined by the grooves 180 that intersect with each other (see FIG. 2). On the other hand, as shown in FIG. 15, the display device of this embodiment has one subpixel 106 in the minimum area defined by the grooves 180 that intersect each other. By adopting such a configuration, when the display device is deformed, the contribution of the portion responsible for the deformation increases, so that it is possible to provide a display device that is more easily deformed and has higher resistance to deformation. . In addition, all the subpixels 106 have the groove 180 between the adjacent subpixels 106, and crosstalk can be more effectively suppressed.

  Alternatively, as illustrated in FIG. 16, the display device according to the present embodiment may include a plurality of pixels 108 in a minimum area defined by grooves 180 that intersect each other. Further, the number of pixels 108 included in the minimum area may be different. That is, the groove 180 may surround the plurality of pixels 108, the plurality of sub-pixels 106, or may be divided into islands. Or as shown in FIG. 17, you may provide the groove | channel 180 so that it may not mutually cross | intersect and may extend only to one direction. In FIG. 17, the groove 180 is provided only in a direction parallel to the gate line 124, and no groove parallel to the signal line 120 is provided. Alternatively, as illustrated in FIG. 18, the display device may have a structure in which the number of grooves 180 included in one display region 104 is several (for example, 1 to 10).

  By adopting such a configuration, the flexibility of the entire display device can be adjusted, and the flexibility can be appropriately adjusted depending on the direction and place of deformation.

(Fifth embodiment)
In this embodiment, a display device according to an embodiment of the present invention will be described with reference to FIGS. The description of the same configuration as in the first to fourth embodiments may be omitted.

  FIG. 19 shows a top view of the display device 400 of this embodiment. In the display device 100 of the first embodiment, the groove 180 extends in both directions parallel to and perpendicular to the gate line 124, and intersects the gate line 124 and the signal line 120. On the other hand, in the display device 400 of the present embodiment, as shown in FIG. 19, although the groove 180 extends in both directions parallel to and perpendicular to the gate line 124, the gate line 124 and the signal line 120 Do not cross. That is, the groove 180 is divided in a region overlapping with the gate line 124 and the signal line 120. More specifically, the display device 400 extends in a direction parallel to the gate line 124 and does not intersect the signal line 120, and extends in a direction perpendicular to the gate line 124, and the gate line 124. A groove 186 that does not intersect with the groove 186. Note that in FIG. 19, the first electrode 144 is not illustrated in some of the subpixels 106 in order to facilitate understanding.

  This configuration will be described in detail with reference to schematic cross-sectional views (FIGS. 20 and 21) taken along chain lines KL and MN in FIG. As shown in FIG. 20, in the region where the groove 186 is provided, the display device 400 includes the base material 102, an undercoat 150, a gate insulating film 152, a gate line 124, a first interlayer insulating film 156, A second interlayer insulating film 158, a planarizing film 162, and a partition 164 are provided in this order. Between the two gate lines 124, the planarization film 162 and the partition 164 have openings, which correspond to the grooves 186. In the groove 186, the EL layer 166 is in contact with the second interlayer insulating film 158, and the second electrode 168 of the light emitting element and the passivation film 170 are provided over the EL layer 166.

  Referring to FIG. 21, in the region where the groove 184 is provided, the display device 400 includes the base material 102, the undercoat 150, the gate insulating film 152, the first interlayer insulating film 156, and the second interlayer insulating film provided thereon. A film 158, a signal line 120, a current supply line 122, a planarization film 162, and a partition 164 are provided in this order. Between the signal line 120 and the current supply line 122, the planarization film 162 and the partition 164 have openings, and these openings correspond to the grooves 184. In the groove 184, the EL layer 166 is in contact with the second interlayer insulating film 158, and the second electrode 168 of the light emitting element and the passivation film 170 are provided over the EL layer 166.

  The second electrode 168 of the light-emitting element is provided over the entire surface of the display region 104 and is shared by each subpixel 106. Therefore, when the resistance of the second electrode 168 is relatively high, for example, when the second electrode 168 includes a light-transmitting conductive oxide, the resistance of the second electrode 168 is increased when the area of the display region 104 is large. As a result, the voltage drop due to the above becomes remarkable, and the light emission luminance becomes uneven. In the display device 100 of the first embodiment, since the conductive route provided by the second electrode 168 passes through the groove 180, the conductive route is longer than when the groove 180 is not provided, and the voltage drop becomes more remarkable. However, by using the structure of the display device 400, a conductive route (for example, the region 190 in FIG. 19) that does not pass through the grooves 184 and 186 can be secured between the adjacent sub-pixels 106. That is, a shorter conductive route exists in the region where the grooves 184 and 186 are not provided. Therefore, a voltage drop due to the resistance of the second electrode 168 can be reduced, and unevenness in luminance can be reduced.

(Sixth embodiment)
In this embodiment, a method for manufacturing the display device 100 described in the first embodiment will be described with reference to FIGS. FIG. 22 is a top view showing one sub-pixel 106 of the pixel 108 shown in FIG. 23 to 25 are cross-sectional views taken along chain lines OP and QR in FIG.

  As shown in FIG. 23A, an undercoat 150 is formed on the base material 102, and a semiconductor film 126 is formed thereon. For the base material 102, for example, a material having a relatively high physical strength such as glass, quartz, or metal can be used. In order to impart flexibility to the display device 100, a polymer material such as polyimide, polyamide, acrylic resin, polycarbonate, polyester, or the like may be used, and a film thickness with flexibility may be selected.

  The undercoat 150 can be formed by using an inorganic compound such as silicon nitride, silicon oxide, silicon nitride oxide, or silicon oxynitride and applying a chemical vapor deposition method (CVD), a sputtering method, or the like.

  The semiconductor film 126 may be formed using a material exhibiting semiconductor characteristics such as silicon, germanium, or an indium oxide semiconductor by a CVD method, a sputtering method, or the like. There is no particular limitation on the crystallinity of the semiconductor film 126, and the semiconductor film 126 can have a morphology such as single crystal, polycrystal, microcrystal, or amorphous.

  Next, a gate insulating film 152 is formed over the semiconductor film 126, and a gate 128 is formed thereover (FIG. 23B). The gate insulating film 152 can also be formed using the same material and formation method as the undercoat 150, and preferably contains silicon oxide. Each of the undercoat 150 and the gate insulating film 152 may have a single layer structure, or may have a stacked structure including a plurality of layers. The gate 128 can be formed of a single layer or a stacked layer of a metal such as titanium, aluminum, copper, molybdenum, tungsten, or tantalum or an alloy thereof. For example, a laminated structure in which aluminum or copper is sandwiched between titanium or molybdenum can be employed. Examples of the forming method include a sputtering method, a CVD method, and a printing method. As shown in FIG. 22, simultaneously with the formation of the gate 128, not only the gate line 124 but also the first capacitor electrode 134 is formed.

  After the gate 128 is formed, a first interlayer insulating film 156 is formed. The first interlayer insulating film 156 can be formed using the same material and formation method as the undercoat 150, and preferably contains silicon nitride.

  Next, the connection electrode 148 is formed over the first interlayer insulating film 156. The connection electrode 148 can be formed using a material that can be used for the gate 128 and applying a CVD method or a sputtering method. The connection electrode 148 may have either a single layer structure or a stacked structure.

  A second interlayer insulating film 158 is formed over the connection electrode 148, and an opening is formed in a region overlapping with the connection electrode 148 by etching (FIG. 23C). The second interlayer insulating film 158 can also be formed using the same material and formation method as the undercoat 150, and preferably contains silicon oxide.

  Next, the source 130, the drain 132, and the signal line 120 are formed (FIG. 24A). These wirings can be formed by a CVD method or a sputtering method using a material that can be used for the gate 128. As shown in FIG. 22, the second capacitor electrode 160 and the current supply line 122 are formed simultaneously with the source 130, the drain 132, and the signal line 120.

  Next, a planarization film 162 is formed so as to cover the source 130, the drain 132, and the signal line 120 (FIG. 24A). The planarization film 162 preferably contains a polymer material such as acrylic resin, polyester, polyamide, polyimide, or polysiloxane. The planarization film 162 can be formed by a wet film formation method such as a spin coating method, an inkjet method, or a printing method. By the formation of the planarization film 162, unevenness caused by the transistor and the connection electrode 148 can be absorbed and a flat surface can be provided.

  Although not shown, the first electrode 144 of the light emitting element is formed over the planarization film 162. In the case where light emitted from the light-emitting element is extracted from the base material 102, the first electrode 144 may be formed using, for example, a light-transmitting oxide so that visible light can be transmitted. Examples of the light-transmitting oxide include indium-tin oxide (ITO) and indium-zinc oxide (IZO). Examples of the forming method include sputtering. On the other hand, when light emitted from the light-emitting element is extracted in a direction opposite to the base material 102, a metal with high reflectivity can be used for the first electrode 144 so that visible light can be reflected. Specific examples include silver and aluminum. Alternatively, a light-transmitting oxide may be stacked over a highly reflective metal. Note that an opening reaching the drain 132 of the transistor is formed in the planarization film 162 before the first electrode 144 is formed.

  Next, a partition 164 is formed (FIG. 24B). The partition 164 can be manufactured using a material that can be used for the planarization film 162 and applying the above-described wet deposition method. Preferably, the planarization film 162 and the partition 164 are formed to contain the same material.

  Next, the partition 164 and the planarization film 162 are etched to form openings so as to expose the second interlayer insulating film 158 (FIG. 25A). This opening corresponds to the groove 180. The partition wall 164 and the planarization film 162 may be etched simultaneously in one process to form the groove 180, or the partition wall 164 may be etched to form an opening, and then the planarization film 162 may be etched. On the other hand, the groove 180 may be formed by performing etching under different conditions. When the groove 180 is formed in the partition 164 and the planarization film 162 at the same time in one process, the side surface of the groove 180 provided by the planarization film 162 and the side wall of 180 provided by the partition 164 are as shown in FIG. It exists on the same plane. On the other hand, when the groove 180 is formed by performing etching on the partition 164 and the planarization film 162 in different steps, a step may be formed in the groove 180 as illustrated in FIG.

  Alternatively, the planarization film 162 may be etched before the partition 164 is formed, and an opening may be formed in a region where the groove 180 is formed simultaneously with the opening reaching the drain 132. In this case, the opening provided in the planarization film 162 is once covered with the partition 164, but the groove 180 can be formed by forming the opening in the partition 164 in a region where the groove 180 is formed. it can. In this case, as shown in FIG. 5C, part of the EL layer 166 is in contact with the second interlayer insulating film 158.

  Next, an EL layer 166 and a second electrode 168 are formed (FIG. 25B). The EL layer 166 is formed so as to be in contact with the second interlayer insulating film 158 in the groove 180. As described in the first embodiment, the EL layer 166 may have the same structure in all the subpixels 106, or some of the structures (such as the light emitting layer) may be different in the adjacent subpixels 106. Also good. The second electrode 168 can be formed using a material and a method similar to those of the first electrode 144. In the case where light emission from the light-emitting element is obtained from the base material 102, a metal having high reflectivity or an alloy thereof may be used. On the other hand, in the case where light emitted from the light-emitting element is extracted in a direction opposite to the base material 102, an oxide having translucency such as ITO or IZO may be used.

  Next, a passivation film 170 for protecting the light emitting element is formed (FIG. 25B). The passivation film 170 can include, for example, an inorganic compound such as silicon nitride or silicon oxide, or a polymer material such as acrylic resin, polyimide, polyester, or polycarbonate. Specifically, a structure in which an acrylic resin is sandwiched between silicon nitride films can be employed. The acrylic resin may be formed by a vapor deposition method, an inkjet method, a lamination method, a printing method, or the like.

  Through the above process, a light-emitting device that is an embodiment of the present invention can be manufactured.

  The embodiments described above as the embodiments of the present invention can be implemented in appropriate combination as long as they do not contradict each other. Also, those in which those skilled in the art have appropriately added, deleted, or changed the design based on the display device of each embodiment, or those in which processes have been added, omitted, or changed in conditions are also included in the present invention. As long as the gist is provided, it is included in the scope of the present invention.

  In this specification, the case of an EL display device is mainly exemplified as a disclosure example. However, as another application example, an electronic paper type display having another self-luminous display device, a liquid crystal display device, an electrophoretic element, or the like. Any flat panel display device such as a device may be used. Further, the present invention can be applied without particular limitation from small to medium size.

  Of course, other operational effects that are different from the operational effects brought about by the above-described embodiments will be apparent from the description of the present specification or can be easily predicted by those skilled in the art. It is understood that this is brought about by the present invention.

  DESCRIPTION OF SYMBOLS 100: Light-emitting device, 102: Base material, 104: Display area, 106: Subpixel, 108: Pixel 110, Drive circuit: 112: Wiring, 114: Terminal, 116: IC chip, 120: Signal line, 122: Current supply 124: gate line, 126: semiconductor film, 128: wiring is gate, 128: gate, 130: source, 132: drain, 134: first capacitor electrode, 136: semiconductor film, 138: gate, 140: source 142: drain, 144: first electrode, 146: connection electrode, 148: connection electrode, 150: undercoat, 152: gate insulating film, 156: first interlayer insulating film, 158: second interlayer insulating film 160: second capacitor electrode, 162: planarization film, 164: partition wall, 166: EL layer, 166_1: layer, 166_2: light emitting layer, 166_3: light emitting layer, 16 _4: layer 168: second electrode, 170: passivation film, 180: groove, 182: center line, 184: groove, 186: groove, 200: display device, 300: display device, 400: display device

Claims (17)

A first subpixel;
A second subpixel adjacent to the first subpixel;
A partition located at a boundary between the first subpixel and the second subpixel;
The first subpixel and the second subpixel are:
A thin film transistor including a semiconductor film, a gate electrode, and a source electrode and a drain electrode electrically connected to the semiconductor film;
A gate insulating film between the semiconductor film and the gate electrode;
An interlayer insulating film located on the semiconductor film, the gate electrode, and the gate insulating film, and located below the source electrode and the drain electrode;
A planarization film located on the source electrode and the drain electrode;
A light-emitting element that is located on the planarization film and includes an EL layer between the first electrode and the second electrode;
An end of the first electrode is covered with the partition wall,
A portion of the second electrode is located on the partition;
Between the first subpixel and the second subpixel, an overlapping region in which the planarizing film and the partition wall overlap each other when viewed in plan view is located,
In the overlapping region, a groove penetrating the planarizing film and the partition is located,
The display device in which the EL layer is in contact with the interlayer insulating film through the groove. A gate line;
The gate line is electrically connected to the pixel circuit of the first subpixel and the pixel circuit of the second subpixel;
The display device according to claim 1, wherein the groove extends in a direction parallel to the gate line. A gate line;
The gate line is electrically connected to the pixel circuit of the first subpixel and the pixel circuit of the second subpixel;
The display device according to claim 1, wherein the groove extends in a direction perpendicular to the gate line. A current supply line for supplying current to the pixel circuit of the first subpixel and the pixel circuit of the second subpixel;
A signal line for supplying a video signal to the pixel circuit of the first subpixel and the pixel circuit of the second subpixel;
The display device according to claim 3, wherein the groove is located between the current supply line and the signal line. A flexible substrate;
The display device according to claim 1, wherein the first subpixel and the second subpixel are located on the flexible base material. A plurality of subpixels including the first subpixel and the second subpixel;
The display device according to claim 1, wherein the groove surrounds each of the plurality of subpixels. A plurality of subpixels including the first subpixel and the second subpixel;
The display device according to claim 1, wherein the groove surrounds a plurality of the plurality of subpixels. A first pixel;
A second pixel adjacent to the first pixel;
A partition located at a boundary between the first pixel and the second pixel;
The first pixel and the second pixel both have a first sub-pixel,
Both the first pixel and the first subpixel of the second pixel are:
A thin film transistor including a semiconductor film, a gate electrode, and a source electrode and a drain electrode electrically connected to the semiconductor film;
A gate insulating film between the semiconductor film and the gate electrode;
An interlayer insulating film located on the semiconductor film, the gate electrode, and the gate insulating film, and located below the source electrode and the drain electrode;
A planarization film located on the source electrode and the drain electrode;
A light-emitting element that is located on the planarization film and includes an EL layer between the first electrode and the second electrode;
An end of the first electrode is covered with the partition wall,
A portion of the second electrode is located on the partition;
Between the first pixel and the second pixel, an overlapping region where the planarization film and the partition wall overlap each other when seen in a plan view is located,
In the overlapping region, a groove that penetrates the partition and reaches at least a part of the planarization film is located,
The EL layer is in contact with the bottom surface of the groove.   The display device according to claim 8, wherein a thickness of the planarizing film in the trench is smaller than a thickness of the planarizing film in the first subpixel of the first pixel and the second pixel. . A gate line;
The gate line is electrically connected to a pixel circuit provided in the first pixel and a pixel circuit element provided in the second pixel;
The display device according to claim 8, wherein the groove extends in a direction perpendicular to the gate line and overlaps the gate line. A signal line;
The signal line is electrically connected to a pixel circuit provided in the first pixel and a pixel circuit element provided in the second pixel;
The display device according to claim 8, wherein the groove extends in a direction intersecting the signal line and overlaps the signal line. A signal line;
A second interlayer insulating film located on and in contact with the interlayer insulating film;
The signal line is electrically connected to a pixel circuit provided in the first pixel and a pixel circuit element provided in the second pixel;
The signal line is divided in a region overlapping with the groove,
The divided signal lines are electrically connected to each other via connection electrodes,
11. The display device according to claim 8, wherein the connection electrode is located between the interlayer insulating film and the second interlayer insulating film. A gate line,
A second interlayer insulating film located on and in contact with the interlayer insulating film;
The gate line is electrically connected to a pixel circuit provided in the first pixel and a pixel circuit element provided in the second pixel;
The gate line is divided in a region overlapping with the trench,
The divided gate lines are electrically connected to each other through a connection electrode,
The display device according to claim 8, wherein the connection electrode is located between the interlayer insulating film and the second interlayer insulating film. A gate line electrically connected to a pixel circuit provided in the first pixel and a pixel circuit element provided in the second pixel;
A signal line electrically connected to one of a pixel circuit included in the first pixel and a pixel circuit element included in the second pixel;
The display device according to claim 8, wherein the groove extends in a direction parallel to the signal line and is divided in a region overlapping with the gate line. A pixel circuit provided in the first pixel, and a gate line electrically connected to a pixel circuit element provided in the second pixel;
A signal line electrically connected to one of a pixel circuit included in the first pixel and a pixel circuit element included in the second pixel;
The display device according to claim 8, wherein the groove extends in a direction parallel to the gate line and is divided in a region overlapping with the signal line. The groove penetrates the planarization film;
The bottom surface of the groove is an upper surface of the interlayer insulating film exposed from the planarization film by the groove;
The display device according to claim 8, wherein the EL layer is in contact with the exposed upper surface of the interlayer insulating film. A plurality of pixels including the first pixel and the second pixel;
The display device according to any one of claims 8 to 16, wherein the groove divides a plurality of the plurality of pixels into an island shape.

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