JP2017533493A5 - - Google Patents
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- JP2017533493A5 JP2017533493A5 JP2017511288A JP2017511288A JP2017533493A5 JP 2017533493 A5 JP2017533493 A5 JP 2017533493A5 JP 2017511288 A JP2017511288 A JP 2017511288A JP 2017511288 A JP2017511288 A JP 2017511288A JP 2017533493 A5 JP2017533493 A5 JP 2017533493A5
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- JP
- Japan
- Prior art keywords
- subsystem
- soc
- processor
- processing
- access request
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 238000000034 method Methods 0.000 claims 8
- 230000004044 response Effects 0.000 claims 6
- 238000004891 communication Methods 0.000 claims 5
- 238000001514 detection method Methods 0.000 claims 2
- 238000011084 recovery Methods 0.000 claims 2
- 230000011664 signaling Effects 0.000 claims 2
- 230000003213 activating effect Effects 0.000 claims 1
- 238000004590 computer program Methods 0.000 claims 1
- 238000002955 isolation Methods 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/484,125 US9396070B2 (en) | 2014-09-11 | 2014-09-11 | System and method for system-on-a-chip subsystem external access detection and recovery |
| US14/484,125 | 2014-09-11 | ||
| PCT/US2015/048707 WO2016040192A1 (en) | 2014-09-11 | 2015-09-04 | System and method for system-on-a-chip subsystem external access detection and recovery |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2017533493A JP2017533493A (ja) | 2017-11-09 |
| JP2017533493A5 true JP2017533493A5 (enExample) | 2018-09-27 |
| JP6647285B2 JP6647285B2 (ja) | 2020-02-14 |
Family
ID=54140739
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2017511288A Active JP6647285B2 (ja) | 2014-09-11 | 2015-09-04 | システムオンチップのサブシステムの外部アクセス検出および回復のためのシステムおよび方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US9396070B2 (enExample) |
| EP (1) | EP3191916B1 (enExample) |
| JP (1) | JP6647285B2 (enExample) |
| CN (1) | CN106687884B (enExample) |
| WO (1) | WO2016040192A1 (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10042404B2 (en) * | 2014-09-26 | 2018-08-07 | Netspeed Systems | Automatic generation of power management sequence in a SoC or NoC |
| US20180150124A1 (en) * | 2016-11-28 | 2018-05-31 | Qualcomm Incorporated | Wifi memory power minimization |
| US20180188797A1 (en) * | 2016-12-29 | 2018-07-05 | Intel Corporation | Link power management scheme based on link's prior history |
| US10740494B2 (en) * | 2017-09-06 | 2020-08-11 | Google Llc | Central and delegate security processors for a computing device |
| JP7109973B2 (ja) * | 2018-04-13 | 2022-08-01 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| CN112000216B (zh) * | 2020-09-02 | 2022-08-23 | 展讯通信（上海）有限公司 | 系统级芯片及其工作模式管理方法、智能穿戴设备 |
| CN112506851B (zh) * | 2020-12-02 | 2022-02-11 | 广东电网有限责任公司佛山供电局 | 一种解决多核访问冲突的soc芯片架构构建方法 |
| KR20240092317A (ko) * | 2022-12-14 | 2024-06-24 | 삼성전자주식회사 | 메모리 장치, 메모리 장치의 동작 방법 및 메모리 시스템 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030093702A1 (en) | 2001-03-30 | 2003-05-15 | Zheng Luo | System on a chip with multiple power planes and associate power management methods |
| US8489791B2 (en) | 2010-03-12 | 2013-07-16 | Lsi Corporation | Processor bus bridge security feature for network processors or the like |
| CN101859289B (zh) | 2010-06-11 | 2012-06-13 | 华中科技大学 | 一种利用片外存储器访问控制器访问外部存储器的方法 |
| US8706172B2 (en) | 2010-10-26 | 2014-04-22 | Miscrosoft Corporation | Energy efficient continuous sensing for communications devices |
| US20120198267A1 (en) | 2011-01-31 | 2012-08-02 | Srinjoy Das | System and Method for Facilitating Data Transfer Between a First Clock Domain and a Second Clock Domain |
| US20120254878A1 (en) | 2011-04-01 | 2012-10-04 | Lama Nachman | Mechanism for outsourcing context-aware application-related functionalities to a sensor hub |
| JP2013003911A (ja) * | 2011-06-17 | 2013-01-07 | Sony Corp | 電子機器、電子機器の制御方法およびプログラム |
| US9367107B2 (en) * | 2011-10-19 | 2016-06-14 | Psion Inc. | Method and system for controlling reset state change in a system-on-a-chip device |
| IN2012DE00977A (enExample) * | 2012-03-30 | 2015-09-11 | Intel Corp | |
| US9766676B2 (en) | 2012-10-26 | 2017-09-19 | Intel Corporation | Computing subsystem hardware recovery via automated selective power cycling |
| US9594411B2 (en) * | 2013-02-28 | 2017-03-14 | Qualcomm Incorporated | Dynamic power management of context aware services |
| JP5825287B2 (ja) * | 2013-04-08 | 2015-12-02 | トヨタ自動車株式会社 | ハイブリッド車両 |
-
2014
- 2014-09-11 US US14/484,125 patent/US9396070B2/en active Active
-
2015
- 2015-09-04 JP JP2017511288A patent/JP6647285B2/ja active Active
- 2015-09-04 WO PCT/US2015/048707 patent/WO2016040192A1/en not_active Ceased
- 2015-09-04 EP EP15763794.3A patent/EP3191916B1/en not_active Not-in-force
- 2015-09-04 CN CN201580048219.1A patent/CN106687884B/zh active Active
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