JP2017511547A5 - - Google Patents

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Publication number
JP2017511547A5
JP2017511547A5 JP2016562524A JP2016562524A JP2017511547A5 JP 2017511547 A5 JP2017511547 A5 JP 2017511547A5 JP 2016562524 A JP2016562524 A JP 2016562524A JP 2016562524 A JP2016562524 A JP 2016562524A JP 2017511547 A5 JP2017511547 A5 JP 2017511547A5
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JP
Japan
Prior art keywords
indicator
invalidation
cache
information indicator
cache memory
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JP2016562524A
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English (en)
Japanese (ja)
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JP2017511547A (ja
JP6339697B2 (ja
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Priority claimed from US14/256,360 external-priority patent/US9329930B2/en
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Publication of JP2017511547A publication Critical patent/JP2017511547A/ja
Publication of JP2017511547A5 publication Critical patent/JP2017511547A5/ja
Application granted granted Critical
Publication of JP6339697B2 publication Critical patent/JP6339697B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2016562524A 2014-04-18 2015-03-30 無効化動作後のキャッシュメモリ内の有効インジケータにおけるビットフリップを検出するためのキャッシュメモリエラー検出回路、ならびに関連する方法およびプロセッサベースのシステム Expired - Fee Related JP6339697B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/256,360 2014-04-18
US14/256,360 US9329930B2 (en) 2014-04-18 2014-04-18 Cache memory error detection circuits for detecting bit flips in valid indicators in cache memory following invalidate operations, and related methods and processor-based systems
PCT/US2015/023269 WO2015160493A1 (en) 2014-04-18 2015-03-30 Cache memory error detection circuits for detecting bit flips in valid indicators in cache memory following invalidate operations, and related methods and processor-based systems

Publications (3)

Publication Number Publication Date
JP2017511547A JP2017511547A (ja) 2017-04-20
JP2017511547A5 true JP2017511547A5 (enExample) 2018-05-17
JP6339697B2 JP6339697B2 (ja) 2018-06-06

Family

ID=52823876

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016562524A Expired - Fee Related JP6339697B2 (ja) 2014-04-18 2015-03-30 無効化動作後のキャッシュメモリ内の有効インジケータにおけるビットフリップを検出するためのキャッシュメモリエラー検出回路、ならびに関連する方法およびプロセッサベースのシステム

Country Status (7)

Country Link
US (1) US9329930B2 (enExample)
EP (1) EP3132351B1 (enExample)
JP (1) JP6339697B2 (enExample)
KR (1) KR20160146705A (enExample)
CN (1) CN106170774A (enExample)
BR (1) BR112016024255A2 (enExample)
WO (1) WO2015160493A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102515417B1 (ko) * 2016-03-02 2023-03-30 한국전자통신연구원 캐시 메모리 장치 및 그것의 동작 방법
CN119512986A (zh) * 2019-12-23 2025-02-25 美光科技公司 有效避免行高速缓存器未命中
US11057060B1 (en) * 2020-03-23 2021-07-06 Sage Microelectronics Corporation Method and apparatus for matrix flipping error correction
US11902323B2 (en) * 2021-08-31 2024-02-13 Oracle International Corporation Dynamic cloud workload reallocation based on active security exploits in dynamic random access memory (DRAM)
US11630772B1 (en) * 2021-09-29 2023-04-18 Advanced Micro Devices, Inc. Suppressing cache line modification
US11934265B2 (en) * 2022-02-04 2024-03-19 Apple Inc. Memory error tracking and logging
WO2024158719A1 (en) * 2023-01-26 2024-08-02 Micron Technology, Inc. Preventing back-to-back flips of a bit in bit flipping decoding
TWI877670B (zh) * 2023-06-29 2025-03-21 慧榮科技股份有限公司 資料寫入方法與相關記憶體控制器以及資料儲存設備

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06119245A (ja) * 1992-10-01 1994-04-28 Mitsubishi Electric Corp キャッシュメモリ
JPH086854A (ja) * 1993-12-23 1996-01-12 Unisys Corp アウトボードファイルキャッシュ外部処理コンプレックス
US20030131277A1 (en) * 2002-01-09 2003-07-10 Taylor Richard D. Soft error recovery in microprocessor cache memories
US7240277B2 (en) 2003-09-26 2007-07-03 Texas Instruments Incorporated Memory error detection reporting
GB2409301B (en) 2003-12-18 2006-12-06 Advanced Risc Mach Ltd Error correction within a cache memory
JP5008955B2 (ja) * 2006-11-28 2012-08-22 株式会社日立製作所 節電機能を備えたストレージシステム
JP2009059005A (ja) * 2007-08-29 2009-03-19 Panasonic Corp デバッグシステム、デバッグ装置および方法
US7752505B2 (en) 2007-09-13 2010-07-06 International Business Machines Corporation Method and apparatus for detection of data errors in tag arrays
US8291305B2 (en) 2008-09-05 2012-10-16 Freescale Semiconductor, Inc. Error detection schemes for a cache in a data processing system
US8266498B2 (en) 2009-03-31 2012-09-11 Freescale Semiconductor, Inc. Implementation of multiple error detection schemes for a cache
US8924817B2 (en) 2010-09-29 2014-12-30 Advanced Micro Devices, Inc. Method and apparatus for calculating error correction codes for selective data updates
JP2012103826A (ja) 2010-11-09 2012-05-31 Fujitsu Ltd キャッシュメモリシステム
US8775863B2 (en) * 2011-05-31 2014-07-08 Freescale Semiconductor, Inc. Cache locking control
CN103631738B (zh) * 2013-08-15 2016-08-10 中国科学院电子学研究所 一种片外配置和回读fpga装置

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