JP2017507411A5 - - Google Patents

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Publication number
JP2017507411A5
JP2017507411A5 JP2016547602A JP2016547602A JP2017507411A5 JP 2017507411 A5 JP2017507411 A5 JP 2017507411A5 JP 2016547602 A JP2016547602 A JP 2016547602A JP 2016547602 A JP2016547602 A JP 2016547602A JP 2017507411 A5 JP2017507411 A5 JP 2017507411A5
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JP
Japan
Prior art keywords
instance
dynamic software
processor
software operation
inline cache
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2016547602A
Other languages
English (en)
Japanese (ja)
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JP6293910B2 (ja
JP2017507411A (ja
Filing date
Publication date
Priority claimed from US14/262,852 external-priority patent/US9710388B2/en
Application filed filed Critical
Publication of JP2017507411A publication Critical patent/JP2017507411A/ja
Publication of JP2017507411A5 publication Critical patent/JP2017507411A5/ja
Application granted granted Critical
Publication of JP6293910B2 publication Critical patent/JP6293910B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2016547602A 2014-01-23 2015-01-22 動的言語でのインラインキャッシュのためのハードウェアアクセラレーション Expired - Fee Related JP6293910B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201461930808P 2014-01-23 2014-01-23
US61/930,808 2014-01-23
US14/262,852 US9710388B2 (en) 2014-01-23 2014-04-28 Hardware acceleration for inline caches in dynamic languages
US14/262,852 2014-04-28
PCT/US2015/012527 WO2015112762A1 (en) 2014-01-23 2015-01-22 Hardware acceleration for inline caches in dynamic languages

Publications (3)

Publication Number Publication Date
JP2017507411A JP2017507411A (ja) 2017-03-16
JP2017507411A5 true JP2017507411A5 (enExample) 2017-09-28
JP6293910B2 JP6293910B2 (ja) 2018-03-14

Family

ID=53544933

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016547602A Expired - Fee Related JP6293910B2 (ja) 2014-01-23 2015-01-22 動的言語でのインラインキャッシュのためのハードウェアアクセラレーション

Country Status (6)

Country Link
US (1) US9710388B2 (enExample)
EP (1) EP3097478A1 (enExample)
JP (1) JP6293910B2 (enExample)
KR (1) KR20160113142A (enExample)
CN (1) CN106415485B (enExample)
WO (1) WO2015112762A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9740504B2 (en) 2014-01-23 2017-08-22 Qualcomm Incorporated Hardware acceleration for inline caches in dynamic languages
US10489178B2 (en) * 2015-04-28 2019-11-26 Altera Corporation Network functions virtualization platforms with function chaining capabilities
US10031760B1 (en) * 2016-05-20 2018-07-24 Xilinx, Inc. Boot and configuration management for accelerators
CN111966333A (zh) * 2020-07-28 2020-11-20 锐达互动科技股份有限公司 一种插入动态模板背景的实现方法、装置、设备和介质
CN117008810A (zh) * 2022-04-27 2023-11-07 华为技术有限公司 一种数据处理方法、装置及相关设备
CN115167922A (zh) * 2022-06-28 2022-10-11 北京奕斯伟计算技术股份有限公司 指令处理方法、装置、电子设备及计算机可读存储介质

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020087798A1 (en) * 2000-11-15 2002-07-04 Vijayakumar Perincherry System and method for adaptive data caching
US7353364B1 (en) 2004-06-30 2008-04-01 Sun Microsystems, Inc. Apparatus and method for sharing a functional unit execution resource among a plurality of functional units
US7949826B2 (en) 2007-07-05 2011-05-24 International Business Machines Corporation Runtime machine supported method level caching
US9250938B2 (en) * 2008-10-15 2016-02-02 Microsoft Technology Licensing, Llc Caching runtime generated code
US9063749B2 (en) * 2011-05-27 2015-06-23 Qualcomm Incorporated Hardware support for hashtables in dynamic languages
US9009686B2 (en) * 2011-11-07 2015-04-14 Nvidia Corporation Algorithm for 64-bit address mode optimization
US9128732B2 (en) 2012-02-03 2015-09-08 Apple Inc. Selective randomization for non-deterministically compiled code
US9251071B2 (en) 2013-08-30 2016-02-02 Apple Inc. Concurrent inline cache optimization in accessing dynamically typed objects
US9740504B2 (en) 2014-01-23 2017-08-22 Qualcomm Incorporated Hardware acceleration for inline caches in dynamic languages

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