CN106415485B - 用于动态语言中的内联高速缓存的硬件加速 - Google Patents

用于动态语言中的内联高速缓存的硬件加速 Download PDF

Info

Publication number
CN106415485B
CN106415485B CN201580005303.5A CN201580005303A CN106415485B CN 106415485 B CN106415485 B CN 106415485B CN 201580005303 A CN201580005303 A CN 201580005303A CN 106415485 B CN106415485 B CN 106415485B
Authority
CN
China
Prior art keywords
instance
software operation
dynamic software
processor
inline cache
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201580005303.5A
Other languages
English (en)
Chinese (zh)
Other versions
CN106415485A (zh
Inventor
B·罗巴特米利
G·C·卡斯卡瓦尔
M·N·克达拉亚
D·苏亚雷斯格拉西亚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN106415485A publication Critical patent/CN106415485A/zh
Application granted granted Critical
Publication of CN106415485B publication Critical patent/CN106415485B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4488—Object-oriented
    • G06F9/449—Object-oriented method invocation or resolution
    • G06F9/4491—Optimising based on receiver type
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/45—Caching of specific data in cache memory
    • G06F2212/452—Instruction code

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Devices For Executing Special Programs (AREA)
  • Stored Programmes (AREA)
CN201580005303.5A 2014-01-23 2015-01-22 用于动态语言中的内联高速缓存的硬件加速 Expired - Fee Related CN106415485B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201461930808P 2014-01-23 2014-01-23
US61/930,808 2014-01-23
US14/262,852 2014-04-28
US14/262,852 US9710388B2 (en) 2014-01-23 2014-04-28 Hardware acceleration for inline caches in dynamic languages
PCT/US2015/012527 WO2015112762A1 (en) 2014-01-23 2015-01-22 Hardware acceleration for inline caches in dynamic languages

Publications (2)

Publication Number Publication Date
CN106415485A CN106415485A (zh) 2017-02-15
CN106415485B true CN106415485B (zh) 2019-11-22

Family

ID=53544933

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201580005303.5A Expired - Fee Related CN106415485B (zh) 2014-01-23 2015-01-22 用于动态语言中的内联高速缓存的硬件加速

Country Status (6)

Country Link
US (1) US9710388B2 (enExample)
EP (1) EP3097478A1 (enExample)
JP (1) JP6293910B2 (enExample)
KR (1) KR20160113142A (enExample)
CN (1) CN106415485B (enExample)
WO (1) WO2015112762A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9740504B2 (en) 2014-01-23 2017-08-22 Qualcomm Incorporated Hardware acceleration for inline caches in dynamic languages
US10489178B2 (en) * 2015-04-28 2019-11-26 Altera Corporation Network functions virtualization platforms with function chaining capabilities
US10031760B1 (en) * 2016-05-20 2018-07-24 Xilinx, Inc. Boot and configuration management for accelerators
CN111966333A (zh) * 2020-07-28 2020-11-20 锐达互动科技股份有限公司 一种插入动态模板背景的实现方法、装置、设备和介质
CN117008810A (zh) * 2022-04-27 2023-11-07 华为技术有限公司 一种数据处理方法、装置及相关设备
CN115167922A (zh) * 2022-06-28 2022-10-11 北京奕斯伟计算技术股份有限公司 指令处理方法、装置、电子设备及计算机可读存储介质

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020087798A1 (en) * 2000-11-15 2002-07-04 Vijayakumar Perincherry System and method for adaptive data caching
US7353364B1 (en) 2004-06-30 2008-04-01 Sun Microsystems, Inc. Apparatus and method for sharing a functional unit execution resource among a plurality of functional units
US7949826B2 (en) 2007-07-05 2011-05-24 International Business Machines Corporation Runtime machine supported method level caching
US9250938B2 (en) * 2008-10-15 2016-02-02 Microsoft Technology Licensing, Llc Caching runtime generated code
US9063749B2 (en) * 2011-05-27 2015-06-23 Qualcomm Incorporated Hardware support for hashtables in dynamic languages
US20130113809A1 (en) * 2011-11-07 2013-05-09 Nvidia Corporation Technique for inter-procedural memory address space optimization in gpu computing compiler
US8972952B2 (en) 2012-02-03 2015-03-03 Apple Inc. Tracer based runtime optimization for dynamic programming languages
US9251071B2 (en) 2013-08-30 2016-02-02 Apple Inc. Concurrent inline cache optimization in accessing dynamically typed objects
US9740504B2 (en) 2014-01-23 2017-08-22 Qualcomm Incorporated Hardware acceleration for inline caches in dynamic languages

Also Published As

Publication number Publication date
CN106415485A (zh) 2017-02-15
WO2015112762A1 (en) 2015-07-30
JP2017507411A (ja) 2017-03-16
KR20160113142A (ko) 2016-09-28
US20150205726A1 (en) 2015-07-23
JP6293910B2 (ja) 2018-03-14
US9710388B2 (en) 2017-07-18
EP3097478A1 (en) 2016-11-30

Similar Documents

Publication Publication Date Title
CN106415485B (zh) 用于动态语言中的内联高速缓存的硬件加速
CN111033466B (zh) 对闪存进行分区以及实现具有映像升级能力的灵活引导
CN108780441A (zh) 用于定点矩阵乘法的内存减少方法
US20160253497A1 (en) Return Oriented Programming Attack Detection Via Memory Monitoring
CN103189853B (zh) 用于提供高效情境分类的方法和装置
US9652152B2 (en) Efficient decompression locality system for demand paging
JP2018534675A (ja) 再マッピング同期によるタスクサブグラフの加速化
CN108431775A (zh) 用于高效并行计算的简化的基于任务的运行时的方法
US20150268993A1 (en) Method for Exploiting Parallelism in Nested Parallel Patterns in Task-based Systems
CN109791510B (zh) 在异构计算中管理数据流
JP2017532657A (ja) 圧縮アルゴリズムのためのキャッシュバンク分散
CN105934742A (zh) 用于动态语言中的内联高速缓存的硬件加速
US9600420B2 (en) Reducing decompression time without impacting compression ratio
KR20250105377A (ko) NVMe(Nonvolatile Memory Express) 저장 디바이스들에 대한 인라인 암호화 솔루션
US10078611B1 (en) Smart handling of input/output interrupts
US11500647B2 (en) Systems and methods for achieving faster boot times using BIOS attribute mitigation
JP2018511111A (ja) ビクティムキャッシュモードを向上させるためのプロセススケジューリング
WO2021097457A1 (en) Batch softmax for 0-label and multilabel classification
US20180373543A1 (en) System and Method for Providing Fine-Grained Memory Cacheability During a Pre-OS Operating Environment
WO2025034294A1 (en) Method for generating initialization vector for nvme inline encryption
CN118339552A (zh) 用于提高实现控制流完整性的计算设备的安全性的方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20191122

Termination date: 20210122

CF01 Termination of patent right due to non-payment of annual fee