JP2017204579A - Vertical resonator type light-emitting element and method for manufacturing vertical resonator type light emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a vertical resonator type light-emitting element which is less in leak current, which has a low-resistance current constriction structure and a current path, which is high in lateral mode stability and reliability and which has a long life.SOLUTION: A vertical resonator type light-emitting element comprises: a first reflecting mirror 11 including a semiconductor DBR layer; a first semiconductor layer 12 formed on the first reflecting mirror; an active layer 15; a second semiconductor layer 21 formed on the active layer and having a conductivity type opposite to that of the first semiconductor layer; a tunnel junction layer 22 formed on the second semiconductor layer; a third semiconductor layer 23 formed on the tunnel junction layer and having a conductivity type opposite to that of the second semiconductor layer; and a second reflecting mirror 24 disposed on the third semiconductor layer and opposed to the first reflecting mirror. The second and third semiconductor layers are separated from each other by the tunnel junction layer all over the second and third semiconductor layers. At least one of the first reflecting mirror, the second reflecting mirror, the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer has a semiconductor layer 14R which is dented inward with respect to side walls of the semiconductor layers making upper and lower layers adjacent thereto.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a vertical cavity type light emitting device, and more particularly to a vertical cavity type semiconductor light emitting device such as a vertical cavity surface emitting laser (VCSEL) and a method of manufacturing the same.

An npn type nitride semiconductor light emitting device having a current confinement structure using a buried tunnel junction is known. For example, in Patent Document 1, regarding a buried tunnel junction layer that is removed while leaving a region where current flows in a constricted state, a p-type nitride layer excluding a region immediately below the buried tunnel junction layer is p-type deactivated to leak current. A current confinement structure that suppresses the above is disclosed. Patent Document 2 discloses a nitride semiconductor surface emitting device including a nitride semiconductor multilayer mirror, a nitride semiconductor layer, an SiO ₂ layer having an opening, an ITO transparent electrode, and a dielectric multilayer film. A laser is disclosed.

International Publication No. 2015/129610 Pamphlet International Publication No. 2014/167965 Pamphlet

  For example, in the method of manufacturing a structure having a buried tunnel junction layer as disclosed in Patent Document 1, a region other than the region where the current of the tunnel junction layer is constricted flows away by etching, and an n-type semiconductor layer is stacked thereon. A step of embedding the tunnel junction layer. Thus, when the semiconductor layer is stacked on the etched surface, it is difficult to control the film thickness. In addition, defects are likely to occur at the interface between the etched surface and the semiconductor layer deposited on the surface, and a leakage current is likely to occur due to defects such as a decrease in crystallinity, resulting in high yield. It was difficult. Further, in the surface emitting laser having the structure as in Patent Document 2, it is difficult to increase the output due to light loss and electrical resistance due to light absorption by the ITO transparent electrode. Therefore, it has become a problem in terms of stability and reliability as a semiconductor light emitting element, including threshold current, element electrical resistance, and operating voltage.

  The present invention has been made in view of the above points, and provides a vertical resonator type light emitting device having a current confinement structure and a current path with a low leakage current and a low resistance, and having a high reliability and a long lifetime. It is aimed. It is another object of the present invention to provide a high-power conductor light-emitting element that has excellent lateral mode controllability and low light loss. It is another object of the present invention to provide a method for manufacturing a vertical resonator type light emitting element that has high controllability of film thickness and film quality in the film forming process, and is highly efficient and highly reliable.

  A vertical cavity light emitting device according to the present invention includes a first reflecting mirror made of a semiconductor DBR layer, a first semiconductor layer made of at least one semiconductor layer formed on the first reflecting mirror, and on the first semiconductor layer. The formed active layer, the second semiconductor layer formed on the active layer and made of at least one semiconductor layer having a conductivity type opposite to that of the first semiconductor layer, and the tunnel junction layer formed on the second semiconductor layer A third semiconductor layer formed on the tunnel junction layer and made of at least one semiconductor layer having a conductivity type opposite to that of the second semiconductor layer, and disposed on the third semiconductor layer so as to face the first reflecting mirror. A second reflecting mirror, and the second semiconductor layer and the third semiconductor layer are separated from each other over the entirety of the second semiconductor layer and the third semiconductor layer by the tunnel junction layer, and the first reflecting mirror, the second reflecting mirror, 2 reflector, first semiconductor layer, second semiconductor layer, and third semiconductor At least one of the body layers has a semiconductor layer that is recessed inward from the side walls of adjacent upper and lower semiconductor layers.

  In the method for manufacturing a vertical cavity light emitting device of the present invention, a first reflecting mirror made of a semiconductor DBR layer is formed, and a first semiconductor layer made of at least one semiconductor layer is formed on the first reflecting mirror. An active layer is formed on the first semiconductor layer, a second semiconductor layer made of at least one semiconductor layer having a conductivity type opposite to the first semiconductor layer is formed on the active layer, and the second semiconductor layer is formed on the second semiconductor layer. A tunnel junction layer is formed, and a third semiconductor layer made of at least one semiconductor layer having a conductivity type opposite to that of the second semiconductor layer is formed on the tunnel junction layer, and the second semiconductor layer and the third semiconductor layer are tunnel junctions. The second semiconductor layer and the third semiconductor layer are formed so as to be separated from each other by a layer, and a second reflecting mirror facing the first reflecting mirror is formed on the third semiconductor layer, and the first reflecting mirror is formed. , Second reflector, first semiconductor layer, second semiconductor layer and And at least one of the third semiconductor layers is formed with a semiconductor layer that is recessed inward from the side walls of the adjacent upper and lower semiconductor layers.

3 is a cross-sectional view schematically showing a vertical resonator type light emitting device of Example 1. FIG. 1 is a top view schematically showing a vertical resonator type light emitting element of Example 1. FIG. It is a partial expanded sectional view of FIG. It is a partial expanded sectional view which shows the modification of Fig.3 (a). It is a partial expanded sectional view which shows the modification of Fig.3 (a). It is a partial expanded sectional view of Fig.1 (a). It is a partial expanded sectional view which shows the modification of Fig.4 (a). 6 is a cross-sectional view schematically showing a vertical resonator type light emitting device of Example 2. FIG. It is a partial expanded sectional view of Fig.5 (a). FIG. 6 is a cross-sectional view schematically showing a vertical resonator type light emitting element of Example 3. 6 is a cross-sectional view schematically showing a vertical resonator type light emitting element of Example 4. FIG. FIG. 6 is a cross-sectional view schematically showing a vertical resonator type light emitting element of Example 5. 3 is a flowchart showing a method for manufacturing a vertical cavity light emitting device of the present invention.

  Hereinafter, preferred embodiments of the present invention will be described in detail. In the following description and the accompanying drawings, substantially the same or equivalent parts are denoted by the same reference numerals.

The semiconductor light emitting device according to this example is a vertical cavity light emitting device and is referred to as a surface emitting laser (VCSEL) 10. The surface emitting laser 10 will be described with reference to FIGS. FIG. 1 is a cross-sectional view showing a cross section including a central axis CA in the stacking direction perpendicular to the emission surface of the surface emitting laser 10. FIG. 2 is a top view schematically showing the surface emitting laser 10. For clarity of illustration, in FIG. 2, some components in the top view are hatched.
[Configuration of Surface Emitting Laser 10]
As shown in FIG. 1, the surface emitting laser 10 includes a semiconductor structure layer 27 including a first semiconductor layer 12, an active layer 15, a second semiconductor layer 21, a tunnel junction layer 22, and a third semiconductor layer 23. Further, the surface emitting laser 10 includes a first reflecting mirror 11 and a second reflecting mirror 24 that are disposed to face each other with the semiconductor structure layer 27 interposed therebetween. The first reflecting mirror 11, the first semiconductor layer 12, the active layer 15, the second semiconductor layer 21, the tunnel junction layer 22, and the third semiconductor layer 23 are formed on the base layer 16 in this order. The underlayer 16 is an undoped GaN layer and is formed on a substrate 17 made of GaN.

  On the third semiconductor layer 23, an upper n electrode 25 electrically connected to the third semiconductor layer 23 is provided. On the n-type semiconductor layer 13A included in the first semiconductor layer 12, a lower n-electrode 26 that is electrically connected to the n-type semiconductor layer 13A is provided. 1 is a cross-sectional view taken along line AA shown in the top view of FIG. The formation region of the upper n-electrode 25 in the top view of FIG. 2 is hatched.

  The first reflecting mirror 11 is a multilayer film reflecting mirror in which a plurality of semiconductor layers having different compositions and different refractive indexes with respect to light emitted from the active layer 15 are alternately stacked. The thickness of the semiconductor layer A1 of the first composition constituting the first reflecting mirror 11 and the semiconductor layer B1 of the second composition having a refractive index different from that of the semiconductor layer A1 is ¼ of the oscillation wavelength λ of the surface emitting laser 10. Is divided by the refractive index n of each layer (λ / 4n), and the first reflecting mirror 11 is formed as a highly reflecting mirror.

  That is, the first reflecting mirror 11 is a distributed Bragg reflector (DBR) made of a semiconductor material, that is, a semiconductor DBR. In this embodiment, the first reflecting mirror 11 is formed by alternately laminating AlInN layers A1 and GaN layers B1. The number of stacked layers in which the AlInN layers A1 and the GaN layers B1 are alternately stacked can be set according to a desired reflectance. For example, AlInN layers A1 and GaN layers B1 can be alternately stacked to form 40.5 pairs (that is, 41 layers of AlInN layers A1 and 40 layers of GaN layers B1). In this embodiment, the AlInN layer A1 and the GaN layer B1 are not doped with impurities.

The n-type semiconductor layer (first semiconductor layer) 13 is, for example, n-GaN doped with Si.
The active layer 15 is a multiple quantum well (MQW) layer, and is composed of, for example, a GaN layer as a barrier layer and a GaInN layer as a well layer. The p-type semiconductor layer (second semiconductor layer) 21 includes a p-type semiconductor layer 21A and a p-type semiconductor layer 21B. The p-type semiconductor layer 21A is, for example, an Mg-doped AlGaN electron barrier layer, and the p-type semiconductor layer 21B is, for example, an Mg-doped p-GaN layer.

  Note that the n-type semiconductor layer 13 as the first semiconductor layer only needs to be composed of at least one semiconductor layer. The p-type semiconductor layer 21 as the second semiconductor layer only needs to be composed of at least one semiconductor layer. For example, the p-type semiconductor layer 21 may be composed only of a Mg-doped p-GaN layer. In this embodiment, when the n-type semiconductor layer 13 is formed in two layers, one is called an n-type semiconductor layer 13A and the other is called an n-type semiconductor layer 13B.

In the tunnel junction layer 22, a high-concentration p-type semiconductor layer 22A and a high-concentration n-type semiconductor layer 22B are formed on the p-type semiconductor layer 21 in this order. The high concentration p-type semiconductor layer 22A is, for example, a GaInN layer doped with high concentration Mg. The Mg concentration as an impurity of the high-concentration p-type semiconductor layer 22A is, for example, about 5 × 10 ¹⁹ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ , more specifically, 1 × 10 ²⁰ cm ^{−3 to} 3 × 10 ^20. About cm ⁻³ is preferable.

The high concentration n-type semiconductor layer 22B is, for example, a GaN layer doped with high concentration Si. The Si concentration as the impurity of the high-concentration n-type semiconductor layer 22B is, for example, about 1 × 10 ²⁰ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ , more specifically 3 × 10 ²⁰ cm ^{−3 to} 6 × 10 ^20. About cm ⁻³ is preferable.

  An n-type semiconductor layer (third semiconductor layer) 23 is formed on the tunnel junction layer 22. That is, the third semiconductor layer (n-type semiconductor layer) 23 has a conductivity type opposite to that of the second semiconductor layer (p-type semiconductor layer) 21. The n-type semiconductor layer 23 is formed on the tunnel junction layer 22, and the second semiconductor layer 21 and the third semiconductor layer 23 are entirely formed of the second semiconductor layer 21 and the third semiconductor layer 23 by the tunnel junction layer 22. Are separated from each other.

  FIG. 3A is a partially enlarged view showing a portion R surrounded by a broken line in FIG. In this embodiment, as shown in FIG. 3A, the second semiconductor layer 21, the tunnel junction layer 22 and the third semiconductor layer 23 have a common side wall (in this embodiment, a cylindrical side wall). However, the present invention is not limited to this.

  For example, as shown in FIG. 3B, the third semiconductor layer 23 may be formed to be recessed with respect to the tunnel junction layer 22 and the second semiconductor layer 21. That is, the third semiconductor layer 23 may have a recessed side wall with respect to the common side wall of the tunnel junction layer 22 and the second semiconductor layer 21. Further, as shown in FIG. 3C, the common sidewall of the third semiconductor layer 23 and the tunnel junction layer 22 may have a recessed sidewall with respect to the sidewall of the second semiconductor layer 21.

  That is, regardless of whether or not they have a common side wall, the second semiconductor layer 21 and the third semiconductor layer 23 are spread over the entire second semiconductor layer 21 and the third semiconductor layer 23 by the tunnel junction layer 22. So long as they are separated from each other. The n-type semiconductor layer 23 as the third semiconductor layer only needs to be composed of at least one semiconductor layer. In this embodiment, the n-type semiconductor layer 23 is described as an n-type GaN layer doped with Si.

A second reflecting mirror 24 is disposed on the n-type semiconductor layer 23. In the present embodiment, the second reflecting mirror 24 is configured by alternately laminating a plurality of dielectric layers A2 and dielectric layers B2 having a refractive index different from that of the dielectric layer A2. In the present embodiment, the second reflecting mirror 24 is a distributed Bragg reflector made of a dielectric material, that is, a dielectric DBR, and SiO ₂ layers A2 and Nb ₂ O ₅ layers B2 are alternately laminated. In addition, the second reflecting mirror 24 may be formed of a combination of a translucent insulator such as an Al ₂ O ₃ layer and Nb ₂ O ₅ , TiO ₂ and SiO ₂ .

  FIG. 4A is a partial enlarged view showing a portion R2 surrounded by a broken line of the first semiconductor layer 12 shown in FIG. The first semiconductor layer 12 includes an n-type semiconductor layer 13A and an n-type semiconductor layer 13B. In the present embodiment, the first semiconductor layer 12 includes a semiconductor layer 14 </ b> R having a sidewall RS that is recessed inward from the sidewall of the n-type semiconductor layer 13.

  That is, the recessed semiconductor layer 14R is formed as a semiconductor layer that is adjacent to the semiconductor layer 14R and recessed inward from the sidewalls of the upper n-type semiconductor layer 13B and the lower n-type semiconductor layer 13A sandwiching the semiconductor layer 14R. Yes. A gap G14 is formed outside the side wall RS. As shown in FIG. 4B, the upper layer of the semiconductor layer 14R may be the active layer 15. Further, in the present embodiment, the semiconductor layer 14R recessed inward contains Al (aluminum).

  The semiconductor layer 14 </ b> R recessed inward can be formed, for example, by wet etching on a semiconductor layer having a side wall common to the n-type semiconductor layer 13 (referred to as a semiconductor layer 14). A semiconductor structure including the n-type semiconductor layer 13A and the n-type semiconductor layer 13B by using an etchant having a higher etching rate for the semiconductor layer 14 than the etching rate for the n-type semiconductor layer 13 and the semiconductor structure layer 27 and a high selection ratio. A side wall RS recessed inward from the layer 27 is formed, and a semiconductor layer 14R recessed inward can be formed.

As a semiconductor layer that can form the depressed semiconductor layer 14R by selective etching with an etching solution having a large selectivity as described above, for example, a nitride semiconductor layer containing Al (aluminum) in its composition can be given. For example, if the composition ratio is appropriately adjusted using an Al _x In _y Ga _(1-xy) N-based semiconductor layer (0 <x <1, 0 ≦ y <1), a GaN-based semiconductor layer that does not contain Al in the composition Etch selectivity to can be obtained. In particular, Al _x In _y N (x + y = 1) containing no Ga is preferable, and 0.15 ≦ x ≦ 0.215 is more preferable. Moreover, as a semiconductor layer having a smaller selection ratio than the semiconductor layer 14, a nitride semiconductor layer that does not contain Al in the composition, for example, an In _y Ga _(1-y) N-based semiconductor layer (0 ≦ y <1) can be given. .

[Current confinement structure of surface emitting laser 10]
Next, the current confinement structure of the surface emitting laser 10 will be described. The tunnel junction layer 22 has a tunnel junction having the characteristics of a tunnel diode. In the tunnel junction, unlike a rectifying characteristic generally exhibited by a diode, a current can flow with a low resistance from the n layer to the p layer. Therefore, in the tunnel junction layer 22, a current can flow from the high concentration n-type semiconductor layer 22B toward the high concentration p-type semiconductor layer 22A. That is, a current can flow from the upper n electrode 25 to the lower n electrode 26.

  The current from the upper n-electrode 25 flows in the lateral direction through the n-type semiconductor layer 23, passes through the tunnel junction layer 22 with a low resistance, and flows into the p-type semiconductor layer 21. The current that has passed through the p-type semiconductor layer 21, the active layer 15, and the n-type semiconductor layer 12 is confined by the recessed semiconductor layer 14R. There is no semiconductor layer in the gap G14, for example, air. Therefore, the current does not flow through the gap G14, but flows into the region of the recessed semiconductor layer 14R, and the current is narrowed.

  That is, the current flowing in the surface emitting laser 10 spreads in the lateral direction in the n-type semiconductor layer 23 and the tunnel junction layer 22 with a low resistance, and is efficiently confined by the recessed semiconductor layer 14R.

  On the other hand, the tunnel junction layer 22 is not a current confinement structure. For example, in a current confinement layer formed by a current confinement layer formed by dry etching of a tunnel junction layer and a buried layer obtained by growing a semiconductor layer on the dry-etched surface, there is a defect at an interface (particularly a side wall) between the dry etch layer and the buried layer. It is likely to occur. In addition, current easily flows near the interface where the defect occurs, which may be a leak path. However, in the tunnel junction layer 22 of the present embodiment, the tunnel junction layer 22 is formed over the entire surface of the second semiconductor layer 21 that is the lower layer. In addition, the third semiconductor layer 23 is formed as an upper layer formed over the entire surface of the tunnel junction layer 22 and does not have a configuration capable of generating a leak path.

  Further, as a current confinement structure different from the above-described configuration, a current confinement structure using a transparent electrode and an insulating layer can be given. In a current confinement structure using a transparent electrode and an insulating layer, a transparent electrode such as ITO is provided in contact with a p-type semiconductor layer. The transparent electrode has high contact resistance with the p-type semiconductor layer and large light absorption by the transparent electrode, which may lead to deterioration of the characteristics of the surface emitting laser.

  However, the surface emitting laser 10 has a current confinement structure by the tunnel junction layer 22 and the recessed semiconductor layer 14R, and does not have a current confinement structure by the transparent electrode and the insulating layer. A current from the tunnel junction layer 22 flows through the p-type semiconductor layer 21. Therefore, light absorption by the transparent electrode and contact resistance between the transparent electrode and the p-type semiconductor layer 21 do not occur. Accordingly, the surface emitting laser 10 has a current confinement structure and a current path with a low resistance and a low resistance. In addition, the surface emitting laser 10 has little light absorption in the laser beam path, and has high output and excellent oscillation characteristics.

  In addition, the recessed semiconductor layer 14R also has a function of lateral mode control. The light emitted from the active layer 15 is repeatedly reflected in the direction perpendicular to the substrate 17 between the first reflecting mirror 11 and the second reflecting mirror 24 to reach a resonance state, and performs laser oscillation. A part of the laser light passes through the second reflecting mirror 24 or the first reflecting mirror 11 and is extracted outside. Accordingly, the surface emitting laser 10 emits laser light in a direction perpendicular to the substrate 17.

  As described above, the resonance state is established by the first reflecting mirror 11 and the second reflecting mirror 24 forming a distributed Bragg reflecting mirror. Since the layer thickness of each layer constituting the first reflecting mirror 11 and the second reflecting mirror 24 is designed so as to reflect the emitted light in accordance with the wavelength of the emitted light emitted from the active layer 15, The phase of the reflected wave from each boundary surface is aligned, and a high reflectivity is obtained, thereby obtaining a resonance state.

  On the other hand, as shown in FIG. 4A, in the n-type semiconductor layer 12, there are a semiconductor layer 14 </ b> R and a gap G <b> 14 that are recessed inward in the path of light emitted from the active layer 15. The gap G14 has a lower refractive index than the recessed semiconductor layer 14R. Therefore, the field of the laser beam is confined in the recessed semiconductor layer 14R, and transverse mode control is performed.

  The outgoing light subjected to the transverse mode control can be efficiently coupled to a lens or a fiber. In addition, a stable transverse mode can be maintained against changes in driving conditions such as current and temperature. The gap 14 may be filled with a gap (air is present) or a material having a lower refractive index than the semiconductor layer 14R.

Further, as shown in FIG. 4A, a distance D in the layer thickness direction between the recessed n-type semiconductor layer 14R and the active layer 15 is defined. At this time, the depressed n-type semiconductor layer 14R is preferably formed at a position where the distance D is k times λ / 2n _av (k is a natural number). the oscillation wavelength of λ surface emitting laser 10, n _av is the average refractive index of the semiconductor layer formed between the active layer 15 and the recessed n-type semiconductor layer 14R.

  The distance D is preferably a distance (center distance) between the center positions in the layer thickness direction of the active layer 15 and the recessed n-type semiconductor layer 14R. A high transverse mode control effect can be obtained by matching the antinode of the standing wave generated by the radiation light from the active layer 15 with the n-type semiconductor layer 14R.

  As described above, the surface emitting laser 10 has a current confinement structure in which current concentrates and flows in the recessed semiconductor layer 14R, and has a structure with little leakage current. In addition, a low-resistance current path is secured by the tunnel junction layer 22. Accordingly, it is possible to provide a highly stable surface emitting laser 10 that can secure a highly stable current path and has a long lifetime. Moreover, it is excellent in lateral mode controllability, can be efficiently coupled to a lens or fiber, and can maintain a stable lateral mode against changes in driving conditions such as current and temperature. Therefore, the surface emitting laser 10 having excellent oscillation characteristics, stability, and reliability can be provided.

  Although the example in which the recessed semiconductor layer 14R is provided in the n-type semiconductor layer 12 has been described, the present invention is not limited to this. The p-type semiconductor layer 21 or the n-type semiconductor layer 23 may be provided. In other words, it may be provided in at least one of the first semiconductor layer (n-type semiconductor layer) 12, the second semiconductor layer (p-type semiconductor layer) 21, and the third semiconductor layer (n-type semiconductor layer) 23. The recessed semiconductor layer 14R is preferably provided at a position where the distance D (see FIG. 4A) in the stacking direction from the active layer 15 is small.

  The recessed n-type semiconductor layer 14R is preferably formed so that the impurity concentration is not uniform in the stacking direction but has an impurity concentration distribution. For example, the recessed n-type semiconductor layer 14R is preferably doped with impurities so as to have a high concentration at the interface with the upper layer or the lower layer of the recessed n-type semiconductor layer 14R. More specifically, the recessed n-type semiconductor layer 14R is preferably doped so that the impurity concentration becomes high at the interface with the upper layer or the interface with the lower layer of the recessed n-type semiconductor layer 14R. Thereby, the electrical resistance of the interface can be reduced.

  In the present embodiment, the semiconductor stacked body LY composed of the first reflecting mirror 11, the semiconductor structure layer 27, and the second reflecting mirror 24 has the central axis CA with the axis in the stacking direction, that is, the direction perpendicular to the semiconductor layer of the semiconductor stacked body LY. It has a rotationally symmetric shape. Examples of the rotationally symmetric shape include a cylinder including an elliptic cylinder, a prism, and a regular polygonal cylinder. In the present embodiment, the recessed semiconductor layer 14R also has a rotationally symmetric shape coaxial with the semiconductor stacked body LY. Specifically, the semiconductor stacked body LY and the recessed semiconductor layer 14R have a coaxial cylindrical shape.

  Note that the semiconductor stacked body LY does not necessarily have a rotationally symmetric shape. The recessed semiconductor layer 14R preferably has a rotationally symmetric shape with respect to the central axis CA, but is not limited thereto. The recessed semiconductor layer 14R may have a shape corresponding to a desired beam profile or transverse mode control.

  As described above in detail, according to the surface emitting laser 10, the surface emitting laser with high reliability and long life can be obtained by having a current confinement structure and a current path with low leakage current and low resistance. Can be provided. Further, it is possible to provide a surface emitting laser with little light loss, excellent lateral mode controllability, and excellent oscillation characteristics, stability, and reliability.

With reference to FIG. 5A and FIG. 5B, the surface emitting laser 30 according to the second embodiment will be described. FIG. 5A is a cross-sectional view showing a cross section including the central axis CA in the stacking direction perpendicular to the emission surface of the surface emitting laser 30. In the surface emitting laser 30, the same reference numerals are assigned to substantially the same or equivalent parts as those of the surface emitting laser 10 of the first embodiment.
[Configuration of surface emitting laser 30]
As shown in FIG. 5A, the surface emitting laser 30 has a semiconductor structure layer 47 including a first semiconductor layer 32, an active layer 15, a second semiconductor layer 21, a tunnel junction layer 22, and a third semiconductor layer 23. . Further, the surface emitting laser 30 includes a first reflecting mirror 31 and a second reflecting mirror 24 that are disposed to face each other with the semiconductor structure layer 47 interposed therebetween.

  The first reflecting mirror 31, the first semiconductor layer 32, the active layer 15, the second semiconductor layer 21, the tunnel junction layer 22, and the third semiconductor layer 23 are formed on the n-type underlayer 36 in this order. The n-type underlayer 36 is an n-GaN layer doped with Si, and is formed on an n-type substrate 37 made of n-GaN. On the third semiconductor layer 23, an upper n electrode 25 electrically connected to the third semiconductor layer 23 is provided. Further, a lower n-electrode 46 that is electrically connected to the n-type underlayer 36 is provided.

  The first reflecting mirror 31, like the first reflecting mirror 11 of the first embodiment, is a semiconductor DBR, and the first composition semiconductor layer A3 and the second composition semiconductor layer B3 having a refractive index different from that of the semiconductor layer A3. It is composed of The first reflecting mirror 31 differs from the first reflecting mirror 11 of Example 1 in that the first composition semiconductor layer A3 and the second composition semiconductor layer B3 are doped with impurities to form an n-type semiconductor layer. Is different. In this example, the semiconductor layer A3 having the first composition is n-AlInN doped with Si, and the semiconductor layer B3 having the second composition is n-GaN doped with Si. That is, the first reflecting mirror 31 is formed by alternately stacking a plurality of n-AlInN layers A3 and n-GaN layers B3.

  FIG. 5B is a partially enlarged cross-sectional view showing a portion R3 surrounded by a broken line in FIG. As described above, the first reflecting mirror 31 is formed by alternately laminating a plurality of semiconductor layers A3 having the first composition and semiconductor layers B3 having the second composition. Among these, at least one semiconductor layer A3 from the side closer to the active layer 15 has a side wall RS2 that is recessed inward from the side wall of the semiconductor layer B1 that sandwiches the semiconductor layer A3. Hereinafter, the semiconductor layer A3 having the sidewall RS2 will be described as the semiconductor layer A3R. That is, the semiconductor layer A3R is a semiconductor layer B3 that sandwiches the semiconductor layer A3R, that is, a semiconductor layer that is adjacent to the semiconductor layer A3R and that is recessed inward from the sidewalls of the upper and lower semiconductor layers B3 and B3 that sandwich the semiconductor layer A3R. It is formed as. A gap G31 sandwiched between the upper semiconductor layer B3 and the lower semiconductor layer B3 is formed outside the side wall RS2.

  The semiconductor layer A3R recessed inward can be formed by, for example, wet etching. By using an etchant having an etching rate higher than that for the semiconductor layer B3 and the semiconductor structure layer 47 and higher than the etching rate for the semiconductor layer A3, the side wall RS2 recessed to the inside of the semiconductor layer B3 and the semiconductor structure layer 47 is formed. A semiconductor layer A3R formed and recessed inward can be formed.

[Current confinement structure of surface emitting laser 30]
As described above, in the tunnel junction layer 22, current can flow from the high concentration n-type semiconductor layer 22B toward the high concentration p-type semiconductor layer 22A. The current from the upper n-electrode 25 flows in the lateral direction through the n-type semiconductor layer 23, passes through the tunnel junction layer 22 with a low resistance, and flows into the p-type semiconductor layer 21. In this embodiment, the current from the p-type semiconductor layer 21 passes through the active layer 15 and the first semiconductor layer 32, passes through the first reflecting mirror 31, the n-type base layer 36, and the n-type substrate 37, and the lower n electrode. It flows to 46. Accordingly, a current can flow from the upper n electrode 25 toward the lower n electrode 46.

  The current that has passed through the n-type semiconductor layer 32 flows to the first reflecting mirror 31 and is confined by the recessed semiconductor layer A3R. That is, the current does not flow through the gap G31 included in the first reflecting mirror 31, but flows in a concentrated manner in the recessed semiconductor layer A3R. That is, the surface emitting laser 30 has a current confinement structure in which a current that flows in the lateral direction through the n-type semiconductor layer 23 and the tunnel junction layer 22 and flows with low resistance is confined by the recessed semiconductor layer A3R.

  On the other hand, as described above, the tunnel junction layer 22 is not a current confinement structure, and does not have a configuration that can cause a leak path. Further, the surface emitting laser 30 does not have a current confinement structure using a transparent electrode having high contact resistance with the p-type semiconductor layer and high light absorption. Therefore, the current confinement structure of this embodiment is a current confinement structure with a low resistance and a low resistance. Therefore, the surface emitting laser 30 can provide the surface emitting laser 30 having a long life and high output reliability.

  In addition, the recessed semiconductor layer A3R also has a function of lateral mode control. The surface emitting laser 30 emits laser light in a direction perpendicular to the n-type substrate 37. Further, as described above, the layer thickness of each layer constituting the first reflecting mirror 31 and the second reflecting mirror 24 is set so as to reflect the radiated light according to the wavelength of the radiated light emitted from the active layer 15. Designed, the phase of the reflected wave from each boundary surface of each layer is aligned, and a high reflectivity is obtained, thereby obtaining a resonance state.

  On the other hand, as shown in FIG. 5B, in the first reflecting mirror 31, the semiconductor layer A <b> 3 </ b> R and the gap G <b> 31 that are recessed inward exist in the path of the light emitted from the active layer 15. In the region where the semiconductor layers B3 are separated from each other by the gap G31, the phases of the reflected waves from the respective interfaces of the semiconductor layer B3 are not uniform, and a high reflectance cannot be obtained, so that a resonance state cannot be obtained. Accordingly, the light emitted from the active layer 15 is reflected by the region CR formed by the recessed semiconductor layer A3R and the semiconductor layer B3 adjacent to the recessed semiconductor layer A3R.

  In this embodiment, the semiconductor layer A3R that is recessed and the semiconductor layer B3 that is adjacent to the semiconductor layer A3R (in the case where two or more recessed semiconductor layers A3R are provided, the semiconductor layer B3 sandwiched between the semiconductor layers A3R) The region CR formed by and has a higher refractive index than the outer region (the region including the gap G31). Accordingly, the laser light is guided to the region CR.

  In other words, the region CR functions as an optical confinement region or a refractive index waveguide region. Therefore, in this embodiment, the laser light is emitted with the transverse mode controlled by the recessed semiconductor layer A3R. The gap 31 may be filled with a gap (air is present) or a material having a lower refractive index than the semiconductor layer A3.

  As described above, the surface emitting laser 30 has a low-resistance current confinement structure because the tunnel junction layer 22 and the semiconductor layer A3R recessed inward are formed. Further, the transverse mode control of the laser beam is performed by the recessed semiconductor layer A3R. Accordingly, it is possible to provide the surface emitting laser 30 having a long lifetime and high output reliability. Further, it is possible to provide a surface emitting laser 30 having good coupling efficiency to a lens or fiber and excellent oscillation characteristics.

  In this embodiment, an example in which one depressed semiconductor layer A3R is provided has been described, but two or more layers may be provided. Of the semiconductor layer A3 that forms the first reflecting mirror 31, a layer that does not form the depressed semiconductor layer A3R is formed by resisting the side surface of the semiconductor layer A3 when forming the depressed semiconductor layer A3R by selective etching. For example, it may be formed with protection.

  The recessed semiconductor layer A3R is preferably formed so that the impurity concentration is not uniform in the stacking direction but has an impurity concentration distribution. For example, the recessed semiconductor layer A3R is preferably doped with impurities so as to have a high concentration at the interface with the upper layer or the lower layer of the recessed semiconductor layer A3R. More specifically, the recessed semiconductor layer A3R is preferably doped so that the impurity concentration becomes high at the interface with the upper layer or the interface with the lower layer of the recessed semiconductor layer A3R. Thereby, the electrical resistance of the interface can be reduced.

  In the present embodiment, the semiconductor stacked body LY2 composed of the first reflecting mirror 31, the semiconductor structure layer 47, and the second reflecting mirror 24 has a central axis CA with the axis in the stacking direction, that is, the direction perpendicular to the semiconductor layer of the semiconductor stacked body LY2. It has a rotationally symmetric shape. In the present embodiment, the semiconductor stacked body LY2 and the recessed semiconductor layer A3R have a coaxial cylindrical shape.

  Note that the semiconductor stacked body LY2 does not necessarily have a rotationally symmetric shape. The recessed semiconductor layer A3R preferably has a rotationally symmetric shape with respect to the central axis CA, but is not limited thereto. The recessed semiconductor layer A3R only needs to have a shape corresponding to a desired beam profile or transverse mode control.

  As described above in detail, according to the surface emitting laser 10 of the present embodiment, a surface emitting laser having high stability and reliability and having a long lifetime can be provided. Further, it is possible to provide a surface emitting laser with little light loss, excellent lateral mode controllability, and excellent oscillation characteristics.

  In the first and second embodiments, the case where the dielectric DBR is used as the second reflecting mirror has been described. However, the semiconductor DBR can also be used for the second reflecting mirror. A surface-emitting laser 50 according to the third embodiment will be described with reference to FIG. In the surface-emitting laser 50, substantially the same or equivalent parts as those of the surface-emitting laser 10 of the first embodiment and the surface-emitting laser 30 of the second embodiment are denoted by the same reference numerals. Compared with the surface-emitting laser 30 of the second embodiment, the surface-emitting laser 50 uses a semiconductor DBR as the second reflecting mirror, and provides a recessed semiconductor layer A4R in the second reflecting mirror. It is different.

  As shown in FIG. 6, the surface emitting laser 50 includes a first reflecting mirror 31 and a second reflecting mirror 64 that are disposed to face each other with the semiconductor structure layer 47 interposed therebetween. A second reflecting mirror 64 is disposed on the third semiconductor layer 23. An upper n-electrode 65 electrically connected to the second reflecting mirror 64 is provided on the second reflecting mirror 64.

  The second reflecting mirror 64 is configured by alternately stacking semiconductor layers A4 having a third composition and semiconductor layers B4 having a fourth composition having a refractive index different from that of the semiconductor layer A4. In the present embodiment, the second reflecting mirror 64 is made of an n-type semiconductor DBR doped with impurities. The third composition semiconductor layer A4 is made of, for example, n-AlInN, and the fourth composition semiconductor layer B4 is made of, for example, n-GaN. The second reflecting mirror 64 has a semiconductor layer A4R having a side wall RS3 recessed inward, and has a gap G41 outside the side wall RS3. At least one of the third composition semiconductor layers A4 constituting the second reflecting mirror 64 is formed as a depressed semiconductor layer A4R.

  In the present embodiment, the current from the upper n electrode 65 flows toward the lower n electrode 46 due to the characteristics of the tunnel junction layer 22. More specifically, a current flows from the n-type semiconductor layer 23 through the tunnel junction layer 22 to the p-type semiconductor layer 21, and a current flows in a direction from the upper n electrode 65 to the lower n electrode 46. The current from the upper n-electrode 65 is confined in the recessed semiconductor layer A4R. The current confined current reaches the active layer 15 through the n-type semiconductor layer 23, the tunnel junction layer 22, and the p-type semiconductor layer 21. Since the confined current flows through the active layer, the emitted light from the active layer 15 can be efficiently emitted.

  In the present embodiment, the second semiconductor layer 21, the tunnel junction layer 22, and the third semiconductor layer 23 have a common side wall. Therefore, the tunnel junction layer 22 is not a current confinement structure and does not have a configuration that can cause a leakage current. Further, the surface emitting laser 50 does not have a structure with high contact resistance with the p-type semiconductor layer 21 or a structure with large light absorption. Therefore, the current confinement structure of this embodiment is a current confinement structure with a low resistance and a low resistance.

  In the present embodiment, the emitted light from the active layer 15 is guided to the region CR2 formed by the semiconductor layer B4 sandwiched (or adjacent) between the recessed semiconductor layer A4R and the recessed semiconductor layer A4R. The transverse mode is controlled and stable laser light can be obtained. In this case, the recessed semiconductor layer A4R preferably has a rotationally symmetrical shape with the axis in the stacking direction of the surface emitting laser 50 as the central axis CA, and is formed coaxially with the central axis CA.

  As described above, according to the surface emitting laser 50 of this embodiment, the confined current can be passed through the active layer through the low resistance current path, and an efficient current confinement structure can be obtained. . Accordingly, it is possible to secure a highly efficient current confinement structure and current path with low leakage current and low resistance. In addition, it is possible to provide a surface emitting laser that is excellent in lateral mode controllability, high reliability, and high output.

  As a modified example of the first embodiment, a semiconductor layer recessed inward may be provided in the second semiconductor layer 21. With reference to FIG. 7, a surface emitting laser 70 according to a fourth embodiment will be described. Compared with the surface emitting laser 10 of Example 1, the semiconductor layer 21R that is depressed in the second semiconductor layer (p-type semiconductor layer) 21 and the semiconductor layer 14R that is depressed in the first semiconductor layer 12 are provided. This is different from the surface emitting laser 10 in that it is not provided.

  The second semiconductor layer 21 is divided into two layers, and the lower layer located on the side closer to the substrate 17 with respect to one of the two layers is a second semiconductor layer (p-type semiconductor layer) 21A, 21A. The layer located on the upper layer is referred to as a second semiconductor layer (p-type semiconductor layer) 21B. The second semiconductor layer 21 </ b> B and the third semiconductor layer 23 are separated from each other by the tunnel junction layer 22 over the entire second semiconductor layer 21 </ b> B and the third semiconductor layer 23.

  The recessed semiconductor layer 21R is formed as a semiconductor layer recessed inward from the sidewalls of the upper second semiconductor layer 21B and the lower second semiconductor layer 21A sandwiching the semiconductor layer 21R adjacent to the semiconductor layer 21R. Yes.

  In this embodiment, the current from the upper n electrode 25 flows toward the lower n electrode 26 due to the characteristics of the tunnel junction layer 22. The current that flows from the n-type semiconductor layer 23 through the tunnel junction layer 22 to the p-type semiconductor layer 21B is confined in the recessed semiconductor layer 21R. The current confined current flows to the active layer through the p-type semiconductor layer 21A. In the p-type semiconductor layer 21A, the spread of current is smaller than that of the n-type semiconductor layer. Therefore, the current confined current reaches the active layer without spreading greatly, and the emitted light from the active layer 15 can be emitted with high efficiency.

  In the present embodiment, the second semiconductor layer 21B, the tunnel junction layer 22 and the third semiconductor layer 23 have a common side wall. Therefore, the tunnel junction layer 22 is not a current confinement structure and does not have a configuration that can cause a leakage current. The surface emitting laser 70 does not have a structure with high contact resistance between the p-type semiconductor layer 21A and the p-type semiconductor layer 21B or a structure with large light absorption. Accordingly, the surface emitting laser 70 has a low-current narrowing structure and a current path with little leakage current.

  In addition, in the p-type semiconductor layer 21, there are a semiconductor layer 21 </ b> R and a gap G <b> 21 recessed inward in the path of light emitted from the active layer 15. The gap G21 has a lower refractive index than the recessed semiconductor layer 21R. Therefore, the field of the laser beam is confined in the recessed semiconductor layer 21R, and transverse mode control is performed.

  As described above, also in the surface emitting laser 70 of the present embodiment, a highly efficient current confinement structure and a current path with low leakage current and low resistance can be ensured. In addition, it is possible to provide a surface emitting laser that has excellent lateral mode controllability, high reliability, and a long lifetime.

  As another modification of the first embodiment, a semiconductor layer recessed inward can be provided in the third semiconductor layer 23. In addition, the first embodiment can be combined with the second embodiment. With reference to FIG. 8, a surface emitting laser 80 according to the fifth embodiment will be described. In this embodiment, in addition to the configuration of the surface emitting laser 30 according to the second embodiment, a semiconductor layer 21R that is recessed in the third semiconductor layer (n-type semiconductor layer) 23 is provided.

  The second semiconductor layer 23 is divided into two layers, and a layer located on the side (lower layer) closer to the n-type substrate 37 with respect to one of the two layers is a third semiconductor layer (n-type semiconductor). The layer located above the layers 23A and 23A is referred to as a third semiconductor layer (n-type semiconductor layer) 23B. The second semiconductor layer 21 and the third semiconductor layer 23A are provided so as to be separated from each other by the tunnel junction layer 22 throughout the second semiconductor layer 21 and the third semiconductor layer 23A.

  The recessed semiconductor layer 23R is formed as a semiconductor layer which is adjacent to the semiconductor layer 23R and recessed inward from the sidewalls of the upper third semiconductor layer 23B and the lower second semiconductor layer 23A sandwiching the semiconductor layer 23R. Yes.

  In the present embodiment, the current from the upper n electrode 25 flows toward the lower n electrode 46 due to the characteristics of the tunnel junction layer 22. The current injected from the upper n-electrode 25 into the n-type semiconductor layer 23 is confined with a low resistance in the recessed semiconductor layer 23 </ b> R, passes through the tunnel junction layer 22, and flows into the p-type semiconductor layer 21. The current flowing through the p-type semiconductor layer 21 to the active layer passes through the first semiconductor layer 32 and is again confined by the depressed semiconductor layer A3R included in the first reflecting mirror. Therefore, the emitted light from the active layer 15 can be emitted with higher efficiency.

  In the present embodiment, the second semiconductor layer 21, the tunnel junction layer 22, and the third semiconductor layer 23A have a common side wall. Therefore, the tunnel junction layer 22 is not a current confinement structure and does not have a configuration that can cause a leakage current. Further, the surface emitting laser 80 does not have a structure with high contact resistance with the p-type semiconductor layer 21 or a structure with large light absorption. Accordingly, the surface emitting laser 80 has a low-current narrowing structure and a current path with little leakage current.

  In addition, in the n-type semiconductor layer 23, there are a semiconductor layer 23 </ b> R and a gap G <b> 23 that are recessed inward in the path of light emitted from the active layer 15. The gap G23 has a lower refractive index than the recessed semiconductor layer 23R. Therefore, the field of the laser beam is confined in the recessed semiconductor layer 23R, and lateral mode control is performed.

  As described above, also in the surface emitting laser 80 of the present embodiment, a highly efficient current confinement structure and a current path with low leakage current and low resistance can be secured. In addition, it is possible to provide a surface emitting laser that has excellent lateral mode controllability, high reliability, and a long lifetime.

  Examples 1 to 5 can be combined as appropriate. For example, the current confinement structure can be doubled by combining Example 1 and Example 4. Current confinement can be increased, and higher lateral mode controllability can be obtained.

[Method for Manufacturing Surface Emitting Laser 10]
With reference to FIG. 9, the manufacturing method of the surface emitting laser 10 which concerns on Example 1 is demonstrated. FIG. 9 is a flowchart showing an outline of the manufacturing process of the surface emitting laser 10. As shown in FIG. 9, in the manufacturing process of the surface emitting laser 10, first, semiconductor layers constituting the first reflecting mirror 11 and the semiconductor structure layer 27 are grown (step S11).

  The semiconductor layer is grown by epitaxial growth using a MOVPE (Metal-organic Vapor Phase Epitaxy) apparatus in this embodiment. In the present embodiment, the MOVPE method is used as the crystal growth method, but instead of the MOVPE method, for example, when performing low-speed crystal growth at a lower temperature, a line-of-sight epitaxy (MBE) method (MBE) method is used. Etc. may be used.

  Next, using the resist pattern as a mask, the semiconductor structure layer 27 is etched by dry etching to form a mesa shape (step S12).

  Subsequently, the p-type semiconductor layer 21 is activated by activation annealing (step S13), and a recessed semiconductor layer 14R is formed by wet etching. Specifically, in step P14, the side surface of the n-type semiconductor layer 14 is selectively etched using an etchant such as hot nitric acid (for example, a processing temperature of 100 ° C.), so that the semiconductor layer 14R recessed inward is formed. Form.

  Thereafter, an electrode is formed (step S15). Specifically, the upper n electrode 25 and the lower n electrode 26 are formed by laminating metal films. Examples of the metal used for the electrode include Ti, Al, Au, and the like. In this embodiment, the upper n-electrode 25 has a structure in which, for example, Ti / Al / Ti / Au is laminated. The upper electrode 25 is formed on the third semiconductor layer 23 in a ring shape (including the current confinement region inside).

  Finally, the second reflecting mirror 24 is disposed on the third semiconductor layer 23 by a lift-off method or the like (step S16). The surface emitting laser 10 is manufactured through the above steps.

  The details of the growth process of the semiconductor layers constituting the first reflecting mirror 11 and the semiconductor structure layer 27 in step S11 will be described. First, undoped GaN is grown as a base layer 16 on the GaN substrate 17 by, for example, 500 nm. For example, the substrate temperature is set to 1050 ° C., and TMGa (trimethylgallium) and ammonia gas are supplied as source gases. The substrate used may be a C-plane substrate, and may have a nonpolar surface, a semipolar surface, or an arbitrary off angle.

Next, the first reflecting mirror 11 is formed on the base layer 16. In this example, 40.5 pairs of 45 nm AlInN layers and 10 nm GaN layers are alternately laminated with 410 nm as the center wavelength. For example, the growth of the AlInN layer is performed by setting the substrate temperature to 815 ° C. and supplying TMA (trimethylaluminum), TMI (trimethylindium), and ammonia gas as source gases into the reaction furnace. The growth of the GaN layer is performed by setting the substrate temperature to 815 ° C. and supplying TMGa and ammonia gas into the reaction furnace. The composition of AlInN is, for example, Al _0.82 In _0.18 N.

Subsequently, the first semiconductor layer 12 is formed on the first reflecting mirror 11. In this embodiment, the first semiconductor layer 12 has an n-type semiconductor layer 13 and an n-type semiconductor layer 14. For example, the n-type GaN layer 13A as the n-type semiconductor layer 13 is grown to 350 nm, and Si is doped as an impurity at a concentration of 7 × 10 ¹⁸ cm ⁻³ . Subsequently, an AlInN layer 14 as an n-type semiconductor layer 14 is grown on the n-type GaN layer 13A and doped at a concentration of 1 to 6 × 10 ¹⁹ cm ⁻³ . Then, an n-type GaN layer 13B as an n-type semiconductor layer 13 is grown on the AlInN layer 14 by 40 nm.

  An active layer 15 is formed on the second semiconductor layer 12. For example, the active layer 15 is formed by alternately stacking at least one 3 nm GaInN quantum well layer and 6 nm barrier layer.

Next, the second semiconductor layer 21 is grown on the active layer 15. The second semiconductor layer 21 only needs to be composed of at least one semiconductor layer. In the present embodiment, the second semiconductor layer 21 is composed of a p-type semiconductor layer 21A and a p-type semiconductor layer 21B. For example, the p-type semiconductor layer 21A is formed by growing an Al _0.15 Ga _0.85 N layer to 20 nm and doping Mg with a concentration of 2 × 10 ¹⁹ cm ⁻³ using CP ₂ Mg (cyclopentadienyl magnesium) gas as a raw material. To do. The p-type semiconductor layer 21B is formed by growing a GaN layer by 70 nm on the p-type semiconductor layer 21A and doping Mg with a concentration of 2 × 10 ¹⁹ cm ⁻³ .

Subsequently, a tunnel junction layer 22 is grown on the p-type semiconductor layer 21. The tunnel junction layer 22 forms a high-concentration p-type semiconductor layer 22A and a high-concentration n-type semiconductor layer 22B in this order.
For the high concentration p-type semiconductor layer 22A, for example, the substrate temperature is set to 710 ° C., and a GaInN layer doped with high concentration Mg is grown to 3 nm. The Mg concentration as an impurity of the high-concentration p-type semiconductor layer 22A is, for example, about 5 × 10 ¹⁹ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ , more specifically, 1 × 10 ²⁰ cm ^{−3 to} 3 × 10 ^20. About cm ⁻³ is preferable.

Next, as the high-concentration n-type semiconductor layer 22B, for example, a GaN layer doped with high-concentration Si is grown by 7.5 nm. The Si concentration as the impurity of the high-concentration n-type semiconductor layer 22B is, for example, about 1 × 10 ²⁰ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ , more specifically 3 × 10 ²⁰ cm ^{−3 to} 6 × 10 ^20. About cm ⁻³ is preferable.

Subsequently, an n-type semiconductor layer (third semiconductor layer) 23 is formed on the tunnel junction layer 22. As the third semiconductor layer (n-type semiconductor layer) 23, for example, a GaN layer doped with Si is grown to 110 nm. The Si impurity concentration is, for example, 7 × 10 ¹⁸ cm ⁻¹ .

  The first reflecting mirror 11 and the semiconductor structure layer 27 are formed by the above method. In the manufacturing method of the present embodiment, all the semiconductor layers constituting the first reflecting mirror 11 and the semiconductor structure layer 27 (except for the substrate 17 and the base layer 16) can be formed on the epitaxial growth surface by MOVPE.

  For example, in the case where a current confinement layer is formed by a buried layer obtained by growing a semiconductor layer on a dry etched surface after forming a current confinement layer by dry etching of a tunnel junction layer, Defects are likely to occur at the interface (especially the side wall) with the buried layer. In addition, current easily flows near the interface where the defect occurs, which may be a leak path.

  However, in the manufacturing method of this embodiment, it is not necessary to grow the semiconductor layer again by MOVPE on the surface that has undergone another process such as forming a buried layer on the surface after dry etching. Therefore, a process that causes a leak path is unnecessary, and there is no problem of an increase in leak current. Further, the film thickness can be controlled with high accuracy, and a high-quality semiconductor layer with few defects can be grown.

  In the case of the configuration of the surface emitting laser 50 according to the third embodiment, in addition to the first reflecting mirror 31 and the semiconductor structure layer 47, the second reflecting mirror 64 can be formed in step S11. There is no need to form the second reflecting mirror. In addition, the electrode can be easily formed.

  Of the semiconductor layers constituting the first reflecting mirror, the semiconductor structure layer, and the second reflecting mirror, there is no resistance to the etchant that forms the recessed semiconductor layer, and the semiconductor layer that does not form the recessed semiconductor layer is a step. Before performing the wet etching in S14, the resist may be protected with a resist resistant to the wet etching solution.

  As described above in detail, according to the vertical cavity light emitting device of the present invention, a surface emitting laser having a high reliability and a long life having a current confinement structure and a current path with a low leakage current and a low resistance. Can be provided. Further, it is possible to provide a surface emitting laser with little light loss, excellent lateral mode controllability, and excellent oscillation characteristics, stability, and reliability.

  In addition, according to the manufacturing method of the present invention, a semiconductor layer structure layer can be formed by highly accurate film thickness control with a method in which leakage current hardly occurs, and there is little leakage current, and stability and reliability are excellent. A surface emitting laser can be manufactured.

10, 30, 50, 70, 80 Surface emitting laser 11, 31 First reflecting mirror 12, 32 First semiconductor layer 15 Active layer 21 Second semiconductor layer 22 Tunnel junction layer 23 Third semiconductor layer 24 Second reflecting mirror 25, 65 Upper n-electrode 26, 46 Lower n-electrode 27, 47, 77, 87 Semiconductor structure layer

Claims (14)

A first reflecting mirror made of a semiconductor DBR layer;
A first semiconductor layer formed on the first reflecting mirror and made of at least one semiconductor layer;
An active layer formed on the first semiconductor layer;
A second semiconductor layer formed on the active layer and comprising at least one semiconductor layer having a conductivity type opposite to that of the first semiconductor layer;
A tunnel junction layer formed on the second semiconductor layer;
A third semiconductor layer formed on the tunnel junction layer and comprising at least one semiconductor layer having a conductivity type opposite to that of the second semiconductor layer;
A second reflecting mirror disposed on the third semiconductor layer so as to face the first reflecting mirror;
Have
The second semiconductor layer and the third semiconductor layer are separated from each other over the entire second semiconductor layer and the third semiconductor layer by the tunnel junction layer,
At least one of the first reflecting mirror, the second reflecting mirror, the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer is inside the side walls of the adjacent upper and lower semiconductor layers. A vertical cavity light emitting device having a recessed semiconductor layer.   The vertical cavity light emitting device according to claim 1, wherein the depressed semiconductor layer is provided adjacent to the active layer.   The vertical cavity light emitting device according to claim 2, wherein the depressed semiconductor layer is provided in the first semiconductor layer.   The recessed semiconductor layer is provided adjacent to the tunnel junction layer, and the second semiconductor layer and the third semiconductor layer are formed of the second semiconductor layer and the third semiconductor layer by the tunnel junction layer and the recessed semiconductor layer. The vertical resonator type light emitting device according to claim 1, wherein the vertical cavity type light emitting device is separated from each other over the entire semiconductor layer.   When the emission wavelength of the active layer is λ and the average refractive index of the semiconductor layer between the depressed semiconductor layer and the active layer is n, the distance in the layer thickness direction between the depressed semiconductor layer and the active layer is λ / 5. The vertical cavity light emitting device according to claim 1, which is k times 2n (k is a natural number).   The semiconductor DBR layer is configured by alternately laminating semiconductor layers having first and second compositions having different compositions, and at least one semiconductor layer having the first composition is formed as the recessed semiconductor layer. The vertical resonator type light emitting device according to claim 1.   The second reflecting mirror is a semiconductor multilayer film reflecting mirror configured by alternately laminating semiconductor layers having third and fourth compositions having different compositions, and at least one semiconductor layer having the third composition is The vertical cavity light emitting device according to claim 1, wherein the vertical cavity light emitting device is a recessed semiconductor layer.   The vertical resonator type according to claim 6 or 7, wherein the continuous semiconductor layers of the first composition and the second composition, or the continuous semiconductor layers of the third composition and the fourth composition are the recessed semiconductor layers. Light emitting element.   The vertical cavity light emitting device according to any one of claims 1 to 8, wherein the recessed semiconductor layer is doped with impurities so as to have an impurity concentration distribution in a stacking direction.   The semiconductor stacked body composed of the first reflecting mirror, the second reflecting mirror, the first semiconductor layer, the active layer, the second semiconductor layer, and the third semiconductor layer rotates around the axis in the stacking direction. 10. The vertical cavity light emitting device according to claim 1, wherein the vertical cavity type light emitting device has a symmetrical shape, and the recessed semiconductor layer has a rotationally symmetric shape coaxial with the semiconductor stacked body.   The vertical resonator type light emitting device according to claim 10, wherein the semiconductor laminate has a cylindrical shape including an elliptic cylinder.   The vertical cavity light emitting device according to claim 1, wherein the recessed semiconductor layer contains Al in its composition. Forming a first reflecting mirror comprising a semiconductor DBR layer;
Forming a first semiconductor layer comprising at least one semiconductor layer on the first reflecting mirror;
Forming an active layer on the first semiconductor layer;
Forming a second semiconductor layer comprising at least one semiconductor layer having a conductivity type opposite to that of the first semiconductor layer on the active layer;
Forming a tunnel junction layer on the second semiconductor layer;
A third semiconductor layer made of at least one semiconductor layer having a conductivity type opposite to that of the second semiconductor layer is formed on the tunnel junction layer, and the second semiconductor layer and the third semiconductor layer are formed by the tunnel junction layer. Forming the second semiconductor layer and the third semiconductor layer so as to be separated from each other;
Forming a second reflecting mirror facing the first reflecting mirror on the third semiconductor layer;
At least one of the first reflecting mirror, the second reflecting mirror, the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer is recessed inward from the side walls of the adjacent upper and lower semiconductor layers. A method of manufacturing a vertical resonator type light emitting device, in which a semiconductor layer is formed.   The manufacturing method according to claim 13, wherein the recessed semiconductor layer contains Al in its composition.

Images