JP2017168807A - Ic package, ic inlet, and non-contact ic card - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an IC package which is thinner than a conventional IC structure and achieves excellent impact resistance.SOLUTION: An IC package includes: a chip base 1 for reinforcement; an IC chip 2 fixed to the chip base 1; and a resin sealing layer 3 covering an outer surface of the IC chip 2. An external electrode 7 is exposed on a package surface at a side facing the chip base 1 across the IC chip 2. A terminal 10 of the IC chip 2 is exposed to an upper surface side of the resin sealing layer 3. An upper surface of the resin sealing layer 3 is covered by a first resin layer 4 and a second resin layer 5. A sheet-like wiring layer 6 provided at the first resin layer 4 is connected to the terminal 10 of the IC chip 2, and the sheet-like external electrode 7 provided at the second resin layer 5 is connected to the wiring layer 6 of the first resin layer 4.SELECTED DRAWING: Figure 1

Description

  The present invention provides an IC package in which an IC chip and external electrodes are provided on a chip base, an IC inlet in which an IC package and an antenna are arranged on an inlet base, and a plurality of protective sheets laminated on both sides of the IC inlet. It is related with the non-contact IC card obtained. In the following description, these IC package, IC inlet, and non-contact IC card are collectively referred to as “IC components” as appropriate.

  Regarding the IC structure of the present invention, the present applicant has proposed Patent Document 1. In this case, after fixing the IC chip on the lead frame having the terminal portion, the terminal of the IC chip and the terminal portion (external electrode) of the lead frame are electrically connected by a bonding wire, and the outer surface of the IC chip and the bonding wire Is sealed with resin, and a reinforcing layer is adhered to the outer surface of the resin sealing layer to constitute an IC package. Further, an IC package is fixed on an insulating sheet (inlet base), and an antenna is fixed to a terminal portion of a lead frame to constitute an IC inlet. Furthermore, a non-contact IC card is configured by laminating a plurality of protective sheets on both sides of the IC inlet.

  This type of IC package is also disclosed in the semiconductor device of Patent Document 2. There, a semiconductor chip (IC chip) is bonded and fixed on a flat plate (chip base) made of a stainless thin plate material, and the outer surface of the semiconductor chip is covered with an insulating material layer. Next, an opening is formed in the insulating material layer facing the terminal of the semiconductor chip, electrolytic plating is performed on the upper surface of the insulating material layer to form a wiring layer, and a solder resist layer is formed on the outer surface thereof. Furthermore, a solder ball (external electrode) is formed in the opening of the solder resist layer facing the wiring layer to constitute a semiconductor chip. The electrode pads (terminals) of the semiconductor chip and the wiring layer are connected via via portions in openings formed in the insulating material layer. That is, in the semiconductor device of Patent Document 2, by forming the wiring layer in a state of being drawn out around the semiconductor chip, the solder balls are arranged in a wide area with a large arrangement pitch, and the electrode pad of the semiconductor chip It is possible to cope with miniaturization.

JP 2014-178875 A (paragraph number 0032, FIG. 1) JP 2010-219489 A (paragraph numbers 0016 to 0022, FIG. 1)

  The IC package of Patent Document 1 has its lower surface reinforced with a lead frame made of a metal material such as Cu-Fe or stainless steel, and the upper surface is covered with a reinforcing material, so that the impact resistance is improved while making the IC package thinner. it can. However, since the terminal of the IC chip and the terminal portion of the lead frame are connected by a bonding wire that is curved in a chevron shape, the resin sealing layer is inevitably thickened by the bending height of the bonding wire. There is a limit to forming a thin structure.

  In that respect, in the semiconductor device of Patent Document 2, since the wiring layer formed by the electrolytic plating method is connected to the terminal of the semiconductor chip via the via portion, the thickness from the flat plate to the wiring layer can be reduced. However, since the solder resist layer is formed on the outer surface of the wiring layer and the solder ball is formed in the opening of the solder resist layer facing the wiring layer, the thickness above the wiring layer becomes large, and the IC package of Patent Document 1 Similarly to the above, there is a limit to reducing the overall thickness of the semiconductor device. Also, in the process of forming the wiring layer by applying electrolytic plating, the via part is formed in the small opening formed in the insulating material layer, so it is difficult to form the via part uniformly, and the electrode pad and wiring of the semiconductor chip There is a possibility that a connection failure may occur between the connection portion (via portion) of the layer.

The present invention has been made in order to solve the problems of the conventional IC structure as described above, and is thinner than the conventional IC structure, and also has an impact resistance, an IC package, an IC inlet, And it aims at providing a non-contact IC card.
Another object of the present invention is to provide a non-contact IC card having no irregularities on the card surface and excellent printability.

  As shown in FIG. 1, an IC package according to the present invention includes a reinforcing chip base 1, an IC chip 2 fixed on the chip base 1, and a resin sealing layer 3 that covers the outer surface of the IC chip 2. . The external electrode 7 is exposed on the surface of the package facing the chip base 1 with the IC chip 2 in between. The terminal 10 of the IC chip 2 is exposed on the upper surface side of the resin sealing layer 3. The upper surface of the resin sealing layer 3 is covered with the first resin layer 4 and the second resin layer 5. Then, the wiring layer 6 provided on the first resin layer 4 is connected to the terminal 10 of the IC chip 2, and the external electrode 7 provided on the second resin layer 5 is connected to the wiring layer 6 of the first resin layer 4. Features.

  The chip base 1 is formed of a single layer metal material. The IC chip 2 is bonded and fixed to the chip base 1 with a die bond material 11.

  As shown in FIG. 6, the chip base 1 is formed in a multi-layer shape with a first base layer 26 formed of a metal material and a second base layer 27 formed of a plastic material laminated on the lower surface of the first base layer 26. . The IC chip 2 is bonded and fixed to the first base layer 26 with the die bond material 11.

  Terminals 10 and 10 are arranged on both the left and right sides of the IC chip 2. The IC chip 2 is disposed in the center of the chip base 1 and a pair of wiring layers 6 and 6 connected to the terminals 10 are continuously provided in a direction away from the terminals 10 and 10. The external electrode 7 is connected to the extended end side of the wiring layer 6 and is exposed along the periphery of the IC package.

  The total thickness of the IC package is 0.40 mm or less.

  The thickness of the chip base 1 is set to 0.10 mm or more and 0.20 mm or less.

  The thickness of the die bond material 11 is 0.01 mm or more and 0.03 mm or less, and the Young's modulus of the die bond material 11 is 3 GPa or less.

  As shown in FIG. 12, the wiring layer 6 that connects the terminal 10 of the IC chip 2 and the external electrode 7 includes a terminal-side wiring portion 51 that is connected to the terminal 10 and an electrode-side wiring portion that is connected to the external electrode 7. 52 and an intermediate wiring portion 53 that connects both 51 and 52. The electrode side wiring part 52 is arranged outside the arrangement region of the IC chip 2 in plan view.

  The external electrode 7 is arranged outside the arrangement area of the IC chip 2 in plan view.

  The corner portions of the wiring layer 6 and the external electrode 7 are rounded.

  An inner reinforcing layer 54 formed simultaneously with the wiring layer 6 is formed around the pair of wiring layers 6. The pair of wiring layers 6 and the inner reinforcing layer 54 are insulated by a wiring boundary portion 56 provided in the first resin layer 4.

  A group of vent holes 60 are formed in the inner reinforcing layer 54 (see FIG. 16).

  As shown in FIG. 19, an external electrode 7 and an external reinforcing layer 61 that is formed simultaneously with the electrode 7 are formed on the second resin layer 5. The outer reinforcing layer 61 is formed in a state of being located outside the arrangement area of the IC chip 2 and outside the formation area of the wiring layer 6.

  As shown in FIG. 7, the IC inlet according to the present invention fixes the IC package 32 and the antenna 33 on an inlet base 31 having insulation. The antenna 33 is connected to the external electrode 7 of the IC package 32.

  The antenna 33 is welded to the external electrode 7 of the IC package 32. In the above IC inlet, the welding position of the antenna 33 welded to the external electrode 7 is biased toward the periphery of the IC package 32.

  As shown in FIG. 10, the non-contact IC card according to the present invention is configured by laminating and fixing a plurality of cover sheets 42, 43, and 44 on the upper and lower surfaces of the IC inlet 41.

  In the above non-contact IC card, the thickness of the cover sheet 43 laminated on the upper surface of the IC inlet 41 is set to be the same as the height dimension of the IC package 32, and the window 45 for accommodating the IC package 32 is opened in the cover sheet 43. To do.

In the IC package according to the present invention, the outer surface of the IC chip 2 fixed on the chip base 1 is covered with the resin sealing layer 3 so that the terminals 10 of the IC chip 2 are exposed on the upper surface side of the resin sealing layer 3. . Further, the upper surface of the resin sealing layer 3 is covered with the first resin layer 4, and the wiring layer 6 provided on the first resin layer 4 is connected to the terminal 10 of the IC chip 2. Further, the upper surface of the first resin layer 4 was covered with the second resin layer 5, and the external electrode 7 provided on the second resin layer 5 was connected to the wiring layer 6 of the first resin layer 4. According to such an IC package, the thickness of the IC package 2 from the upper surface of the IC chip 2 to the external electrode 7 on the surface of the package can be made sufficiently small to make the IC package thinner than in the conventional IC package. Further, the thickness of the resin sealing layer 3 and the chip base 1 is increased by an amount that can reduce the layer thickness between the upper surface of the IC chip 2 and the external electrode 7 on the package surface, thereby improving the impact resistance of the IC package. Alternatively, the structural strength of the IC package can be improved. As described above, according to the IC package of the present invention, it is possible to provide an IC package that is thinner than the conventional IC package and excellent in impact resistance.
Since the contact area between the terminal 10 of the IC chip 2 and the wiring layer 6 can be increased as compared with the connection using the bonding wire, the heat of the IC chip 2 is more efficiently conducted to the wiring layer 6 and the external electrode 7. Can dissipate heat into the atmosphere. As described above, according to the present invention, it is possible to effectively prevent the occurrence of malfunction caused by the heat generation of the IC chip 2, so that the IC has excellent heat dissipation and high reliability compared to the conventional IC package. Can provide package.

  According to the IC package in which the IC chip 2 is bonded and fixed to the chip base 1 formed of a single layer metal material with the die bond material 11, the external impact is applied to the die bond material 11 while enhancing the structural strength of the IC package with the chip base 1. Can be relaxed. Therefore, the structural strength can be enhanced while improving the impact resistance of the IC package. Further, since the chip base 1 is formed of a single layer metal material, the number of manufacturing steps for the IC package can be reduced.

  When the chip base 1 is formed in multiple layers by the first base layer 26 formed of a metal material and the second base layer 27 formed of a plastic material, the second base layer is formed while reinforcing the IC package with the first base layer 26. 27 can mitigate external impact. Also, the external impact can be reduced by the die bond material 11. Therefore, the structural strength of the IC package can be improved by the first base layer 26 while the impact resistance of the IC package is sufficiently enhanced by the second base layer 27.

  When a pair of wiring layers 6 and 6 are extended in a direction away from the terminals 10 and 10 and the external electrode 7 is connected to the continuous end side of the wiring layer 6 and exposed along the peripheral edge of the IC package, welding heat is generated. Thus, the IC chip 2 can be prevented from malfunctioning. In the manufacturing process of the IC inlet, the antenna 33 is welded to the external electrode 7. However, the closer the welding position is to the IC chip 2, the shorter the heat conduction path, so that the welding heat is easily transmitted to the IC chip 2. However, if the pair of wiring layers 6 and 6 are continuously extended away from the terminals 10 and 10 and the external electrode 7 is connected to the continuous end side of the wiring layer 6, the heat conduction path is lengthened and the welding heat is reduced to IC. It is possible to prevent the IC chip 2 from malfunctioning due to welding heat by avoiding transmission to the chip 2 as much as possible.

  According to the IC package having a total thickness of 0.40 mm or less, the IC inlet is made using the package, and the IC inlet is used to make a non-contact IC card. In addition, the entire thickness of the non-contact IC card can be reduced. Therefore, the non-contact IC card that incorporates the IC package according to the present invention can be reliably produced as a non-contact IC card that conforms to the standard (JISX6301) of the non-contact IC card.

  The thickness of the chip base 1 is set to 0.10 mm or more and 0.20 mm or less for the following reason. When the thickness of the chip base 1 is less than 0.10 mm, the mechanical strength is insufficient, and the handling of the IC package is hindered when the IC package is manufactured. On the other hand, if the thickness of the chip base 1 exceeds 0.20 mm, the entire thickness of the IC package becomes large, and it becomes difficult to produce a non-contact IC card conforming to the standard of non-contact IC cards (JISX6301).

  The reason why the thickness of the die bond material 11 is 0.01 mm or more and 0.03 mm or less and the Young's modulus of the die bond material 11 is 3 GPa or less is as follows. When the thickness of the die bond material 11 is less than 0.01 mm, an external force is easily transmitted to the IC chip 2 and the IC chip 2 is easily damaged. On the other hand, if the thickness of the die bond material 11 exceeds 0.03 mm, the total thickness of the IC package becomes large, and it becomes difficult to produce a non-contact IC card conforming to the standard for non-contact IC cards (JISX6301). Furthermore, when an external impact is applied, the IC chip 2 that has received an external force is bent and deformed, and is easily damaged.

  The terminal-side wiring part 51, the electrode-side wiring part 52, and the intermediate wiring part 53 constitute the wiring layer 6, and the electrode-side wiring part 52 is arranged outside the arrangement area of the IC chip 2 in plan view. According to such an IC package, when an external force acts on the IC package, even if a crack is formed at the boundary surface between the electrode-side wiring portion 52 and the first resin layer 4, the position where the crack is formed is determined by the IC chip. 2 can be shifted around the top surface of 2. Therefore, compared with the case where a crack occurs on the upper surface of the IC chip 2, it is possible to avoid the crack from reaching the upper surface of the IC chip 2 and prevent the IC chip 2 from being damaged at the same time as the crack starts to grow.

  According to the IC package in which the external electrode 7 is arranged outside the arrangement region of the IC chip 2 in plan view, when an external force acts on the IC package, a crack is formed at the boundary surface between the external electrode 7 and the second resin layer 5. Even if it is done, the position where the crack is formed can be shifted around the upper surface of the IC chip 2. Accordingly, in the same manner as described above, the crack is prevented from reaching the upper surface of the IC chip 2 as much as possible compared with the case where the crack is generated on the upper surface of the IC chip 2, and the IC chip 2 is damaged at the same time as the crack starts to grow. Can be prevented.

  When the corner portions of the wiring layer 6 and the external electrode 7 are rounded, cracks are formed starting from the corner portion as compared with the IC package having the wiring layer 6 and the external electrode 7 in which the corner portions are formed at right angles. Therefore, the structural strength of the IC package can be improved.

  When the inner reinforcing layer 54 is formed around the pair of wiring layers 6, the structural strength of the IC package can be improved by the amount of the inner reinforcing layer 54 added. In addition, since the inner reinforcing layer 54 is formed at the same time in the process of forming the wiring layer 6, it is possible to prevent the IC package from becoming thick by adding the inner reinforcing layer 54, and as a whole, compared with the conventional IC structure. Thus, an IC package having a thinner thickness and excellent impact resistance can be obtained. Further, since the pair of wiring layers 6 and the inner reinforcing layer 54 are insulated by the wiring boundary portion 56 of the first resin layer 4, it is possible to reliably prevent the pair of wiring layers 6 from being short-circuited via the inner reinforcing layer 54. it can.

  In the case where the wiring layer 6 and the inner reinforcing layer 54 are formed by plating, gas (outgas) is generated in the process, and a part of the inner reinforcing layer 54 having a large area becomes an upwardly curved shape. May swell. However, if a group of gas vent holes 60 are formed in the inner reinforcing layer 54, the generated gas can be quickly released from the gas vent holes 60, so that the inner reinforcing layer 54 is uniformly and uniformly formed. Can do.

  If the outer reinforcing layer 61 is formed outside the area where the IC chip 2 is arranged and outside the area where the wiring layer 6 is formed, the structural strength of the IC package can be improved by the amount of the outer reinforcing layer 61 added. Further, since the outer reinforcing layer 61 can be formed at the same time in the process of forming the external electrode 76, the addition of the outer reinforcing layer 61 can prevent the IC package from becoming thick, and as a whole, compared with the conventional IC structure. Thus, an IC package having a thinner thickness and excellent impact resistance can be obtained.

  Since the IC inlet according to the present invention is configured by fixing the thinned IC package 32 and the antenna 33 on the inlet base 31, a thinner IC inlet can be configured as compared with the conventional IC inlet. Therefore, by creating a non-contact IC card using the IC inlet according to the present invention, a thin non-contact IC card conforming to the standard (JISX6301) of the non-contact IC card can be easily and reliably produced.

  In the IC inlet for welding the antenna 33 to the external electrode 7, the length of the heat conduction path from the welding position to the IC chip 2 can be increased by biasing the welding position of the antenna 33 toward the periphery of the IC package 32. Therefore, it is possible to prevent welding heat from being transmitted to the IC chip 2 as much as possible, and to prevent the IC chip 2 from malfunctioning due to welding heat.

  Since the non-contact IC card according to the present invention is configured by laminating and fixing a plurality of cover sheets 42, 43, and 44 on the upper and lower surfaces of the IC inlet 41, compared with the conventional non-contact IC card, A thin non-contact IC card conforming to the non-contact IC card standard (JISX6301) can be easily and reliably produced.

  In the above non-contact IC card, the thickness of the cover sheet 43 is set to be the same as the height of the IC package 32, and the window 45 for accommodating the IC package 32 is opened in the cover sheet 43. According to such a non-contact IC card, since the IC package 32 is accommodated in the window 45 in a state where the cover sheet 43 is laminated on the upper surface of the IC inlet 41, the upper surface of the cover sheet 43 can be flattened. Further, the cover sheet 44 laminated on the upper surface of the cover sheet 43 can also be laminated flat. Therefore, the quality of the appearance of the non-contact IC card can be improved, and the quality of the printed display applied to the upper surface of the cover sheet 44 can be improved. Accordingly, a non-contact IC card having no irregularities on the card surface and excellent printability can be provided.

It is a vertical front view of the IC package which concerns on Example 1 of this invention. It is a top view of the IC package which concerns on Example 1 of this invention. It is explanatory drawing which shows the front | former stage part of the manufacture process of IC package. It is explanatory drawing which shows the middle step part of the manufacture process of IC package. It is explanatory drawing which shows the back | latter stage part of the manufacture process of IC package. It is a longitudinal cross-sectional view of the principal part of the IC package which concerns on Example 2 of this invention. It is a top view of IC inlet concerning the present invention. It is a partially broken front view which shows the welding condition of the antenna in IC inlet. It is a partially broken plan view of the non-contact IC card according to the present invention. It is a disassembled perspective view of a non-contact IC card. It is a disassembled perspective view which shows another Example of the non-contact IC card based on this invention. It is a top view of the IC package in the middle of manufacture which concerns on Example 3 of this invention. It is a top view of the IC package which concerns on Example 3 of this invention. It is a vertical front view of the IC package which concerns on Example 3 of this invention. It is a disassembled perspective view of the IC package which concerns on Example 3 of this invention. It is explanatory drawing which shows the 1st step of the manufacture process of IC package. It is explanatory drawing which shows the 2nd step of the manufacture process of IC package. It is explanatory drawing which shows the 3rd step of the manufacture process of IC package. It is explanatory drawing which shows the 4th step of the manufacture process of IC package. It is explanatory drawing which shows another manufacturing form of IC package. It is a top view of the IC package in the middle of manufacture which concerns on Example 4 of this invention. It is a top view of the IC package in the middle of manufacture which concerns on Example 5 of this invention. It is a top view of the IC package in the middle of manufacture which concerns on Example 6 of this invention. It is a top view of the IC package which concerns on Example 6 of this invention. It is a vertical front view of the IC package which concerns on Example 7 of this invention.

Example 1 FIGS. 1 to 5 show Example 1 of an IC package according to the present invention. In the present invention, front / rear, left / right, and upper / lower refer to the cross arrows shown in FIG. 1 and FIG. 1 and 2, the IC package includes a reinforcing chip base 1 having a rectangular shape when viewed from above, an IC chip 2 fixed on the chip base 1, and a resin sealing layer covering the outer surface of the IC chip 2. 3 and the first resin layer 4 and the second resin layer 5 that cover and reinforce the upper surface of the resin sealing layer 3. A wiring layer 6 having the same thickness as the same layer 4 is formed on the first resin layer 4, and an external electrode 7 having the same thickness as the same layer 5 is formed on the second resin layer 5. The external electrode 7 is exposed on the surface of the package facing the chip base 1 with the IC chip 2 in between.

  The chip base 1 preferably has a material strength that can withstand an external force acting on the package surface on the side where the external electrode 7 is exposed. For example, an Fe—Cr alloy (stainless steel) such as SUS410, SUS430, or SUS304 is used. It is formed of a thin plate. The thickness of the chip base 1 is preferably 0.10 mm or more and 0.20 mm or less, and more preferably 0.12 mm or more and 0.15 mm or less. When the thickness of the chip base 1 is less than 0.10 mm, the mechanical strength is insufficient, and the handling at the time of manufacturing the IC package is hindered. On the other hand, if the thickness of the chip base 1 exceeds 0.20 mm, the entire thickness of the IC package becomes large, and it becomes difficult to produce a non-contact IC card conforming to the standard of non-contact IC cards (JISX6301).

  A rectangular terminal 10 protrudes from the left rear corner and right front corner of the upper surface of the rectangular parallelepiped body portion of the IC chip 2. When viewed from the plane, the IC chip 2 is square, and the dimension of each side is 3.0 mm. The height dimension of the IC chip 2 including the terminals 10 is preferably 0.10 mm or less, and more preferably 0.05 mm or more and 0.07 mm or less. The IC chip 2 is bonded and fixed to the center portion of the chip base 1 with a die bond material 11 bonded to the lower surface side thereof. When the height dimension of the IC chip 2 exceeds 0.10 mm, the entire thickness of the IC package becomes large, and it becomes difficult to produce a non-contact IC card in conformity with the standard for non-contact IC cards (JISX6301). Further, when the height dimension of the IC chip 2 is less than 0.05 mm, the mechanical strength of the IC chip 2 is insufficient, and when an external impact is applied, the IC chip 2 that has received an external force is easily deformed and easily damaged. Become.

  The die bond material 11 is made of an adhesive having shock absorption properties such as a thermosetting epoxy resin or a thermosetting silicone resin, and the thickness of the die bond material 11 after curing is 0.01 mm or more and 0.03 mm or less. Preferably there is. The Young's modulus of the die bond material 11 is preferably 3 GPa or less. When the thickness of the die bond material 11 is less than 0.01 mm, an external force is easily transmitted to the IC chip 2 and the IC chip 2 is easily damaged. On the other hand, if the thickness of the die bond material 11 exceeds 0.03 mm, the total thickness of the IC package becomes large, and it becomes difficult to produce a non-contact IC card conforming to the standard for non-contact IC cards (JISX6301). Furthermore, when an external impact is applied, the IC chip 2 that has received an external force is bent and deformed, and is easily damaged. Regarding the Young's modulus of the die bond material 11, if the Young's modulus exceeds 3 GPa and the hardness increases, the impact absorbability decreases, and the IC chip 2 that has received an external impact is likely to be damaged.

  The resin sealing layer 3 is formed by laminating a thermosetting resin such as epoxy, silicon, or phenol on the upper surface side of the chip base 1, and the entire IC chip 2 is enclosed in the resin sealing layer 3. Is done. With the resin sealing layer 3 cured, the upper surface thereof is polished to adjust the thickness of the resin sealing layer 3, and at the same time, the terminals 10 are exposed to the upper surface side of the resin sealing layer 3. The thickness of the resin sealing layer 3 is a value obtained by adding the thickness dimension after curing of the die bond material 11 to the height dimension of the IC chip 2 including the terminals 10. The blank of the IC package in this state is referred to as a pre-package blank.

  The first resin layer 4 is formed by laminating a photoresist on the upper surface of the previous package blank, and then exposing and curing using a photomask, and has an exposure recess that matches the translucent pattern. By plating the package blank in this state, the copper wiring layer 6 can be formed in the exposure recess, and the wiring layer 6 can be connected to the left and right terminals 10 of the IC chip 2. If the thickness of the first resin layer 4 is at least 0.015 mm, a sufficient reinforcing effect can be exhibited. However, if the thickness of the first resin layer 4 exceeds 0.05 mm, it is inevitable that the total thickness of the IC package becomes large, and a non-contact IC card conforming to the standard of non-contact IC card (JISX6301) is created. It becomes difficult.

  As shown in FIGS. 1 and 2, the wiring layer 6 is formed in a rectangular shape whose left-right width is the same as the side of the IC chip 2 and whose front-rear length is longer than the side of the IC chip 2. The pair of wiring layers 6, 6 connected to 10 are connected in a direction away from the terminal 10. Specifically, the wiring layer 6 on the left side as viewed in FIG. 2 is continuous with the left end thereof positioned closer to the left end of the first resin layer 4, and the wiring layer on the right side as viewed in FIG. 6, the right end of the first resin layer 4 is located near the right end thereof. The blank that has been plated is polished on the upper surface to adjust the thickness of the first resin layer 4, and at the same time, the wiring layer 6 is exposed on the upper surface side of the first resin layer 4. The blank body of the IC package in this state is referred to as a subsequent package blank.

  The second resin layer 5 is formed by laminating a photoresist on the upper surface of the subsequent package blank, and then exposing and curing it using a photomask, and has an exposure recess 24 that matches the translucent pattern. By plating the package blank in this state, the external electrode 7 made of copper can be formed in the exposure recess 24 and the external electrode 7 can be connected to the wiring layer 6. The second resin layer 5 exerts a reinforcing action in cooperation with the first resin layer 4, but the thickness of the second resin layer 5 is preferably 0.05 mm or less like the first resin layer 4. When the thickness of the second resin layer 5 exceeds 0.05 mm, a sufficient reinforcing effect can be exhibited, but the overall thickness of the IC package cannot be avoided, and it conforms to the standard of a non-contact IC card (JISX6301). It becomes difficult to create a non-contact IC card.

  As shown in FIG. 1 and FIG. 2, the external electrode 7 is formed in a rectangular shape whose left-right width is shorter than the sides of the IC chip 2 and whose front-rear length is the same as the front-rear length of the wiring layer 6. The external electrodes 7 are connected to the side edges of the left and right wiring layers 6 and 6, respectively. The area of the connection portion between the external electrode 7 and the wiring layers 6 and 6 is equal to the area of the external electrode 7. The blank that has been plated is polished on the upper surface to adjust the thickness of the second resin layer 5, and at the same time, the external electrode 7 is exposed on the upper surface side of the second resin layer 5 to complete the IC package. The total thickness of the IC package in this state is preferably 0.40 mm or less, and more preferably 0.30 mm or less. If the total thickness of the IC package exceeds 0.40 mm, it becomes difficult to create a non-contact IC card that conforms to the standard of non-contact IC cards (JISX6301). In addition, when a non-contact IC card is created, unevenness is generated on the card surface, so printability is impaired.

(IC package manufacturing method)
3 to 5 show details of the IC package manufacturing method.
First, as shown in FIG. 3A, a chip base material 1A having a larger area than the chip base 1 described above is placed on a table, and IC chips 2 are bonded to the upper surface of the chip base material 1 by a die bond material 11 at regular intervals. Fix it. Next, as shown in FIG. 3B, the thermosetting resin 14 is laminated on the upper surface side of the chip base 1, the IC chip 2 is embedded in the thermosetting resin 14, and the thermosetting resin 14 is heated by the heat of the heat source 15. Is cured. In a state where the thermosetting resin 14 is cured, the upper surface is polished to form the resin sealing layer 3 whose thickness is adjusted, and at the same time, the terminal 10 is exposed to the upper surface side of the resin sealing layer 3 to form the previous package blank. obtain.

  As shown in FIG. 4A, after a photoresist 16 is laminated on the upper surface of the previous package blank, a photomask 17 having a pattern corresponding to the wiring layer 6 is placed on the upper surface and irradiated from the light source 18. The photoresist 16 is exposed to light and cured. As shown in FIG. 4B, after the photomask 17 is removed, the unexposed portions are dissolved and removed, whereby the first resin layer 4 having the exposure recesses 19 that match the translucent pattern is formed. The The terminals 10 of the IC chip 2 in this state face the exposure recesses 19 respectively. As shown in FIG. 4 (c), the blank shown in FIG. 4 (b) is subjected to an electroless plating process to form a copper wiring layer 6 in the exposure recess 19, thereby forming the sheet-like wiring layer 6 into a sheet. It can be tightly connected to the left and right terminals 10 of the IC chip 2. Further, the upper surface of the blank obtained in FIG. 4 (c) is polished to form the first resin layer 4 having a thickness adjusted, and at the same time, the wiring layer 6 is exposed to the upper surface side of the first resin layer 4, A latter package blank is obtained.

  As shown in FIG. 5A, after a photoresist 21 is laminated on the upper surface of the subsequent package blank, a photomask 22 having a pattern corresponding to the external electrode 7 is placed on the upper surface and irradiated from the light source 23. The photoresist 21 is exposed to light and cured. As shown in FIG. 5B, after the photomask 22 is removed, the unexposed portions are dissolved and removed, whereby the second resin layer 5 having the exposure recesses 24 that match the translucent pattern is formed. The Most parts of the wiring layer 6 in this state face the exposure recesses 24 respectively. As shown in FIG. 5 (c), the blank obtained in FIG. 5 (b) is plated to form a copper external electrode 7 in the exposure recess 24, and the sheet-like external electrode 7 is formed. It can be connected to the wiring layer 6. Further, the upper surface of the blank obtained in FIG. 5C is polished to form the second resin layer 5 with the adjusted thickness, and the external electrode 7 is exposed to the surface side of the second resin layer 5 at the same time. After gold plating is applied to the external electrode 7 in this state, the IC package can be completed by cutting each individual IC chip 2. The cutting site is indicated by a vertical broken line in FIG.

  As described above, when the sheet-like wiring layer 6 is formed in the exposure recess 19 by performing the plating process, the wiring layer 6 and the terminal 10 can be reliably connected with high reliability. Further, when the sheet-like external electrode 7 is formed in the exposure recess 24 by performing plating, the external electrode 7 and the wiring layer 6 can be connected reliably and with high reliability. Therefore, the reliability of the connecting portion between the terminal 10 of the IC chip 2 and the external electrode 7 can be improved to improve productivity.

(Example 2) FIG. 6 shows Example 2 of the IC package according to the present invention. In this case, the chip base 1 was formed in a multilayer form with a first base layer 26 formed of a thin copper plate and a second base layer 27 covering the lower surface of the first base layer 26. The second base layer 27 is formed by laminating a plastic material (glass epoxy resin) on the first base layer 26. The thickness of the first base layer 26 is 0.10 mm, the thickness of the second base layer 27 is 0.05 mm, and the total thickness of both is 0.10 mm or more and 0.20 mm or less, which is the preferred thickness of the chip base 1. I tried to become. As described above, when the chip base 1 is formed in a multi-layer shape with the first base layer 26 and the second base layer 27, although it is slightly inferior to the chip base 1 described in the first embodiment, it is easy to cut. It can be done. This is because the chip base 1 can be made of a material used for a general circuit board. Since others are the same as those of the first embodiment, the same members are denoted by the same reference numerals and the description thereof is omitted.

(IC inlet)
7 and 8 show an IC inlet configured using the IC package described above. The IC inlet is configured by fixing an IC package 32 and an antenna 33 on an inlet base 31 formed of a PET resin sheet. Specifically, as shown in FIG. 8, the chip base 1 of the IC package 32 is bonded and fixed to the inlet base 31 with an adhesive 37, and the spiral portion of the antenna 33 disposed around the chip base 1 is bonded and fixed to the inlet base 31. The start end 33 a and the end end 33 b of the antenna 33 are welded to the external electrode 7 of the IC package 32. As a material for forming the inlet base 31, besides PET-G, polycarbonate (PC), polyethylene naphthalate (PEN), non-woven fabric, and the like can be applied.

  When welding the antenna 33, as shown in FIG. 8, a pulse current is supplied to the welding head 34 to cause the high-resistance tape 35 to generate heat, and the start end 33a and the end end 33b of the antenna 33 are heated by the heat. It is pressed and thermally deformed at 34 and welded to the external electrode 7. At this time, by biasing the welding position of the antenna 33 toward the periphery of the IC package 32, it is possible to prevent the welding heat from being transmitted to the IC chip 2 as much as possible, and the IC chip 2 becomes malfunctioning due to the welding heat. Can be prevented. Further, since the area of the external electrode 7 is large, it is not necessary to strictly position the welding position of the start end 33a and the end end 33b of the antenna 33, so that the start end 33a and the end end 33b can be welded more easily. The antenna 33 is formed in a square spiral shape by using a copper wire with an insulating coating having a wire diameter of 80 μm as a forming material, or is formed by a printed pattern.

(Non-contact IC card)
9 and 10 show a non-contact IC card configured using the above IC inlet. The non-contact IC card is configured by laminating and fixing a plurality of cover sheets 42, 43, and 44 above and below the IC inlet 41. Specifically, as shown in FIG. 10, a first cover sheet 42 is laminated on the lower surface of the inlet base 31 on the side where the IC package 32 and the antenna 33 are not fixed, and are hot-pressed. The two cover sheets 43 and the third cover sheet 44 are stacked and hot pressed to form a non-contact IC card. Each of the cover sheets 42, 43, 44 is composed of a sheet made of PET-G resin. In order to prevent the cover sheets 43 and 44 from expanding by the height of the IC package 32 in a state in which the second and third cover sheets 43 and 44 are laminated on the inlet base 31, The thickness is matched with the height dimension of the IC package 32, and a window 45 is opened in the sheet portion corresponding to the IC package 32.

  According to the above non-contact IC card, in the state where the second cover sheet 43 is laminated on the upper surface of the IC inlet 41, the IC package 32 is accommodated in the window 45 as shown in FIG. The upper surface of the cover sheet 43 can be made flat. Further, the third cover sheet 44 laminated on the second cover sheet 43 can also be laminated flat. Therefore, the quality of the appearance of the non-contact IC card can be improved, and the quality of the printed display applied to the upper surface of the third cover sheet 44 can be improved. That is, a non-contact IC card having no irregularities on the card surface and excellent printability can be provided. When a non-contact IC card is produced using the IC package of the present invention, the IC chip 2 may generate heat when the non-contact IC card is exposed to a strong magnetic field environment. However, since the heat of the IC chip 2 can be conducted to the wiring layer 6 and the external electrode 7 having a large area and can be dissipated into the atmosphere, the IC chip 2 can be sure to malfunction due to its own heat generation. Can be prevented. In addition, the blank of the non-contact IC card in which the cover sheets 42, 43, and 44 are laminated is cut along a cutting line 46 indicated by an imaginary line in FIG. Since the peripheral wall of the IC package 32 faces the inner peripheral surface of the window 45 through a small gap, when the bending force acts on the upper and lower surfaces of the non-contact IC card, the peripheral wall of the IC package 32 becomes the window. It is possible to prevent the IC package 32 from being damaged by preventing the contact with the inner peripheral surface of 45.

  FIG. 11 shows another embodiment of a non-contact IC card. Therefore, the second cover sheet 43 is omitted, and the third cover sheet 44 is laminated on the inlet base 31 to constitute a non-contact IC card. In addition, a window 48 is provided in the inlet base 31 so that the antenna 33 can be fixed to the inlet base 31 in a state where the IC package 32 is accommodated in the window 48. When a non-contact IC card is configured using this inlet module, the IC package 32 can be accommodated in the window 48, so that the third cover sheet 44 can be flatly stacked as in the case of the non-contact IC card. Accordingly, the quality of the appearance of the non-contact IC card is improved, the quality of the printed display applied on the upper surface of the third cover sheet 44 is improved, and the card surface has no irregularities and has excellent printability. An IC card can be provided. In the non-contact IC card described with reference to FIGS. 9 and 10, the start end 33 a and the end end 33 b of the antenna 33 are bent at the inner edge of the window 45 in a state where the second cover sheet 43 is laminated on the inlet base 31. However, according to the non-contact IC card of FIG. 11, the reliability of the non-contact IC card can be improved by eliminating the above damage.

  In many cases, the IC card configured as described above is carried by a user in a normal living environment, and therefore needs to be able to withstand an external force or an external impact acting in a daily environment. Therefore, the present inventors conducted a durability test on the IC packages described in Examples 1 and 2, and confirmed their impact resistance, breaking strength, and the like. In the durability test, an external force or impact force was applied to the IC package with a test probe, and the breaking strength and impact resistance of the IC package were confirmed.

  As a result of the durability test, it was confirmed that the IC packages of Examples 1 and 2 had substantially the same impact resistance and breaking strength with no practical problems. However, when examining the broken parts of the damaged IC packages of Examples 1 and 2, cracks were found along the opposing side edges (side edges connected to the electrodes 10) of the pair of wiring layers 6 in both cases. In the resulting state, it was observed that the IC chip 2 was damaged. On the other hand, cracks rarely occur along the opposing side edges of the pair of external electrodes 7. As a result of investigating the cause and repeating the durability test and closely observing the course of damage to the IC package, when an external force acts on the IC package, the boundary surface between the wiring layer 6 and the first resin layer 4 It was confirmed that the external force was concentrated to form an initial crack, and the external force was applied to the IC chip 2 as the crack grew. In the IC packages of the first and second embodiments, the opposing side edges of the pair of wiring layers 6 cross the upper surface of the IC chip 2 in the front-rear direction. For this reason, it was confirmed that an external force was applied to the upper surface of the IC chip 2 at the same time as the cracks began to grow, resulting in breakage. From these facts, it was found that it is advantageous to prevent breakage of the IC package if the arrangement form of the wiring layer 6 and the external electrode 7 is optimized based on the arrangement area of the IC chip 2 in plan view. . An IC package based on this knowledge will be described below in Example 3.

Example 3 FIGS. 12 to 15 show Example 3 of an IC package according to the present invention. In this case, as shown in FIG. 12, the wiring layer 6 that connects the terminal 10 of the IC chip 2 and the external electrode 7 is connected to the terminal-side wiring portion 51 that is connected to the terminal 10 and the electrode-side wiring that is connected to the external electrode 7. The portion 52 and a narrow intermediate wiring portion 53 connecting these portions 51 and 52 are formed in an L shape. The pair of left and right wiring layers 6 are formed in line symmetry. The electrode-side wiring portion 52 is set to have a larger front-rear width and left-right width than the terminal-side wiring portion 51 in order to facilitate welding of the antenna 33. The intermediate wiring portion 53 extends continuously in a direction away from the terminal 10 and continues to the front end of the electrode side wiring portion 52. As described above, when the electrode-side wiring portion 52 is arranged outside the arrangement region of the IC chip 2 in plan view, when an external force acts on the IC package, the electrode-side wiring portion 52 and the first resin layer 4 Although an initial crack is formed at the boundary surface, it is possible to avoid the crack from reaching the upper surface of the IC chip 2 as much as possible. Therefore, it is possible to eliminate the occurrence of cracks on the upper surface of the IC chip 2 and prevent the IC chip 2 from being damaged at the same time as the cracks start to grow.

  The wiring layer 6 is formed of a copper plating layer formed in the exposure recess 19 by forming an electroless plating process after forming the first resin layer 4 having the exposure recess 19 as in the first embodiment. However, at this time, the inner reinforcing layer 54 is formed. In this embodiment, the inner reinforcing layer 54 is formed so as to occupy most of the front edge and the rear edge of the first resin layer 4 and between the pair of left and right wiring layers 6. As described above, when the inner reinforcing layer 54 is formed around the pair of wiring layers 6, the structural strength of the IC package can be improved by the amount of the inner reinforcing layer 54 added. In addition, since the inner reinforcing layer 54 can be formed at the same time in the process of forming the wiring layer 6, the addition of the inner reinforcing layer 54 can prevent the IC package from becoming thick, and as a whole, compared with the conventional IC structure. Thus, an IC package having a thinner thickness and excellent impact resistance can be obtained. As a material for forming the metal plating layer for forming the wiring layer 6, aluminum or the like can be applied in addition to copper.

  Further, each corner portion of the terminal side wiring portion 51, the electrode side wiring portion 52, or the intermediate wiring portion 53 is rounded to avoid the formation of cracks starting from the corner portion. A rounded corner portion is indicated by reference numeral 55. The wiring layer 6 and the inner reinforcing layer 54 are insulated by a wiring boundary 56 that is integral with the first resin layer 4. Next, in the same manner as in Example 1, after forming the second resin layer 5 having the exposure recesses 24, an electroless plating process is performed, and the external electrodes 7 are formed with a metal plating layer formed in the exposure recesses 19. Form. Copper, tin, silver, gold, palladium, nickel, or the like can be used as a material for forming the metal plating layer that forms the external electrode 7, and an appropriate metal material can be selected according to the material to be welded to the external electrode 7. it can. The external electrode 7 has the same shape and the same size as the electrode side wiring part 52. Therefore, the external electrode 7 is arranged outside the arrangement region of the IC chip 2 in plan view, like the electrode side wiring portion 52. For the wiring layer 6 in the first embodiment, aluminum or the like can be applied in addition to copper as described above. Similarly, copper, tin, silver, gold, palladium, nickel, etc. can be applied as the material for forming the metal plating layer for forming the external electrode 7 in the first embodiment.

  As described above, when the electrode-side wiring part 52 and the external electrode 7 are arranged outside the arrangement area of the IC chip 2, an external force acts on the IC package, and the electrode-side wiring part 52 and the first resin layer 4. Even if a crack occurs along the boundary surface, the position where the crack is formed can be shifted around the upper surface of the IC chip 2. Therefore, compared with the case where a crack occurs on the upper surface of the IC chip 2, it is possible to avoid the crack from reaching the upper surface of the IC chip 2 and prevent the IC chip 2 from being damaged at the same time as the crack starts to grow. Further, even when a crack occurs along the boundary surface between the external electrode 7 and the second resin layer 5, as in the case where a crack occurs along the boundary surface between the electrode-side wiring portion 52 and the first resin layer 4, By preventing the crack from reaching the upper surface of the IC chip 2, it is possible to prevent the IC chip 2 from being damaged at the same time as the crack starts to grow.

  In addition, each corner portion of the external electrode 7 is rounded to avoid the formation of cracks starting from the corner portion. A rounded corner portion is indicated by reference numeral 57. As described above, when the corner portions of the wiring layer 6 and the external electrode 7 are rounded, cracks start from the corner portion as compared with the case where the corner portions of the wiring layer 6 and the external electrode 7 are formed at right angles. Since it can be well prevented from being formed, the structural strength of the IC package can be increased accordingly. Since others are the same as those of the first embodiment, the same members are denoted by the same reference numerals and the description thereof is omitted. The same applies to the following embodiments.

  In Example 3, the first resin layer 4 provided with the exposure recess 19 was plated to form the wiring layer 6 and the inner reinforcing layer 54. However, this is not necessary, and the manufacturing method shown in FIGS. Can be manufactured. In this case, after copper is laminated on the entire top surface of the first resin layer 4, an etching process is performed to form the wiring layer 6 and the inner reinforcing layer 54. Note that the thickness of the terminal 10 of the IC chip 2 described in this embodiment is set smaller than the thickness of the terminal 10 of the IC chip 2 described in the first embodiment.

(IC package manufacturing method including etching process)
First, as shown in FIG. 16A, a chip base material 1A having a larger area than the chip base 1 described above is placed on a table, and IC chips 2 are bonded to the upper surface of the chip base material 1 by a die bonding material 11 at regular intervals. Fix it. Next, as shown in FIG. 16B, the thermosetting resin 14 is laminated on the upper surface side of the chip base 1, the IC chip 2 is buried in the thermosetting resin 14, and the thermosetting resin 14 is heated by the heat of the heat source 15. Is cured. In the state where the thermosetting resin 14 is cured, as shown in FIG. 16C, the upper surface of the resin sealing layer 3 is polished to adjust the thickness. Further, after the terminal exposure hole 70 is formed in the resin sealing layer 3 covering the upper surface of the terminal 10 of the IC chip 2 by a laser processing method using, for example, CO 2 or the like, as shown in FIG. The upper surface of the stop layer 3 is plated with copper to form a copper layer 71, thereby obtaining a front package blank. Thereby, the copper layer 71 can be tightly connected to the left and right terminals 10 of the IC chip 2. Note that the resin sealing layer 3 may be formed of a photo-curing resin. Alternatively, the copper paste may be pasted on the upper surface of the resin sealing layer 3 and the copper layer 71 may be formed after the terminal exposure hole 70 is filled with a copper paste. The terminal exposure hole 70 may be formed by laser ablation, laser drilling process, plasma etching, photodefinition, or mechanical drilling process.

  As shown in FIG. 17A, after a photoresist 72 is laminated on the upper surface of the previous package blank, a photomask 73 having a pattern corresponding to the wiring layer 6 is placed on the upper surface and irradiated from a light source 74. The photoresist 72 is exposed to light and cured. As shown in FIG. 17B, after the photomask 73 is removed, an unexposed portion is dissolved and removed, thereby forming an etching mask 76 having an etching hole 75 that matches the translucent pattern. As shown in FIG. 17C, the blank of FIG. 17B is etched to remove the unnecessary copper layer facing the etching hole 75 to form the wiring layer 6 and the inner reinforcing layer 54. The etching mask 76 is removed to obtain a subsequent package blank.

  As shown in FIG. 18A, after a photoresist 78 is laminated on the upper surface of the subsequent package blank, a photomask 79 having a pattern corresponding to the external electrode 7 is placed on the upper surface of the package blank and irradiated from a light source 80. The photoresist 78 is exposed to light and cured. As shown in FIG. 18B, after removing the photomask 79, the first resin layer 4 having the recesses 81 corresponding to the translucent pattern is formed by dissolving and removing the unexposed portions. . The electrode side wiring portion 52 of the wiring layer 6 in this state faces the recess 81.

  As shown in FIG. 19A, after a photoresist 82 is laminated on the upper surface of the obtained package blank, a photomask 83 having a pattern corresponding to the external electrode 7 is placed on the upper surface, and a light source 84 is placed. The photoresist 82 is exposed and cured with the light irradiated from. As shown in FIG. 19B, after the photomask 83 is removed, the second resin layer 5 having the recesses 85 corresponding to the translucent pattern is formed by dissolving and removing the unexposed portions. . As shown in FIG. 19C, a plating process is performed to form a copper external electrode 7 in the recess 85, and the external electrode 7 is connected to the wiring layer 6. Further, the upper surface of the blank obtained in FIG. 19C is polished to form the second resin layer 5 having the adjusted thickness, and the external electrode 7 is exposed to the surface side of the second resin layer 5 at the same time. After gold plating is applied to the external electrode 7 in this state, the IC package can be completed by cutting each individual IC chip 2. The cut site is indicated by a vertical broken line in FIG.

  As described above, after copper is laminated on the entire top surface of the first resin layer 4, an etching process is performed to form the wiring layer 6 and the inner reinforcing layer 54. Thus, the connection between the terminal 10 of the IC chip 2 and the wiring layer 6 is performed. The portion and the connecting portion between the wiring layer 6 and the external electrode 7 can be reliably connected with high reliability. Therefore, an IC package with excellent reliability can be obtained in the same manner as the IC package of the first embodiment in which the wiring layer 6 is formed by plating.

  In the IC package described with reference to FIGS. 16 to 19, the first resin layer 4 is formed corresponding to the wiring layer 6 and the inner reinforcing layer 54, and the second resin layer 5 is formed corresponding to the external electrode 7. There is no need, and the second resin layer 5 can be omitted. As shown in FIG. 18B, the wiring layer 6 is exposed in the recess 81 in the state where the first resin layer 4 is formed. By applying a plating process to the package blank in this state as shown in FIG. 20, the external electrode 7 plated with metal can be formed in the recess 81, and the external electrode 7 can be connected to the wiring layer 6. According to such an IC package, the cost required for manufacturing the IC package can be reduced by the amount that the process of forming the second resin layer 5 can be omitted, and the thickness of the IC package can be reduced by the amount that the second resin layer 5 is omitted. it can.

Example 4 FIGS. 21A and 21B show Example 4 in which a group of vent holes 60 are formed in the inner reinforcing layer 54. As described above, the wiring layer 6 and the inner reinforcement layer 54 are formed by plating, but in the process, gas (outgas) is generated, and a part of the inner reinforcement layer 54 having a large area protrudes. It may bulge in a curved shape. A group of vent holes 60 are formed in the inner reinforcing layer 54 in order to quickly release such gas and form the inner reinforcing layer 54 uniformly. Specifically, prior to forming the first resin layer 4 having the exposure recesses 19, a surface treatment material that prevents the adhesion of plating metal is formed on the upper surface of the resin sealing layer 3 in the formation pattern of the gas vent holes 60. Match and form. In this state, after forming the first resin layer 4 having the exposure recesses 19, plating treatment is performed to form the inner reinforcement layer 54, thereby forming the inner reinforcement layer 54 having the gas vent holes 60. it can. Further, in the process of forming the subsequent package blank described with reference to FIG. 17, an etching pattern that matches the formation pattern of the etching hole 75 and the vent hole 60 may be formed on the etching mask 76 formed on the upper surface of the copper layer 71. For example, the inner reinforcing layer 54 having the gas vent holes 60 can be formed at the same time when the wiring layer 6 is formed by performing the etching process. If necessary, the vent hole 60 may be formed in the wiring layer 6 when the area of the wiring layer 6 is large.

  In FIG. 21A, the gas vent holes 60 are formed in a state of forming a straight line in the left-right direction and the front-rear direction, and the gas generated during the plating process is evenly released from the entire surface of the inner reinforcing layer 54. I was able to do it. In FIG. 21B, the gas vent holes 60 are alternately arranged in a zigzag pattern so that the inner reinforcing layers 54 are prevented from being damaged along the straight lines of the gas vent holes 60. In addition, it is preferable to form the vent holes 60 randomly without forming a straight line in the vertical and horizontal directions. In this case, the inner reinforcing layer 54 may be further damaged along the adjacent vent holes 60. It can certainly be avoided.

(Example 5) FIG. 22 is Example 5 which shows the arrangement pattern of the wiring layer 6 in the case where the terminals 10 are provided at the front left corner and the rear right corner of the IC chip 2. In this case, the wiring layer 6 connected to the terminal 10 at the front left corner and the wiring layer 6 connected to the terminal 10 at the rear right corner are arranged point-symmetrically, and the pair of electrode-side wiring portions 52 are provided on the IC chip 2. It was made to be arranged outside the left and right direction of the arrangement area. Further, as in the third embodiment, the inner reinforcing layer 54 is formed between the left and right electrode side wiring portions 52. As described above, the arrangement position and the arrangement shape of the wiring layer 6 can be appropriately changed according to the formation position and the shape of the terminal 10 of the IC chip 2.

Example 6 FIGS. 23 and 24 show Example 6 in which an outer reinforcing layer 61 is provided on the second resin layer 5. In this case, the wiring layer 6 is formed in the same manner as in Example 3, but the inner reinforcing layer 54 is omitted and the outer reinforcing layer 61 is provided instead. As in the first embodiment, the external electrode 7 is formed by plating the second resin layer 5 having the exposure recesses 24. At this time, the outer reinforcing layer 61 is formed at the same time. The outer reinforcing layer 61 should not short-circuit the pair of wiring layers 6, and the periphery thereof should not cross the arrangement region of the IC chip 2 in the vertical and horizontal directions. Therefore, in this embodiment, the outer reinforcing layer 61 is formed along the front and rear edges of the second resin layer 5 in a state of being located outside the area where the IC chip 2 is disposed and outside the area where the wiring layer 6 is formed. . Thus, by providing the outer reinforcing layer 61, the structural strength of the IC package can be improved by the amount of the outer reinforcing layer 61 added. Further, since the outer reinforcing layer 61 can be formed at the same time in the process of forming the external electrode 7, it is possible to prevent the IC package from becoming thick by adding the outer reinforcing layer 61, and as a whole, compared with the conventional IC structure. Thus, an IC package having a thinner thickness and excellent impact resistance can be obtained. When an insulating layer is provided on the upper surfaces of the inner reinforcing layer 54, the terminal-side wiring portion 51, and the intermediate wiring portion 53, the inner reinforcing layer 54 and the outer reinforcing layer 61 are provided in a double manner to further improve the reinforcing effect. be able to. Further, instead of the outer reinforcing layer 61 described with reference to FIG. 24, an inner reinforcing layer 54 having the same pattern as the outer reinforcing layer 61 can be formed in the process of forming the wiring layer 6. Furthermore, instead of the inner reinforcing layer 54 described with reference to FIG. 22, an outer reinforcing layer 61 having the same pattern as the inner reinforcing layer 54 can be formed on the second resin layer 5 in the process of forming the external electrode 7.

Example 7 FIG. 25 shows Example 7 in which the structure of the first resin layer 4 is changed. In this case, as shown in FIG. 17C, an etching process is performed to remove the unnecessary copper layer facing the etching hole 75 to form the wiring layer 6 and the inner reinforcing layer 54, and the opening formed by the etching process. Only in the portion, the first resin layer 4 having the same thickness as the wiring layer 6 and the inner reinforcing layer 54 is formed. The second resin layer 5 is formed on the package blank in this state, and a plating process is further performed to form the external electrode 7. According to such an IC package, since the thickness of the first resin layer 4 can be made the same as that of the wiring layer 6 and the inner reinforcing layer 54, the thickness of the IC package can be reduced by that much. Further, compared with the IC package manufacturing method described in the third embodiment, there is an advantage that the IC package can be easily manufactured. The IC packages described in the third to seventh embodiments can constitute an IC inlet and a non-contact IC card in the same manner as the IC packages of the first and second embodiments.

  In addition to the above, the shape of the IC package 32 when viewed from the plane need not be rectangular, and can be formed into a triangle, a square, a polygon having five or more sides, a circle, an ellipse, or the like. Similarly, the shape of the inlet base 31 can be formed in a necessary shape. The non-contact IC card can be configured by laminating four or more cover sheets on the upper and lower surfaces of the inlet base 31 and hot pressing. The non-contact IC card can be configured by laminating two or more cover sheets on the upper and lower surfaces of the inlet base 31 and hot pressing.

DESCRIPTION OF SYMBOLS 1 Chip base 2 IC chip 3 Resin sealing layer 4 1st resin layer 5 2nd resin layer 6 Wiring layer 7 External electrode 10 Terminal 11 Die bond material 26 1st base layer 27 2nd base layer 31 Inlet base 32 IC package 33 Antenna 41 IC inlet 42 1st cover sheet 43 2nd cover sheet 44 3rd cover sheet 45 Window 51 Terminal side wiring part 52 Electrode side wiring part 53 Intermediate wiring part 54 Inner reinforcement layer 56 Wiring boundary part 61 Outer reinforcement layer

Claims (17)

A chip base (1) for reinforcement, an IC chip (2) fixed on the chip base (1), and a resin sealing layer (3) covering the outer surface of the IC chip (2) are provided. An IC package in which the external electrode (7) is exposed on the surface of the package facing the chip base (1) with (2) in between,
The terminal (10) of the IC chip (2) is exposed on the upper surface side of the resin sealing layer (3),
The upper surface of the resin sealing layer (3) is covered with the first resin layer (4) and the second resin layer (5), and the wiring layer (6) provided on the first resin layer (4) is an IC chip (2). The external electrode (7) provided on the second resin layer (5) is connected to the wiring layer (6) of the first resin layer (4). package. The chip base (1) is formed of a single layer metal material,
2. The IC package according to claim 1, wherein the IC chip (2) is bonded and fixed to the chip base (1) with a die bond material (11). The chip base (1) is formed in multiple layers by a first base layer (26) formed of a metal material and a second base layer (27) formed of a plastic material laminated on the lower surface of the first base layer (26). And
The IC package according to claim 1, wherein the IC chip (2) is bonded and fixed to the first base layer (26) with a die bond material (11). Terminals (10, 10) are arranged on the left and right sides of the IC chip (2),
The IC chip (2) is arranged in the center of the chip base (1), and a pair of wiring layers (6, 6) connected to the terminals (10) are extended in a direction away from the terminals (10, 10). ,
The IC package according to any one of claims 1 to 3, wherein the external electrode (7) is connected to the extended end side of the wiring layer (6) and is exposed along the periphery of the IC package.   The IC package according to any one of claims 1 to 4, wherein the total thickness of the IC package is 0.40 mm or less.   The IC package according to any one of claims 1 to 5, wherein the thickness of the chip base (1) is not less than 0.10 mm and not more than 0.20 mm. The thickness of the die bond material (11) is 0.01 mm or more and 0.03 mm or less,
The IC package according to any one of claims 2 to 6, wherein the die bond material (11) has a Young's modulus of 3 GPa or less. The wiring layer (6) connecting the terminal (10) of the IC chip (2) and the external electrode (7) is connected to the terminal side wiring part (51) connected to the terminal (10) and the external electrode (7). It is composed of an electrode-side wiring part (52) to be connected and an intermediate wiring part (53) connecting these both (51, 52).
The IC package according to any one of claims 1 to 7, wherein the electrode-side wiring part (52) is arranged outside the arrangement region of the IC chip (2) in plan view.   The IC package according to claim 8, wherein the external electrode (7) is arranged outside the arrangement area of the IC chip (2) in plan view.   The IC package according to claim 8 or 9, wherein corner portions of the wiring layer (6) and the external electrode (7) are rounded. An inner reinforcing layer (54) formed simultaneously with the wiring layer (6) is formed around the pair of wiring layers (6).
The IC according to any one of claims 8 to 10, wherein the pair of wiring layers (6) and the inner reinforcing layer (54) are insulated by a wiring boundary portion (56) provided in the first resin layer (4). package.   The IC package according to claim 11, wherein a group of vent holes (60) are formed in the inner reinforcing layer (54). The external resin (7) and the outer reinforcing layer (61) formed simultaneously with the electrode (7) are formed on the second resin layer (5),
The outer reinforcing layer (61) is formed in a state of being located outside the arrangement region of the IC chip (2) and outside the formation region of the wiring layer (6). The IC package described. An IC package (32) and an antenna (33) according to any one of claims 1 to 13 are fixed on an inlet base (31) having insulation properties,
IC inlet with antenna (33) connected to external electrode (7) of IC package (32). The antenna (33) is welded to the external electrode (7) of the IC package (32),
The IC inlet according to claim 14, wherein the welding position of the antenna (33) welded to the external electrode (7) is offset toward the periphery of the IC package (32).   A non-contact IC card constituted by laminating and fixing a plurality of cover sheets (42, 43, 44) on the upper and lower surfaces of the IC inlet (41) according to claim 14 or 15.   The thickness of the cover sheet (43) laminated on the upper surface of the IC inlet (41) is set to be the same as the height dimension of the IC package (32), and a window for receiving the IC package (32) in the cover sheet (43) ( The non-contact IC card according to claim 16, wherein 45) is opened.

Images