JP2017168603A - Silicon carbide semiconductor element and silicon carbide semiconductor element manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To support reduction of deterioration in channel mobility immediately after gate oxidation and a positive value of flat band voltage at the same time.SOLUTION: A silicon carbide semiconductor element manufacturing method comprises the steps of: forming on a silicon carbide substrate 1, at least one layer of an oxide film, a nitride film or an oxynitride film as a gate insulation film 3; and performing a heat treatment on the gate insulation film 3 at a temperature equal to or higher than 400°C after forming the gate insulation film 3. In the heat treatment process, by setting a temperature drop rate within a range from the maximum temperature to 400°C at not less than 5°C/min and less than 100°C/min, a mass density of the gate insulation film 3 becomes not less than 2.2 g/cmand less than 2.5 g/cm.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor device using a silicon carbide substrate, and more particularly to a silicon carbide semiconductor element and a method for manufacturing a silicon carbide semiconductor element characterized by a gate insulating film.

  Since silicon carbide has an excellent physical property value, it is expected to be applied to a power device having a high breakdown voltage and a low loss by taking advantage of its properties. In the case of applying silicon carbide to a silicon carbide vertical metal-oxide film-semiconductor field effect transistor (MOSFET) which is a kind of silicon carbide semiconductor device, a gate such as silicon dioxide is formed on the silicon carbide. An insulating film is formed.

  In order to form silicon dioxide on a silicon carbide substrate, there are a method of thermally oxidizing the silicon carbide substrate and a method of depositing (depositing) silicon dioxide on the silicon carbide substrate. Whichever method is used, an interface state is formed at the interface between the silicon carbide substrate and silicon dioxide, and this interface state causes the field effect mobility (channel mobility) of the MOSFET to be higher than the mobility in the silicon carbide bulk. Reduce. As a result, the resistance value during the on-operation of the MOSFET is increased, and the loss may increase.

  An interface state density is an index for evaluating the interface characteristics between the silicon carbide substrate and silicon dioxide. In general, interface characteristics represented by channel mobility tend to be better when the interface state density is smaller.

  As a general method for improving the interface characteristics between a silicon carbide substrate and silicon dioxide, the silicon carbide substrate is oxidized in an atmosphere containing oxygen, and nitrous oxide or one nitrogen oxide is used as post-oxidation annealing (POA). A method using a nitrogen-containing gas of nitrogen oxide and a method using a wet atmosphere in which hydrogen and oxygen are reacted are known.

  When a gas containing nitrogen such as dinitrogen monoxide or nitrogen monoxide is used, nitridation occurs simultaneously with oxidation, and nitrogen atoms are dangling bonds (unbonded) at the interface between silicon dioxide and the silicon carbide substrate and silicon dioxide. It is said that it contributes to termination and has an effect of reducing the interface state density (see, for example, Patent Document 1 below).

  When a wet atmosphere in which hydrogen and oxygen are reacted is used, hydrogen or hydroxyl group contained in the wet atmosphere contributes to the termination of dangling bonds (unbonded hands) at the silicon carbide substrate / silicon dioxide interface, and the interface state density (For example, refer to Patent Document 2 below).

  In the manufacturing process of a semiconductor device using a silicon carbide substrate, after forming a gate insulating film, formation of a polysilicon gate conductive film and heat treatment for lowering resistance, or heat treatment for forming and baking an interlayer insulating film, or forming contact metal Further, a heat treatment step such as a heat treatment for forming a reaction layer (silicide layer) of contact metal and silicon carbide is essential.

  In particular, it is known that various intermetallic compounds are formed at temperatures lower than 600 ° C. in the formation of contact metal and the heat treatment for forming a silicide layer. It is assumed that formation of an intermetallic compound inhibits formation of a silicide layer. For this reason, in order to form silicide between the silicon carbide substrate and to function as an ohmic electrode, a heat treatment at 900 ° C. or higher is necessary. Further, during the temperature rise, a stable phase such as an intermetallic compound is required. In order to suppress the formation, a Rapid Thermal Anneal (RTA) method that can generally control the temperature increase / decrease at 100 ° C./min or more is often used (for example, see Patent Documents 3 and 4 below).

  It is known that MOS interface characteristics such as the interface state density created in the gate insulating film forming process change not only by the method of forming the gate insulating film but also by the heat treatment in the process after the gate insulating film is formed. . For this reason, in a silicon carbide MOSFET, after forming silicon dioxide as a gate oxide film by thermal oxidation in a wet atmosphere, heat treatment for forming a silicide layer is performed using a mixed gas of an inert gas and hydrogen instead of an inert gas. A method is described in which the increase in the interface state density can be suppressed and the contact resistance can be reduced by performing in an atmosphere (see, for example, Patent Document 5 below).

Special table 2004-511101 (pages 8-15) Japanese Patent No. 4374437 JP 2006-344688 A JP 2011-171551 A JP 2007-242744 A

  A semiconductor device using a silicon carbide substrate requires high-temperature heat treatment even after the gate insulating film is formed, and the channel mobility is lowered under conditions such as temperature and atmosphere, but this point has not been considered in the past. The decrease in channel mobility could not be suppressed.

  For this reason, in addition to the gate insulating film formation conditions, it is necessary to consider the conditions of the heat treatment in the subsequent step of the gate insulating film formation. In addition, it is desirable for the semiconductor device to exhibit normally-off characteristics. That is, the threshold value is desirably a positive value. Since the threshold value is expressed as a function of the flat band voltage, it is desirable that the flat band voltage is a positive value.

  In view of the above problems, an object of the present invention is to suppress a decrease in channel mobility immediately after gate oxidation and to achieve a flat band voltage at a positive value.

  In order to solve the above-described problems and achieve the object of the present invention, a method for manufacturing a silicon carbide semiconductor device according to the present invention includes at least one oxide film or nitride film as a gate insulating film on a silicon carbide substrate. Alternatively, the method includes a step of forming an oxynitride film and a step of heat-treating the gate insulating film at a temperature of 400 ° C. or higher after the gate insulating film is formed. The rate of temperature decrease is 5 ° C./min or more and less than 100 ° C./min.

  The method for manufacturing a silicon carbide semiconductor device according to the present invention is the above-described invention, wherein in the heat treatment step, the gate insulating film is formed and the resistance is reduced, the interlayer insulating film is formed and baked, and the contact metal is formed. And forming a reaction layer of the contact metal and the silicon carbide semiconductor.

  The method for manufacturing a silicon carbide semiconductor device according to the present invention is characterized in that, in the above-described invention, the heat treatment step uses a gas containing at least one of hydrogen, water vapor, nitrogen, helium, and argon.

  The method for manufacturing a silicon carbide semiconductor device according to the present invention is characterized in that, in the above-described invention, the step of forming the gate insulating film includes thermal oxidation in dry oxygen containing no moisture.

  In the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, the step of forming the gate insulating film includes thermal oxynitridation in a gas containing at least dinitrogen monoxide or nitrogen monoxide. It is characterized by that.

  The method for manufacturing a silicon carbide semiconductor device according to the present invention is characterized in that, in the above-described invention, the step of forming the gate insulating film includes thermal oxidation in a gas containing at least moisture.

  According to the silicon carbide semiconductor device manufacturing method of the present invention, in the above-described invention, in the step of forming the gate insulating film, an oxide film, a nitride film, or an oxynitride insulating film is formed in a chemical or physical vapor phase. A step of depositing by a growth method is included.

A silicon carbide semiconductor device according to the present invention includes a silicon carbide substrate and a gate insulating film formed on the silicon carbide substrate and including at least one oxide film, nitride film, or oxynitride film, The gate insulating film has a mass density of 2.2 g / cm ⁻³ or more and less than 2.5 g / cm ⁻³ .

  According to the present invention, a decrease in channel mobility immediately after gate oxidation can be suppressed, and a flat band voltage can be made positive.

FIG. 1 is a diagram showing an experimental example of a MOS capacitor according to the silicon carbide semiconductor element of the present invention. FIG. 2 is a table showing the relationship between the interface state density and the flat band voltage of the MOS capacitor for comparison with the embodiment. FIG. 3 is a table showing the mass density of the gate insulating film after removing electrodes from the MOS capacitor for comparison with the embodiment. FIG. 4 is a cross-sectional view for explaining the method for manufacturing the silicon carbide MOSFET according to the first embodiment of the present invention. (Part 1) FIG. 5 is a cross-sectional view for explaining the method for manufacturing the silicon carbide MOSFET according to the first embodiment of the present invention. (Part 2) FIG. 6 is a cross-sectional view for explaining the method for manufacturing the silicon carbide MOSFET according to the first embodiment of the present invention. (Part 3) FIG. 7 is a cross-sectional view for explaining the method for manufacturing the silicon carbide MOSFET according to the first embodiment of the present invention. (Part 4) FIG. 8 is a cross-sectional view for explaining the method for manufacturing the silicon carbide MOSFET according to the first embodiment of the present invention. (Part 5) FIG. 9 is a cross-sectional view for explaining the method for manufacturing the silicon carbide MOSFET according to the first embodiment of the present invention. (Part 6) FIG. 10 is a cross-sectional view for explaining the method for manufacturing the silicon carbide MOSFET according to the first embodiment of the present invention. (Part 7) FIG. 11 is a cross-sectional view for explaining the method for manufacturing the silicon carbide MOSFET according to the first embodiment of the present invention. (Part 8) FIG. 12 is a cross-sectional view for explaining the method for manufacturing the silicon carbide MOSFET according to the first embodiment of the present invention. (Part 9) FIG. 13 is a table showing the gate voltage dependence of the channel mobility of each of the silicon carbide MOSFET manufactured by the manufacturing method of Example 1 and the comparative example. FIG. 14 is a cross-sectional view showing an application example to a vertical MOSFET as the silicon carbide semiconductor element of the present invention.

(Embodiment)
Exemplary embodiments of the present invention will be described below in detail with reference to the accompanying drawings. In the present specification and the accompanying drawings, it means that electrons or holes are majority carriers in layers and regions with n or p, respectively. Further, + and − attached to n and p mean that the impurity concentration is higher and lower than that of the layer or region where it is not attached. Note that, in the following description of the embodiments and the accompanying drawings, the same reference numerals are given to the same components, and duplicate descriptions are omitted. In the present specification, in the Miller index notation, “−” means a bar attached to the index immediately after that, and “−” is added before the index to indicate a negative index.

  First, in order to verify how the interface state density and the flat band voltage are controlled by the silicon carbide semiconductor device of the present invention, the atmosphere and temperature in the MOS capacitor are assumed to be heat-treated after forming the gate oxide film. An experimental example in which heat treatment was performed will be described.

  FIG. 1 is a diagram showing an experimental example of a MOS capacitor according to the silicon carbide semiconductor element of the present invention. The MOS capacitor is produced as follows.

(Step 1) First, an n-type epitaxial film having a donor density of about 1 × 10 ¹⁶ cm ⁻³ on an n-type 4H—SiC (000-1) substrate 1 (0 to 8 degrees off substrate from the (000-1) plane). 2 is grown 5-10 μm. The 4H—SiC substrate 1 alone or the 4H—SiC substrate 1 and the epitaxial film 2 are collectively referred to as a 4H—SiC semiconductor (silicon carbide semiconductor) 1.

(Step 2) Next, after the 4H—SiC semiconductor 1 is cleaned, oxynitridation in an atmosphere containing dinitrogen monoxide at 1300 ° C. is performed for 100 minutes, and then in an atmosphere containing hydrogen at 1000 ° C. for 30 minutes. The insulating film 3 having a thickness of 50 nm is formed. Note that hydrogen may be diluted with an inert gas in the heat treatment atmosphere.

(Step 3) Next, after the 4H—SiC semiconductor 1 is cooled to room temperature, a heat treatment at 800 ° C. for 10 minutes for baking the insulating film 3 and a heat treatment at 950 ° C. for 2 minutes to form a silicide layer are assumed. Heat treatment is performed. At this time, in the embodiment, the temperature lowering rate during the heat treatment for forming the interlayer insulating film 3 and forming the silicide layer is controlled to 100 ° C./min, and cooled to 400 ° C. Thereafter, the temperature is returned to room temperature without performing control.

  In this experiment, the atmosphere of the heat treatment is hydrogen, water vapor, or nitrogen, but an inert gas of helium or argon may be used. The temperature of the heat treatment may be selected by an index for each heat treatment such as the degree of baking or contact resistance, but heat treatment at a temperature higher than the oxidation temperature may cause a significant increase in interface state density. It is desirable that

(Step 4) Next, on the insulating film 3, a dot-shaped aluminum gate electrode 4 was deposited at room temperature, and a MOS capacitor composed of an aluminum back electrode 5 in which aluminum was deposited on the entire back surface was fabricated.

  Here, in order to verify the control effect of the MOS interface, as a comparative example, the temperature drop rate during the heat treatment in Step 3 is normally used at 180 ° C./min, the lowest controllable temperature is 5 ° C./min, and further the heat treatment A MOS capacitor was produced for each.

  FIG. 2 is a table showing the relationship between the interface state density and the flat band voltage of the MOS capacitor for comparison with the embodiment. The horizontal axis is the flat band voltage, and the vertical axis is the interface state density. The measurement results of the MOS capacitor (a) according to the experimental example shown in FIG. 1 and the comparison MOS capacitors (b to d) are shown. The completed embodiment and comparative example MOS capacitors were measured with a C-V meter 6 (see FIG. 1), and the relationship between the interface state density and the flat band voltage was examined.

  Compared with the difference in the heat treatment method of step 3 using FIG. 2, (d) without heat treatment (white circle ○ plot), (a: embodiment) heat treatment with 100 ° C./min (black square ■ (Plot), (b) heat treatment with 5 ° C./min (black diamond ◆ plot), and (c) heat treatment with 180 ° C./min (black triangle ▲ plot) have high interface state density.

  However, with respect to the increase in the interface state density, (a: embodiment) 100 ° C./min, (b) 5 ° C./min with heat treatment compared to (c) 180 ° C./min with heat treatment. , Has been suppressed.

  Further, the flat band voltage is negative for (c) no heat treatment, whereas (a: embodiment) heat treatment at 100 ° C./min, (b) heat treatment at 5 ° C./min, ( c) With heat treatment of 180 ° C./min), although with a slight decrease, it is 1 V or higher.

As described above, the interface state density and the flat band voltage vary depending on the presence or absence of the heat treatment in step 3 and the temperature drop rate during the heat treatment in step 3. As a device considered for actual use, the interface state density is lower than 3 × 10 ¹¹ cm ⁻² and the flat band voltage is 1 V or higher than the conditions of (c) and (d) (a: Implementation) And (b) are preferred.

  Further, when an actual process is taken into consideration, it is more preferable that the processing time can be shortened (a: embodiment). It was confirmed that the interface state density and the flat band voltage can be controlled by making the temperature drop rate during the heat treatment after the formation of the insulating film (gate insulating film) 3 appropriate (for example, 100 ° C./min).

  The mass density of the insulating film (gate insulating film) 3 can be measured using an X-ray reflectivity method using radiated light. Next, the electrodes of the MOS capacitors (a) to (d) were removed, and the mass density of the gate insulating film was measured by an X-ray reflectivity method using radiated light.

  FIG. 3 is a table showing the mass density of the gate insulating film after removing electrodes from the MOS capacitor for comparison with the embodiment. The horizontal axis represents the MOS capacitors (a) to (d), and the vertical axis represents the mass density of the gate insulating film.

  As shown in FIG. 3, (d) no heat treatment, (a: embodiment) heat treatment at 100 ° C./min, (b) heat treatment at 5 ° C./min, (c) heat treatment at 180 ° C./min. Existence has a low mass density, and it can be assumed that this affects oxygen deficiency in the gate insulating film 3 and desorption of hydrogen bonded to silicon.

Thus, (c) heat treatment at 180 ° C./min was 2.1 g / cm ⁻³ , and the oxygen vacancies were the largest and the interface state density was considered to have deteriorated. And (a: embodiment) heat treatment with 100 ° C./min, (b) with heat treatment at 5 ° C./min, the mass density of the gate insulating film 3 is 2.2 g / cm ⁻³ from the result of mass density. If it is more than 2.5 g / cm ⁻³ , good interface characteristics can be obtained.

  FIGS. 4-12 is sectional drawing for demonstrating the manufacturing method of the silicon carbide MOSFET concerning Example 1 of this invention. Each process 1-9 of silicon carbide MOSFET manufacture is demonstrated using FIGS.

(Step 1) First, as shown in FIG. 4, on the p ⁺ type silicon carbide substrate (4H—SiC (000-1) substrate) 7 surface, 0 to 8 degrees off substrate, preferably 0 to 4 degrees off substrate Then, a p-type epitaxial film 8 having an acceptor density of 1 × 10 ¹⁶ cm ⁻³ is grown.

(Step 2) Next, as shown in FIG. 5, a SiO ₂ film having a thickness of 1 μm is deposited on the surface of the p-type epitaxial film 8 by low pressure CVD, and a mask 9 is formed by patterning by photolithography. . Openings are formed in the mask 9 at locations corresponding to the drain region 13 and the source region 14. Thereafter, for example, phosphorus ions 10 are ion-implanted such that the substrate temperature is 500 ° C., the acceleration energy is 40 keV to 250 keV, and the impurity concentration is 2 × 10 ²⁰ cm ⁻³ .

(Step 3) Next, as shown in FIG. 6, the mask 9 is removed, a 1 μm thick SiO ₂ film is deposited on the surface by low pressure CVD, and a mask 11 is formed by patterning by photolithography. To do. An opening is formed in the mask 11 at a location corresponding to the ground region 15. Thereafter, for example, aluminum ions 12 are ion-implanted so that the substrate temperature is 500 ° C., the acceleration energy is 40 keV to 200 keV, and the impurity concentration is 2 × 10 ²⁰ cm ⁻³ .

(Step 4) Next, as shown in FIG. 7, the mask 11 is removed, and activation annealing is performed in an argon atmosphere at 1600 ° C. for 5 minutes to form a drain region 13 and a source region on the main surface side of the substrate 1. 14 and the ground region 15 are formed.

(Step 5) Next, as shown in FIG. 8, a field oxide film 16 having a thickness of 0.5 μm is deposited by low pressure CVD, and a part of the field oxide film 16 is removed by photolithography and wet etching to be active. Region 17 is formed. The active region 17 is formed corresponding to the positions of the drain region 13, the source region 14, and the ground region 15.

(Step 6) Next, as shown in FIG. 9, oxynitridation is performed for 100 minutes at 1300 ° C. in an atmosphere where the flow ratio of dinitrogen monoxide and nitrogen is 1: 5, followed by an atmosphere containing hydrogen at 1000 ° C. The gate insulating film 18 having a thickness of 50 nm is formed by performing a heat treatment for 30 minutes. In the atmosphere of the heat treatment, hydrogen may be diluted with an inert gas. Thereafter, polycrystalline silicon is deposited to a thickness of 0.3 μm on the gate insulating film 18 by a low pressure CVD method, and patterned by photolithography to form the gate electrode 19.

(Step 7) Thereafter, contact holes are formed on the drain region 13, the source region 14, and the ground region 15 by photolithography and hydrofluoric acid etching. Then, as shown in FIG. 10, aluminum having a thickness of 10 nm and nickel having a thickness of 60 nm are deposited on the contact hole and patterned by lift-off to form the contact metal 20.

(Step 8) As shown in FIG. 11, annealing is performed at 950 ° C. for 2 minutes in an inert gas atmosphere as ohmic contact annealing, and then returned to room temperature at a temperature lowering rate of 100 ° C./min. The reaction layer 21 is formed. The inert gas is nitrogen, helium, or argon.

(Step 9) Next, as shown in FIG. 12, 300 nm of aluminum is deposited on the surface, and a pad electrode 22 is formed on the gate electrode 19 and the reaction layer 21 by photolithography and phosphoric acid etching. Further, 100 nm of aluminum is evaporated on the surface opposite to the main surface of the substrate 1 to form the back electrode 23.

  FIG. 13 is a table showing the gate voltage dependence of the channel mobility of each of the silicon carbide MOSFET manufactured by the manufacturing method of Example 1 and the comparative example. (A) is the characteristic of the said embodiment (Example 1), (b)-(d) is the characteristic of each said comparative example. Each of the comparative examples (b) to (d) is created by the process 8 of FIG. 11 (the temperature drop rate during the heat treatment after the formation of the gate insulating film 18) is different.

5 (a: Example) 100 ° C./min, (b) MOSFET with heat treatment at 5 ° C./min has a maximum channel mobility of about 43 cm ^{2 /} Vs, and (c) 180 ° C./min heat treatment. The channel mobility of the MOSFET with the maximum was about 35 cm ^{2 /} Vs, and (d) the channel mobility of the MOSFET without the heat treatment was about 46 cm ^{2 /} Vs at the maximum.

  The gate voltage dependence of the channel mobility in (a) and (b) showed almost the same characteristics, and showed the same tendency as the interface state density and flat band voltage confirmed by the MOS capacitor. (A) The channel mobility at the peak of the MOSFET with heat treatment of 100 ° C./min and (b) 5 ° C./min is improved by about 30% from the temperature decrease rate of 180 ° C./min. The result was suppressed to 7% (1/10 or less). From this, the device manufactured under the conditions (a) and (b) can be expected to further reduce the loss as compared with (c).

  Moreover, the threshold value was negative (d) without heat treatment and was normally on, but (a), (b), and (c) were all 4V, and sufficient normally-off characteristics were obtained. Indicated.

Further, the electrodes of these silicon carbide MOSFETs were removed, and the mass density of the gate insulating film 18 was measured by an X-ray reflectivity method using radiated light. As a result, as in FIG. 3, (d) no heat treatment, (a: Example) heat treatment at 100 ° C./min, (b) heat treatment at 5 ° C./min, (c) heat treatment at 180 ° C./min. Yes had a low mass density. (C) The heat treatment at 180 ° C./min is 2.1 g / cm ⁻³ , and the oxygen vacancies and hydrogen desorption are the largest, so the interface state density is degraded and the channel mobility is considered to be reduced. . As with the MOS capacitor, (a: Example) Heat treatment is 100 ° C./min, and (b) Heat treatment is 5 ° C./min, the mass density of the gate insulating film 18 is 2.2 g / cm ^−3. If it is more than 2.5 g / cm ⁻³ , good interface characteristics can be obtained.

  In Example 2, the method of forming the gate insulating film 18 shown in FIG. 9 is different from Example 1 in Step 6 described in Example 1. In Example 2, thermal oxidation was performed in dry oxygen at 1100 ° C. for 50 minutes, and then oxynitridation was performed at 1300 ° C. in an atmosphere where the flow ratio of dinitrogen monoxide and nitrogen was 1:20 for 30 minutes. By performing heat treatment for 30 minutes in an atmosphere containing hydrogen at 1000 ° C., a gate insulating film 18 having a thickness of 50 nm is formed. Other steps are the same as those in the first embodiment.

  The silicon carbide MOSFET of Example 2 manufactured by such a manufacturing method also showed the same characteristics as Example 1. Moreover, as a result of removing the electrode of the silicon carbide MOSFET and MOSFET and measuring the mass density of the gate insulating film 18 by the X-ray reflectivity method using the emitted light, the mass density is the same as in Example 1. It became.

  In Example 3, the method of forming the gate insulating film 18 shown in FIG. 9 in Step 6 described in Example 1 is different from Example 1. In Example 3, thermal oxidation was performed for 50 minutes in dry oxygen at 1100 ° C., and then oxynitridation was performed for 30 minutes at 1200 ° C. in an atmosphere where the flow ratio of nitrogen monoxide and nitrogen was 1:10, followed by 1000 A gate insulating film 18 having a thickness of 50 nm is formed by performing a heat treatment for 30 minutes in an atmosphere containing hydrogen at ° C. Other steps are the same as those in the first embodiment.

  The silicon carbide MOSFET of Example 3 manufactured by such a manufacturing method also showed the same characteristics as Example 1. Moreover, as a result of removing the electrode of the silicon carbide MOSFET and the MOSFET and measuring the mass density of the gate insulating film 18 by the X-ray reflectivity method using the emitted light, the mass density was the same.

  In Example 4, the method of forming the gate insulating film 18 shown in FIG. 9 is different from Example 1 in Step 6 described in Example 1. In Example 4, after an insulating film having a thickness of less than 50 nm is formed by a deposition method, oxynitridation of several nm is performed at 1300 ° C. for 30 minutes in an atmosphere where the flow ratio of dinitrogen monoxide and nitrogen is 1:20. Subsequently, a heat treatment for 30 minutes is performed in an atmosphere containing hydrogen at 1000 ° C. to form a gate insulating film 18 having a total thickness of about 50 nm. A method for depositing the insulating film includes a method using silane or TEOS (tetraethoxysilane) by a CVD method, but is not particularly limited. Other steps are the same as those in the first embodiment.

  The silicon carbide MOSFET of Example 4 manufactured by such a manufacturing method also showed the same characteristics as Example 1. Moreover, as a result of removing the electrode of the silicon carbide MOSFET and the MOSFET and measuring the mass density of the gate insulating film 18 by the X-ray reflectivity method using the emitted light, the mass density was the same.

  In Example 5, the method of forming the gate insulating film 18 shown in FIG. 9 in Step 6 described in Example 1 and the gas atmosphere during ohmic contact annealing in Step 8 (see FIG. 11) are different from those in Example 1. Different. In the fifth embodiment, gate insulation having a thickness of 50 nm is performed by performing oxidation in an atmosphere containing at least moisture for 30 minutes at a temperature of 1000 ° C., followed by heat treatment for 30 minutes in an atmosphere containing hydrogen at 1000 ° C. A film 18 is formed. Thereafter, at the time of contact annealing, processing is performed in a mixed gas atmosphere of hydrogen or water vapor and nitrogen, helium, and argon. Other steps are the same as those in the first embodiment.

  The silicon carbide MOSFET of Example 5 manufactured by such a manufacturing method also showed the same characteristics as Example 1. Moreover, as a result of removing the electrodes of these silicon carbide MOSFETs and measuring the mass density of the gate insulating film 18 by the X-ray reflectivity method using the emitted light, the mass density was the same.

  The gate insulating film formed in an atmosphere containing moisture is hydrogen bonded at the interface between the silicon carbide substrate and silicon dioxide when the subsequent heat treatment is performed in an atmosphere of only an inert gas such as nitrogen or argon. It has been reported that the characteristics deteriorate due to separation. In order to prevent this characteristic deterioration, when the gate insulating film is formed in an atmosphere containing moisture, it is necessary to perform a heat treatment in a mixed gas atmosphere of hydrogen or water vapor and nitrogen, helium, or argon (for example, the above patent) Reference 5).

  Example 6 differs from Example 1 in the method of forming the gate insulating film 18 shown in FIG. 9 in Step 6 described in Example 1 and the gas atmosphere during ohmic contact annealing in Step 8 (see FIG. 11). . In Example 6, oxynitridation is performed for 100 minutes at 1300 ° C. in an atmosphere where the flow ratio of dinitrogen monoxide and nitrogen is 1: 5, followed by heat treatment for 30 minutes in an atmosphere containing at least moisture at 1000 ° C. Thus, the gate insulating film 18 having a thickness of 50 nm is formed. Thereafter, at the time of contact annealing, processing is performed in a mixed gas atmosphere of hydrogen or water vapor and nitrogen, helium, and argon. Other steps are the same as those in the first embodiment.

  The silicon carbide MOSFET of Example 6 manufactured by such a manufacturing method also showed the same characteristics as Example 1. Moreover, as a result of removing the electrode of the silicon carbide MOSFET and the MOSFET and measuring the mass density of the gate insulating film 18 by the X-ray reflectivity method using the emitted light, the mass density was the same.

  Example 7 differs from Example 1 in the method of forming the gate insulating film 18 shown in FIG. 9 in Step 6 described in Example 1 and the gas atmosphere during ohmic contact annealing in Step 8 (see FIG. 11). In Example 7, oxynitridation is performed for 100 minutes at 1300 ° C. in an atmosphere where the flow ratio of dinitrogen monoxide and nitrogen is 1: 5, followed by heat treatment for 30 minutes in an atmosphere containing at least moisture at 1000 ° C. Thus, the gate insulating film 18 having a thickness of 50 nm is formed. Thereafter, at the time of contact annealing, treatment is performed in a gas atmosphere of hydrogen or water vapor. Other steps are the same as those in the first embodiment.

  The silicon carbide MOSFET of Example 7 manufactured by such a manufacturing method also showed the same characteristics as Example 1. Moreover, as a result of removing the electrode of the silicon carbide MOSFET and the MOSFET and measuring the mass density of the gate insulating film 18 by the X-ray reflectivity method using the emitted light, the mass density was the same.

FIG. 14 is a cross-sectional view showing an application example to a vertical MOSFET as the silicon carbide semiconductor element of the present invention. As shown in FIG. 14, in a vertical MOSFET, an n-type epitaxial layer 32 is formed on the front surface of an n ⁺ -type silicon carbide substrate 31. The impurity concentration of n type epitaxial layer 32 is lower than the impurity concentration of n ⁺ type silicon carbide substrate 31. A plurality of p-type regions 36 are selectively formed inside the n-type epitaxial layer 32. P type region 36 is exposed on the surface of n type epitaxial layer 32 opposite to the n ⁺ type silicon carbide substrate 31 side.

  A p-type SiC layer 37 having a lower concentration than the p-type region 36 is formed over the surfaces of the n-type epitaxial film 32 and the p-type region 36. An n-type region 33 that penetrates the p-type SiC layer 37 in the depth direction and reaches the n-type epitaxial film 32 is formed in the p-type SiC layer 37 on the n-type epitaxial film 32 where the p-type region 36 is not formed. . The n-type epitaxial film 32 and the n-type region 33 are n-type drift regions. The impurity concentration of the n-type region 33 is preferably higher than that of the n-type epitaxial film 32.

Inside p type SiC layer 37, n ⁺ source region 34 and p ⁺ type contact region 35 are formed so as to be in contact with each other. N ⁺ source region 34 and p ⁺ type contact region 35 are exposed on the opposite surface of p type SiC layer 37 to p type region 36 side. N ⁺ source region 34 is formed apart from n-type region 33. The p ⁺ type contact region 35 is located on the opposite side of the n ⁺ source region 34 with respect to the n type region 33 side. The impurity concentration of p ⁺ -type contact region 35 is higher than the impurity concentration of p-type SiC layer 37.

A portion of p-type SiC layer 37 excluding n ⁺ source region 34, p ⁺ -type contact region 35 and n-type region 33 becomes a p-type base region together with p-type region 36. A source electrode 38 is formed on the surfaces of the n ⁺ source region 34 and the p ⁺ type contact region 35. A gate electrode 19 is formed on the surface of the p-type SiC layer 37 and the n-type region 33 between the adjacent n ⁺ source regions 34 via the gate insulating film 18. The gate electrode 19 is electrically insulated from the source electrode 38 by an interlayer insulating film (not shown). Further, on the back surface of the n ⁺ -type silicon carbide substrate 31, the drain electrode 39 in contact with the n ⁺ -type silicon carbide substrate 31 is formed.

  In the vertical MOSFET having the complicated structure shown in FIG. 14, the gate insulating film 18 similar to that of the first to seventh embodiments is formed, but the interface state density results similar to those of the first to seventh embodiments are obtained. I was able to. Moreover, as a result of removing the electrode of the silicon carbide MOSFET and the MOSFET and measuring the mass density of the gate insulating film 18 by the X-ray reflectivity method using the emitted light, the mass density was the same.

  According to each of these examples, the temperature range after the formation of the insulating film (gate insulating film 18) and the rate of temperature decrease are from 5 ° C./min to less than 100 ° C./min. It is desirable to do. In this way, effective channel mobility and normally-off characteristics can be achieved without adding special processing by appropriately controlling the temperature drop rate during the heat treatment that is indispensable in the process after the formation of the gate insulating film 18. can do. By appropriately selecting the temperature drop rate during the subsequent heat treatment after the formation of the gate insulating film 18, it is possible to manufacture a high-performance silicon carbide MOSFET having effective channel mobility and normally-off characteristics. Become.

  Then, in the formation of the gate insulating film of the silicon carbide semiconductor, 1 V is obtained while suppressing a decrease in channel mobility immediately after gate oxidation to 1/10 or less as compared with the conventional case (comparative example) without adding a special process. The above positive flat band voltage can be achieved at the same time.

  In each of the above embodiments, ohmic contact annealing, which generally requires the highest temperature in the heat treatment in the process after the formation of the gate insulating film 18, has been described as an example. However, the present invention is not limited to this. This is not a process that is performed in a subsequent process in the method of manufacturing a semiconductor device, and includes various heat treatments including a heat treatment for reducing the formation temperature and resistance of polysilicon, and a heat treatment for flattening an interlayer insulating film. By setting the temperature lowering rate to an inert gas, the same effect can be achieved in any case.

  Further, in the above embodiment, a (000-1) substrate (0-8 ° off substrate) having a crystal structure of 4H—SiC was used, but a (000-1) substrate having a crystal structure of 4H—SiC, ( 11-20) A similar effect can be obtained with a substrate.

  As described above, the present invention has been described by taking, as an example, a method for manufacturing a lateral MOSFET as a silicon carbide MOSFET and a method for manufacturing some vertical MOSFETs. The present invention can be applied to a semiconductor device such as a vertical MOSFET having the same, and the same effect can be obtained. Therefore, the present invention can be applied to various semiconductor device manufacturing methods without departing from the scope of the invention described in the claims.

  As described above, the silicon carbide semiconductor device according to the present invention is useful for horizontal and vertical silicon carbide semiconductor devices using silicon carbide as a semiconductor material.

1 n-type 4H-SiC (000-1) substrate 2 n-type epitaxial film 3 insulating film 4 aluminum gate electrode 5 aluminum back electrode 6 C-V meter 7 p-type 4H-SiC (000-1) substrate 8 p-type epitaxial film 9, 11 Mask 10 Phosphorus ion 12 Aluminum ion 13 Drain region 14 Source region 15 Ground region 16 Field oxide film 17 Active region 18 Gate insulating film 19 Gate electrode 20 Contact metal 21 Reaction layer 22 Pad electrode 23 Back electrode 31 n ⁺ type silicon carbide Substrate 32 n type epitaxial film 33 n type region 34 n ⁺ source region 35 p ⁺ type contact region 36 p type region 37 p type SiC layer 38 source electrode 39 drain electrode

Claims (8)

Forming at least one oxide film, nitride film, or oxynitride film as a gate insulating film on a silicon carbide substrate; and, after forming the gate insulating film, the gate insulating film is formed at a temperature of 400 ° C. or higher. Including a step of heat treatment,
The method of manufacturing a silicon carbide semiconductor element, wherein the heat treatment step is performed at a rate of temperature decrease in a range from a maximum temperature to 400 ° C. of 5 ° C./min or more and less than 100 ° C./min.   In the heat treatment step, any one of formation of the gate insulating film and reduction in resistance, formation and baking of an interlayer insulating film, formation of a contact metal, and formation of a reaction layer of the contact metal and the silicon carbide semiconductor are performed. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the method is performed.   3. The method for manufacturing a silicon carbide semiconductor element according to claim 1, wherein the heat treatment step uses a gas containing at least one of hydrogen, water vapor, nitrogen, helium, and argon.   The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the step of forming the gate insulating film includes thermal oxidation in dry oxygen not containing moisture.   The carbonization according to claim 1, wherein the step of forming the gate insulating film includes thermal oxynitridation in a gas containing at least dinitrogen monoxide or nitric oxide. A method for manufacturing a silicon semiconductor element.   The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the step of forming the gate insulating film includes thermal oxidation in a gas containing at least moisture.   4. The step of forming the gate insulating film includes a step of depositing an insulating film of an oxide film, a nitride film, or an oxynitride film by chemical or physical vapor deposition. The manufacturing method of the silicon carbide semiconductor element as described in any one. A silicon carbide substrate;
A gate insulating film formed on the silicon carbide substrate and including at least one oxide film, nitride film, or oxynitride film;
The silicon carbide semiconductor device, wherein the gate insulating film has a mass density of 2.2 g / cm ⁻³ or more and less than 2.5 g / cm ⁻³ .

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