JP6155553B2 - Method for manufacturing silicon carbide semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor device using a silicon carbide substrate, and more particularly to a method for manufacturing a silicon carbide semiconductor device characterized by a heat treatment step after formation of a gate insulating film.

  Conventionally, research and development of next-generation semiconductor devices using a silicon carbide (SiC) substrate has been promoted. Silicon carbide has a characteristic that an insulating film can be formed on the surface by thermal oxidation like silicon (Si). Also, silicon carbide has different channel mobility at the interface between the silicon carbide substrate and the gate insulating film constituting the MOS (metal-oxide film-semiconductor) structure depending on the crystal plane of the silicon carbide substrate and the oxidation method. There are characteristics.

  The (000-1) plane or the (11-20) plane of the silicon carbide substrate is said to exhibit higher channel mobility than the (0001) plane of the silicon carbide substrate when oxidized in a wet atmosphere. As an index for alternatively evaluating channel mobility, there is an interface state density. It is known that channel mobility generally tends to increase as the interface state density at the interface between the silicon carbide substrate and the gate insulating film decreases. In this specification, in the Miller index notation, “−” means a bar attached to the index immediately after that, and “−” is added before the index to indicate a negative index.

  As a method for manufacturing a semiconductor device using such a silicon carbide substrate, the (000-1) plane of the silicon carbide substrate is wetted in order to reduce the interface state density at the interface between the silicon carbide substrate and the gate insulating film. There has been proposed a method of obtaining high channel mobility by forming a gate insulating film by thermal oxidation at (see, for example, Patent Document 1 below). In Patent Document 1 below, annealing is performed in a hydrogen atmosphere or a water vapor atmosphere after forming the gate insulating film.

  In addition, in the manufacturing process of a semiconductor device using a silicon carbide substrate, after the gate insulating film is formed, heat treatment for forming a gate conductive film made of polysilicon and lowering resistance, forming an interlayer insulating film, and baking are performed. Various heat treatment steps such as heat treatment or heat treatment for forming a contact metal and a reaction layer of contact metal and silicon carbide are included.

Japanese Patent No. 4374437

  However, the interface state density at the interface between the silicon carbide substrate and the gate insulating film obtained by oxidizing the (000-1) surface or the (11-20) surface of the silicon carbide substrate in a wet atmosphere is determined in a later step. MOS interface characteristics deteriorate due to heat treatment (e.g., a heat treatment at about 800 ° C. to 1000 ° C. for forming a reaction layer of contact metal and silicon carbide and forming an ohmic contact between the wiring layer and the silicon carbide substrate). It is known to do.

  Oxidation in a wet atmosphere reduces the interface state density at the interface between the silicon carbide substrate and the gate insulating film because the hydrogen or hydroxyl groups contained in the wet atmosphere are dangling bonds of silicon atoms on the surface of the silicon carbide substrate ( It is said that it is for terminating dangling bonds. In the heat treatment after the formation of the gate insulating film, the interface state density of the interface between the silicon carbide substrate and the gate insulating film is eliminated by the elimination of hydrogen or hydroxyl groups terminating the dangling bonds of silicon atoms on the surface of the silicon carbide substrate. It is presumed that the MOS interface characteristics deteriorate due to the increase.

  Such MOS interface characteristic deterioration due to the heat treatment does not occur when the MOS structure is formed on the (0001) plane of the silicon carbide substrate. For this reason, when the MOS structure is formed on the (000-1) plane or the (11-20) plane of the silicon carbide substrate, it differs from the case where the MOS structure is formed on the (0001) plane of the silicon carbide substrate. Processing is required.

  In order to solve the above-described problems caused by the conventional technique, the present invention has a MOS interface characteristic obtained by oxidizing the (000-1) plane or the (11-20) plane of a silicon carbide semiconductor in a wet atmosphere. An object of the present invention is to provide a method for manufacturing a silicon carbide semiconductor device capable of recovering the MOS interface characteristics even if it is deteriorated by this heat treatment.

In order to solve the above-described problems and achieve the object of the present invention, a method for manufacturing a silicon carbide semiconductor device according to the present invention has the following characteristics. By performing thermal oxidation in a gas containing at least oxygen and water vapor, the (000-1) plane of the silicon carbide semiconductor or the (000-1) plane or ( 11-20) A gate insulating film is formed in contact with the surface. Next, after forming the gate insulating film, forming a gate conductive film and lowering resistance, forming and baking an interlayer insulating film, or forming a contact metal and a reaction layer between the contact metal and the silicon carbide semiconductor Among the heat treatments performed at a temperature of 400 ° C. or higher for forming the film, at least one heat treatment step is performed. In the heat treatment step, hydrogen atoms or hydroxyl groups that have terminated dangling bonds of silicon atoms at the interface with the gate insulating film of the silicon carbide semiconductor are eliminated. Then, the dangling bonds of the silicon carbide semiconductor from which hydrogen atoms or hydroxyl groups have been removed in the heat treatment step are subjected to a final heat treatment in an atmosphere containing at least hydrogen or water vapor after the heat treatment step, and then again hydrogen atoms or Terminate with a hydroxyl group. The temperature of the final heat treatment is 500 ° C to 900 ° C. The atmosphere of the final heat treatment is a mixed gas of any one of nitrogen, helium and argon and hydrogen. The hydrogen concentration in the mixed gas is 1% or more and 4% or less.

  Also, in the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, the atmosphere of the final heat treatment is a mixed gas of any one of an inert gas of nitrogen, helium and argon and water vapor. And

  A method for manufacturing a silicon carbide semiconductor device according to the present invention is the above-described invention, in the above-described invention, on the (000-1) plane or the (11-20) plane having an off angle of 0 to 8 degrees of the silicon carbide semiconductor. The gate insulating film is formed.

  According to the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, the silicon carbide semiconductor is thermally oxidized in a dry oxygen atmosphere not containing water vapor, and then the silicon carbide in a gas containing water vapor. The gate insulating film is formed by performing thermal oxidation of a semiconductor.

  In the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, an insulating film to be the gate insulating film is deposited on the (000-1) plane or the (11-20) plane of the silicon carbide semiconductor. Then, the silicon carbide semiconductor at the interface with the insulating film is changed to the gate insulating film by performing thermal oxidation in a gas containing water vapor.

  According to the above-described invention, heat treatment at 400 ° C. or higher, such as annealing for forming an ohmic contact after forming a gate oxide film on the (000-1) or (11-20) plane of the silicon carbide semiconductor by wet oxidation. When all the heat treatment steps at 400 ° C. or higher are completed, the final heat treatment in an atmosphere containing hydrogen or water vapor is performed, so that silicon carbide from which hydrogen and hydroxyl groups are eliminated by the heat treatment after the gate oxide film is formed is used. The dangling bonds of silicon atoms on the semiconductor surface can be terminated again with hydrogen. Thereby, the interface characteristics between the silicon carbide semiconductor and the gate insulating film can be recovered, and high channel mobility can be realized.

  According to the method for manufacturing a silicon carbide semiconductor device according to the present invention, even when the interface state density at the interface between the silicon carbide substrate and the insulating film is increased by the heat treatment applied in the subsequent process, the MOS interface characteristics are deteriorated. The MOS interface characteristics can be recovered.

It is sectional drawing which shows the state in the middle of manufacture of MOSFET concerning embodiment of this invention. It is sectional drawing which shows the state in the middle of manufacture of MOSFET concerning embodiment of this invention. It is sectional drawing which shows the state in the middle of manufacture of MOSFET concerning embodiment of this invention. It is sectional drawing which shows the state in the middle of manufacture of MOSFET concerning embodiment of this invention. It is sectional drawing which shows the state in the middle of manufacture of MOSFET concerning embodiment of this invention. It is sectional drawing which shows the state in the middle of manufacture of MOSFET concerning embodiment of this invention. It is sectional drawing which shows the state in the middle of manufacture of MOSFET concerning embodiment of this invention. It is sectional drawing which shows the state in the middle of manufacture of MOSFET concerning embodiment of this invention. It is sectional drawing which shows the structure of MOSFET concerning embodiment of this invention after the process following FIG. It is a characteristic view which shows the gate voltage dependence of the field effect channel mobility in MOSFET produced with the manufacturing method concerning this invention.

  Exemplary embodiments of a method for manufacturing a silicon carbide semiconductor device according to the present invention will be described below in detail with reference to the accompanying drawings. In the present specification and the accompanying drawings, it means that electrons or holes are majority carriers in layers and regions with n or p, respectively. Further, + and − attached to n and p mean that the impurity concentration is higher and lower than that of the layer or region where it is not attached. Note that, in the following description of the embodiments and the accompanying drawings, the same reference numerals are given to the same components, and duplicate descriptions are omitted.

(Embodiment)
FIGS. 1-8 is sectional drawing which shows the state in the middle of manufacture of MOSFET concerning embodiment of this invention. FIG. 9 is a cross-sectional view showing the structure of the MOSFET according to the embodiment of the present invention after the process following FIG. The element structure of a MOSFET (insulated gate field effect transistor) according to an embodiment of the present invention is formed on, for example, the (000-1) plane of a silicon carbide substrate. First, a cross-sectional structure of a MOSFET according to an embodiment of the present invention will be described with reference to FIG.

As shown in FIG. 9, in the MOSFET according to the embodiment of the present invention, ap type epitaxial film 2 is deposited on the (000-1) plane of ap ⁺ type silicon carbide substrate 1. Silicon carbide substrate 1 is a silicon carbide single crystal substrate made of, for example, a four-layer periodic hexagonal crystal (4H—SiC) of silicon carbide. Specifically, silicon carbide substrate 1 has a (000-1) C plane whose main surface has an off angle of 0 degrees to 8 degrees in the <11-20> direction, for example. A silicon carbide substrate (hereinafter referred to as a 4H—SiC substrate) 1 alone, or the 4H—SiC substrate 1 and the p-type epitaxial film 2 together are referred to as a silicon carbide semiconductor (4H—SiC semiconductor).

A surface layer (hereinafter simply referred to as a surface layer) opposite to the 4H-SiC substrate 1 side of the p-type epitaxial film 2 includes an n ⁺ -type drain region 7, an n ⁺ -type source region 8, and p ^{A +} -type ground region 9 is selectively provided. The drain region 7 and the source region 8 are separated from each other. The ground region 9 is in contact with the source region 8 on the side opposite to the drain region 7 side. Field oxide film 10 covers the surface of p-type epitaxial film 2 opposite to the 4H-SiC substrate 1 side in the breakdown voltage structure region surrounding the active region. The active region is a region where a MOSFET MOS structure is formed. The breakdown voltage structure region is a region that relaxes the electric field around the active region and maintains the breakdown voltage.

  In the active region, a gate electrode (gate conductive film) 13 is provided via a gate insulating film 12 on the surface of the portion sandwiched between the drain region 7 and the source region 8 of the p-type epitaxial film 2. The active region includes a pad electrode 16 in contact with the drain region 7 through the reaction layer 15, a pad electrode 16 in contact with the source region 8 and the ground region 9 through the reaction layer 15, and a pad electrode in contact with the gate electrode 13. 16 are provided. The reaction layer 15 forms an ohmic contact with the p-type epitaxial film 2. A back electrode 17 is provided on the surface of the 4H—SiC substrate 1 opposite to the p-type epitaxial film 2 side.

Next, a MOSFET manufacturing method according to an embodiment of the present invention will be described with reference to FIGS. First, as shown in FIG. 1, a p-type epitaxial film 2 having, for example, an acceptor density of 1 × 10 ¹⁶ cm ⁻³ is grown on the (000-1) plane of a p-type 4H—SiC substrate 1. Next, as shown in FIG. 2, a silicon oxide (SiO ₂ ) film having a thickness of 1 μm is deposited on the surface of the p-type epitaxial film 2 by, for example, a low pressure CVD (Chemical Vapor Deposition) method.

Next, the silicon oxide film deposited on the p-type epitaxial film 2 is patterned by photolithography to form a mask 3 having an opening through which the drain region 7 and source region 8 are exposed. Next, a mask 3 as a mask, for example, phosphorus (P) ions 4 the substrate temperature 500 ° C., in a multi-stage acceleration energy 40KeV～250keV, to an implantation amount 2 × 10 ²⁰ cm ^-3. As a result, an n ⁺ -type impurity implantation region 4 a is formed in the surface layer of the p-type epitaxial film 2 exposed at the opening of the mask 3. Then, the mask 3 is removed.

Next, as shown in FIG. 3, a SiO ₂ film having a thickness of 1 μm is deposited on the surface of the p-type epitaxial film 2 by, for example, a low pressure CVD method. Next, the silicon oxide film deposited on the p-type epitaxial film 2 is patterned by photolithography to form a mask 5 having an opening through which the formation region of the ground region 9 is exposed. Next, using the mask 5 as a mask, for example, aluminum (Al) ions 6 are ion-implanted at a substrate temperature of 500 ° C. and an acceleration energy of 40 keV to 200 keV at an implantation amount of 2 × 10 ²⁰ cm ⁻³ . As a result, ap ⁺ -type impurity implantation region 6 a is formed in the surface layer of p-type epitaxial film 2 exposed at the opening of mask 5. Then, the mask 5 is removed.

  Next, as shown in FIG. 4, for example, activation annealing is performed for 5 minutes at a temperature of 1600 ° C. in an argon atmosphere to activate the impurity implantation regions 4 a and 6 a, and a drain region is formed on the surface layer of the p-type epitaxial film 2. 7. A source region 8 and a ground region 9 are formed. Next, as shown in FIG. 5, a field oxide film 10 having a thickness of 0.5 μm is deposited on the surface of the p-type epitaxial film 2 by, for example, a low pressure CVD method. Next, the field oxide film 10 is selectively removed by photolithography and wet etching to expose the p-type epitaxial film 2 in the active region 11. In the active region 11, the 4H—SiC semiconductor is exposed from the drain region 7 to the source region 8 and the ground region 9.

  Next, as shown in FIG. 6, wet oxidation is performed for 30 minutes at a temperature of 1000 ° C. to form a gate insulating film 12 having a thickness of 50 nm. The gate insulating film 12 is formed so as to cover the 4H—SiC semiconductor exposed in the active region 11. Next, polycrystalline silicon is deposited to a thickness of 0.3 μm on the gate insulating film 12 by, for example, a low pressure CVD method. Next, the polycrystalline silicon deposited on the gate insulating film 12 is patterned by photolithography to form the gate electrode 13. After the formation of the gate electrode 13, heat treatment for reducing the resistance of the gate electrode 13 is performed at a temperature of, for example, 800 ° C. to 900 ° C. for about 10 minutes to 30 minutes as necessary.

  Next, as shown in FIG. 7, the gate insulating film 12 is selectively removed by photolithography and etching, and contact holes are formed on the drain region 7, the source region 8, and the ground region 9. This etching may be performed using, for example, hydrofluoric acid. Next, an aluminum film having a thickness of 10 nm and a nickel film having a thickness of 60 nm are deposited so as to be deposited on the drain region 7, the source region 8, and the ground region 9 in the contact hole.

  Next, the deposited film made of an aluminum film and a nickel film is patterned by, for example, lift-off to form a contact metal 14 in contact with the drain region 7 and a contact metal 14 in contact with the source region 8 and the ground region 9. At this time, in place of lift-off, an insulating insulation between the contact metal 14 and the gate electrode 13 may be performed by forming an interlayer insulating film. In the case where an interlayer insulating film for insulating and separating from the gate electrode 13 is formed, a heat treatment for smoothing or baking the interlayer insulating film is performed at a temperature of 800 ° C. to 900 ° C. for about 10 minutes to 30 minutes, for example.

  Next, as shown in FIG. 8, as the annealing for the ohmic contact, for example, a heat treatment is performed at a temperature of 800 ° C. to 1000 ° C. for about 2 minutes to 5 minutes, and the reaction layer of the contact metal 14 and the 4H—SiC semiconductor is formed. 15 is formed. Thereby, the reaction layer 15 in contact with the drain region 7 and the reaction layer 15 in contact with the source region 8 and the ground region 9 are formed.

At this time, since the heat treatment at 400 ° C. or higher is not included in the subsequent steps, at least hydrogen (H) or water vapor (H ₂ O) is used to recover the MOS interface characteristics deteriorated by the heat treatment so far. The final heat treatment is performed in the atmosphere. The atmosphere of the final heat treatment is, for example, a mixed gas of an inert gas and hydrogen or water vapor. The mixed gas of inert gas and hydrogen or water vapor is, for example, a mixed gas of nitrogen (N), helium (He), or argon (Ar) and hydrogen or water vapor. The MOS interface characteristics recovered by the final heat treatment is the interface state density at the interface between the 4H—SiC semiconductor and the gate insulating film 12.

  The hydrogen concentration in the mixed gas of inert gas and hydrogen is preferably 1% or more and 4% or less. Particularly preferably, the hydrogen concentration in the mixed gas of inert gas and hydrogen is 4%. The temperature of the final heat treatment is preferably 500 ° C. to 900 ° C., for example. The reason is that heat treatment at a temperature higher than 900 ° C. in low concentration hydrogen or water vapor causes further deterioration of MOS interface characteristics, and heat treatment at a temperature lower than 500 ° C. introduces hydrogen or water vapor into the interface. This is because the effect of the obtained MOS interface characteristics is low. Further, when a metal having a relatively low melting point such as aluminum is used for the pad electrode 16, it is preferable to perform a final heat treatment before forming the pad electrode 16.

  Next, as shown in FIG. 9, an aluminum film is vapor-deposited with a thickness of 300 nm so as to be deposited on the gate electrode 13 and the reaction layer 15. Next, the aluminum film is patterned by photolithography and etching to form a pad electrode 16 on the gate electrode 13 and the reaction layer 15. This etching may be performed using phosphoric acid. Thereafter, an aluminum film is deposited to a thickness of 100 nm on the surface opposite to the p-type epitaxial film 2 side of the 4H—SiC substrate 1 to form a back electrode 17. Thereby, the MOSFET according to the embodiment of the present invention is completed.

  Next, the difference in MOS interface characteristics with and without final heat treatment was verified. First, in accordance with the MOSFET manufacturing method according to the embodiment of the present invention described above, a silicon carbide MOSFET subjected to final heat treatment was manufactured (hereinafter referred to as having final heat treatment). In addition, as a comparative example, a silicon carbide MOSFET in which a final heat treatment was not performed after forming a reaction layer for making an ohmic contact (hereinafter referred to as no final heat treatment) was produced. And the channel mobility of these silicon carbide MOSFET was measured. The result is shown in FIG. FIG. 10 is a characteristic diagram showing the gate voltage dependence of the field effect channel mobility in the MOSFET manufactured by the manufacturing method according to the present invention.

As shown in FIG. 10A, it was confirmed that the channel mobility of the silicon carbide MOSFET with the final heat treatment was as high as about 65 cm ² / Vs at maximum. On the other hand, as shown in FIG. 10B, the channel mobility of the silicon carbide MOSFET without the final heat treatment is about 55 cm ² / Vs at maximum, which is lower than that of the silicon carbide MOSFET with the final heat treatment. confirmed.

  The decrease in channel mobility in the silicon carbide MOSFET without the final heat treatment is due to the heat treatment at 400 ° C. or higher after the formation of the gate insulating film 12, hydrogen and hydroxyl groups that have terminated dangling bonds of silicon atoms on the surface of the p-type epitaxial film 2. Is caused by detachment. In a silicon carbide MOSFET having a final heat treatment, a p-type epitaxial film from which hydrogen and hydroxyl groups have been desorbed by performing a final heat treatment in an atmosphere containing hydrogen or water vapor after all steps of heat treatment at 400 ° C. or higher have been completed. The dangling bonds of silicon atoms on the two surfaces can be terminated again. For this reason, the interface state density at the interface between the p-type epitaxial film 2 and the gate insulating film 12 can be lowered, and the channel mobility can be increased. Therefore, it can be seen that the MOSFET manufacturing method according to the embodiment of the present invention has an effect of restoring the MOS interface characteristics.

  As described above, according to the embodiment, a heat treatment at 400 ° C. or higher, such as annealing for forming an ohmic contact after forming a gate insulating film on the (000-1) plane of a silicon carbide semiconductor by wet oxidation. Silicon carbide semiconductor from which hydrogen and hydroxyl groups are eliminated by the heat treatment after forming the gate insulating film by performing the final heat treatment in an atmosphere containing hydrogen or water vapor after all the heat treatment steps at 400 ° C. or higher are completed. The dangling bonds of the silicon atoms on the surface can be terminated again with hydrogen. Thereby, the interface characteristics between the silicon carbide semiconductor and the gate insulating film can be recovered, and high channel mobility can be realized.

  In the above description, the method for manufacturing a lateral MOSFET as a silicon carbide MOSFET has been described above as an example. However, the present invention is not limited to the above-described embodiment, and the present invention can also be applied to a semiconductor device having a high breakdown voltage structure such as a vertical MOSFET. It is. The present invention can be variously modified without departing from the spirit of the present invention. For example, the gate insulating film may be formed by combining thermal oxidation in a dry oxygen atmosphere that does not contain water vapor and then performing thermal oxidation in a gas containing water vapor. After depositing the insulating film, the silicon carbide semiconductor at the interface with the insulating film may be changed to a gate insulating film by performing thermal oxidation in a gas containing water vapor.

  In addition, as an example of annealing for forming an ohmic contact as a heat treatment at 400 ° C. or higher after the gate insulating film is formed, and the final heat treatment is performed after the annealing, the present invention is not limited to the above-described embodiment, The timing for performing the final heat treatment can be variously changed according to the configuration of the semiconductor device. For example, in the method for manufacturing a semiconductor device, after all the heat treatment at 400 ° C. or higher after the gate insulating film is formed, the final heat treatment is performed in an atmosphere containing hydrogen or water vapor, so that the same effect as in the embodiment can be obtained. Play.

  Further, as the silicon carbide substrate, a silicon carbide single crystal substrate whose main surface is a (000-1) C plane having an off angle of 0 degrees to 8 degrees in the <11-20> direction, for example, has been described as an example. Even when a silicon carbide substrate having a (11-20) plane is used, the same effects as those of the embodiment can be obtained.

  As described above, the method for manufacturing a silicon carbide semiconductor device according to the present invention is useful for various semiconductor devices that perform a heat treatment step after forming a gate insulating film.

DESCRIPTION OF SYMBOLS 1 4H-SiC substrate 2 p-type epitaxial film 3,5 Mask 4 Phosphorus ion 6 Aluminum ion 7 Drain region 8 Source region 9 Ground region 10 Field oxide film 11 Active region 12 Gate insulating film 13 Gate electrode 14 Contact metal 15 Reaction layer 16 Pad Electrode 17 Back electrode

Claims (4)

By performing thermal oxidation in a gas containing at least oxygen and water vapor, the (000-1) plane of the silicon carbide semiconductor or the (000-1) plane or ( 11-20) forming a gate insulating film in contact with the surface;
After forming the gate insulating film, forming a gate conductive film and lowering resistance, forming an interlayer insulating film and baking, or forming a contact metal and a reaction layer of the contact metal and the silicon carbide semiconductor A heat treatment step of performing at least one heat treatment among heat treatments performed at a temperature of 400 ° C. or higher for
Including
In the heat treatment step, a hydrogen atom or a hydroxyl group that has terminated a dangling bond of a silicon atom at the interface with the gate insulating film of the silicon carbide semiconductor is desorbed,
The dangling bonds of the silicon carbide semiconductor from which hydrogen atoms or hydroxyl groups have been eliminated in the heat treatment step are subjected to a final heat treatment in an atmosphere containing at least hydrogen or water vapor after the heat treatment step, and again with hydrogen atoms or hydroxyl groups. terminated,
The temperature of the final heat treatment is 500 ° C to 900 ° C,
The atmosphere of the final heat treatment is a mixed gas of an inert gas and hydrogen of any one of nitrogen, helium and argon,
The method for manufacturing a silicon carbide semiconductor device, wherein a hydrogen concentration in the mixed gas is 1% or more and 4% or less . 2. The carbonization according to claim 1, wherein the gate insulating film is formed on a (000-1) plane or a (11-20) plane having an off angle of 0 to 8 degrees of the silicon carbide semiconductor. A method for manufacturing a silicon semiconductor device. The gate insulating film is formed by performing thermal oxidation of the silicon carbide semiconductor in a gas containing water vapor after performing thermal oxidation of the silicon carbide semiconductor in a dry oxygen atmosphere containing no water vapor. A method for manufacturing a silicon carbide semiconductor device according to claim 1. After depositing an insulating film to be the gate insulating film on the (000-1) surface or the (11-20) surface of the silicon carbide semiconductor, the insulating film is thermally oxidized in a gas containing water vapor. 2. The method of manufacturing a silicon carbide semiconductor device according to claim 1, wherein the silicon carbide semiconductor at the interface is changed to the gate insulating film.

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