JP2017158296A - Battery system controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a battery system controller capable of dispersing heat evolution approximately equalized in a pair of semiconductor switches.SOLUTION: A main FET and sub FET are connected in series between a pair of batteries so that forward directions of parasitic diodes are reverse to each other. When controlling the main FET and sub FET from OFF to ON, a switch control circuit energizes, in a non-saturation region, a gate of the main FET connected to the high voltage side of the pair of batteries and supplies, as gate voltage, gradually varying voltage that gradually increases before supplying, as gate voltage, constant voltage that is constant so as to perform energization in a saturation region VP; and, during supply of the gradually varying voltage as the gate voltage, supplies pulse-like gate voltage to a gate of the sub FET connected to the low voltage side before supplying, as gate voltage, constant voltage Vp that performs energization in the saturation region.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a battery system control device.

  It has been proposed to mount a pair of batteries, such as an inexpensive main battery such as a lead storage battery, and a high-performance sub-battery such as a nickel storage battery and a lithium storage battery that have high durability against frequent charging and discharging, on the vehicle. Thereby, the power supply to the electric load and the regenerative charging during the idle stop are preferentially performed by the sub-battery, thereby reducing the deterioration of the lead storage battery. On the other hand, for the power supply (dark current) required over a long period of time, such as when a vehicle is parked, an inexpensive lead-acid battery is used to reduce the capacity of the high-performance battery and suppress cost increase. .

  Also, an FET (semiconductor switch) is provided between the generator and the main battery and the sub-battery, and the FET is turned off during normal operation when the internal combustion engine is operated without regenerating, so that the sub-battery is not charged. It has been proposed to increase the regenerative charge amount by increasing the free capacity and turning on the FET during regenerative operation to recharge the sub-battery.

  The FET is provided with a pair connected in series so that the forward directions of the parasitic diodes are opposite to each other in order to prevent energization through the parasitic diode when the FET is off.

  In the battery system control device described above, since a large charging current flows from the generator to the sub-battery when the pair of FETs is turned on, the amount of power generated by the generator increases rapidly. For this reason, there is a problem that the torque fluctuation of the engine that is a driving source at the time of power generation becomes large and the running performance is deteriorated.

  Thus, it has been proposed to supply a gate voltage that gradually increases from 0 to the pair of FETs when the pair of FETs is turned on to suppress the charging current and prevent deterioration in running performance (Patent Document 1). However, when the same gate voltage is applied to a pair of FETs, an FET provided on the main battery side having a higher battery voltage (hereinafter referred to as a main FET) than an FET provided on the sub battery side having a low battery voltage (hereinafter referred to as a sub FET). There was a problem that fever concentrated on the side.

  The reason for this will be described with reference to FIGS. When the gate voltage Vgs is equal to or higher than the threshold voltage, as shown in FIG. 5B, the pair of FETs are turned on, and the current Id flowing from the main battery to the sub-battery gradually increases as the gate voltage Vgs increases. To increase. As shown in FIG. 5A, as the gate voltage Vgs increases, the main battery voltage Vmain gradually decreases and the sub-battery voltage Vsub gradually increases. Thereafter, the gate voltage Vgs When sufficiently large, the voltages Vmain and Vsub of the main battery and the sub battery become equal.

  At this time, the source voltage Vs of the pair of commonly connected FETs is substantially the same as the voltage of the sub-battery attached to the sub-battery side. Therefore, in the period T until the gate voltage Vgs becomes sufficiently large, the drain-source voltage of the main FET (hereinafter referred to as Vds)> Vds of the sub FET, and the heat generation is biased to the main FET.

  Moreover, as shown in FIG. 6, the sub-FET always operates in the saturation region, but the Vds of the main FET is large, so that the main FET starts operating in the active region and then the gate voltage Vgs is sufficiently large. It will operate in the saturation region. For this reason, the resistance of the main FET is larger than that of the sub FET, and heat generation is biased to the main FET.

  Further, when a gate voltage that gradually increases from 0 is supplied, the semiconductor switch is not turned on unless the gate voltage rises above the threshold voltage of the semiconductor switch. .

JP 2012-80706 A

  Therefore, an object of the present invention is to provide a battery system control device that can distribute heat generation by making heat generation of a pair of semiconductor switches substantially the same.

  The invention according to claim 1, which has been made to solve the above problem, includes a pair of semiconductor switches connected in series so that the forward directions of the parasitic diodes are opposite to each other between the pair of batteries, Switch control means for supplying a gate voltage to each of the semiconductor switches and controlling on / off of the pair of semiconductor switches, wherein the switch control means turns off the pair of semiconductor switches from off When turning on, a gradually increasing voltage is supplied as the gate voltage to the gate of the semiconductor switch connected to the higher voltage side of the pair of batteries, and then a constant voltage is supplied as the gate voltage. At the same time, the gate of the semiconductor switch connected to the low voltage side is supplied while the voltage to be removed is supplied as the gate voltage. After supplying a pulsed gate voltage to a battery system control device and supplying a constant voltage as a gate voltage.

  According to a second aspect of the present invention, when the switch control means controls the pair of semiconductor switches from on to off, the switch control means gradually applies to the gate of the semiconductor switch connected to the higher voltage side of the pair of batteries. The gate voltage is supplied to the gate of the semiconductor switch connected to the low voltage side while the gate voltage is supplied as the gate voltage. The battery system control device according to claim 1.

  The invention according to claim 3 is characterized in that the switch control means supplies, as a gate voltage, the variable voltage that gradually increases from a predetermined voltage greater than zero. It is a control device.

  According to a fourth aspect of the present invention, the switch control unit includes a variable voltage generation unit that generates a variable voltage by charging or discharging a capacitor, and a constant voltage generation unit that generates the constant voltage. It is a battery system control apparatus of any one of Claims 1-3 characterized by these.

  As described above, according to the first and second aspects of the present invention, the semiconductor switch connected to the high voltage side of the pair of batteries is supplied with the variable voltage as the gate voltage and connected to the low voltage side. A pulsed gate voltage is supplied to the semiconductor switch. Thereby, when the pulse is on, the semiconductor switch to which the variable voltage is supplied generates heat, and when the pulse is off, the semiconductor switch to which the pulsed gate voltage is supplied generates heat. That is, since the heat generation of the pair of semiconductor switches is alternately increased, the heat generation of the pair of semiconductor switches can be made substantially the same to disperse the heat generation.

  According to the invention described in claim 3, the variable voltage gradually increases from a predetermined voltage larger than zero. As a result, it is not necessary to wait for a time until the voltage change voltage rises from 0 to a predetermined voltage, and the voltage change voltage can be quickly made equal to or higher than the threshold voltage to switch the semiconductor switch from the non-energized state to the energized state.

  According to the fifth aspect of the present invention, it is possible to easily switch between the variable voltage to the gate of the semiconductor switch and the constant voltage, and it is not necessary to wait for the variable voltage to rise to the constant voltage. A constant voltage can be supplied to the gate of the semiconductor switch.

It is a circuit diagram which shows the battery system control apparatus in 1st Embodiment. (A) to (h) are the changeover input, full on input, full off input, PWM input, main FET gate voltage, sub FET gate voltage, main battery and sub battery voltages shown in FIG. 4 is a time chart of currents flowing through a main FET and a sub FET. (A)-(c) is a time chart for demonstrating the gate voltage supplied to sub FET in other embodiment. It is a circuit diagram which shows the battery system control apparatus in 2nd Embodiment. (A) is a time chart of the voltage of the main battery and the sub battery, the source voltage of the pair of FETs, and the gate voltage of the pair of FETs in the conventional battery system control device, and (B) is the current flowing from the main battery to the sub battery. It is a time chart. It is a graph which shows the drain current (Id) with respect to the drain-source voltage (Vds) of FET when changing gate voltage.

(First embodiment)
Hereinafter, the battery system control device in the first embodiment will be described with reference to FIG. A battery system control device 1 shown in FIG. 1 is provided in a vehicle on which a pair of batteries of a main battery and a sub battery are mounted. The main battery is composed of an inexpensive battery such as a lead battery, for example, and is connected to a generator (not shown). The sub battery is composed of a high performance battery such as a lithium ion battery or a nickel metal hydride battery. The main battery often has a higher voltage than the sub battery.

  The battery system control device 1 includes a main FET 2 and a sub FET 3 as a pair of semiconductor switches, and a switch control circuit 4 as a switch control means. The main FET 2 and the sub FET 3 are connected in series between the main battery and the sub battery so that the forward directions of the parasitic diodes are opposite to each other.

  The main FET 2 and the sub FET 3 are N-channel type. The main FET 2 has a drain connected to the main battery side and a source connected to the sub battery side, and the forward direction of the parasitic diode is a direction from the sub battery to the main battery. The sub FET 3 has a drain connected to the sub battery side and a source connected to the main battery side, and the forward direction of the parasitic diode is a direction from the main battery to the sub battery.

  That is, the main FET 2 is connected to the higher voltage side (main battery side) of the pair of batteries, and the sub battery 3 is connected to the lower voltage side (sub battery side) of the pair of batteries.

  The switch control circuit 4 is a circuit that controls the on / off of the main FET 2 and the sub FET 3 by supplying a gate voltage to each of the main FET 2 and the sub FET 3. Specifically, for example, the switch control circuit 4 normally turns off the main FET 2 and the sub FET 3 and turns on the main FET 2 and the sub FET 3 during the regenerative operation so that the sub battery can be charged from the generator.

  Then, when the switch control circuit 4 controls the main FET 2 and the sub FET 3 from OFF to ON, as shown in FIG. 2E, the switch control circuit 4 gradually increases from the change lower limit voltage Vmin (= predetermined voltage) to the main FET 2. Is supplied as the gate voltage, and then the constant voltage Vp is supplied as the gate voltage. Further, as shown in FIG. 2 (f), the switch control circuit 4 supplies a pulsed gate voltage to the sub-FET 3 while supplying the change-over voltage to the main FET 2, and supplies a constant voltage Vp to the main FET 2. Is supplied to the sub-FET 3 at a constant voltage Vp.

  When the switch control circuit 4 controls the main FET 2 and the sub FET 3 from ON to OFF, as shown in FIG. 2E, the switch upper limit voltage Vmax to the change lower limit voltage Vmin with respect to the main FET 2 is changed. A gradually decreasing voltage is supplied as a gate voltage. As shown in FIG. 2 (f), the switch control circuit 4 supplies a pulsed gate voltage to the sub-FET 3 while supplying the voltage change to the main FET 2.

  As shown in FIG. 1, the switch control circuit 4 includes a booster circuit 5 as a constant voltage generation unit, a removal / change voltage generation circuit 6 as a removal / change voltage generation unit, a buffer circuit 7, a switch circuit 8, a level A shift circuit 9, an FET driver 10, a full on circuit 11, a full off circuit 12, and a microcomputer 13 are provided.

  The booster circuit 5 is a circuit that boosts the voltage of the main battery to generate a constant voltage Vp, and includes a well-known boosting DC / DC converter. The booster circuit 5 generates, for example, a voltage of about +10 V of the main battery voltage as the constant voltage Vp. In the present embodiment, the booster circuit 5 boosts the voltage of the main battery, but it may boost the voltage of the sub-battery.

  The variable voltage generation circuit 6 is a circuit that generates a variable voltage by charging or discharging the capacitor C. The change voltage generation circuit 6 has a change lower limit voltage setting circuit 61, a capacitor C, a charge / discharge circuit 62, and a change upper limit voltage setting circuit 63.

  The change lower limit voltage setting circuit 61 generates a change lower limit voltage Vmin. The change lower limit voltage Vmin is set to a value obtained by adding a threshold voltage to the voltage of the main battery. The variable lower limit voltage setting circuit 61 includes, for example, a known constant voltage circuit that generates a threshold voltage from a constant voltage Vp, and a known addition circuit that adds the voltage of the main battery and the threshold voltage. .

  One end of the capacitor C is connected to the change / change lower limit voltage setting circuit 61 and is connected in series to the change / change lower limit voltage setting circuit 61. As a result, the voltage at the other end of the capacitor C becomes the change-over lower limit voltage Vmin + the voltage at both ends of the capacitor C. When the capacitor C is charged, the voltage gradually increases continuously from the change-over lower limit voltage Vmin. Decreases gradually and continuously to the removal lower limit voltage Vmin. That is, the voltage on the other end side of the capacitor C becomes a variable voltage.

  The charge / discharge circuit 62 is a circuit that supplies and charges the capacitor C with a change-over limit voltage Vmax, which will be described later, or discharges the capacitor C by connecting a discharge resistor (not shown). The charge / discharge circuit 62 is controlled by the microcomputer 13 to be described later, and charges the capacitor C when the change input from the microcomputer 13 is Hi, and discharges the capacitor C when it is Lo. The charge / discharge circuit 62 charges and discharges the capacitor C with a current limited by a constant current or resistance.

  The variable upper limit voltage setting circuit 63 is constituted by, for example, a known constant voltage circuit, generates the variable upper limit voltage Vmax from the constant voltage Vp, and supplies it to the capacitor C. The removal upper limit voltage Vmax is set to a value lower than the constant voltage Vp. By supplying the changeover upper limit voltage Vmax to the capacitor C, the voltage on the other end side of the capacitor C, that is, the changeover voltage does not exceed the changeover upper limit voltage Vmax.

  The buffer circuit 7 buffers the variable voltage that is the voltage on the other end side of the capacitor C and supplies it to the gate of the main FET 2.

  The switch circuit 8 is provided between the output of the removal voltage generation circuit 6 and the input of the buffer circuit 7 and supplies and cuts off the removal voltage output from the removal voltage generation circuit 6 to the gate of the main FET 2. Switch. The switch circuit 8 is controlled by a microcomputer 13 which will be described later. When the full-on input from the microcomputer 13 is Lo, the switch circuit 8 supplies a variable voltage to the gate of the main FET 2. When the full-on input is Hi, the switch circuit 8 Shut off the supply to the gate.

  The level shift circuit 9 shifts up the pulsed PWM signal output from the microcomputer 13 and outputs it to the FET driver 10 described later. The PWM signal output from the microcomputer 13 is 0V for Lo and 5V for Hi. The level shift circuit 9 shifts up the PWM signal output from the microcomputer 13 to a PWM signal of Lo (constant voltage Vp) / 2 and Hi to a constant voltage Vp. (Constant voltage Vp) / 2 is a voltage at which the source-gate of the sub-FET 3 becomes smaller than the threshold voltage, and the sub-FET 3 is in a non-energized state.

  The FET driver 10 is a circuit that drives the gate of the sub-FET 3 with a level-shifted PWM signal.

  The full on circuit 11 is composed of switches provided between the input of the buffer circuit 7 and the FET driver 10 and the booster circuit 5, respectively, and the main FET 2 and the sub FET 3 of the constant voltage Vp output from the booster circuit 5. Switching between supply and shut-off to the gate. The full on circuit 11 is controlled by a microcomputer 13 to be described later. When the full on input from the microcomputer 13 is Lo, the supply of the constant voltage Vp to the gates of the main FET 2 and the sub FET 3 is cut off, and when the full on input is Hi. A constant voltage Vp is supplied to the gates of the main FET 2 and the sub FET 3.

  The full-off circuit 12 includes switches provided between the gates of the main FET 2 and the sub FET 3 and the ground. The full-off circuit 12 is controlled by a microcomputer 13 to be described later. When the full-off input from the microcomputer 13 is Hi, a ground potential is supplied to the gates of the main FET 2 and the sub FET 3 to completely energize the main FET 2 and the sub FET 3. When the full-off input is Lo, the gates and grounds of the main FET 2 and the sub FET 3 are opened so that the voltage change, PWM signal, and constant voltage Vp can be supplied to the gates.

  The microcomputer 13 is a well-known microcomputer that controls the entire battery system control device 1 and includes a CPU, a ROM, a RAM, and the like.

  Next, the operation of the battery system control device 1 configured as described above will be described below with reference to the time chart of FIG. First, the microcomputer 13 sets the variable input, the full on input to Lo, and the full off input to Hi. As a result, the ground potential is supplied to the gates of the main FET 2 and the sub FET 3, and as shown in FIG. 2H, the energization of the main FET 2 and the sub FET 3 is completely cut off (full off period).

  When the main FET 2 and the sub FET 3 are off, the voltage of the main battery is higher than the voltage of the sub battery as shown in FIG.

  Next, the microcomputer 13 controls the main FET 2 and the sub FET 3 from off to on. At this time, as shown in FIGS. 2A, 2C, and 2D, the microcomputer 13 first switches the full-off input from Hi to Li, the diversion input from Lo to Hi, and outputs a PWM signal. To do. As a result, the removal voltage generated by the removal voltage generation circuit 6 is supplied to the gate of the main FET 2.

  At this time, since the capacitor C is not charged at all, the change lower limit voltage Vmin generated by the change lower limit voltage setting circuit 61 is supplied to the gate of the main FET 2 as shown in FIG. The variation lower limit voltage Vmin is set to a value obtained by adding a threshold voltage to the voltage of the main battery (= source voltage of the main FET 2). For this reason, a threshold voltage is applied between the source and gate of the main FET 2, and the main FET 2 is energized.

  Since the change input is Hi, the capacitor C is charged, and the change voltage supplied to the gate of the main FET 2 gradually increases from the change lower limit voltage Vmin.

  On the other hand, the level-shifted PWM signal is supplied to the gate of the sub-FET 3 as shown in FIG. The sub FET 3 is in a non-energized state when the PWM signal is Lo, and is in a saturated region when the PWM signal is Hi. When the sub FET 3 is in a non-energized state, a current flows from the main battery to the sub battery through the parasitic diode of the sub FET 3.

  When the variable voltage is supplied, the main FET 2 is energized. On the other hand, in the sub-FET 3, an energized state and a non-energized state are repeated alternately. For this reason, as shown in FIG. 2 (h), the energizing currents of the main FET 2 and the sub FET 3 gradually increase while increasing / decreasing in accordance with the Hi and Lo of the PWM signal, as shown in FIG. It is possible (diversion on period).

  Further, as shown in FIG. 2 (g), the voltage of the main battery gradually decreases and the voltage of the sub battery gradually increases and approaches each other. Thus, by controlling the main FET 2 and the sub FET 3 so that the energization current gradually increases in the saturation region, the voltage between the main battery and the sub battery is prevented from suddenly changing.

  When the PWM signal is Hi, both the main FET 2 and the sub FET 3 are energized, and the main FET 2 generates heat more than the sub FET 3 as described in the background art. On the other hand, when the PWM signal is Lo, the sub FET 3 is not energized. At this time, since the sub FET 3 serves as a resistor, the sub FET 3 generates heat more than the main FET 2. That is, since the heat generation of the main FET 2 and the sub FET 3 alternately increases, the heat generation of the main FET 2 and the sub FET 3 can be made substantially the same.

  After a lapse of a predetermined time when the main battery voltage and the sub battery voltage become substantially the same after the change input is set to Hi, the microcomputer 13 switches the full on input from Lo to Hi and stops outputting the PWM signal. At this time, the removal voltage may be a voltage slightly lower than the removal upper limit voltage Vmax. As a result, the supply of the variable voltage and the PWM signal is cut off and the constant voltage Vp is supplied to the gates of the main FET 2 and the sub FET 3. Then, both the main FET 2 and the sub FET 3 are energized in the saturation region (full on period).

  Next, the microcomputer 13 controls the main FET 2 and the sub FET 3 from on to off. At this time, as shown in FIGS. 2A, 2B, and 2D, the microcomputer 13 first switches the full on input from Hi to Lo, the diversion input from Hi to Lo, and outputs the PWM signal. Output. By switching from full-on input Hi to Lo, the supply of the constant voltage Vp is cut off to the gates of the main FET 2 and the sub FET 3, the removal voltage generated by the removal voltage generation circuit 6, and the level-shifted PWM signal Is supplied.

  While the full on input becomes Hi and the supply of the variable voltage to the gate of the main FET 2 is cut off, the variable input is Hi. For this reason, the charging of the capacitor C is continued, and the removal voltage becomes the removal upper limit voltage Vmax. Therefore, at this time, the removal upper limit voltage Vmax is supplied to the gate of the main FET 2.

  Further, the changeover input Hi to Lo is switched to discharge the capacitor C, and the changeover voltage supplied to the gates of the main FET 2 and the sub-FET 3 gradually decreases from the change upper limit voltage max. On the other hand, the sub-FET 3 is supplied with a level-shifted PWM signal. The sub FET 3 is in a non-energized state when the PWM signal is Lo, and is in a saturated region when the PWM signal is Hi.

  When the variable voltage is supplied, the main FET 2 is energized. On the other hand, in the sub-FET 3, an energized state and a non-energized state are repeated alternately. Therefore, as shown in FIG. 2 (h), the energization currents of the main FET 2 and the sub FET 3 gradually increase while increasing / decreasing according to the Hi and Lo of the PWM signal according to the decrease of the variable voltage (the variable off period). ). Further, as shown in FIG. 2 (g), the voltage of the main battery gradually increases, and the voltage of the sub battery gradually decreases. Thus, by controlling the FETs 2 and 3 so that the energization current gradually decreases in the saturation region, the voltage between the main battery and the sub-battery is prevented from changing suddenly.

  Since the heat generation of the main FET 2 and the sub FET 3 alternately increases in the off state as in the on state, the heat generation of the main FET 2 and the sub FET 3 can be made substantially the same.

  The microcomputer 13 switches the full-off input from Lo to Hi after a predetermined time has elapsed since the main battery and sub-battery voltages are substantially constant after the change input is Lo. As a result, the ground potential is supplied to the gates of the main FET 2 and the sub FET 3, and as shown in FIG. 2F, the energization of the main FET 2 and the sub FET 3 is completely cut off (full off period).

  According to the above-described embodiment, the main FET 2 connected to the higher voltage side of the pair of batteries is supplied with the variable voltage as the gate voltage, and the sub-FET 3 connected to the lower voltage side is pulsed. A PWM signal is supplied as a gate voltage. Thus, when the PWM signal is Hi (on), the main FET 2 generates heat, and when the PWM signal is Lo (off), the sub FET 3 generates heat. That is, since the heat generation of the main FET 2 and the sub FET 3 is alternately increased, the heat generation of the main FET 2 and the sub FET 3 can be made substantially the same to disperse the heat generation.

  Further, according to the above-described embodiment, the lower limit voltage Vmin (= predetermined voltage) is set to a value larger than 0, preferably such that the gate-source voltage of the main FET 2 is equal to or higher than the threshold voltage. Has been. As a result, there is no need to wait for the time until the removal voltage increases from 0 to the removal lower limit voltage Vmin, and the removal voltage is quickly increased to the threshold voltage or more to switch the main FET 2 from the non-energized state to the energized state. be able to.

  Further, according to the above-described embodiment, the switch control circuit 4 includes the variable voltage generation circuit 6 that generates the variable voltage by charging or discharging the capacitor C, and the booster circuit 5 that generates the constant voltage Vp. Have As a result, it is possible to easily switch between the variable voltage to the gate of the main FET 2 and the constant voltage Vp. More specifically, the removal voltage may be increased to the constant voltage Vp, but if so, it takes time until the constant voltage Vp is supplied. As shown in FIG. 2 (h), the current suddenly increases due to the energization of the main FET 2 and the sub FET 3 only at the beginning. For this reason, the energization of both the main FET 2 and the sub FET 3 can be quickly switched to the saturation region.

  According to the above-described embodiment, as shown in FIG. 3A, the PWM signal has a fixed duty and level, but is not limited thereto. As shown in FIG. 3 (b), the level of the PWM signal may be fixed and the duty may be gradually increased or decreased. Further, as shown in FIG. 3C, the duty of the PWM signal may be fixed and the level may be gradually increased or decreased. By supplying a PWM signal as shown in FIGS. 3B and 3C to the gate of the sub-FET 3, the heat generation of the main FET 2 and the sub-FET 3 can be dispersed more efficiently.

(Second Embodiment)
Next, the battery system control apparatus 1 in 2nd Embodiment is demonstrated with reference to FIG. In the figure, parts equivalent to those of the battery system control device 1 shown in FIG. 1 described in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  A significant difference between the first embodiment and the second embodiment is that the battery system control device 1 includes a current detection circuit 14 that detects a current flowing between the main battery and the sub-battery. The current detection circuit 14 supplies the detection result to the microcomputer 13. When the microcomputer 13 supplies a gradually increasing voltage to the main FET 2 and a PWM signal level-shifted to the sub FET 3, if a current exceeding the safe operation area is detected by the current detection circuit 14, The full on input is switched from Lo to Hi. As a result, a constant voltage Vp is supplied to the gates of the main FET 2 and the sub FET 3 and energized in the saturation region. Since the on-resistance of the main FET 2 and the sub FET 3 in the saturation region is small, heat generation can be suppressed.

  The microcomputer 13 detects a current exceeding the safe operation area by the current detection circuit 14 when supplying the PWM signal whose level is shifted to the sub FET 3 with the gradually changing voltage to the main FET 2. And the off-off input is switched from Lo to Hi. Thereby, the energization of the main FET 2 and the sub FET 3 is completely cut off, and heat generation can be suppressed.

  According to the above-described embodiment, the removal voltage that gradually increases from the removal lower limit voltage Vmin is supplied to the gates of the main FET 2 and the sub-FET 3, but this is not restrictive. A variable voltage gradually increasing from 0 may be supplied to the gates of the main FET 2 and the sub FET 3.

  Further, according to the above-described embodiment, the variable voltage that gradually decreases is supplied even when the main FET 2 and the sub FET 3 are controlled from on to off. However, the present invention is not limited to this. When controlling from on to off, the full FET circuit 12 may immediately cut off the energization of the main FET 2 and the sub FET 3 without supplying the variable voltage.

  Further, according to the above-described embodiment, the sub-FET 3 is energized in the saturated region when the PWM signal is Hi, and in the non-saturated region when the PWM signal is Lo, but is not limited thereto. As the PWM signal, a PWM signal may be supplied so that the gate-source voltages of the main FET 2 and the sub-FET 3 are alternately increased while the variable voltage is supplied. Therefore, the sub FET 3 may be energized in the non-saturated region regardless of whether the PWM signal is Hi or Lo.

  In the above-described embodiment, the voltage of the main battery is higher than the voltage of the sub battery immediately before switching the main FET 2 and the sub FET 3 from OFF to ON. However, in some rare cases, the sub-battery is higher than the main battery voltage. Therefore, a voltage detection circuit for detecting the voltages of the main battery and the sub-battery is provided so that the supply of the variable voltage and the PWM signal can be switched between the main FET 2 and the sub FET 3. Then, the main FET 2 and the sub FET 3 may be supplied with the variable voltage to the one connected to the higher voltage side, and the PWM signal may be supplied to the one connected to the lower voltage side. .

  Further, the above-described embodiments are merely representative forms of the present invention, and the present invention is not limited to the embodiments. That is, various modifications can be made without departing from the scope of the present invention.

1 Battery system controller 2 Main FET (semiconductor switch)
3 Sub-FET (semiconductor switch)
4 Switch control circuit (switch control means)
5 Booster circuit (constant voltage generator)
6. Removal voltage generation circuit (removal voltage generation means)
C Capacitor Vp Constant voltage Vmin Variable lower limit voltage (predetermined voltage)

Claims (4)

A pair of semiconductor switches connected in series between the pair of batteries so that the forward directions of the parasitic diodes are opposite to each other;
Switch control means for supplying a gate voltage to each of the pair of semiconductor switches to control on / off of the pair of semiconductor switches;
In a battery system control device comprising:
When the switch control unit controls the pair of semiconductor switches from off to on, a gate of a gradually increasing voltage change voltage is applied to a gate of the semiconductor switch connected to a higher voltage side of the pair of batteries. After supplying as a voltage, a constant voltage is supplied as a gate voltage, and a pulse-like gate voltage is applied to the gate of the semiconductor switch connected to the low voltage side while supplying the variable voltage as the gate voltage. A battery system control device that supplies a constant voltage as a gate voltage after the supply. When the switch control means controls the pair of semiconductor switches from on to off, the switch control means gates a gradually decreasing voltage to the gate of the semiconductor switch connected to the higher voltage side of the pair of batteries. The pulsed gate voltage is supplied to the gate of the semiconductor switch connected to the low voltage side while supplying the voltage as a gate voltage while supplying the voltage as a gate voltage. The battery system control device described in 1. 3. The battery system control device according to claim 1, wherein the switch control unit supplies, as a gate voltage, the variable voltage that gradually increases from a predetermined voltage greater than 0. 4. The switch control means includes
A variable voltage generation means for generating a variable voltage by charging or discharging a capacitor;
The battery system control device according to claim 1, further comprising: a constant voltage generation unit configured to generate the constant voltage.

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