JP6626741B2 - Battery system controller - Google Patents

Description

  The present invention relates to a battery system control device.

  It has been proposed to mount a pair of batteries of a low-cost main battery such as a lead storage battery and a high-performance sub-battery such as a nickel storage battery and a lithium storage battery having high durability against frequent charging and discharging on a vehicle. Thus, the power supply to the electric load and the regenerative charging during the idling stop are performed by the sub-battery preferentially, so that the deterioration of the lead storage battery is reduced. On the other hand, for power supply (dark current) required over a long period of time, such as when parking a vehicle, an inexpensive lead-acid battery is implemented to reduce the capacity of a high-performance battery and reduce cost. .

  Further, an FET (semiconductor switch) is provided between the generator and the main battery and the sub-battery, and during normal operation in which the internal combustion engine is operated without regeneration, the FET is turned off and the sub-battery is not charged. It has been proposed to increase the amount of regenerative charge by increasing the free capacity and turning on the FET during regenerative operation to regeneratively charge the sub-battery.

  The FET is provided with a pair connected in series such that the forward direction of the parasitic diode is opposite to that of the FET in order to prevent conduction through the parasitic diode when the FET is off.

  Further, in the above-described battery system control device, when a pair of FETs are turned on, a large charging current flows from the generator to the sub-battery, so that the power generation amount of the generator rapidly increases. For this reason, there is a problem that torque fluctuation of the engine which is a driving source at the time of power generation becomes large and running performance is deteriorated.

  Therefore, it has been proposed that when the pair of FETs is turned on, a gate voltage that gradually increases from 0 is supplied to the pair of FETs to suppress the charging current and prevent the running performance from deteriorating (Patent Document 1). However, when the same gate voltage is applied to a pair of FETs, an FET provided on a main battery side (hereinafter, referred to as a main FET) having a higher battery voltage than an FET provided on a sub-battery side having a lower battery voltage (hereinafter referred to as a sub-FET). There is a problem that heat is concentrated toward the person.

  The reason will be described with reference to FIGS. When the gate voltage Vgs becomes equal to or higher than the threshold voltage, as shown in FIG. 5B, the pair of FETs conducts, and the current Id flowing from the main battery to the sub-battery gradually increases as the gate voltage Vgs increases. To increase. Further, as shown in FIG. 5A, as the gate voltage Vgs increases, the voltage Vmain of the main battery gradually decreases, the voltage Vsub of the sub-battery gradually increases, and thereafter, the gate voltage Vgs decreases. When the voltage is sufficiently large, the voltages Vmain and Vsub of the main battery and the sub-battery become equal.

  At this time, the source voltage Vs of the pair of commonly connected FETs is substantially the same as the voltage of the sub-battery sticking to the sub-battery side. For this reason, in the period T until the gate voltage Vgs becomes sufficiently large, the drain-source voltage (hereinafter, Vds) of the main FET> Vds of the sub-FET, and the heat is biased to the main FET.

  Further, as shown in FIG. 6, the sub-FET always operates in the saturation region, but since the Vds of the main FET is large, the main FET operates in the active region at the beginning of energization, and thereafter the gate voltage Vgs is sufficiently large. Then, it operates in the saturation region. For this reason, the resistance of the main FET is higher than that of the sub-FET, and heat is distributed to the main FET.

  In addition, when a gate voltage that gradually increases from 0 is supplied, the semiconductor switch does not turn on unless the gate voltage rises to the threshold voltage of the semiconductor switch or more, so that there is a problem that the time until the semiconductor switch turns on becomes long. .

JP 2012-80706 A

  Therefore, an object of the present invention is to provide a battery system control device capable of dispersing heat generation by making the heat generation of a pair of semiconductor switches substantially the same.

  The invention according to claim 1 has been made to solve the above-mentioned problem. A pair of semiconductor switches connected in series between a pair of batteries so that the forward directions of the parasitic diodes are opposite to each other; A switch control unit that supplies a gate voltage to each of the semiconductor switches and controls on / off of the pair of semiconductor switches.When the switch control unit controls the pair of semiconductor switches from off to on, In the battery system control device that supplies a gradually increasing variable voltage as a gate voltage and then supplies a constant voltage as a gate voltage, the switch control unit is connected to a lower voltage side of the pair of batteries. The variable voltage supplied to the semiconductor switch is determined by the variable voltage supplied to the semiconductor switch connected to the higher voltage side. A battery system control apparatus characterized by lower.

  The invention according to claim 2 is characterized in that, when controlling the pair of semiconductor switches from on to off, the switch control means supplies a gradually decreasing variable voltage as a gate voltage. It is a battery system control device of a statement.

  3. The battery system according to claim 1, wherein the switch control unit supplies the variable voltage gradually increasing from a predetermined voltage larger than 0 as a gate voltage. It is a control device.

  According to a fourth aspect of the present invention, the switch control means includes a variable voltage generating means for generating a variable voltage by charging or discharging a capacitor, and a constant voltage generating means for generating the constant voltage. The battery system control device according to any one of claims 1 to 3, wherein

  According to a fifth aspect of the present invention, the switch control unit further includes a voltage shift unit that shifts down the variable voltage generated by the variable voltage generation unit, and a voltage shift unit that shifts a voltage higher than the pair of batteries. Supplying the variable voltage generated by the variable voltage generation means to the connected semiconductor switch, and supplying the variable voltage shifted down by the voltage shift means to the semiconductor switch connected to the lower side. A battery system control device according to claim 4, wherein:

  As described above, according to the first aspect of the present invention, the variable voltage supplied to the semiconductor switch connected to the lower voltage side of the pair of batteries is supplied to the semiconductor switch connected to the higher voltage side. Lower than the elimination voltage. As a result, the gate voltage of the semiconductor switch connected to the lower voltage side becomes higher than the threshold voltage later than the semiconductor switch connected to the higher voltage side. Then, heat generation can be dispersed.

  According to the second aspect of the present invention, the gate voltage of the semiconductor switch connected to the low voltage side becomes lower than the threshold voltage earlier than the semiconductor switch connected to the high voltage side. The heat generation of the switch can be made substantially the same, and the heat generation can be dispersed.

  According to the third aspect of the present invention, the variable voltage gradually increases from a predetermined voltage larger than zero. Accordingly, it is not necessary to wait for the time until the variable voltage rises from 0 to the predetermined voltage, and the variable voltage can be quickly increased to the threshold voltage or more, and the semiconductor switch can be switched from the non-conductive state to the conductive state.

  According to the fourth aspect of the present invention, it is possible to easily switch between the constant voltage and the variable voltage applied to the gate of the semiconductor switch, and it is not necessary to wait for the variable voltage to rise to the constant voltage, and the speed is reduced. , A constant voltage can be supplied to the gate of the semiconductor switch.

  According to the fifth aspect of the present invention, by shifting the voltage, it is not necessary to provide two variable voltage generating means, and the cost can be reduced.

FIG. 2 is a circuit diagram illustrating a battery system control device according to the first embodiment. (A) to (f) show the variable input, full on input, full off input, the gate voltage of the main FET and the sub FET, the voltage of the main battery and the sub battery, the main FET and the sub FET of the microcomputer shown in FIG. 4 is a time chart of a current flowing through the power supply. It is a circuit diagram showing a battery system control device in a second embodiment. It is a circuit diagram showing a battery system control device in a third embodiment. (A) is a time chart of the voltage of the main battery and the sub-battery, the source voltage of the pair of FETs, and the gate voltage of the pair of FETs in the conventional battery system control device, and (B) is a current flowing from the main battery to the sub-battery. It is a time chart. 5 is a graph showing a drain current (Id) versus a drain-source voltage (Vds) of the FET when a gate voltage is changed.

(1st Embodiment)
Hereinafter, the battery system control device according to the first embodiment will be described with reference to FIG. The battery system control device 1 shown in FIG. 1 is provided in a vehicle on which a pair of batteries of a main battery and a sub-battery is mounted. The main battery is formed of, for example, an inexpensive battery such as a lead battery, and is connected to a generator (not shown). The sub-battery is composed of a high-performance battery such as a lithium-ion or nickel-metal hydride battery. The main battery often has a higher voltage than the sub-battery.

  The battery system control device 1 includes a main FET 2 and a sub-FET 3 as a pair of semiconductor switches, and a switch control circuit 4 as a switch control unit. The main FET 2 and the sub-FET 3 are connected in series between the main battery and the sub-battery such that the forward directions of the parasitic diodes are opposite to each other.

  The main FET 2 and the sub FET 3 are N-channel type. The main FET 2 has a drain connected to the main battery and a source connected to the sub-battery, and the forward direction of the parasitic diode is directed from the sub-battery to the main battery. The sub-FET 3 has a drain connected to the sub-battery side and a source connected to the main battery side, and a forward direction of the parasitic diode is a direction from the main battery to the sub-battery.

  That is, the main FET 2 is connected to the higher voltage side (main battery side) of the pair of batteries, and the sub FET 3 is connected to the lower voltage side (sub battery side) of the pair of batteries.

  The switch control circuit 4 is a circuit that supplies a gate voltage to each of the main FET 2 and the sub-FET 3 to control on / off of the main FET 2 and the sub-FET 3. Specifically, for example, the switch control circuit 4 normally turns off the main FET 2 and the sub-FET 3 and turns on the main FET 2 and the sub-FET 3 during the regenerative operation so that the sub-battery can be charged from the generator.

  Then, as shown in FIG. 2 (d), when controlling the main FET 2 and the sub-FET 3 from off to on, the switch control circuit 4 gradually changes from the lower limit voltage Vmin (= predetermined voltage). Is supplied as a gate voltage, and then a constant voltage VP is supplied as a gate voltage.

  Further, as shown in FIG. 2D, when controlling the main FET 2 and the sub-FET 3 from on to off, the switch control circuit 4 gradually changes from the upper limit voltage Vmax to the lower limit voltage Vmin. A voltage is supplied as a gate voltage.

  Further, the switch control circuit 4 connects the variable voltage supplied to the sub FET 3 connected to the sub-battery side (= lower voltage side of the pair of batteries) to the main battery side (= higher voltage side). In addition, it is set lower than the variable voltage supplied to the main FET 2.

  As shown in FIG. 1, the switch control circuit 4 includes a booster circuit 5 as a constant voltage generator, a variable voltage generator 6 as a variable voltage generator, a switch circuit 7, and a voltage as a voltage shifter. A shift circuit 8, a full on circuit 9, a full off circuit 10, and a microcomputer 11 are provided.

  The booster circuit 5 is a circuit that boosts the voltage of the main battery to generate a constant voltage VP, and includes a well-known boost type DC / DC converter. The booster circuit 5 generates, for example, a voltage of about +10 V of the main battery as a constant voltage VP. In the present embodiment, the booster circuit 5 boosts the voltage of the main battery, but may boost the voltage of the sub-battery.

  The variable voltage generation circuit 6 is a circuit that generates a variable voltage by charging or discharging the capacitor C. The variable voltage generating circuit 6 includes a variable lower limit voltage setting circuit 61, a capacitor C, a charge / discharge circuit 62, a variable lower limit voltage setting circuit 63, and a buffer circuit 64.

  The division lower limit voltage setting circuit 61 generates the division lower limit voltage Vmin. The lower limit voltage Vmin is set to a value obtained by adding a threshold voltage to the voltage of the main battery. The division lower limit voltage setting circuit 61 includes, for example, a known constant voltage circuit that generates a threshold voltage from a constant voltage VP, and a known addition circuit that adds the voltage of the main battery and the threshold voltage. .

  One end of the capacitor C is connected to the variable lower limit voltage setting circuit 61, and is connected in series to the variable lower limit voltage setting circuit 61. As a result, the voltage at the other end of the capacitor C is equal to the lower limit voltage Vmin + the voltage across the capacitor C. When the capacitor C is charged, the voltage gradually increases continuously from the lower limit voltage Vmin, and when the capacitor C discharges. Decreases gradually and continuously to the lower limit voltage Vmin. That is, the voltage on the other end of the capacitor C becomes the variable voltage.

  The charge / discharge circuit 62 is a circuit that supplies a capacitor C with a variable upper limit voltage Vmax, which will be described later, to charge the capacitor C, or discharges the capacitor C by connecting a discharge resistor (not shown). The charge / discharge circuit 62 is controlled by the microcomputer 11 described later, and charges the capacitor C when the variable input from the microcomputer 11 is Hi, and discharges the capacitor C when Lo is Lo. The charge / discharge circuit 62 charges and discharges the capacitor C with a constant current or a current limited by a resistance.

  The variable upper limit voltage setting circuit 63 is composed of, for example, a well-known constant voltage circuit, generates the variable upper limit voltage Vmax from the constant voltage VP, and supplies the generated maximum variable voltage Vmax to the capacitor C. The maximum change voltage Vmax is set to a value lower than the constant voltage VP. By supplying the variable upper limit voltage Vmax to the capacitor C, the voltage at the other end of the capacitor C, that is, the variable voltage does not exceed the variable upper limit voltage Vmax.

  The buffer circuit 64 buffers the variable voltage, which is the voltage on the other end side of the capacitor C, and supplies it to the gates of the main FET 2 and the sub-FET 3.

  The switch circuit 7 is provided between the output of the buffer circuit 64 and the gates of the main FET 2 and the sub-FET 3, and switches between supply and cutoff of the variable voltage output from the buffer circuit 64. The switch circuit 7 is controlled by a microcomputer 11, which will be described later. When the full on input from the microcomputer 11 is Lo, the switch circuit 7 is turned on to supply the variable voltage to the gates of the main FET 2 and the sub-FET 3, and is turned off when the full on input is Hi. Then, the supply of the variable voltage to the gates of the main FET 2 and the sub-FET 3 is cut off.

  The voltage shift circuit 8 supplies the variable voltage generated by the variable voltage generation circuit 6 to the main FET 2 as it is, and shifts down the variable voltage generated by the variable voltage generation circuit 6 to supply it to the sub-FET 3. Circuit. As the shift-down amount, the voltage between the main battery and the sub-battery immediately before turning on the main FET 2 and the sub-FET 3 may be detected and set to a value corresponding to the voltage difference, or the average value of the voltage difference may be set. And may be set to a constant value.

  The full-on circuit 9 includes switches provided between the gates of the main FET 2 and the sub-FET 3 and the booster circuit 5, and switches between supply and cutoff of the constant voltage VP output from the booster circuit 5. The full-on circuit 9 is controlled by a microcomputer 11 described below. When the full-on input from the microcomputer 11 is Lo, the supply of the constant voltage VP to the gates of the main FET 2 and the sub-FET 3 is cut off, and when the full-on input is Hi, A constant voltage VP is supplied to the gates of the main FET 2 and the sub FET 3.

  The full off circuit 10 includes switches provided between the gate and source of the main FET 2 and between the gate and source of the sub FET 3. The full-off circuit 10 is controlled by a microcomputer 11, which will be described later. When the full-off input from the microcomputer 11 is high, the gate and source of the main FET 2 and the sub-FET 3 are short-circuited, and the energization of the main FET 2 and the sub-FET 3 is completely completed. When the full-off input is Lo, the gate-source of the main FET 2 and the sub-FET 3 are opened so that a variable voltage or a constant voltage VP can be supplied to the gates.

  The microcomputer 11 controls the entire battery system control device 1 and is a known microcomputer including a CPU, a ROM, a RAM, and the like.

  Next, the operation of the battery system control device 1 having the above configuration will be described below with reference to the time chart of FIG. First, the microcomputer 11 sets the variable input and the full on input to Lo and the full off input to Hi. As a result, the gates and sources of the main FET 2 and the sub-FET 3 are short-circuited, and as shown in FIG. 2F, the energization of the main FET 2 and the sub-FET 3 is completely cut off (full off period).

  When the main FET 2 and the sub-FET 3 are off, the voltage of the main battery is higher than the voltage of the sub-battery as shown in FIG.

  Next, the microcomputer 11 controls the main FET 2 and the sub FET 3 from off to on. At this time, first, the microcomputer 11 switches the full off input from Hi to Li, as shown in FIG. As a result, the gates of the main FET 2 and the sub-FET 3 are supplied with the variable voltage generated by the variable voltage generation circuit 6. At this time, since the capacitor C is completely charged, the lower limit voltage Vmin generated by the lower limit voltage setting circuit 61 is supplied to the gate of the main FET 2 as shown in FIG. The voltage of the lower limit voltage Vmin shifted down by the voltage shift circuit 8 is supplied to the gate of the sub-FET 3.

  The lower limit voltage Vmin is set to a value obtained by adding a threshold voltage to the voltage of the main battery (= source voltage of the main FET 2). For this reason, when the variable voltage is supplied, a voltage higher than the threshold voltage is applied between the gate and the source of the main FET 2, and the main FET 2 is immediately turned on.

  On the other hand, the voltage obtained by shifting down the division-lowering lower limit voltage Vmin is set to such a value that only a voltage smaller than the threshold voltage is applied between the gate and the source of the sub-FET 3. Therefore, the sub-FET 3 is in a non-conducting state when the supply of the variable voltage starts. At this time, current flows from the main battery to the sub-battery through the parasitic diode of the sub-FET 3.

  Next, the microcomputer 11 switches the variable input from Lo to Hi. As a result, the capacitor C is charged, and the variable voltage supplied to the gates of the main FET 2 and the sub-FET 3 gradually increases. Therefore, the voltage applied between the gate and the source of the sub-FET 3 becomes equal to or higher than the threshold voltage, and the sub-FET 3 is turned on with a delay from the main FET 2. While the sub-FET 3 is in the non-energized state, the sub-FET 3 acts as a resistor, and the sub-FET 3 generates more heat than the main FET 2. Thereafter, when the sub-FET 3 is turned on, the main FET 3 generates more heat than the sub-FET 3 as described in the background art. Thereby, the heat generation of the pair of FETs 2 and 3 can be made substantially the same, and the heat generation can be dispersed.

  Further, as shown in FIG. 2 (f), as the gate voltage increases, the conduction currents of the main FET 2 and the sub-FET 3 also gradually increase, so that it is possible to suppress a rapid increase in the conduction current (the change-on period).

  Further, as shown in FIG. 2E, the voltage of the main battery gradually decreases, and the voltage of the sub-battery gradually increases and approaches each other. By controlling the main FET 2 and the sub-FET 3 to gradually increase the conduction current in this way, it is possible to prevent the voltage between the main battery and the sub-battery from suddenly changing.

  After a lapse of a predetermined time when the voltages of the main battery and the sub-battery become substantially the same after setting the variable input to Hi, the microcomputer 11 switches the full on input from Lo to Hi. At this time, the elimination voltage may be a voltage slightly lower than the elimination upper limit voltage Vmax. Thus, the supply of the variable voltage is cut off to the gates of the main FET 2 and the sub-FET 3, and the constant voltage VP is supplied. Then, both the main FET 2 and the sub-FET 3 are energized in the saturation region (full-on period).

  Next, the microcomputer 11 controls the main FET 2 and the sub FET 3 from on to off. At this time, first, as shown in FIGS. 2A and 2B, the microcomputer 11 switches the full on input from Hi to Lo and simultaneously switches the variable input from Hi to Lo. The switching of the full-on input from Hi to Lo interrupts the supply of the constant voltage VP to the gates of the main FET 2 and the sub-FET 3, and supplies the variable voltage generated by the variable voltage generating circuit 6.

  While the full on input becomes Hi and the supply of the variable voltage to the gates of the main FET 2 and the sub-FET 3 is cut off, the variable input is Hi. For this reason, the charging of the capacitor C is continued, and the variable voltage becomes the maximum variable voltage Vmax. Therefore, at this time, the gate of the main FET 2 is supplied with the variable upper limit voltage Vmax. Further, a voltage obtained by shifting down the variable upper limit voltage Vmax by the voltage shift circuit 8 is supplied to the gate of the sub-FET 3.

  In addition, the switching of the variance input from Hi to Lo discharges the capacitor C, and the variability voltage supplied to the gates of the main FET 2 and the sub-FET 3 gradually decreases. For this reason, as shown in FIG. 2F, the conduction currents of the main FET 2 and the sub-FET 3 gradually decrease as the gate voltage decreases (change-off period). In addition, as shown in FIG. 2E, the voltage of the main battery gradually increases, and the voltage of the sub battery gradually decreases. As described above, by controlling the supplied current to gradually decrease, it is possible to prevent the voltage between the main battery and the sub-battery from suddenly changing.

  Also, as in the case of the on-state, the gate of the sub-FET 3 is supplied with a voltage obtained by shifting down the variable voltage supplied to the gate of the main FET 2 in the off-state. As a result, the voltage applied between the gate and the source of the sub-FET 3 becomes smaller than the threshold voltage before the main FET 2, and the sub-FET 3 is turned off before the main FET 2. This makes it possible to disperse the heat by making the heat generated by the pair of FETs 2 and 3 substantially the same as in the case of the ON state.

  After a lapse of a predetermined time period in which the voltages of the main battery and the sub-battery become substantially constant after the change input is Lo, the microcomputer 11 switches the full off input from Lo to Hi. As a result, the gate and source of the main FET 2 and the sub-FET 3 are short-circuited, and as shown in FIG. 2F, the conduction of the main FET 2 and the sub-FET 3 is completely cut off (full off period).

  According to the above-described embodiment, the changing voltage supplied to the sub-FET 3 connected to the lower voltage side of the pair of batteries is lower than the changing voltage supplied to the main FET 2 connected to the higher voltage side. I do. As a result, when on, the gate voltage of the sub-FET 3 becomes higher than the threshold voltage with a delay of the main FET 2, and when off, the gate voltage of the sub-FET 3 becomes smaller than the threshold voltage before the main FET 2. And the heat generation of the sub-FET 3 can be made substantially the same.

  Further, according to the above-described embodiment, the lower limit voltage Vmin (= predetermined voltage) is set so that the gate-source voltage of the main FET 2 is equal to or higher than the threshold voltage. Have been. Thereby, it is not necessary to wait for the time until the elimination voltage rises from 0 to the elimination lower limit voltage Vmin, the elimination voltage is quickly increased to the threshold voltage or more, and the main FET 2 and the sub-FET 3 are energized from the non-energized state. You can switch to the state.

  Further, according to the above-described embodiment, the switch control circuit 4 includes a variable voltage generating circuit 6 that generates a variable voltage by charging or discharging the capacitor C, a boosting circuit 5 that generates a constant voltage VP, Having. This makes it possible to easily switch between the constant voltage VP and the fixed voltage VP to the gates of the main FET 2 and the sub-FET 3. More specifically, the variable voltage may be increased to the constant voltage VP, but it takes time to supply the constant voltage VP. As shown in FIG. 2 (f), the current rapidly increases only at the beginning due to the conduction of the main FET 2 and the sub-FET 3. Therefore, it is possible to quickly switch the energization of both the main FET 2 and the sub-FET 3 to the saturation region.

  Further, according to the above-described embodiment, there is further provided the voltage shift circuit 8 for shifting down the variable voltage generated by the variable voltage generating circuit 6, and the variable voltage generated by the variable voltage generating circuit 6 in the main FET 2. To supply the sub-FET 3 with the variable voltage shifted down by the voltage shift circuit 8. As described above, the voltage shift eliminates the need to provide the two variable voltage generation circuits 6, and can reduce the cost.

(2nd Embodiment)
Next, a battery system control device 1 according to a second embodiment will be described with reference to FIG. In the figure, the same reference numerals are given to the same parts as those of the battery system control device 1 shown in FIG. 1 described in the first embodiment, and the detailed description thereof will be omitted.

  In the first embodiment described above, immediately before the main FET 2 and the sub FET 3 are switched from off to on, the voltage of the main battery is higher than the voltage of the sub battery. However, in rare cases, the voltage of the sub-battery may be higher than the voltage of the main battery. Therefore, in the second embodiment, the battery system control device 1 further includes a voltage detection circuit 12 that detects voltages of the main battery and the sub-battery.

  The voltage detection circuit 12 supplies the detection result to the microcomputer 11. In the first embodiment, the voltage shift circuit 8 supplies the gate of the sub-FET 3 with the down-converted voltage shifted down. However, in the second embodiment, the supply destination of the down-shifted voltage is the main FET 2. And the sub FET 3 can be switched. This switching is controlled by the microcomputer 11.

  Specifically, the microcomputer 11 supplies the variable voltage to the gate of the main FET 2 as in the first embodiment if the voltage of the main battery is greater than the voltage of the sub-battery as a result of detection by the voltage detection circuit 12, The voltage shift circuit 8 is controlled so that the shifted voltage is supplied to the gate of the sub-FET 3.

  On the other hand, if the voltage detected by the voltage detection circuit 12 indicates that the voltage of the sub-battery is greater than the voltage of the main battery, the microcomputer 11 supplies the variable voltage to the gate of the sub-FET 3 and the shifted down voltage to the gate of the main FET 2. The voltage shift circuit 8 is controlled so as to supply the voltage. By doing so, even if the voltage of the sub-battery is rarely higher than the voltage of the main battery, the heat generation of the main FET 2 and the sub-FET 3 can be made substantially the same.

(Third embodiment)
Next, a battery system control device 1 according to a third embodiment will be described with reference to FIG. In the figure, the same reference numerals are given to the same parts as those of the battery system control device 1 shown in FIG. 3 described in the second embodiment, and the detailed description thereof will be omitted.

  A major difference between the second embodiment and the third embodiment is that the battery system control device 1 includes a current detection circuit 13 for detecting a current flowing between the main battery and the sub-battery. This current detection circuit 13 supplies a detection result to the microcomputer 11. The microcomputer 11 changes the full on input from Lo when the current detection circuit 13 detects a current exceeding the safe operation area while supplying the gradually increasing variable voltage to the gates of the main FET 2 and the sub-FET 3. Switch to Hi. As a result, a constant voltage VP is supplied to the gates of the main FET 2 and the sub-FET 3, and both are energized in the saturation region. Since the on-resistance of the main FET 2 and the sub-FET 3 in the saturation region is small, heat generation can be suppressed.

  Further, the microcomputer 11 supplies the full off input to Lo when the current detection circuit 13 detects a current exceeding the safe operation area while supplying the gradually decreasing variable voltage to the gates of the main FET 2 and the sub-FET 3. To Hi. As a result, energization of the main FET 2 and the sub-FET 3 is completely cut off, and heat generation can be suppressed.

  When the current detection circuit 13 detects that a current is flowing from the sub battery to the main battery when switching the main FET 2 and the sub FET 3 from on to off, the microcomputer 11 shifts to the gate of the main FET 2. The voltage shift circuit 8 may be controlled so as to supply the down-converted voltage and the down-converted voltage that is not shifted down to the gate of the sub-FET 3. On the other hand, if the current detection circuit 13 detects that a current flows from the main battery to the sub-battery, the variable voltage shifted down to the gate of the sub-FET 3 and the variable voltage not shifted down to the gate of the main FET 2 are detected. The voltage shift circuit 8 may be controlled so as to supply a voltage.

  According to the above-described embodiment, the elimination voltage that gradually increases from the elimination lower limit voltage Vmin is supplied to the gates of the main FET 2 and the sub-FET 3, but the invention is not limited to this. The de-variation voltage gradually increasing from 0 may be supplied to the gates of the main FET 2 and the sub-FET 3.

  Further, according to the above-described embodiment, the gradually changing decreasing supply voltage is supplied also when the main FET 2 and the sub FET 3 are controlled from on to off. However, the present invention is not limited to this. When controlling from on to off, the full off circuit 10 may completely cut off the current supply to the main FET 2 and the sub-FET 3 immediately without supplying the variable voltage.

  Further, according to the above-described embodiment, the voltage shift circuit 8 is provided, but the present invention is not limited to this. Two variable voltage generating circuits 6 are provided to generate a first variable voltage and a second variable voltage lower than the first variable voltage in each variable voltage generating circuit, and the gates of the main FET 2 and the sub-FET 3 are generated. May be supplied.

  Further, the above-described embodiment merely shows a typical mode of the present invention, and the present invention is not limited to the embodiment. That is, various modifications can be made without departing from the gist of the present invention.

1 Battery system controller 2 Main FET (semiconductor switch)
3 Sub FET (semiconductor switch)
4. Switch control circuit (switch control means)
5 Step-up circuit (constant voltage generation means)
6. De-variable voltage generation circuit (de-variable voltage generation means)
8. Voltage shift circuit (voltage shift means)
C Capacitor Vmin Lower limit voltage of change (predetermined voltage)
VP constant voltage

Claims (5)

A pair of semiconductor switches connected in series between a pair of batteries such that the forward directions of the parasitic diodes are opposite to each other;
A switch control unit that supplies a gate voltage to each of the pair of semiconductor switches and controls on / off of the pair of semiconductor switches,
The switch control means, when controlling the pair of semiconductor switches from off to on, after supplying a gradually increasing variable voltage as a gate voltage, a battery system control device that supplies a constant voltage as a gate voltage,
It said switch control means is lower than the connected lean varying voltage supplied to the semiconductor switch to the side, dividing varying voltage supplied to the semiconductor switch higher connected to the side of the voltage of the voltage of the pair of battery A battery system control device, characterized in that the battery system controller is also lowered. The switch control means, when controlling the pair of semiconductor switches from on to off,
The battery system control device according to claim 1, wherein the gradually changing voltage is supplied as a gate voltage. The switch control means, when controlling the pair of semiconductor switches from off to on, supplies the variable voltage that gradually increases from a predetermined voltage greater than 0 as a gate voltage. 3. The battery system control device according to 2. The switch control means,
A variable voltage generating means for generating a variable voltage by charging or discharging a capacitor,
The battery system control device according to claim 1, further comprising: a constant voltage generation unit configured to generate the constant voltage. The switch control unit further includes a voltage shift unit that shifts down the variable voltage generated by the variable voltage generation unit,
The variable voltage generated by the variable voltage generating means is supplied to the semiconductor switch connected to the higher voltage side of the pair of batteries, and the voltage is shifted to the semiconductor switch connected to the lower voltage side by the voltage shift means. The battery system control device according to claim 4, wherein the reduced variable voltage is supplied.

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