JP2017152730A - Manufacturing method of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent deterioration in bond strength between bonded semiconductor wafers caused by the generation of voids between the two semiconductor wafers in a manufacturing process of a semiconductor device having a process of bonding the semiconductor wafers.SOLUTION: A manufacturing method of a semiconductor device comprises: cleaning surfaces of two semiconductor wafers by using pure water and subsequently performing heat treatment on each semiconductor wafer thereby eliminating moisture and the like adsorbed on the surface of the semiconductor wafer; and subsequently performing plasma treatment on each semiconductor wafer, and subsequently bonding the two semiconductor wafers and firmly coupling both wafers with each other by performing heat treatment at a high temperature.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a technique effective when applied to a method for manufacturing a semiconductor device having a step of bonding semiconductor wafers.

  In the process of forming a back-illuminated CMOS (Complementary Metal Oxide Semiconductor) image sensor, which is a type of image sensor used in digital still cameras, the strength of the semiconductor wafer (semiconductor substrate) on which the device (semiconductor element) is formed is determined. As a supplementary method, it is known to attach another semiconductor wafer to the semiconductor wafer.

  In Patent Document 1 (Japanese Patent Application Laid-Open No. 2011-243959), before the substrates are bonded together, the substrate surfaces are cleaned by wet treatment, and after the plasma treatment is performed on the substrate surfaces, the substrate is heated. Is described. In addition, it is described that substrates are bonded to each other in a processing chamber in a reduced pressure state. However, there is no description about performing bonding in a state where the substrate temperature is room temperature (room temperature).

  Patent Document 2 (Japanese Patent Laid-Open No. 2009-4741) describes that the substrates are placed in a vacuum before and during bonding of the substrates. Moreover, it describes that the organic component of the adhesion layer of a board | substrate is removed by heating in a vacuum at the time of joining. However, there is no description about performing bonding in a state where the substrate temperature is room temperature (room temperature).

JP 2011-243959 A JP 2009-4741 A

  Bonding of semiconductor wafers (hereinafter simply referred to as wafers) is susceptible to wafer warpage or surface conditions, but when bonding wafers under normal temperature and atmospheric pressure, managing the wafer surface condition is not possible. Have difficulty. Moisture adsorbed on the wafer surface before wafer bonding when these processes are performed in the air without managing each process such as wafer cleaning or temporary bonding between wafers, or the atmosphere during transfer between processes. Alternatively, since the adsorbed gas is not removed, voids are generated at the bonding interface. Also, in the bonding process, the temperature of the two wafers to be bonded is not controlled and managed, and the device characteristics deteriorate due to residual strain (residual stress) generated due to the temperature difference between these wafers. There is.

  Other problems and novel features will become apparent from the description of the specification and the accompanying drawings.

  Of the embodiments disclosed in the present application, the outline of typical ones will be briefly described as follows.

  In one embodiment, the surface of two semiconductor wafers is cleaned with pure water, and then each semiconductor wafer is subjected to a heat treatment to remove moisture adsorbed on the surface of the semiconductor wafer. Then, after plasma processing is performed on each semiconductor wafer, the two semiconductor wafers are bonded and heat-treated at a high temperature.

  According to one embodiment disclosed in the present application, the reliability of a semiconductor device can be improved.

4 is a flow of a manufacturing process of the semiconductor device according to the first embodiment of the present invention. It is an overhead view which shows the manufacturing method of the semiconductor device which is Embodiment 1 of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which is Embodiment 1 of this invention. It is a schematic diagram which shows the surface state of the wafer in the manufacturing process of the semiconductor device which is Embodiment 1 of this invention. It is an overhead view which shows the manufacturing method of the semiconductor device which is Embodiment 1 of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which is Embodiment 1 of this invention. FIG. 7 is a cross-sectional view showing a method for manufacturing the semiconductor device following FIG. 6; It is a schematic diagram of the apparatus used for the manufacturing process of the semiconductor device which is Embodiment 2 of this invention. It is a flow of the manufacturing process of the semiconductor device which is Embodiment 2 of this invention. It is a schematic diagram which shows the surface state of the wafer in the manufacturing process of the semiconductor device shown as a comparative example.

  Hereinafter, embodiments will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof will be omitted. In the following embodiments, the description of the same or similar parts will not be repeated in principle unless particularly necessary.

  In the drawings used in the following embodiments, even an overhead view may be partially hatched to make the drawings easy to see.

  Note that the reduced pressure state and the reduced pressure atmosphere in the present application refer to a vacuum state in which the pressure is lower than the normal pressure (atmospheric pressure).

(Embodiment 1)
In this embodiment, a main surface side (first surface) of a wafer (semiconductor substrate) on which a device is formed is bonded to a main surface side surface (second surface) of another wafer (semiconductor substrate). A method for manufacturing a semiconductor chip including a back-illuminated CMOS image sensor formed by bonding together will be described. The image sensor images light emitted from an object through an optical system on the light receiving surface of the image sensor, photoelectrically converts the light and darkness of the image into the amount of electric charge, and reads it to convert it into an electrical signal. It is an element.

  In a back-illuminated image sensor, light is applied to the photodiode from the back side of the wafer (semiconductor substrate) on which a photodiode and an upper layer wiring are formed on the main surface side. Irradiation light reaches the light receiving portion without being shielded by wirings or transistors formed on the main surface side of the semiconductor substrate. For this reason, compared with the case where light is irradiated from the main surface side of the wafer, the amount of received light can be increased and the sensitivity of the image sensor can be improved.

  However, since the film thickness of the wafer before processing is, for example, about 750 μm, the light irradiated from the back side of the wafer is formed on the main surface side of the wafer when the wafer is used as it is without processing. It can hardly reach the light receiving part. Therefore, it is necessary to reduce the thickness of the wafer to about 3 μm, for example, and improve the transmission efficiency of the irradiation light. In this case, the strength of the semiconductor device is reinforced because the strength of the wafer decreases as the wafer becomes thinner. As a method, it is conceivable to attach another wafer to the main surface side of the wafer. When manufacturing such a semiconductor device, one wafer is thinned after a wafer bonding (bonding) step. Here, the light receiving portion refers to a photodiode formed on the main surface of the first wafer.

  Hereinafter, in the case of bonding two wafers, a heating process is performed on each wafer before bonding the wafers to improve the surface condition of the wafers and improve the reliability of the semiconductor device. It demonstrates along the flow of the manufacturing process shown in FIG. FIG. 1 is a flow of the manufacturing process of the semiconductor device of this embodiment.

  First, as shown in step S1 of FIG. 1, a first wafer (first semiconductor substrate) and a second wafer (second semiconductor substrate) are prepared. The first wafer is an SOI (Silicon On Insulator) substrate having a buried oxide film on a semiconductor substrate made of single crystal silicon or a single crystal silicon, for example, and having a thin silicon layer on the buried oxide film. The thickness is, for example, 750 μm. The second wafer is, for example, a semiconductor substrate made of single crystal silicon, or a substrate on which devices or wirings are formed, and has a thickness of, for example, 750 μm.

  Next, a device (semiconductor element) including a back-illuminated CMOS image sensor is formed on the first wafer (step S2 in FIG. 1). FIG. 2 is a bird's-eye view of a first wafer W1 on which the device including the photodiode, transistor, and wiring layer is formed on the main surface side of the SOI substrate, and a second wafer W2 prepared separately from the first wafer W1. Show. In FIG. 2 and FIG. 5 shown later, the surface of the second wafer W2 is hatched for easy understanding of the drawing.

  FIG. 3 shows a cross-sectional view of the first wafer W1 including the device structure formed in step S2 of FIG. The device structure will be described below. The main feature of the present embodiment is the process after the formation of the device and until the bonding of two wafers is completed. A detailed description of the process of forming photodiodes on one wafer W1 is omitted.

  As shown in FIG. 3, a silicon layer SL is formed on the main surface of the semiconductor substrate SB1 constituting the first wafer (first semiconductor substrate) W1 via a buried oxide film BOX. The first wafer W1 includes a semiconductor substrate SB1, a buried oxide film BOX, and a silicon layer SL. A plurality of photodiodes PD are formed on the upper surface of the semiconductor substrate SB1, and a polysilicon wiring PW and other transistors (not shown) electrically connected to the photodiodes PD are formed on the first wafer W1. Has been. The photodiode PD is composed of an n-type semiconductor layer and a p-type semiconductor layer formed on the main surface of the silicon layer SL.

  On the main surface of the first wafer W1, the polysilicon wiring PW is covered with an interlayer insulating film ILF. The interlayer insulating film ILF is composed of a laminated film of a plurality of insulating films (not shown), and a plurality of wirings M1 to M3 formed on the polysilicon wiring PW are formed therein. The polysilicon wiring PW and the wiring M1, the wirings M1 and M2, and the wirings M2 and M3 are electrically connected through vias, respectively.

  On the wiring M3, an insulating film L1 including the wiring M4 made of an aluminum film is formed. The insulating film L1 is formed of a plurality of stacked insulating films (not shown), and the wiring M4 is electrically connected to the wiring M3. On the insulating film L1, insulating films L2 and L3 are sequentially stacked. The insulating films L1 to L3 are made of, for example, a silicon oxide film, and are formed (deposited) by, for example, a CVD (Chemical Vapor Deposition) method. The insulating film L3 is an adhesive layer whose upper surface MSS is bonded to the second wafer in a later process (step S6 in FIG. 1), and is not limited to the silicon oxide film but is formed of a silicon nitride film or a silicon film. Also good. The device shown in FIG. 3 is formed by a known semiconductor manufacturing process. Hereinafter, for convenience, the entire structure described with reference to FIG. 3 is referred to as a first wafer W1.

  Next, as shown in step S3 of FIG. 1, a cleaning process is performed to clean the surfaces of the first wafer and the second wafer to be bonded in the subsequent process (step S6), which serve as bonding interfaces. That is, the main surface side surface of the first wafer and the main surface side surface of the second wafer are cleaned. In the cleaning step, cleaning with pure water (DIW: De-Ionized Water), that is, a method of cleaning the surface of the wafer by flowing pure water from above the rotating wafer to the center of the wafer can be used. As another method, an ultrasonic cleaning method may be used.

  The bonding surface of the first wafer is the surface on which the device is formed, that is, the upper surface on the main surface side. That is, the upper surface MSS of the insulating film L3 (see FIG. 3) formed on the main surface side of the first wafer is cleaned here. The upper surface MSS of the insulating film L3 is polished by, for example, a CMP (Chemical Mechanical Polishing) method or planarized by an etching method. In such a case, foreign matters (particles) such as residues from the polishing process or the etching process remain on the upper surface MSS of the insulating film L3. If foreign matter remains on the surface of the wafer, an attempt to bond two wafers creates a gap due to the presence of foreign matter between the wafers, making bonding difficult. It must be removed by the process.

  As described above, the bonding surface of the first wafer, that is, the surface of the insulating film L3 shown in FIG. 3 is not limited to the silicon oxide film, and may be formed of a silicon nitride film or a silicon film. In addition, a device or a wiring including a semiconductor element or the like may be formed on the main surface of the second wafer or the back surface opposite to the main surface. Here, like the first wafer, the bonding surface of the second wafer is not limited to the silicon film but may be formed of a silicon oxide film or a silicon nitride film. That is, when the first wafer and the second wafer are bonded, the combination of the materials of the films on the opposing bonding surfaces is, for example, a silicon film and a silicon film, a silicon oxide film and a silicon film, a silicon oxide film and a silicon oxide film. A silicon nitride film and a silicon film, or a silicon oxide film and a silicon nitride film.

  Next, as shown in step S4 of FIG. 1, moisture or gas components (adsorbed materials) adsorbed on the surfaces of the first wafer and the second wafer, which are adhering to the surfaces to be bonded in the subsequent process (step S6). A degassing process is performed to remove the. Here, the adsorbate on the surfaces of the first wafer and the second wafer is removed by heat-treating each wafer with a heating device using a lamp such as a xenon lamp or a heater using carbon wire. In particular, the first wafer has a large amount of moisture adhering to or absorbed by the cleaning process in step S3. An insulating film L3 (see FIG. 3) made of a silicon oxide film or a silicon oxide film is formed on the upper surface of the first wafer, and such an insulating film adsorbs moisture compared to a second wafer made of single crystal silicon. It is easy to do.

In addition to water (H ₂ O), the object to be removed from each wafer by the heat treatment is, for example, when an insulating film L3 (see FIG. 3) made of a silicon oxide film is formed on the upper surface of the first wafer in step S2. It also includes foreign matter generated by the reaction between the residual gas adhering to the surface (upper surface MSS) of the insulating film L3 and water.

  In the degassing step by heat treatment in step S4, in order to remove moisture and the like, the heating temperature needs to be 100 ° C. or higher, which is the boiling point of water. In addition, the heating step is performed by loading the wafer into the chamber and using a lamp or a heater in the chamber. As a method of confirming whether moisture or other impurities have been sufficiently removed from the wafer, there are a method of measuring the temperature when the wafer is heated, a method of measuring the pressure in the chamber, and the removal of the exhaust discharged from the chamber. There is a method of inspecting the component of the separated gas with a mass analyzer.

  As described above, if the temperature at the time of temperature rise of the wafer is managed and monitored, and heat treatment is performed at a sufficient temperature and time, it can be determined that moisture or the like is sufficiently desorbed from the surface of the wafer. . Moreover, when measuring the pressure in a chamber, the vacuum degree in the chamber currently pressure-reduced, for example by continuing exhausting internal gas is measured using a vacuum gauge. Then, the moisture adsorbed on the wafer surface by heating is vaporized and expands, so that the pressure in the chamber rises. Furthermore, the pressure in the chamber decreases when heating and exhausting of the gas in the chamber are continued. By detecting this change in pressure, the effect of the degassing process (heat treatment) is confirmed, and the completion of the degassing process is determined. can do.

  Further, it is possible to determine when the desorption gas processing is completed by inspecting the components of the desorbed gas, measuring the amount of moisture and other gases being discharged, and the amount thereof. Of the plurality of methods, the method of measuring the pressure in the chamber can be implemented at a particularly low cost. A major feature of the present embodiment is that moisture and the like on the wafer surface are removed by performing the heat treatment process in step S4.

  Further, as a method of degassing in step S4, in addition to the method of heating the wafer to 100 ° C. or more as described above, a method of maintaining a reduced pressure atmosphere with a vacuum degree of about 100 Pa or less, or about 100 Pa or less. Alternatively, a method in which the temperature of the wafer is raised to 100 ° C. or higher after being held in a reduced-pressure atmosphere having a degree of vacuum may be used.

Next, as shown in step S5 of FIG. 1, the surfaces of the first wafer and the second wafer are activated by plasma treatment or the like under reduced pressure. By activating the surface of each wafer by the plasma treatment, the wafers can be easily attached to each other, and the bonding strength after bonding can be increased. Temporary bonding of the wafer is performed using the wettability of the surface of the wafer, but the hydrophilicity of the surface of each wafer is improved by performing the plasma treatment and the cleaning treatment. It becomes possible to bond more firmly. In addition, you may perform the activation process of step S5 before either process of the washing | cleaning process shown to step S3, or the degassing process shown to step S4. The plasma treatment in step S5 uses, for example, oxygen plasma or nitrogen plasma in an atmosphere of N ₂ (nitrogen) or O ₂ (oxygen), or an inert gas such as Ar (argon) or He (helium), or these And using a plasma in an atmosphere in which hydrogen gas is mixed.

  Next, as shown in step S <b> 6 of FIG. 1, the first wafer and the second wafer are bonded to obtain a temporary bonded state. Temporary bonding utilizes wettability of opposing surfaces of each wafer as described above. That is, a weak bonding force is generated by the van der Waals force between the wafer surfaces to bond both wafers. The temporary bonding step is performed at a room temperature (normal temperature). In addition, room temperature (normal temperature) as used in this application means the temperature around 25 degreeC, for example.

  Next, as shown in step S7 of FIG. 1, the first wafer and the second wafer temporarily bonded in step S6 are heated at a temperature of 200 ° C. or higher to improve the bonding strength and make permanent bonding. The temperature applied to the wafer in the heating step is, for example, 200 to 1000 ° C., and here it is performed at 300 ° C. By the heating step, the first wafer and the second wafer are firmly bonded at their bonding surfaces. Thus, the wafer bonding process is completed.

  When the plasma treatment of step S5 is not performed, as shown in the schematic diagram of the comparative example shown in FIG. 10, there are a lot of H (hydrogen) and O (oxygen) on each surface of each wafer, and van der Waals force Temporarily joined with weak force. When permanently bonding such surface-state wafers, it is necessary to perform heat treatment at a relatively high temperature of about 1000 ° C. By this heat treatment, a Si—O—Si covalent bond is formed between the first wafer W1 and the second wafer W2, and the wafers are firmly bonded to each other. In FIG. 10, the left side of the drawing shows the surface state of the wafer during temporary bonding (corresponding to step S6 in FIG. 1), and the right side of the drawing shows heat treatment for permanent bonding (corresponding to step S7 in FIG. 1). The state of the boundary between subsequent wafers is shown. FIG. 10 is a schematic diagram showing a surface state of a wafer of a semiconductor device in a manufacturing process shown as a comparative example.

  On the other hand, in this embodiment, as shown on the left side of FIG. 4, the structure of Si—O—H is arranged on the wafer surface by the activation of the wafer surface by the plasma treatment in step S5 shown in FIG. Yes. In the temporary bonding step of step S6, the first wafer W1 and the second wafer W2 are bonded with a weak force by the van der Waals force. When the Si—O—H structure is arranged on the surface of the wafer, even if the heat treatment is performed at a relatively low temperature of about 200 to 300 ° C., the Si—O—Si is interposed between the first wafer W1 and the second wafer W2. These covalent bonds can be formed to firmly bond the wafers. In the present application, the bonding in which the covalent bond is formed and the bonding force between the wafers is higher than that of the temporary bonding is referred to as permanent bonding.

  In FIG. 4, the left side of the drawing shows the surface state of the wafer during temporary bonding (step S <b> 6 in FIG. 1), and the right side of the drawing shows the boundary between the wafers after the heat treatment for permanent bonding (step S <b> 7 in FIG. 1). Shows the state. FIG. 4 is a schematic diagram showing the surface state of the wafer of the semiconductor device during the manufacturing process of the present embodiment.

  Next, as shown in step S8 of FIG. 1, the wafer thinning and device formation process are continued. Specifically, as shown in FIG. 5, first, in order to reduce the thickness of the first wafer W1 bonded to the second wafer W2, the back surface of the first wafer W1 is moved back, for example. In FIG. 5, an overhead view of the first wafer W1 and the second wafer W2 bonded in step S7 of FIG. 1 is shown on the left side of the drawing, and the first is shown on the right side of the drawing by the polishing process of step S8 of FIG. An overhead view of the first wafer W1 and the second wafer W2 after the wafer W1 is thinned is shown.

  FIG. 6 shows a cross-sectional view of the first wafer W1 subjected to the polishing step. The cross-sectional view shown in FIG. 6 is shown upside down with respect to the overhead view shown in FIG. That is, the thinned first wafer W1 is bonded onto the second wafer W2. In the polishing process performed in step S8 in FIG. 1, the back surface BS of the semiconductor substrate SB1 is retracted by combining the back grinding method, the CMP method, or a combination thereof, and the semiconductor substrate SB1 is thinned. Thereby, the film thickness of the semiconductor substrate SB1 becomes about 3 μm. Thereby, in the above-described backside illumination type image sensor, the thickness of the semiconductor substrate SB1 that is transmitted before the light irradiated from the backside BS side of the first wafer W1 reaches the light receiving portion is reduced, and the amount of received light is attenuated. To prevent you from doing.

  6 shows a cross section of a structure in which the first wafer W1 shown in FIG. 3 is bonded upside down on the second wafer W2. In FIG. 3, the back surface BS side of the semiconductor substrate SB1 located on the lower side of the drawing is shown at the top of the drawing in FIG. 6, but here, the upper surface of the drawing shown in FIG. This is called the back side BS. The back surface of the wafer (semiconductor substrate) in the present application is a surface opposite to the main surface side of the wafer (semiconductor substrate). For example, the back surface of the first wafer W1 is the surface (back surface BS) opposite to the surface (main surface) of the first wafer W1 including the semiconductor substrate SB1 on the side where the photodiode PD and the wirings M1 to M3 are formed. ).

  Next, as shown in FIG. 7, on the back surface BS of the semiconductor substrate SB1, an antireflection film RR made of an Hf (hafnium) film or a silicon nitride film, an insulating film L4 made of a silicon oxide film, and a tungsten film for shielding light. Alternatively, a light shielding film CL composed of a plurality of patterns such as an aluminum film is sequentially formed. Thereafter, an on-chip lens OL made of an organic film including a color filter CF is formed on the insulating film L4, whereby step S8 in FIG. 1 is completed, and the backside illumination type CMOS image sensor of the present embodiment. Is completed. The unevenness on the upper surface of the on-chip lens is formed by, for example, a photolithography technique using a halftone mask and an etching method.

  When the image sensor formed by the manufacturing process of the present embodiment is irradiated with light from above the on-chip lens OL shown in FIG. 7, the on-chip lens OL, the insulating film L4, the antireflection film RR, and the semiconductor substrate SB1. This is an element that can convert light into electrons by photoelectric conversion when the photodiode PD captures the light transmitted through the light.

  In the present embodiment, the surface of the insulating film L3 (see FIG. 3) made of a silicon oxide film formed on the main surface side of the first wafer is connected to the surface of the second wafer made of a single crystal silicon substrate. As described above, the insulating film L3 may be formed of a silicon film. Further, a silicon film may be formed on the main surface side of the first wafer, and a silicon oxide film may be formed on the main surface side of the second wafer. That is, when two wafers are bonded, it can be considered that the surface of the silicon oxide film and the surface of the silicon film are bonded or the surfaces of the silicon films are bonded together.

  Below, the effect of this Embodiment is demonstrated.

  In the semiconductor device manufacturing process including the process of bonding two wafers, the wafers whose surfaces are cleaned with pure water or the like are temporarily bonded without performing the degassing process by the heat treatment in step S4 of FIG. It is conceivable that each wafer is firmly bonded by performing a high-temperature heat treatment of about ˜1000 ° C. However, when degassing treatment (heat treatment) is not performed, a gas component such as water remains at the boundary between the wafers. There is a problem that voids are generated between the wafers due to expansion and the reliability of the semiconductor substrate is lowered.

  That is, when moisture or other gas is adsorbed on the bonding surfaces of the first wafer and the second wafer, the moisture or the like is vaporized by the high-temperature heat treatment corresponding to step S7 in FIG. 1 of the present embodiment. There is a risk that voids (voids) are formed between the wafers. When voids are formed between the wafers, the bonding strength between the first wafer and the second wafer decreases. When the second wafer is peeled off from the first wafer, the first wafer which is thinned to about 3 μm may not be able to maintain its strength and may be damaged. Therefore, if the wafers are bonded with moisture remaining between the wafers, the bonding strength between the wafers cannot be maintained sufficiently, and the reliability of the semiconductor device is lowered.

  Further, as described above, when two wafers are bonded, there are considered a case where the surface of the silicon oxide film and the surface of the silicon film are bonded and a case where the surfaces of the silicon films are bonded together. In addition, when joining the surfaces of silicon oxide films, joining the surface of the silicon film and the surface of the silicon nitride film, or joining the surface of the silicon oxide film and the surface of the silicon nitride film Can be considered.

  The generation of the above-mentioned voids becomes more remarkable when the surfaces of the silicon films are bonded to each other than when the silicon oxide film and the silicon film are bonded. This is because the silicon oxide film has a property of easily absorbing moisture, and the generation of voids can be suppressed by the diffusion and absorption of moisture in the silicon oxide film. Therefore, generation of voids can be suppressed by using a silicon oxide film for the bonding surface.

  However, the silicon oxide film that has absorbed moisture has problems such as that dielectric breakdown is likely to occur and leakage current between wirings is likely to occur, and the function as an insulating film is low. Further, the moisture in the silicon oxide film reacts with the metal wiring (for example, the wiring M4 shown in FIG. 7) in the vicinity of the silicon oxide film, so that the metal wiring is corroded, and the resistance of the wiring may be increased or the wiring may be disconnected. There is. There is no problem in using the silicon oxide film itself, but the above problem occurs when two wafers are bonded while moisture is adsorbed on the film.

  Note that it is conceivable to bond two wafers using an adhesive or the like without using a heat treatment step at a temperature higher than 100 ° C., for example, corresponding to step S7 of the present embodiment. However, even in this case, when moisture or the like remains on the surface of the wafer to be bonded, there arises a problem that the bonding strength is reduced as compared with the case where the moisture is removed. In addition, even when the wafer is bonded with an adhesive, when a silicon oxide film is provided on the bonding surface, moisture is absorbed by the silicon oxide film, so that the silicon oxide film is insulated as described above. There is a problem that the deterioration of property and corrosion of metal wiring occur.

  Therefore, it is necessary to remove moisture and the like from the wafer surface before bonding the wafer in both cases of bonding the surface of the silicon oxide film and the surface of the silicon film and bonding the surfaces of the silicon films together. There is.

  Therefore, in this embodiment, moisture and the like at the bonding interface between the wafers are removed by performing degassing by performing heat treatment in step S4. In this way, moisture or other gas components are adsorbed on the surfaces of the first wafer and the second wafer at a high temperature of 100 ° C. or higher, and thereafter, a temporary bonding process and a heat treatment process for permanent bonding are performed. By doing so, it is possible to prevent moisture remaining on the surface of the wafer from expanding due to the heat treatment step and forming voids between the wafers. In this way, by controlling the wafer temperature before bonding the two wafers and managing the surface state of each wafer after cleaning, it is possible to prevent the bonding strength of the bonded wafers from decreasing, Reliability can be improved.

  The above effect can be remarkably obtained when the bonding surfaces of the first wafer and the second wafer are the surfaces of the silicon film. This is because, as described above, it is difficult to suppress the generation of voids when silicon films are bonded to each other as compared with the case where silicon oxide films are provided on the bonding surfaces between wafers. However, the above effect can be obtained even when a silicon oxide film is provided on the bonding surface of the wafer as in this embodiment, and in that case, moisture is contained in the silicon oxide film. By being absorbed, it is possible to prevent the deterioration of the insulating property of the silicon oxide film or the corrosion of the metal wiring.

  Note that plasma treatment may be performed before the cleaning step, and then the steps may be performed in the order of cleaning, degassing, provisional bonding, and permanent bonding. That is, if the activation process by the plasma treatment in step S5 shown in FIG. 1 is after step S2 for forming the bonding surface and before the temporary bonding process in step S6, before the cleaning process in step S3 or It can be done at any later time. The cleaning process in step S3 may be performed at any time immediately before the degassing process at step S4 or immediately before the plasma processing process (activation process) at step S5, and the cleaning is performed at each time point. It doesn't matter.

  In addition, the bonding between the wafers using the adhesive has been described above. However, the CMOS image sensor is easily affected by impurities contained in the adhesive, and there is a high possibility that the performance is deteriorated by the impurities. Therefore, it is not preferable to use an adhesive when bonding wafers in the manufacturing process of the CMOS image sensor. On the other hand, by adopting a bonding method that does not use an adhesive as in the bonding step of the present embodiment, it is possible to prevent the performance of the element from being deteriorated.

(Embodiment 2)
In the present embodiment, in a method for manufacturing a semiconductor device including a step of bonding two wafers, steps such as a wafer degassing step, a temporary bonding step, and a permanent bonding step, and transfer of the wafer between these steps A method for manufacturing a semiconductor device, which is performed under a reduced pressure with a controlled atmospheric pressure, is described.

  FIG. 8 is a schematic diagram of a multi-chamber apparatus used for wafer bonding performed in this embodiment mode. The multi-chamber apparatus MC shown in FIG. 8 has a transfer chamber CH7 at the center, and a plurality of process chambers are connected around the transfer chamber CH7. Specifically, the degassing chamber CH1, plasma processing chamber CH2, wafer temperature control chamber CH3, wafer bonding chamber CH4, wafer temperature control chamber CH5, cleaning chamber CH6, load lock are connected to the transfer chamber CH7. Chambers RC1 and RC2. A transfer robot RB1 is arranged in the transfer chamber CH7. The transfer robot RB1 is used to transfer a wafer between a plurality of circumscribed process chambers and the load lock chambers RC1 and RC2.

  The multi-chamber device MC is coupled to the factory interface FI via load lock chambers RC1 and RC2. The factory interface FI includes a plurality of wafer storage cassettes WC and a transfer robot RB2. The transfer robot RB2 is arranged to transfer a wafer between the wafer storage cassette WC and the load lock chambers RC1 and RC2. The atmospheric pressure in the factory interface FI is maintained at atmospheric pressure.

  When wafers are bonded using this apparatus, the transfer robot RB2 transfers the first and second wafers of the plurality of wafers transferred to the wafer storage cassette WC to the load lock chambers RC1 and RC2, respectively. Transfer it in parts. Thereafter, each of the first wafer and the second wafer is transferred by the transfer robot RB1, processed in each process chamber in the multi-chamber apparatus MC, then bonded to each other and returned to the wafer storage cassette WC.

  Below, the manufacturing method of the semiconductor device of this Embodiment is demonstrated with reference to FIG. 8 along the flow shown in FIG. As shown in FIG. 9, the steps performed in steps S1, S2, S3, S4, S5, S6, S7 and S8, which are the flow of the present embodiment, and the order of performing those steps are the same as in the first embodiment. It is. However, after step S3 and until the completion of step S7, unlike the first embodiment, the atmospheric pressure and temperature in the apparatus for processing are controlled.

  First, the wafer preparation process in step S1 and the device formation process in step S2 in FIG. 9 are performed in the same manner as in the first embodiment. Steps S1 and S2 are steps performed outside the multi-chamber apparatus MC shown in FIG. Thereafter, the first wafer and the second wafer are set in the wafer storage cassette WC shown in FIG. 8, and then transferred into the cleaning chamber CH6 by the transfer robots RB1 and RB2.

  Here, first, the first wafer is transferred from the wafer storage cassette WC into the load lock chamber RC1 where the internal atmospheric pressure is atmospheric pressure (normal pressure), and the second wafer is transferred at atmospheric pressure (normal pressure). It is transferred into a certain load lock chamber RC2. Subsequently, a door (not shown) between each of the load lock chambers RC1 and RC2 and the factory interface FI is closed, and the inside of the load lock chambers RC1 and RC2 is sealed, and the inside is depressurized to be in a vacuum state.

  Subsequently, a door (not shown) between the transfer chamber CH7 and the load lock chambers RC1 and RC2 maintained in a vacuum (depressurized) state is opened, and one wafer is vacuumed (depressurized) by the transfer robot RB1. Move into the clean chamber CH6. Then, after closing the door (not shown) of the cleaning chamber CH6, the atmospheric pressure in the cleaning chamber CH6 is controlled to normal pressure, and the cleaning process is performed under normal pressure, so that foreign matter (particles) adhering to the wafer surface is removed. It is removed (step S3 in FIG. 9). After the cleaning is completed, the inside of the cleaning chamber CH6 is depressurized to be in a vacuum state, and the wafer is returned from the cleaning chamber CH6 to the transfer chamber CH7.

  The degassing chamber CH1, plasma processing chamber CH2, wafer temperature control chamber CH3, wafer bonding chamber CH4, wafer temperature control chamber CH5 and transfer chamber CH7 constituting the multi-chamber apparatus MC are a cleaning chamber CH6 and a load lock chamber RC1. Unlike RC2 and RC2, the decompressed state is always maintained.

  Next, the wafer that has undergone the cleaning process of step S3 in FIG. 9 is carried into the degassing chamber CH1 and subjected to high-temperature heat treatment using a xenon lamp or the like, thereby removing moisture and other gas components on the surface of the wafer. Detach from the wafer (step S4 in FIG. 9). Here, when the degassing process is performed by raising the temperature of the wafer, moisture is vaporized and desorbed from the surface of the wafer, so that the pressure in the degassing chamber CH1 temporarily rises. However, in this case, in order to keep the inside of the degassing chamber CH1 in a reduced pressure atmosphere, the gas in the degassing chamber CH1 is always exhausted by using a pump. Therefore, the increased atmospheric pressure gradually decreases, and the degassing chamber CH1. The inside returns to the original reduced pressure state.

The apparatus used for degassing uses a degas chamber CH1 in which the internal pressure is reduced by continuing to exhaust the internal gas. In particular, it is important that moisture is removed as much as possible from the atmosphere components in the degas chamber CH1. Accordingly, here, the gas in the degassing chamber CH1 is evacuated by using a pump or the like, or the pressure is reduced, or N ₂ (nitrogen) gas, He (helium) gas, Ar (argon) gas, or the like is contained in the chamber. By supplying this inert gas, the inside of the chamber is brought into a reduced pressure state with a nitrogen atmosphere, a helium atmosphere or an argon atmosphere.

  In such a degassing step, as described in the first embodiment, as a method for monitoring the amount of desorbed gas, a method of managing and controlling the temperature at the time of temperature rise with a wafer thermometer, degassing A method for inspecting the degree of vacuum in the chamber CH1 with a vacuum gauge, or a method for inspecting a desorbed gas component exhausted from the degas chamber CH1 using a mass analyzer.

  Next, the wafer is transferred into the plasma processing chamber CH2 while maintaining the reduced-pressure atmosphere, and the wafer surface is activated by plasma processing or the like under reduced pressure (step S5 in FIG. 9).

  Next, the wafer is transferred into the wafer temperature control chamber CH3 while maintaining the reduced-pressure atmosphere, and the wafer is cooled to, for example, room temperature (room temperature) or another specific temperature (step S5a in FIG. 9). In addition to cooling, when the temperature of the wafer is too low, the temperature of the wafer is raised in the wafer temperature control chamber CH3. Here, when the wafer is cooled, a water cooling method is used in which the wafer is fixed to the stage by a mechanical or electrostatic chuck, and the wafer is cooled by a liquid (for example, water) flowing through the stage. Further, when the temperature of the wafer is increased, the temperature of the wafer is increased by lamp light irradiation or the like.

  Here, the above-described steps S1 to S5a in FIG. 9 are performed on the first wafer on which the device is formed, and steps S1 and S3 to S5a in FIG. 9 are also performed on the second wafer. Is performed on the first wafer. In order to match the timing of temperature control in step S5a between the first wafer and the second wafer, the first wafer is transferred into the wafer temperature control chamber CH3, the second wafer is transferred into the wafer temperature control chamber CH5, Each may be temperature controlled simultaneously. By performing the temperature control process in step S5a, the first wafer and the second wafer have substantially the same temperature immediately before the wafer bonding (temporary bonding) process (step S6 in FIG. 9). Here, the temperature difference between the two wafers is 50 ° C. or less.

  In this way, the temperature difference between the first wafer and the second wafer before bonding is made as small as possible by suppressing the occurrence of voids by preventing the occurrence of residual strain due to the thermal expansion of the wafer, Another reason is to prevent device performance degradation (for example, generation of leakage current or dark current) due to stress. The first wafer on which the device is formed has a complicated structure in which a plurality of insulating films such as nitride films and metal films are formed on a semiconductor substrate, and these films have an expansion coefficient and a contraction coefficient due to temperature changes. Therefore, if the first wafer is extremely heated or cooled, stress strain may occur in the first wafer and the first wafer itself may be warped.

  If warpage occurs in the first wafer, it becomes difficult to bring the first wafer and the second wafer into close contact with each other and to maintain the bonding force between the wafers. In addition, since it is important to align the position and performance of each photodiode in the image sensor, the reliability of the semiconductor device decreases if the position or performance of the element varies due to internal distortion or stress. Further, a wafer having a residual stress inside may cause dark current in the internal circuit. Therefore, in order to prevent stress or distortion from occurring in the first wafer and warping the wafer itself, the temperature of the first wafer is adjusted to room temperature here.

  In addition, as described above, the first wafer includes a film having an expansion coefficient different from that of the silicon film, such as a nitride film or a metal film, whereas the second wafer is made of only a single crystal silicon substrate. Therefore, since the structures of the first wafer and the second wafer are greatly different, there is a difference in the magnitude of the internal stress generated when the temperature of both wafers changes. In particular, when there is a temperature difference between the two wafers, a large difference occurs in the stress in each wafer. Therefore, when the wafer bonding process is performed in a state where there is a large temperature difference between the wafers, when the bonded wafers return to room temperature, each wafer contracts at a different contraction rate, and the first wafer and the second wafer are contracted. Large internal stresses and strains occur.

  Since these stresses and strains greatly affect the performance of the image sensor, from the viewpoint of preventing the occurrence of stress in the wafer, each wafer before bonding the wafer and the wafer that has become room temperature after the wafer is permanently bonded It is desirable to reduce the temperature difference between Further, from the viewpoint of preventing the occurrence of stress in the wafer, it is desired to perform the wafer bonding and bonding processes while keeping the temperature difference between the first wafer and the second wafer small.

  Therefore, in the present embodiment, the temperature is adjusted to the room temperature, which is the temperature after the wafer is bonded, and before the wafer is bonded, that is, before step S6 in FIG. 9, each wafer temperature control chamber CH3 shown in FIG. The temperature of the wafer is adjusted to room temperature (step S5a in FIG. 9). Here, in order to reduce the difference in stress and strain generated between the first wafer and the second wafer, the temperature of both wafers is adjusted to be the same as much as possible (step S5a in FIG. 9).

  As described above, the temperature difference between the wafers is 50 ° C. In order to achieve particularly low strain, the temperature difference between the wafers is 10 ° C. or less, and the in-plane temperature difference of each wafer is 10 ° C. or less. It is desirable to make it. Here, the temperature of the first wafer and the second wafer is set to 25 ° C., for example.

  Next, after the first wafer and the second wafer are transported through the multi-chamber apparatus MC held under reduced pressure and placed in the wafer bonding chamber CH4, the wafers are bonded together and temporarily bonded (FIG. 9). Step S6). At this time, the pressure in the wafer bonding chamber CH4 is kept in a vacuum (depressurized) state lower than the atmospheric pressure. In addition, the temperature difference between the two wafers is always reduced, and the temperature control of the first wafer and the second wafer is performed before and during bonding in the wafer bonding chamber CH4 in order to perform temperature control more precisely. . The temperature control method is the same as the method using the stage or the lamp described above.

  That is, even when wafers are bonded together, temperature control is performed so that the temperature of each wafer becomes the same, and the temperature of each wafer is set to room temperature. When bonding the wafers, it is conceivable to bond the two wafers while raising the temperature of the wafers for the purpose of degassing in order to suppress the occurrence of defects during bonding. When the processed wafer is cooled to room temperature, residual stress is generated in the wafer. In contrast, in the present embodiment, as described above, the generation of stress due to the difference in thermal expansion difference between wafers or the difference in shrinkage during cooling is prevented, and a plurality of types of films are formed in the first wafer. In order to prevent the occurrence of stress due to the presence, bonding is performed by controlling the temperature of each wafer to room temperature so that the first wafer and the second wafer are not excessively heated.

  Next, heating is performed at a temperature of 200 ° C. or higher to improve the bonding strength between the wafers, thereby obtaining permanent bonding (step S7 in FIG. 9). Here, the temperature is controlled in the wafer bonding chamber CH4 so that the temperature between the two wafers after the heat treatment for permanent bonding is the same. This prevents stress from being generated between the first wafer and the second wafer after permanent bonding.

  Next, after the bonded and bonded wafers are transferred out of the multi-chamber apparatus MC and returned to the wafer storage cassette WC, device formation is continued as in the first embodiment. That is, the backside illumination type CMOS image sensor is completed by grinding the backside of the semiconductor substrate constituting the first wafer and forming an on-chip lens (step S8 in FIG. 9).

  As described above, in this embodiment, all the processes from the cleaning process in step S3 to the completion of the permanent bonding in step S7 are continuously performed in a reduced-pressure atmosphere, but after the cleaning process in step S3. All processes up to the temporary bonding in step S6 may be continuously processed under a reduced pressure atmosphere, and the permanent bonding in step S7 may be performed by another apparatus.

  Here, even if each process chamber connected to the transfer chamber CH7 performs processing in a vacuum state, when the atmospheric pressure in the transfer chamber CH7 is always atmospheric pressure and an atmospheric atmosphere, For example, even if the degassing is performed using the degassing chamber CH1 in step S4 of FIG. 9, the wafer is exposed to the atmosphere in the transfer chamber CH7. Since the heated wafer is likely to adsorb moisture and the like during cooling, if the wafer is transported in the air after finishing the heat treatment in the degassing chamber CH1, moisture is adsorbed to the wafer again. Cannot be prevented.

  That is, after the degassing process (step S4 in FIG. 9), until the completion of step S8 when the bonding of the wafers is completed, all of the processes and the steps between them are performed under a vacuum (reduced pressure) condition, that is, in an atmosphere not containing moisture. If this transfer is not performed, problems such as the generation of voids at the interface between the bonded wafers and the deterioration of the silicon oxide film on the wafer surface occur. Therefore, in the present embodiment, it is possible to improve the reliability of the semiconductor device by performing all the processes in the multi-chamber apparatus MC after the cleaning process in a reduced-pressure atmosphere.

In order to reduce the amount of moisture in the apparatus as much as possible, in the multi-chamber apparatus MC, the inside of the apparatus is evacuated by exhausting the internal gas, and N ₂ (nitrogen) gas and He (helium) are contained in the apparatus. ) By supplying the gas or Ar (argon) gas, it is possible to prevent the surface condition of the wafer from deteriorating due to moisture adhering to the wafer.

  As described above, in the present parent form, by controlling the atmospheric pressure and atmosphere in the bonding apparatus and controlling the wafer temperature, it is more effective in addition to the same effects as in the first embodiment. In addition, the bonding strength of the wafer is increased. In addition, it is possible to prevent the reliability of the semiconductor device from being lowered due to the occurrence of stress or the like in the wafer.

(Embodiment 3)
In the second embodiment, the semiconductor device manufacturing method using the apparatus for carrying and processing under reduced pressure except for the cleaning chamber and the load lock chamber has been described. However, in this embodiment, the pressure in the apparatus is reduced. First, for example, a case will be described in which a series of steps for attaching a wafer is performed by setting the atmospheric pressure to an inert gas atmosphere instead of the apparatus.

In the second embodiment, the gas containing moisture is discharged and the inside of the multi-chamber apparatus is depressurized. However, from the viewpoint of preventing moisture from adsorbing on the surface of the wafer, the inside of the apparatus is in an atmosphere that does not contain moisture. If it exists, it does not necessarily need to be a reduced pressure atmosphere. Therefore, in the present embodiment, the atmospheric pressure in the multi-chamber apparatus MC shown in FIG. 8 is set to atmospheric pressure, and N ₂ (nitrogen) gas, He (helium) gas, Ar (argon) gas, etc. are contained in the multi-chamber apparatus MC. A process similar to the process described with reference to FIG. 9 in the second embodiment is performed in a state filled with an inert gas or dry air containing no moisture.

  However, as in the first and second embodiments, the apparatus for plasma processing a wafer (plasma processing chamber CH2 shown in FIG. 8) depressurizes the inside when performing the plasma processing. In addition, since the inside of the transfer chamber CH7 is normal pressure, it is not necessary to evacuate the cleaning chamber CH6 one by one when the wafer is taken in and out of the cleaning chamber CH6. This is different from the second embodiment.

  In this embodiment, even if the inside of the multi-chamber apparatus is not in a reduced pressure atmosphere, it is possible to prevent gas components (moisture) and the like from being adsorbed on the surface of the wafer to be bonded. Can be obtained. Furthermore, it is not necessary to keep the reduced pressure atmosphere in the multi-chamber device, and the operation of reducing and increasing the pressure in some chambers can be omitted, so that the manufacturing cost of the semiconductor device can be reduced.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, the wafer bonding process of the above-described embodiment is not limited to the back-illuminated CMOS image sensor, but may be other devices, and can be applied to a method for manufacturing a semiconductor device including a wafer bonding process.

BOX Embedded oxide film BS Back surface CF Color filter CH1 Degassing chamber CH2 Plasma processing chamber CH3 Wafer temperature control chamber CH4 Wafer bonding chamber CH5 Wafer temperature control chamber CH6 Cleaning chamber CH7 Transport chamber CL Light shielding film FI Factory interface ILF Interlayer insulating film L1 L4 Insulating films M1 to M4 Wiring MC Multi-chamber device MSS Upper surface OL On-chip lens PD Photodiode PW Polysilicon wiring RB1, RB2 Transfer robot RC1, RC2 Load lock chamber RR Antireflection film SB1 Semiconductor substrate SL Silicon layer W1 First wafer (First semiconductor substrate)
W2 Second wafer (second semiconductor substrate)
WC Wafer storage cassette

Claims (7)

A semiconductor device manufacturing method including the following steps:
(A) a first semiconductor substrate made of single crystal silicon and having a first thickness, an oxide layer formed on the main surface of the first semiconductor substrate, a semiconductor layer formed on the oxide layer, A photodiode formed on the semiconductor layer, a first wafer formed on the semiconductor layer and having a first insulating layer made of a silicon oxide film or a silicon nitride film, and a second semiconductor substrate made of single crystal silicon And preparing a second wafer having:
(B) After the step (a), cleaning the surface of the first wafer and the surface of the second wafer, which are the surfaces of the first insulating layer;
(C) after the step (b), subjecting each of the first wafer and the second wafer to a heat treatment at 100 ° C. or higher;
(D) After the step (c), performing a plasma treatment on each of the surface of the first wafer and the surface of the second wafer;
(E) After the step (d), a step of bringing the surface of the first insulating layer, which is the surface of the first wafer, and the surface of the second wafer into contact with each other at a first temperature. ;
(F) After the step (e), in a state where the surface of the first insulating layer, which is the surface of the first wafer, and the surface of the second wafer are in contact with each other, Subjecting the second wafer to a heat treatment at a second temperature higher than the first temperature;
(G) After the step (f), by polishing the first back surface of the first semiconductor substrate opposite to the main surface, the thickness of the first semiconductor substrate is made to be greater than the first thickness. A step of reducing the thickness to a second thickness;
(H) After the step (g), an antireflection film, a second insulating layer, and a light shielding layer are formed on the second back surface of the first semiconductor substrate having the second thickness formed in the step (g). And sequentially forming an on-chip lens having a color filter therein,
here,
The second temperature used in the step (f) is 200 to 300 ° C.,
The first temperature used in the step (e) is a room temperature lower than the second temperature.   The method of manufacturing a semiconductor device according to claim 1, wherein the photodiode includes an n-type semiconductor layer and a p-type semiconductor layer formed in the semiconductor layer.   The method of manufacturing a semiconductor device according to claim 1, wherein a device or a wiring is formed on a main surface of the second semiconductor substrate.   The method of manufacturing a semiconductor device according to claim 1, wherein the room temperature is about 25 degrees.   The method for manufacturing a semiconductor device according to claim 1, wherein each of the step (c) and the step (d) is performed under reduced pressure. The first thickness is 3 digits μm;
The method of manufacturing a semiconductor device according to claim 1, wherein the second thickness is an order of magnitude μm. The first thickness is 750 μm;
The method of manufacturing a semiconductor device according to claim 6, wherein the second thickness is 3 μm.

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