JP2017143373A - A-d converter, control method for a-d converter, battery residual amount detection circuit having the same and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an A-D conversion circuit capable of A-D converting a plurality of analog signals at an appropriate frequency.SOLUTION: A multiplexer 104 receives a plurality of analog signals V1-VN. A main A-D converter 102 A-D converts an analog signal S2 selected by the multiplexer 104. An inclination detection part 110 detects each of inclinations α1-αN of the plurality of analog signals V1-VN. The controller 120 controls the multiplexer 104 and the main A-D converter 102. The controller 120 schedules A-D conversion of the main A-D converter 102 on the basis of a corresponding inclination αi, for respective analog signals Vi(i=1,2,...N).SELECTED DRAWING: Figure 1

Description

  The present invention relates to an A / D converter.

  In various electronic devices, A / D converters that convert analog signals representing these states into digital signals are used to perform digital signal processing on the electrical state of internal circuits and the physical state of electronic devices. The A / D converter has a large circuit area and is expensive. Therefore, when it is necessary to process a plurality of analog signals, a multiplexer (selector) is inserted in front of the A / D converter, and a plurality of electrical signals are selected by the multiplexer. A shared configuration may be employed.

  In such a combination circuit of a multiplexer and an A / D converter, a plurality of analog signals are generally switched sequentially for each A / D conversion or based on a pre-defined table.

Japanese Patent No. 4646285 Japanese Patent No. 5578066

  Conventionally, it has been necessary to determine which analog signal is to be measured at which period in the design stage or in the setup stage before the start of operation. However, in a situation where an analog signal whose time scale of fluctuation (that is, fluctuation speed) dynamically changes is measured, if the conversion period is fixed, the following problem occurs. For example, if the time scale of the fluctuation of the analog signal becomes longer than a predetermined conversion cycle, the same value is repeatedly converted even though the value does not substantially change compared to the previous conversion timing, Power consumption is wasted. On the contrary, if the time scale of the analog signal fluctuation becomes shorter than the predetermined conversion cycle, the high-speed fluctuation of the analog signal is missed.

  The present invention has been made in view of these problems, and one of the exemplary purposes of an aspect thereof is to provide an A / D conversion circuit capable of A / D converting a plurality of analog signals at an appropriate frequency. .

  One embodiment of the present invention relates to an A / D conversion device. The A / D converter includes a multiplexer that receives a plurality of analog signals, a main A / D converter that performs A / D conversion on the analog signals selected by the multiplexer, and an inclination detector that detects the inclination of each of the analog signals. And a controller for controlling the multiplexer and the A / D converter. The controller schedules A / D conversion of the main A / D converter for each analog signal based on the corresponding slope.

  According to this aspect, A / D conversion can be scheduled at an appropriate frequency by measuring a slope having a correlation with a time scale of fluctuation for each of a plurality of analog signals. Thereby, useless power consumption due to useless A / D conversion can be reduced. Moreover, when the time scale of fluctuation becomes short, it is possible to measure without missing a high-speed fluctuation of an analog signal by scheduling A / D conversion at a short time interval.

The inclination detection unit may include a sub A / D converter that performs A / D conversion on the analog signal selected by the multiplexer.
In order to detect the inclination, two A / D conversions are required. By assigning at least one of the two A / D conversions to the sub A / D converter, the number of empty slots in the main A / D converter can be increased.

For each channel, the A / D conversion by the sub A / D converter is scheduled after the A / D conversion by the main A / D converter, and the output data of the main A / D converter and the output of the sub A / D converter are scheduled. The inclination may be detected based on the data pair.
By assigning one of the two A / D conversions for inclination detection to the original A / D conversion by the main A / D converter, the number of conversions and power consumption can be reduced.

  The number of bits of the sub A / D converter may be smaller than the number of bits of the main A / D converter. As a result, the area of the sub A / D converter can be reduced or the power consumption can be reduced.

The controller may schedule the A / D conversion by the sub A / D converter twice continuously for each channel, and detect the inclination based on the two pairs of output data of the sub A / D converter. .
Thereby, the inclination can be detected irrespective of the original A / D conversion by the main A / D converter.

The main A / D converter may be a successive approximation type. For each channel, after the A / D conversion by the main A / D converter, the controller schedules the second A / D conversion by the main A / D converter with a smaller number of bits than the first A / D conversion. The inclination may be detected based on the two pairs of output data of the converter.
Since no sub A / D converter is required, an increase in circuit area can be suppressed.

  The A / D converter may be integrated on a single semiconductor substrate. “Integrated integration” includes the case where all of the circuit components are formed on a semiconductor substrate and the case where the main components of the circuit are integrated. A resistor, a capacitor, or the like may be provided outside the semiconductor substrate.

  Another embodiment of the present invention relates to a battery remaining amount detection (Fuel Gauge) circuit. The remaining amount detection circuit may include any of the A / D conversion devices described above.

  The plurality of analog signals input to the multiplexer of the A / D conversion device may include at least a signal indicating the charge / discharge current of the battery and a signal indicating the temperature of the battery.

  Note that any combination of the above-described constituent elements and the constituent elements and expressions of the present invention replaced with each other among methods, apparatuses, systems, and the like are also effective as an aspect of the present invention.

  According to the present invention, a plurality of analog signals can be A / D converted at an appropriate frequency.

It is a block diagram of the A / D conversion device concerning an embodiment. It is an operation | movement waveform diagram of the A / D converter of FIG. FIGS. 3A to 3C are diagrams schematically illustrating scheduling of A / D conversion of a plurality of analog signals. It is a block diagram which shows the 1st structural example of an A / D converter. FIG. 5A is an operation waveform diagram of the A / D conversion device according to the first configuration example, and FIG. 5B is an operation waveform diagram of the A / D conversion device according to the second configuration example. It is a block diagram which shows the 3rd structural example of an A / D converter. It is an operation | movement waveform diagram of the A / D converter which concerns on a 3rd structural example. It is a block diagram of a battery remaining amount detection circuit provided with an A / D conversion device.

  The present invention will be described below based on preferred embodiments with reference to the drawings. The same or equivalent components, members, and processes shown in the drawings are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate. The embodiments do not limit the invention but are exemplifications, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

In this specification, “the state in which the member A is connected to the member B” means that the member A and the member B are physically directly connected, or the member A and the member B are electrically connected to each other. Including the case of being indirectly connected through other members that do not substantially affect the state of connection, or do not impair the functions and effects achieved by the combination thereof.
Similarly, “the state in which the member C is provided between the member A and the member B” refers to the case where the member A and the member C or the member B and the member C are directly connected, as well as their electric It includes cases where the connection is indirectly made through other members that do not substantially affect the general connection state, or that do not impair the functions and effects achieved by their combination.

  Further, in this specification, a reference numeral attached to a voltage signal, a current signal, or a resistor represents a voltage value, a current value, or a resistance value as necessary.

  FIG. 1 is a block diagram of an A / D conversion apparatus 100 according to the embodiment. The A / D conversion apparatus 100 mainly includes a main A / D converter 102, a multiplexer 104, a tilt detection unit 110, and a controller 120. Preferably, the A / D conversion apparatus 100 is integrated on a single semiconductor substrate alone or together with other circuit blocks.

  The A / D conversion apparatus 100 includes a plurality of N (N is an integer of 2 or more) analog input ports PORT1 to PORTN, and can input a plurality of analog signals V1 to VN to be measured. The multiplexer 104 receives a plurality of analog signals V1 to VN and selects one corresponding to the control signal S1. The type and nature of the analog signal are not particularly limited. For example, the plurality of analog signals may include a signal indicating an electrical state, such as a current detection signal indicating a current flowing through a predetermined node and a voltage detection signal indicating a voltage generated at the predetermined node. Alternatively, the plurality of analog signals include a signal indicating a physical state, such as a signal from a temperature sensor (thermistor, posistor, thermocouple), a signal from a gyro sensor, an acceleration sensor, a speed sensor, or a signal from a motor rotation sensor. But you can.

  The main A / D converter 102 receives the analog signal S2 selected by the multiplexer 104 and converts it into a digital signal S4 in response to an A / D conversion timing signal S3. The controller 120 generates a control signal S1 and a timing signal S3, and controls the multiplexer 104 and the main A / D converter 102. The main A / D converter 102 may be, for example, a successive approximation type, but is not limited thereto, and a flash type, an inclined type, a ΔΣ type, or the like may be used.

  The inclination detection unit 110 detects inclinations α1 to αN of the plurality of analog signals V1 to VN, and detects data indicating inclination (referred to as inclination data) S6. The inclination data S6 is input to the controller 120. Since the controller 120 knows which port of the analog signal is currently selected by the multiplexer 104, the controller 120 can know what number of analog signal the inclination of the inclination data S6 represents. For each analog signal Vi (1 ≦ i ≦ N), the controller 120 schedules the detected A / D conversion of the main A / D converter 102 based on the corresponding gradient αi indicated by the gradient data S6. Although the tilt detection timing by the tilt detection unit 110 is not particularly limited, in this embodiment, the tilt is detected for each A / D conversion by the main A / D converter 102, and the following is performed based on the obtained tilt α. Assume that A / D conversion is scheduled. The controller 120 may store the slope α and the time interval of A / D conversion in a table, or may define a function with the slope α as an argument to calculate the time interval.

  The ADC interface 130 and the data register 132 are interface circuits for passing the output data S4 of the main A / D converter 102 to the subsequent block, and are optional. The ADC interface 130 writes the output data S4 of the main A / D converter 102 in the data register 132 indicated by the control signal S5 from the controller 120. For example, the data register 132 may include a plurality of data registers corresponding to a plurality of ports, and the output data S4 obtained for the i-th port may be stored in the i-th data register. Alternatively, the ADC interface 130 may store the sequentially generated output data S4 in a plurality of data registers in chronological order.

  The above is the configuration of the A / D conversion device 100. Next, the operation will be described. FIG. 2 is an operation waveform diagram of the A / D conversion apparatus 100 of FIG. FIG. 2 shows the operation of one analog signal V1.

(Step i) When the timing signal S3 is asserted, the analog signal V1 at that time is A / D converted to generate a digital signal S4.
(Step ii) Subsequently, the inclination of the analog signal V1 is detected, and the inclination data S6 is updated.
(Step iii) The timing of the next A / D conversion is scheduled based on the updated inclination data S6. Specifically, the period until the next A / D conversion is scheduled to be shorter as the absolute value of the slope is larger, and is scheduled to be longer as the absolute value of the slope is smaller.
The above is the operation of one cycle. In (step i) of the next cycle, the timing signal S3 is asserted at the timing scheduled in (step iii) of the previous cycle. The A / D conversion apparatus 100 repeats this operation.

  FIG. 2 shows only the operation related to one analog signal V1, but actually, the same processing is performed in parallel for a plurality of analog signals V1 to VN, and the time of fluctuation of each analog signal is shown. The timing of A / D conversion is appropriately adjusted according to the scale.

  FIGS. 3A to 3C are diagrams schematically illustrating scheduling of A / D conversion of a plurality of analog signals. Here, N = 3 is taken as an example. Three A / D conversions are considered as one set. In FIG. 3A, the conversion of the analog signals V1 and V3 is scheduled once per set, and the conversion of the analog signal V2 is scheduled once every three sets. In FIG. 3B, the conversion of the analog signals V1 and V2 is scheduled once every two sets, and the conversion of the analog signal V3 is scheduled once every set. In FIG. 3C, the conversion of the analog signal V1 is scheduled less frequently, and the conversion of the analog signals V2 and V3 is scheduled once per set.

  According to the A / D conversion device 100 according to the embodiment, it is possible to reduce wasteful power consumption due to wasteful A / D conversion. Moreover, when the time scale of fluctuation becomes short, it is possible to measure without missing a high-speed fluctuation of an analog signal by scheduling A / D conversion at a short time interval.

  The present invention is understood as the block diagram and circuit diagram of FIG. 1 or extends to various devices and circuits derived from the above description, and is not limited to a specific configuration. Hereinafter, more specific configuration examples will be described in order not to narrow the scope of the present invention but to help understanding and clarify the essence and circuit operation of the present invention.

(First configuration example)
FIG. 4 is a block diagram illustrating a first configuration example of the A / D conversion apparatus 100. The inclination detection unit 110 includes a sub A / D converter 112 that performs A / D conversion on the analog signal S2 selected by the multiplexer 104. Since the slope does not require so high accuracy, the sub A / D converter 112 may be configured with a lower number of bits than the main A / D converter 102. Thereby, the circuit area of the sub A / D converter 112 can be reduced, and the power consumption thereof can be reduced.

  The controller 120 schedules A / D conversion by the sub A / D converter 112 after A / D conversion by the main A / D converter 102 for each channel. The controller 120 generates a timing signal S7 generated by the controller 120. A digital signal S8 that is output data of the sub A / D converter 112 is input to the arithmetic unit 114.

The calculation unit 114 calculates the inclination α based on a pair of the output data S4 of the main A / D converter 102 and the output data S8 of the sub A / D converter 112.
α = (S4−S8) / Δt
Δt is a time difference between the conversion timing by the main A / D converter 102 and the conversion timing by the sub A / D converter 112. The time difference Δt may be given from the controller 120. Alternatively, when the controller 120 always controls the time difference Δ to be constant, division by Δt is unnecessary, and (S4−S8) can be used as a value indicating the slope. Note that the arithmetic unit 114 and the controller 120 may be configured with hardware, or may be configured with a microcomputer or processor controlled by software.

  FIG. 5A is an operation waveform diagram of the A / D conversion device 100 according to the first configuration example. When the timing signal S3 is asserted, the operation of the main A / D converter 102 starts, and the output data S4 is determined after the conversion period has elapsed. Subsequently, when the controller 120 asserts the timing signal S7 after the elapse of time Δt, the sub A / D converter 112 starts operating, and the output data S8 is determined after the conversion period elapses. When the values of the digital signals S4 and S8 are determined, the calculation unit 114 calculates the inclination, and the inclination data S6 is generated.

  In order to detect the inclination, two A / D conversions are required for the same analog signal. By assigning the second A / D conversion to the sub A / D converter 112, the empty slots of the main A / D converter 102 can be increased.

(Second configuration example)
A second configuration example will be described with reference to FIG. The output data S4 of the main A / D converter 102 is not input to the arithmetic unit 114, but only the output data S8 of the sub A / D converter 112 is input. The controller 120 schedules the A / D conversion by the sub A / D converter 112 twice in succession for each channel. The arithmetic unit 114 detects the inclination based on the pair of the two output data S8_1 and S8_2 of the sub A / D converter 112.
α = (S8_2−S8_1) / Δt

  FIG. 5B is an operation waveform diagram of the A / D conversion device 100 according to the second configuration example. In a situation where tilt is required, the controller 120 asserts the timing signal S7 and instructs the sub A / D converter 112 to perform the first A / D conversion. Thus, the first output data S8_1 is generated. Subsequently, after the lapse of Δt, the timing signal S7 is asserted to instruct the sub A / D converter 112 to perform the second A / D conversion. Thereby, the second output data S8_2 is generated. The calculation unit 114 calculates the inclination data S6 from the two output data.

  When the time interval of A / D conversion of the main A / D converter 102 is set wide, in the first configuration example, when the time scale of the fluctuation of the analog signal becomes short during the wide time interval, Response may be delayed. On the other hand, according to the second configuration example, the inclination detection timing can be freely set without being restricted by the A / D conversion timing of the main A / D converter 102, so that the response delay can be suppressed.

  In the second configuration example, as in the first configuration example, each time the A / D conversion is performed by the main A / D converter 102, the sub A / D converter 112 may be operated twice to detect the inclination.

(Third configuration example)
FIG. 6 is a block diagram illustrating a third configuration example of the A / D conversion apparatus 100. In the third configuration example, the sub A / D converter 112 is not provided, and the main A / D converter 102 is used to acquire the inclination. The main A / D converter 102 is a successive approximation type. The controller 120 schedules the second A / D conversion for inclination detection by the main A / D converter 102 after the original A / D conversion by the main A / D converter 102 for each channel. The second A / D conversion is performed with a smaller number of bits than the first. The inclination detection unit 110 calculates an inclination based on a pair of two output data S4_1 and S4_2 of the main A / D converter 102.

  FIG. 7 is an operation waveform diagram of the A / D conversion device 100 according to the third configuration example. In order to perform the original A / D conversion, the controller 120 asserts the timing signal S3 and causes the main A / D converter 102 to generate the digital signal S4_1. The digital signal S4_1 is supplied to the subsequent circuit block via the ADC interface 130 and the data register 132 of FIG. Then, after Δt has elapsed, the controller 120 asserts the timing signal S3 again, and causes the main A / D converter 102 to generate the digital signal S4_2. In the second A / D conversion, the successive approximation process is stopped halfway, and therefore the conversion time τ2 is shorter than that of the first time τ1. The calculation unit 114 calculates the inclination data S6 based on the two output data S4_1 and S4_2.

  According to the third configuration example, since the sub A / D converter 112 is not necessary, the circuit area can be reduced. Further, since the second A / D conversion operates with a small number of bits, the power consumption can be made comparable to that of the sub A / D converter.

  Next, the application of the A / D conversion apparatus 100 will be described. The A / D conversion apparatus 100 is suitable for an application that senses an electrical state or a physical state in which a time scale of change dynamically changes. As such an application, there is a battery remaining amount detection.

FIG. 8 is a block diagram of a remaining battery level detection circuit 200 including the A / D conversion device 100. The electronic device 300 includes a battery 302, a charging circuit 304, a power supply circuit 306, and a battery remaining amount detection circuit 200. Charging circuit 304 receives external voltage V _EXT and charges battery 302. The power supply circuit 306 receives the battery voltage _VBAT or the external voltage _VEXT , boosts or steps down the voltage, and supplies the power supply voltage V _DD to a load (not shown). The battery remaining amount detection circuit 200 detects a state of charge (SOC) of the battery 302. For example, a battery voltage V _BAT , a current detection signal V _CS indicating the charge / discharge current of the battery 302, and a temperature detection signal V _TS indicating the temperature of the battery 302 are input to the battery remaining amount detection circuit 200. The current detection signal V _CS is a voltage drop of the sense resistor _RS inserted in series with the battery 302, for example. The temperature detection signal _VTS is generated by a temperature sensor 308 such as a thermistor or a thermocouple. The battery remaining amount detection circuit 200 includes the A / D conversion device 100 described above. The A / D converter 100 receives the battery voltage V _BAT , the current detection signal V _CS , and the temperature detection signal V _TS and converts them into digital values. That is, the battery voltage V _BAT , the current detection signal V _CS , and the temperature detection signal V _TS correspond to the above-described analog signals V1 to V3.
The calculation unit 202 estimates the remaining amount of the battery 302 based on the battery voltage, current value, and temperature measured by the A / D conversion device 100. There are several methods for estimating the remaining amount of the battery 302. For example, a method based on an open circuit voltage (OCV) measured in a no-load state of the battery or a Coulomb count method for integrating charge / discharge current is used. be able to.

The changing speed of the battery voltage V _BAT varies depending on the state of the electronic device 300. For example, when the electronic device 300 is a communication terminal, the battery voltage V _BAT changes on a short time scale when the electronic device 300 is operated at a high load or during rapid charging. On the other hand, when the electronic device 300 is not used, that is, in the sleep state, the rate of change of the battery voltage V _BAT becomes extremely slow. In addition, the time scale of fluctuation also changes dynamically with respect to temperature.

  Conventionally, the calculation unit 202 has to adjust the timing of A / D conversion in accordance with the change speed of each analog signal. On the other hand, the A / D conversion device 100 according to the embodiment automatically adjusts the interval of A / D conversion, so that the calculation load on the calculation unit 202 can be reduced.

  Although the present invention has been described using specific terms based on the embodiments, the embodiments only illustrate the principles and applications of the present invention, and the embodiments are defined in the claims. Many variations and modifications of the arrangement are permitted without departing from the spirit of the present invention.

DESCRIPTION OF SYMBOLS 100 ... A / D converter, 102 ... Main A / D converter, 104 ... Multiplexer, 110 ... Inclination detection part, 112 ... Sub-A / D converter, 114 ... Operation part, 120 ... Controller, 130 ... ADC interface, 132 ... Data register, S1 ... control signal, S2 ... analog signal, S3 ... timing signal, S4 ... digital signal, S5 ... control signal, S6 ... tilt data, S7 ... timing signal, S8 ... digital signal, 200 ... battery remaining amount detection circuit , 202 ... arithmetic unit, 300 ... electronic device, 302 ... battery, 304 ... charging circuit, 306 ... power supply circuit, 308 ... temperature sensor.

Claims (11)

A multiplexer for receiving a plurality of analog signals;
A main A / D converter for A / D converting the analog signal selected by the multiplexer;
An inclination detector for detecting the inclination of each of the plurality of analog signals;
A controller for controlling the multiplexer and the main A / D converter;
With
The controller schedules A / D conversion of the main A / D converter for each analog signal based on a corresponding inclination.   The A / D converter according to claim 1, wherein the inclination detection unit includes a sub A / D converter that performs A / D conversion on the analog signal selected by the multiplexer. The controller is
For each channel, after A / D conversion by the main A / D converter, A / D conversion by the sub A / D converter is scheduled,
3. The A / D converter according to claim 2, wherein the inclination is detected based on a pair of output data of the main A / D converter and output data of the sub A / D converter.   4. The A / D converter according to claim 2, wherein the number of bits of the sub A / D converter is smaller than the number of bits of the main A / D converter. The controller is
For each channel, schedule the A / D conversion by the sub A / D converter twice in succession,
3. The A / D converter according to claim 2, wherein the inclination is detected based on a pair of output data of the sub A / D converter twice. The main A / D converter is a successive approximation type,
The controller is
For each channel, after the A / D conversion by the main A / D converter, the second A / D conversion by the main A / D converter is scheduled with a smaller number of bits than the first,
2. The A / D converter according to claim 1, wherein the inclination is detected based on a pair of output data of the main A / D converter twice.   7. The A / D converter according to claim 1, wherein the A / D converter is integrated on a single semiconductor substrate.   A battery remaining amount detection circuit comprising the A / D conversion device according to claim 1.   9. The plurality of analog signals input to the multiplexer of the A / D converter include at least a signal indicating a charge / discharge current of a battery and a signal indicating a temperature of the battery. The remaining battery level detection circuit as described. Battery,
A charging circuit for charging the battery;
The remaining battery level detection circuit according to claim 8 or 9, wherein the remaining battery level is detected.
An electronic device comprising: A method for controlling an A / D conversion device, comprising:
The A / D converter is
A multiplexer for receiving a plurality of analog signals;
A main A / D converter for A / D converting the analog signal selected by the multiplexer;
With
The control method is:
Detecting a slope of each of the plurality of analog signals;
Scheduling, for each analog signal, A / D conversion of the main A / D converter based on the detected slope;
A control method comprising:

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