JP2017135197A - Circuit board - Google Patents

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JP2017135197A
JP2017135197A JP2016012509A JP2016012509A JP2017135197A JP 2017135197 A JP2017135197 A JP 2017135197A JP 2016012509 A JP2016012509 A JP 2016012509A JP 2016012509 A JP2016012509 A JP 2016012509A JP 2017135197 A JP2017135197 A JP 2017135197A
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layer
circuit
circuit board
substrate
region
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友里 竹村
Yuri Takemura
友里 竹村
猛 宗石
Takeshi Muneishi
猛 宗石
甫 戸田
Hajime Toda
甫 戸田
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Kyocera Corp
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Kyocera Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector

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Abstract

PROBLEM TO BE SOLVED: To provide a circuit board excellent in thermal reliability in which a circuit layer is hardly peeled off from a substrate even by repeated temperature cycles.SOLUTION: The circuit board includes: a substrate made of silicon nitride ceramics; a first layer located on the substrate; a second layer formed on the first layer and containing titanium as a main component; and a circuit layer located on the second layer. The main component in the first layer is aluminum oxide. In the circuit board, the circuit layer is less likely to peel off from the substrate even under repeated temperature cycles. The circuit board is excellent in thermal reliability.SELECTED DRAWING: Figure 1

Description

本開示は、回路基板に関する。   The present disclosure relates to circuit boards.

半導体素子等の電子部品の搭載に、セラミックスからなる基体上に金属からなる回路層が形成された回路基板が用いられている。使用にあたって電子部品から生じる熱は回路層を介して基体に伝わるものであり、使用前後と使用中とでは温度差があるため、回路基板は繰り返し温度サイクルを受ける。そのため、このような回路基板では、基体と回路層との接合強度を高めるため、基体を構成するセラミックスおよび回路層を構成する金属の両方と高い密着性を有するチタンを主成分とする層が、基体と回路層との間に設けられている（特許文献１参照）。   A circuit board in which a circuit layer made of metal is formed on a base made of ceramic is used for mounting electronic parts such as semiconductor elements. In use, heat generated from the electronic component is transferred to the substrate through the circuit layer, and there is a temperature difference between before and after use and during use, so the circuit board is repeatedly subjected to a temperature cycle. Therefore, in such a circuit board, in order to increase the bonding strength between the base body and the circuit layer, a layer mainly composed of titanium having high adhesion to both the ceramics constituting the base body and the metal constituting the circuit layer, It is provided between a base | substrate and a circuit layer (refer patent document 1).

特開２００７−１０９８５８号公報JP 2007-109858 A

近年、回路基板の薄型化・小型化が進んでおり、優れた機械的強度および放熱性を有する基体が必要であることから、セラミックスの中でも、高い機械的強度および高い熱伝導率を有する窒化珪素質セラミックス採用されてきている。しかしながら、窒化珪素質セラミックスとチタンとは密着性が高くないため、窒化珪素質セラミックスを基体として用いる構成において、回路層が剥離しにくく、熱的信頼性に優れた回路基板が求められている。   In recent years, circuit boards have been made thinner and smaller, and a substrate having excellent mechanical strength and heat dissipation is required. Therefore, among ceramics, silicon nitride having high mechanical strength and high thermal conductivity. Ceramics have been adopted. However, since silicon nitride ceramics and titanium do not have high adhesion, there is a need for a circuit board having excellent thermal reliability because the circuit layer is difficult to peel off in a configuration using silicon nitride ceramics as a substrate.

本発明は、このような事情に鑑みて案出されたものであり、繰り返される温度サイクルによっても、基体から回路層が剥離しにくく、熱的信頼性に優れた回路基板を提供するものである。   The present invention has been devised in view of such circumstances, and provides a circuit board having excellent thermal reliability in which a circuit layer is hardly peeled off from a substrate even by repeated temperature cycles. .

本開示の回路基板は、窒化珪素質セラミックスからなる基体と、該基体上に位置する第１層と、該第１層上に位置するチタンを主成分とする第２層と、該第２層上に位置する回路層とを備え、前記第１層は、酸化アルミニウムを主成分とするものである。   A circuit board according to the present disclosure includes a base made of silicon nitride ceramics, a first layer located on the base, a second layer mainly containing titanium located on the first layer, and the second layer And the first layer is mainly composed of aluminum oxide.

本開示の回路基板は、繰り返される温度サイクルによっても、基体から回路層が剥離しにくく、熱的信頼性に優れる。   The circuit board of the present disclosure is excellent in thermal reliability because the circuit layer hardly peels from the base body even by repeated temperature cycles.

本実施形態の回路基板の一例を示す断面図である。It is sectional drawing which shows an example of the circuit board of this embodiment.

以下、本実施形態の一態様の回路基板について、図１を参照しながら説明する。   Hereinafter, a circuit board of one embodiment of the present embodiment will be described with reference to FIG.

本実施形態の一態様の回路基板１０は、窒化珪素質セラミックスからなる基体１と、基体１上に位置する第１層２と、第１層２上に位置するチタンを主成分とする第２層３と、第２層３上に位置する回路層４とを備えている。   The circuit board 10 according to one aspect of the present embodiment includes a base body 1 made of silicon nitride ceramics, a first layer 2 located on the base body 1, and a second layer mainly composed of titanium located on the first layer 2. A layer 3 and a circuit layer 4 located on the second layer 3 are provided.

ここで、窒化珪素質セラミックスとは、窒化珪素質セラミックスを構成する全成分１００質量％のうち、窒化珪素が８０質量％以上を占めるものである。そして、窒化珪素質セラミックスであるか否かは、以下の方法により確認することができる。まず、Ｘ線回折装置（ＸＲＤ）を用いて測定し、得られた２θ（２θは、回折角度である。）の値よりＪＣＰＤＳカードを用いて同定することにより、窒化珪素の存在を確認する。次に、ＩＣＰ（Inductively Coupled Plasma）発光分光分析装置（ＩＣＰ）を用いて、珪素（Ｓｉ）の定量分析を行なう。そして、ＩＣＰで測定して得られた珪素の含有量を窒化珪素（Ｓｉ３Ｎ４）に換算し、窒化珪素の含有量が８０質量％以上であれば、窒化珪素質セラミックスである。 Here, the silicon nitride ceramics are those in which silicon nitride occupies 80% by mass or more out of 100% by mass of all components constituting the silicon nitride ceramics. And it can be confirmed with the following method whether it is silicon nitride ceramics. First, measurement is performed using an X-ray diffractometer (XRD), and the presence of silicon nitride is confirmed by identifying the obtained 2θ (2θ is a diffraction angle) using a JCPDS card. Next, quantitative analysis of silicon (Si) is performed using an ICP (Inductively Coupled Plasma) emission spectroscopic analyzer (ICP). And if silicon content obtained by measuring by ICP is converted into silicon nitride (Si 3 N 4 ) and the silicon nitride content is 80% by mass or more, it is silicon nitride ceramics.

また、第２層３における主成分とは、第２層３を構成する全成分１００質量％のうち、５０質量％を超える成分のことである。   The main component in the second layer 3 is a component exceeding 50% by mass out of 100% by mass of all components constituting the second layer 3.

また、第１層２は、酸化アルミニウムを主成分とする層である。ここで、第１層２における主成分とは、第１層２を構成する全成分１００質量％のうち、５０質量％を超える成分のことである。   The first layer 2 is a layer mainly composed of aluminum oxide. Here, the main component in the 1st layer 2 is a component exceeding 50 mass% among 100 mass% of all the components which comprise the 1st layer 2. FIG.

本実施形態の回路基板１０は、窒化珪素質セラミックスからなる基体１とチタンを主成分とする第２層３との間に第１層２が位置している。第１層２は、酸化アルミニウムを主成分とし、窒化珪素およびチタンの両方と密着性がよいことから、基体１と第２層３とは強固に接合される。よって、本実施形態の回路基板１０は、繰り返される温度サイクルによっても、基板１から回路層４が剥離しにくく、熱的信頼性に優れている。   In the circuit board 10 of the present embodiment, the first layer 2 is located between the base body 1 made of silicon nitride ceramics and the second layer 3 mainly composed of titanium. Since the first layer 2 is mainly composed of aluminum oxide and has good adhesion to both silicon nitride and titanium, the substrate 1 and the second layer 3 are firmly bonded. Therefore, the circuit board 10 of this embodiment is excellent in thermal reliability because the circuit layer 4 is hardly peeled off from the board 1 even by repeated temperature cycles.

そして、酸化アルミニウムを主成分とする第１層２およびチタンを主成分とする第２層３の存在の確認は、以下の方法で行なえばよい。   The presence of the first layer 2 mainly composed of aluminum oxide and the second layer 3 mainly composed of titanium may be confirmed by the following method.

まず、図１に示すような断面形状となるように、回路基板１０を切断する。そして、この切断面を、クロスセクションポリッシャー（ＣＰ）を用いて研磨するか、または集束イオンビーム（ＦＩＢ）を用いて加工することで観察面を得る。次に、この観察面を、走査型電子顕微鏡（ＳＥＭ）または透過型電子顕微鏡（ＴＥＭ）に付設の電子線マイクロアナライザー（ＥＰＭＡ）を用いて線分析を行なう。なお、ＥＰＭＡの線分析とは、２次元分析法と言われるものであり、直線状に測定位置を変化させることにより、含有成分の含有量の分布の相対的変化を確認することができるものである。   First, the circuit board 10 is cut so as to have a cross-sectional shape as shown in FIG. Then, the cut surface is polished using a cross section polisher (CP) or processed using a focused ion beam (FIB) to obtain an observation surface. Next, the observation surface is subjected to line analysis using an electron beam microanalyzer (EPMA) attached to a scanning electron microscope (SEM) or a transmission electron microscope (TEM). The EPMA line analysis is a so-called two-dimensional analysis method, in which the relative change in the content distribution of the contained components can be confirmed by changing the measurement position linearly. is there.

基体１上の構成において主成分が異なる場合には、ＳＥＭまたはＴＥＭの観察における色調差により主成分が異なる領域の存在を確認することができる。例えば、主成分が酸化アルミニウムである領域と、主成分がチタンである領域とが層状に存在するときには、ＳＥＭまたはＴＥＭの観察により層の存在を確認することができる。このように、層の存在が確認できた場合には、回路層４側から基体１側に、若しくは基体側から回路層４側に向かって線分析を行ない、アルミニウムと酸素とが同時に検出され、アルミニウムの含有量から酸化アルミニウム（Ａｌ２Ｏ３）に換算した値が５０質量％を超える領域が第１層２である。また、線分析により、チタンが検出され、チタンの含有量が５０質量％を超える領域が第２層３である。 When the main component is different in the configuration on the substrate 1, it is possible to confirm the existence of a region having a different main component due to a color tone difference in observation with an SEM or TEM. For example, when the region where the main component is aluminum oxide and the region where the main component is titanium are present in layers, the presence of the layer can be confirmed by SEM or TEM observation. Thus, when the presence of the layer can be confirmed, a line analysis is performed from the circuit layer 4 side to the substrate 1 side or from the substrate side to the circuit layer 4 side, and aluminum and oxygen are detected at the same time. A region where the value converted from aluminum content to aluminum oxide (Al 2 O 3 ) exceeds 50 mass% is the first layer 2. The region where titanium is detected by line analysis and the titanium content exceeds 50 mass% is the second layer 3.

なお、上記方法以外に、ＳＥＭまたはＴＥＭに付設のエネルギー分散型Ｘ線分光器（ＥＤＳ）を用いて、第１層２および第２層３の存在の確認を行なってもよい。まず、ＥＤＳにより、観察面における基体１側から回路層４側にかけて、一定間隔（例えば、１０ｎｍ）毎にスポット（φ１０ｎｍ）を当て、そのスポットにおける組成を確認することにより、第１層２および第２層３の存在の確認を行なってもよい。ここで、アルミニウムと酸素
とが同時に検出され、アルミニウムの含有量から酸化アルミニウムに換算した値が５０質量％を超えているスポットが、基体１との界面に沿って３カ所以上存在するときには、その領域を第１層２とみなしてよい。また、チタンが検出され、チタンの含有量が５０質量％を超えているスポットが、基体１との界面に沿って３カ所以上存在するときには、その領域を第２層３とみなしてよい。 In addition to the above method, the presence of the first layer 2 and the second layer 3 may be confirmed using an energy dispersive X-ray spectrometer (EDS) attached to the SEM or TEM. First, by applying spots (φ10 nm) at regular intervals (for example, 10 nm) from the substrate 1 side to the circuit layer 4 side on the observation surface by EDS, and confirming the composition at the spots, the first layer 2 and the second layer The presence of the two layers 3 may be confirmed. Here, when aluminum and oxygen are detected at the same time and there are three or more spots along the interface with the substrate 1 where the value converted from aluminum content to aluminum oxide exceeds 50 mass%, The region may be regarded as the first layer 2. Further, when there are three or more spots where titanium is detected and the titanium content exceeds 50 mass% along the interface with the substrate 1, the region may be regarded as the second layer 3.

また、第１層２の厚みは、例えば、５０ｎｍ以上２０００ｎｍ以下である。第１層２の厚みが５０ｎｍ以上２０００ｎｍ以下であるときには、回路層４と基体１との間の熱伝達の阻害を抑制しつつ、基体１および第２層３との密着性を高くできる。   Moreover, the thickness of the 1st layer 2 is 50 nm or more and 2000 nm or less, for example. When the thickness of the first layer 2 is not less than 50 nm and not more than 2000 nm, the adhesion between the substrate 1 and the second layer 3 can be enhanced while inhibiting the heat transfer between the circuit layer 4 and the substrate 1.

また、第２層３の厚みは、例えば、５０ｎｍ以上２０００ｎｍ以下である。第２層３の厚みが５０ｎｍ以上２０００ｎｍ以下であるときには、第１層２および回路層４との密着性を高くできる。   The thickness of the second layer 3 is, for example, not less than 50 nm and not more than 2000 nm. When the thickness of the second layer 3 is 50 nm or more and 2000 nm or less, the adhesion between the first layer 2 and the circuit layer 4 can be increased.

また、回路層４は、例えば、回路層４を構成する全成分１００質量％のうち、銅を８０質量％以上含有する金属層である。このように、回路層４が、低い電気抵抗率および高い熱伝導率を有する銅を８０質量％以上含有していれば、回路層４に大電流を流しても、回路層４の温度が過度に上昇することを抑制することできる。なお、回路層４を構成する成分は、ＩＣＰを用いて分析すればよい。   Moreover, the circuit layer 4 is a metal layer which contains 80 mass% or more of copper among 100 mass% of all the components which comprise the circuit layer 4, for example. Thus, if the circuit layer 4 contains 80% by mass or more of copper having a low electrical resistivity and a high thermal conductivity, the temperature of the circuit layer 4 is excessive even when a large current is passed through the circuit layer 4. Can be prevented from rising. In addition, what is necessary is just to analyze the component which comprises the circuit layer 4 using ICP.

また、回路層４の厚みは、例えば、１００μｍ以上である。特に、回路層４の放熱性を高める観点によれば、回路層４の厚みは３００μｍ以上である。   Moreover, the thickness of the circuit layer 4 is 100 micrometers or more, for example. In particular, according to the viewpoint of improving the heat dissipation of the circuit layer 4, the thickness of the circuit layer 4 is 300 μm or more.

また、第１層２が、基体１との界面側にあたる第１領域に珪素の窒化物を含有しているときには、基体１と第１領域との熱膨張係数が近似し、熱膨張係数の差に起因するクラックの発生が抑制されるため、繰り返される温度サイクルによっても、基体１から第１層２がより剥離しにくくなる。ここで、第１領域とは、第１層２において、基体１との界面から第２層３側にかけて１５ｎｍまでの領域のことである。   Further, when the first layer 2 contains silicon nitride in the first region corresponding to the interface with the substrate 1, the thermal expansion coefficients of the substrate 1 and the first region approximate to each other, and the difference in the thermal expansion coefficients. Since the occurrence of cracks due to the above is suppressed, the first layer 2 becomes more difficult to peel from the substrate 1 even by repeated temperature cycles. Here, the first region is a region in the first layer 2 up to 15 nm from the interface with the substrate 1 to the second layer 3 side.

なお、第１領域における珪素の窒化物の存在の確認は、以下の方法で行なえばよい。まず、上述した観察面を準備し、ＳＥＭまたはＴＥＭを用いて、基体１との界面から第２層３側にかけて１５ｎｍまでの領域（第１領域）を観察する。そして、この第１領域にスポット（φ１０ｎｍ）を当て、そのスポットにおける組成を確認する。そして、珪素および窒素が同時に検出されるか否かで珪素の窒化物の存在を確認できる。   The presence of silicon nitride in the first region may be confirmed by the following method. First, the above-described observation surface is prepared, and a region (first region) of up to 15 nm is observed from the interface with the substrate 1 to the second layer 3 side using SEM or TEM. Then, a spot (φ10 nm) is applied to the first region, and the composition at the spot is confirmed. The presence of silicon nitride can be confirmed by whether silicon and nitrogen are detected simultaneously.

また、第１層２は、第２層３との界面側にあたる第２領域にチタンを含有していてもよい。一方、第２層３は、第１層２との界面側にあたる第３領域に酸化アルミニウムを含有していてもよい。ここで、第２領域とは、第１層２において、第２層３との界面から基体１側にかけて１５ｎｍまでの領域のことである。また、第３領域とは、第２層３において、第１層２との界面から回路層４側にかけて１５ｎｍまでの領域のことである。このような構成を満たせば、第２領域と第３領域との熱膨張係数が近似し、熱膨張係数の差に起因するクラックの発生が抑制されるため、繰り返される温度サイクルによって、第１層２から第２層３がより剥離しにくくなる。   The first layer 2 may contain titanium in the second region corresponding to the interface side with the second layer 3. On the other hand, the second layer 3 may contain aluminum oxide in a third region corresponding to the interface side with the first layer 2. Here, the second region is a region up to 15 nm in the first layer 2 from the interface with the second layer 3 to the substrate 1 side. The third region is a region in the second layer 3 that extends from the interface with the first layer 2 to the circuit layer 4 side up to 15 nm. If such a configuration is satisfied, the thermal expansion coefficients of the second region and the third region are approximated, and the occurrence of cracks due to the difference in the thermal expansion coefficient is suppressed. 2 to 2nd layer 3 becomes more difficult to peel.

ここで、第２領域におけるチタンおよび第３領域における酸化アルミニウムの存在の確認は、以下の方法で行なえばよい。まず、上述した観察面を準備し、ＳＥＭまたはＴＥＭに付随のＥＤＳによって、第２領域および第３領域にスポット（φ１０ｎｍ）を当て、そのスポットにおける組成を確認する。そして、第２領域においてチタンが検出されるか否かで第２領域におけるチタンの存在を確認できる。また、第３領域においてアルミニウムおよび酸素が同時に検出されたら、酸化アルミニウムが第３領域に存在するとみなしてよ
い。 Here, the presence of titanium in the second region and aluminum oxide in the third region may be confirmed by the following method. First, the observation surface described above is prepared, a spot (φ10 nm) is applied to the second region and the third region by EDS attached to the SEM or TEM, and the composition at the spot is confirmed. The presence of titanium in the second region can be confirmed based on whether titanium is detected in the second region. Further, if aluminum and oxygen are simultaneously detected in the third region, it may be considered that aluminum oxide is present in the third region.

また、本実施形態の一態様の回路基板１０は、基体１の内部に流路を備えていてもよい。このような構成ならば、流路に気体や液体等の流体を流すことで、回路基板１０の温度調整を容易に行なうことが可能となる。   In addition, the circuit board 10 according to one aspect of the present embodiment may include a flow path inside the base body 1. With such a configuration, it is possible to easily adjust the temperature of the circuit board 10 by flowing a fluid such as gas or liquid through the flow path.

次に、本実施形態の一態様の回路基板１０の製造方法の一例について説明する。   Next, an example of a method for manufacturing the circuit board 10 according to one embodiment of the present embodiment will be described.

まず、主成分である窒化珪素粉末を用意し、これに焼結助剤、溶媒および有機バインダを所定量添加して、ボールミルやビーズミル等を用いて所定の粒径となるまで粉砕することで、スラリーを作製する。   First, by preparing a silicon nitride powder as a main component, adding a predetermined amount of a sintering aid, a solvent and an organic binder to this, and pulverizing it to a predetermined particle size using a ball mill or a bead mill, Make a slurry.

次に、このスラリーを用いて、公知のドクターブレード法によってグリーンシートとし、加圧プレス法で成形することにより成形体を得る。または、スラリーを噴霧乾燥した顆粒を用いて、ロールコンパクション法によってグリーンシートとし、加圧プレス法で成形することにより成形体を得る。さらには、冷間等方圧成型（ＣＩＰ）法で成形した後、切削加工により成形体を得たり、上述した原料を用いて作製した坏土を用いて押し出し成形することで、成形体を得ればよい。   Next, this slurry is used to form a green sheet by a known doctor blade method and molded by a pressure press method to obtain a molded body. Alternatively, using a granule obtained by spray-drying the slurry, a green compact is obtained by a roll compaction method, and a compact is obtained by molding by a pressure press method. Furthermore, after molding by cold isostatic pressing (CIP) method, a molded body is obtained by cutting, or by extrusion molding using the clay prepared using the above-mentioned raw materials, a molded body is obtained. Just do it.

そして、得られた成形体を、窒化珪素の含有量に応じた温度および焼成雰囲気で焼成することによって、窒化珪素質セラミックスからなる基体１を得る。なお、基体１は、必要に応じて研磨および研削を行なっても構わない。   And the base | substrate 1 which consists of silicon nitride ceramics is obtained by baking the obtained molded object at the temperature and baking atmosphere according to content of silicon nitride. The substrate 1 may be polished and ground as necessary.

次に、第１層２を基体１上に形成する。第１層２は、酸化アルミニウムのターゲットを用い、スパッタ法で形成すればよい。または、アルミニウムのターゲットを用い、成膜中に酸素を流すことで第１層２を形成してもよい。このように、スパッタ法を用いることで、所望の膜厚に対し均質な組成の層を形成することができる。   Next, the first layer 2 is formed on the substrate 1. The first layer 2 may be formed by sputtering using an aluminum oxide target. Alternatively, the first layer 2 may be formed by flowing oxygen during film formation using an aluminum target. Thus, by using the sputtering method, a layer having a uniform composition with respect to a desired film thickness can be formed.

ここで、第１層２をスパッタ法で形成する際に、基体１を１５０℃以上に加熱することによって、基体１から窒素および珪素を第１層２内に拡散させ、第１層２の第１領域に珪素の窒化物を含有させることができる。   Here, when the first layer 2 is formed by sputtering, the base 1 is heated to 150 ° C. or more to diffuse nitrogen and silicon from the base 1 into the first layer 2. One region can contain silicon nitride.

次に、第２層３を第１層２上に形成する。第２層３は、チタンのターゲットを用い、スパッタ法で形成すればよい。   Next, the second layer 3 is formed on the first layer 2. The second layer 3 may be formed by sputtering using a titanium target.

次に、第２層３上に回路層４を形成することで、本実施形態の一態様の回路基板１０を得る。回路層４は、湿式めっき法、スパッタ法、金属ペーストを用いた印刷法等により、任意の金属を選択し形成すればよい。特に、湿式めっき法で回路層４を形成すれば、回路層４の形成時に基体１に対し高温負荷を与えることが無いことから、基体１に生じるひずみ等の残留応力の発生を抑えることができる。   Next, the circuit layer 4 is formed on the second layer 3 to obtain the circuit board 10 of one aspect of the present embodiment. The circuit layer 4 may be formed by selecting an arbitrary metal by a wet plating method, a sputtering method, a printing method using a metal paste, or the like. In particular, if the circuit layer 4 is formed by a wet plating method, a high temperature load is not applied to the base body 1 when the circuit layer 4 is formed, so that the occurrence of residual stress such as strain generated in the base body 1 can be suppressed. .

なお、第１層２、第２層３および回路層４を回路パターン状に形成する場合は、基体１に第１層２、第２層３および回路層４を形成した後に、回路層４上に任意形状のマスクを形成し、レーザーやブラストを用いたドライエッチング処理を行うか、薬液を用いたウェットエッチングを行ない、マスクが形成されていない箇所の第１層２、第２層３および回路層４を除去すればよい。   When the first layer 2, the second layer 3, and the circuit layer 4 are formed in a circuit pattern, after the first layer 2, the second layer 3, and the circuit layer 4 are formed on the substrate 1, A mask having an arbitrary shape is formed, and a dry etching process using laser or blast is performed, or a wet etching process using a chemical solution is performed, and the first layer 2, the second layer 3 and the circuit where the mask is not formed are formed. The layer 4 may be removed.

１：基体
２：第１層
３：第２層
４：回路層
１０：回路基板 1: Substrate 2: First layer 3: Second layer 4: Circuit layer 10: Circuit board

Claims (3)

窒化珪素質セラミックスからなる基体と、
該基体上に位置する第１層と、
該第１層上に位置するチタンを主成分とする第２層と、
該第２層上に位置する回路層とを備え、
前記第１層における主成分が酸化アルミニウムである回路基板。 A substrate made of silicon nitride ceramics;
A first layer located on the substrate;
A second layer mainly composed of titanium located on the first layer;
A circuit layer located on the second layer,
A circuit board in which the main component in the first layer is aluminum oxide. 前記回路層は、前記回路層を構成する全成分１００質量％のうち、銅を８０質量％以上含有する請求項１に記載の回路基板。   The circuit board according to claim 1, wherein the circuit layer contains 80% by mass or more of copper in 100% by mass of all components constituting the circuit layer. 前記第１層は、前記基体との界面側にあたる第１領域に珪素の窒化物を含有している請求項１または請求項２に記載の回路基板。   The circuit board according to claim 1, wherein the first layer contains silicon nitride in a first region corresponding to an interface side with the base body.
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