KR101904538B1 - Ceramic circuit board and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a ceramic substrate; A buffer layer formed on the ceramic substrate, wherein the buffer layer comprises 1.0 wt% to 20.0 wt% manganese oxide and 1.0 wt% to 5.0 wt% copper oxide; And a metal layer bonded onto the buffer layer. The ceramic circuit board and the method of manufacturing the same provide a ceramic circuit board capable of preventing a crack from occurring by relaxing the stress at the interface between the metal layer and the ceramic substrate through the buffer layer during the cooling and heating process due to the difference in thermal expansion coefficient So that the ceramic circuit board can be stably used in various industrial fields where the temperature is changed.

Description

TECHNICAL FIELD [0001] The present invention relates to a ceramic circuit board and a method of manufacturing the ceramic circuit board.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic circuit board and a method of manufacturing the same, and more particularly, to a ceramic circuit board and a method of manufacturing the same.

Ceramic circuit boards are used for semiconductor devices as electrically insulating substrates, and also for high power modules such as machine tools, electric vehicles, and cooling systems. Generally, a ceramic circuit board is made of a metal such as copper (Cu), aluminum (Al), aluminum (Al) or the like on a ceramic substrate made of alumina (Al ₂ O ₃ ), aluminum nitride (Al ₃ N ₄ ), silicon nitride (Si ₃ N ₄ ), silicon carbide And the like are bonded to each other. At this time, the ceramic substrate is excellent in electrical insulation and mechanical strength, and has a high thermal conductivity.

In particular, the ceramic substrate is generally made of alumina in many cases. This is because alumina is simple, inexpensive, and easy to manufacture in bonding with metals. However, the coefficient of thermal expansion of alumina is smaller than the coefficient of thermal expansion of a metal (e.g., copper) that is bonded to alumina and used as a circuit portion. Due to this, at various temperature conditions, due to the thermal stress at the alumina-copper bonding interface, the ceramic substrate made of alumina is broken. Further, even if the ceramic substrate is made of aluminum nitride, silicon nitride, silicon carbide or the like in addition to alumina, it is broken due to a difference in thermal expansion coefficient between the metal and the bonded metal. Therefore, it is difficult to stably use the ceramic circuit board in an environment where the temperature changes.

The present invention provides a ceramic circuit board and a method of manufacturing the ceramic circuit board that can prevent cracks from occurring at the interface between the metal layer and the ceramic substrate according to the temperature change.

It is another object of the present invention to provide a ceramic circuit board which can be stably used in industrial fields requiring reliability and directness, and a method of manufacturing the same.

The present invention relates to a ceramic substrate; A buffer layer formed on the ceramic substrate; And a metal layer bonded onto the buffer layer.

Also disclosed is a ceramic circuit board characterized in that the buffer layer comprises 1.0 wt% to 20.0 wt% manganese oxide and 1.0 wt% to 5.0 wt% copper oxide.

Further, a material used for forming the buffer layer is a mixture of manganese oxide or manganese oxide and copper oxide, and reacts with the ceramic substrate.

Also, the metal layer includes a buffer groove formed on the metal layer along the edge of the metal layer to be exposed to the outside.

(A) providing a ceramic substrate; (b) forming a buffer layer on the ceramic substrate; And (c) bonding the metal layer to the buffer layer.

Also, the buffer layer comprises 1.0 wt% to 20.0 wt% of manganese oxide and 1.0 wt% to 5.0 wt% of copper oxide.

In the step (b), the material used for forming the buffer layer may include a manganese oxide or a mixture of manganese oxide and copper oxide, and reacting with the ceramic substrate. And a method for producing the same.

Also, the step (b) includes a step of spraying, plating or printing a material used for forming the buffer layer on the ceramic substrate.

In the step (b), the material used for forming the buffer layer may be mixed and crushed before being formed into the buffer layer on the ceramic substrate. / RTI >

A ceramic circuit board according to the present invention includes a ceramic substrate, a buffer layer, and a metal layer, the ceramic substrate having a buffer layer formed on the ceramic substrate, and a metal layer bonded onto the buffer layer. Lt; / RTI >

In particular, the buffer layer is formed using a manganese oxide or a mixture of manganese oxide and copper oxide and includes manganese oxide and copper oxide. This buffer layer is formed on the ceramic substrate before the metal layer is bonded to the ceramic substrate and inserted into the interface between the metal layer and the ceramic substrate. As a result, the buffer layer relaxes the compressive and tensile stresses generated at the interface between the ceramic substrate and the metal layer, which are caused by the difference in thermal expansion coefficient between the ceramic substrate and the metal layer.

Therefore, the ceramic circuit board and the manufacturing method thereof according to the present invention can prevent the occurrence of cracks due to the stress relaxed at the interface between the ceramic substrate and the metal layer, and thus can be used in various industrial fields So that the circuit board can be manufactured.

1 is a cross-sectional view illustrating a ceramic circuit board according to a preferred embodiment of the present invention.
FIG. 2 is an enlarged photograph showing the microstructure of a specimen for confirming the performance of the ceramic circuit board shown in FIG.
3 is a flowchart illustrating a method of manufacturing a ceramic circuit board according to a preferred embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

FIG. 1 is a sectional view showing a ceramic circuit board 100 according to a preferred embodiment of the present invention. FIG. 2 is an enlarged view of a microstructure of a specimen for confirming the performance of the ceramic circuit board 100 shown in FIG. 1 These are the pictures shown. 1 and 2, a ceramic circuit board 100 according to a preferred embodiment of the present invention includes a ceramic substrate 101, a buffer layer 102, and a metal layer 103.

The ceramic substrate 101 is in the form of a plate and is made of alumina (Al ₂ O ₃ ), aluminum nitride (Al ₃ N ₄ ), silicon nitride (Si ₃ N ₄ ), silicon carbide (SiC)

The buffer layer 102 is formed evenly distributed on the ceramic substrate 101. In addition, the material used to form the buffer layer 102 includes a mixture of manganese oxide or manganese oxide and copper oxide. Here, the mixture of the manganese oxide and the copper oxide is mixed at a weight ratio of 1: 1. Further, the manganese oxide is MnO, MnO _2, Mn ₂ O _3, etc. and Mn ₃ O _4, copper oxide, CuO, Cu ₂ O and the like. The above-mentioned material reacts with the ceramic substrate 101 to form a buffer layer 102.

When the buffer layer 102 is formed by using different materials used for forming the buffer layer 102, the buffer layer 102 formed on the ceramic substrate 101 is subjected to energy dispersive spectroscopy (EDS) analysis. In this case, the material used to form the buffer layer 102 was MnO, MnO _2, Mn + CuO, MnO and CuO + MnO ₂ + CuO. The results of EDS analysis are shown in Table 1.

MgO (wt%) Al ₂ O ₃ (% by weight) SiO ₂ (% by weight) CaO (% by weight) MnO (wt%) CuO (% by weight) MnO 2.03 75.32 0.57 0.27 17.58 3.72 MnO ₂ 1.89 91.55 0.87 0.24 4.23 1.22 Mn + CuO 2.28 91.28 1.33 0.65 3.41 1.06 MnO + CuO 1.89 91.11 0.74 0.32 4.63 1.30 MnO ₂ + CuO 1.99 91.84 1.31 0.58 1.88 1.94

As described above, the buffer layer 102 comprises a manganese oxide, MnO, copper oxide, CuO, MgO, Al ₂ O _3, SiO _2, CaO. Here, MgO, Al ₂ O ₃ , SiO ₂ , and CaO are components obtained from the ceramic substrate 101, and MnO and CuO are components obtained by the material used to form the complete layer 102. As can be seen from the above results, the buffer layer 102 comprises 1.0 wt% to 20.0 wt% manganese oxide and 1.0 wt% to 5.0 wt% copper oxide. When the buffer layer 102 includes manganese oxide and copper oxide having the above-described ranges, the buffer layer 102 may be formed of a metal layer (not shown) when positioned between the ceramic substrate 101 and the metal layer 103 103 and the ceramic substrate 101 can be stably maintained.

The metal layer 103 is bonded onto the buffer layer 102 and held in a bonded state on the ceramic substrate 101 by the buffer layer 102. Thus, the metal layer 103 is combined with the ceramic substrate 101 and the buffer layer 102 to form the ceramic circuit board 100. At this time, the metal layer 103 is made of copper (Cu), aluminum (Al), or the like. Further, it is preferable that the metal layer 103 has a thickness of 0.2 mm or more, and as a result, it can function as a printed conductor to maintain electrical conductivity against high currents.

A buffer groove 131 is formed along the edge of the metal layer 103 on the metal layer 103. At this time, the buffer groove 131 is continuously formed along the edge of the metal layer 103, or is formed at regular intervals and is exposed to the outside. As a result, the stress at the interface between the metal layer 103 and the ceramic substrate 101 and the buffer layer 103 is dispersed and relaxed by the buffer groove 131, and the metal layer 103 can be stably bonded .

As described above, the ceramic circuit board 100 according to the present invention has a structure in which the buffer layer 102 is inserted between the ceramic substrate 101 and the metal layer 103. At this time, even if the ceramic circuit substrate 100 undergoes a temperature change through heating and cooling, the buffer layer 102 is in a state in which the compression and tensile stress due to the difference in thermal expansion coefficient between the metal layer 103 and the ceramic substrate 101, . Further, the inclination of deformation from the metal layer 103 to the ceramic substrate 101 is reduced due to thermal expansion.

Therefore, the buffer layer 102 relaxes the stress generated at the interface between the metal layer 103 and the ceramic substrate 101, and cracks can be prevented. In addition, peeling of the metal layer 103 from the ceramic substrate 101 can also be prevented by the buffer layer 102.

Also, the bonding strength value between the ceramic substrate 101 and the metal layer 103 was measured by different materials used for forming the buffer layer 102. [ The results are shown in Table 2.

Buffer layer
Forming material Mn MnO MnO ₂ Mn + CuO MnO + CuO MnO ₂ + CuO Bond strength
(N / mm) Unjoined 11.71 15.59 15.37 15.05 13.64

As shown in Table 1, the buffer layer 102 formed using the manganese oxide or the mixture of manganese oxide and copper oxide according to the present invention has a reference value of 4N / mm or more The bond strength values are shown. Even if the buffer layer 102 is located between the ceramic substrate 101 and the metal layer 103 in the ceramic circuit board 100 according to the present invention, the metal layer 103 is stably bonded to the ceramic substrate 101 . That is, the buffer layer 102 does not lower the bonding strength between the ceramic substrate 101 and the metal layer 103.

In addition, a specimen having a microstructure was used to confirm the performance of the ceramic circuit board 100 by varying the material used for forming the buffer layer 102. At this time, the specimen used was as shown in Fig. 2, and the microstructure of the specimen was photographed by SEM (scanning electron microscope). As shown in Figure 2, (a) it is a case where the buffer layer 102 is not applied, and the other (b), (c), (d), (e) and (f) are each MnO, MnO _2, Mn + CuO, MnO + CuO, and MnO ₂ + CuO.

The above specimens were subjected to a condition that a temperature change between -50 ° C. and 150 ° C. was applied for one cycle. As a result, cracks were not generated in the specimen to which the buffer layer 102 according to the present invention was applied even when 500 cycles were applied. On the other hand, cracks were generated in the specimen to which the buffer layer was not applied, that is, the specimen to which the metal layer 103 was directly bonded to the ceramic substrate 101 after 150 cycles were applied. Therefore, the ceramic circuit board 100 according to the present invention can prevent breakage of the ceramic substrate 101 due to cracks due to the difference in thermal expansion coefficient between the ceramic substrate 101 and the metal layer 103, And can be used stably in the field.

3 is a flowchart illustrating a method of manufacturing a ceramic circuit board according to a preferred embodiment of the present invention. As shown in FIG. 3, the method of manufacturing a ceramic circuit board according to a preferred embodiment of the present invention is a method of manufacturing the above-mentioned ceramic circuit board 100 comprising a ceramic substrate, a buffer layer and a metal layer. Therefore, the ceramic circuit board 100 will be used to explain the method of manufacturing the ceramic circuit board according to the preferred embodiment of the present invention.

First, a step S101 in which the ceramic substrate 101 is provided is performed. Through the step S101, the shape of the ceramic circuit board 100 is formed.

Next, a step (S102) in which the buffer layer 102 is formed on the ceramic substrate 101 is performed. At this time, the buffer layer 102 is uniformly distributed on the surface of the ceramic substrate 101. The material used to form buffer layer 102 is a manganese oxide or a mixture of manganese oxide and copper oxide in a weight ratio of 1: 1. Here, the manganese oxide is MnO, MnO _2, Mn ₂ O _3, etc. and Mn ₃ O _4, copper oxide, CuO, Cu ₂ O and the like. This material reacts with the ceramic substrate 101 and is formed into a buffer layer 102. The buffer layer 102 may include MgO, Al ₂ O ₃ , and SiO ₂ , which are obtained from the ceramic substrate 101. The buffer layer 102 may include a manganese oxide of 1.0 to 20.0 wt% , CaO.

Further, in forming the buffer layer 102, various methods are applied. For example, the material used to form the buffer layer 102 is sprayed, plated, or printed onto the ceramic substrate 101, and the buffer layer 102 is formed on the ceramic substrate 101.

Further, the material used for forming the buffer layer 102 may be mixed and crushed before being applied on the ceramic substrate 101. [ As a result, the material used to form the buffer layer 102 can be easily formed as the buffer layer 102 on the ceramic substrate 101.

Next, a step S103 of bonding the metal layer 103 to the buffer layer 102 is performed. At this time, the buffer layer 102 keeps the metal layer 103 stably bonded on the ceramic substrate 101, relaxes the stress at the interface between the metal layer 103 and the ceramic substrate 101 and the buffer layer 102 Prevent cracking.

While the present invention has been described in connection with certain exemplary embodiments, it will be understood by those skilled in the art that various changes may be made without departing from the scope of the present invention.

100: Ceramic circuit board 101: Ceramic substrate
102 buffer layer 103 metal layer

Claims (9)

A ceramic substrate;
A buffer layer formed on the ceramic substrate; And
And a metal layer bonded onto the buffer layer,
The material used for forming the buffer layer is composed of only a mixture of manganese oxide and copper oxide,
Wherein the buffer layer comprises manganese oxide in an amount greater than silicon oxide.
The method according to claim 1,
Wherein the buffer layer comprises 1.0 wt% to 20.0 wt% manganese oxide and 1.0 wt% to 5.0 wt% copper oxide.
The method according to claim 1,
Wherein the material used to form the buffer layer reacts with the ceramic substrate.
The semiconductor device according to claim 1,
And a buffer groove recessed along the edge of the metal layer on the metal layer and exposed to the outside.
(a) providing a ceramic substrate;
(b) forming a buffer layer on the ceramic substrate by spraying, plating or printing a buffer layer forming material comprising only a mixture of manganese oxide and copper oxide and reacting the material with the ceramic substrate to form a buffer layer; And
(c) bonding the metal layer on the buffer layer,
Wherein the buffer layer comprises manganese oxide in an amount greater than silicon oxide.
6. The method of claim 5,
Wherein the buffer layer comprises 1.0 wt% to 20.0 wt% manganese oxide and 1.0 wt% to 5.0 wt% copper oxide.
6. The method of claim 5, wherein step (b)
Wherein the buffer layer forming material is a mixture of manganese oxide and copper oxide in a weight ratio of 1: 1.
6. The method of claim 5, wherein step (b)
Wherein the buffer layer forming material is mixed and pulverized before forming the buffer layer on the ceramic substrate.
3. The method of claim 2,
Wherein the material used to form the buffer layer is a mixture of manganese oxide and copper oxide in a weight ratio of 1: 1.

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