JP2017117869A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device and manufacturing method, capable of achieving high productivity and uniform compression against a plurality of semiconductor elements.SOLUTION: The semiconductor device includes: a plurality of semiconductor elements 2; a circuit member 4 having a plurality of protrusion parts 40 t to which the semiconductor elements are joined; and a plurality of sinter metal body 3A joining the semiconductor elements to a surface of the circuit member. The protrusion part is positioned to correspond to the semiconductor element positioned at at least a corner of a region 43 in which the semiconductor element in the circuit member is placed.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor device, in particular, a power semiconductor device and a manufacturing method thereof.

  Among semiconductor devices, a power semiconductor device is used for controlling main power of a wide range of equipment from industrial equipment to home appliances and information terminals, and high reliability is particularly required in transportation equipment and the like. On the other hand, in place of the conventional semiconductor element using silicon (Si), development of a semiconductor device including a semiconductor element using a wide band gap semiconductor such as silicon carbide (SiC) is underway. Higher power density and higher temperature operation of devices are progressing.

  On the other hand, in order to realize a high temperature operation, it is necessary not only to improve the heat resistance of the semiconductor element itself, but also to improve the bonding reliability of each bonding portion of the semiconductor device. Therefore, as a bonding method for realizing high-temperature operation, a bonding material for forming a sintered metal body is used for bonding a semiconductor element to a circuit member such as a circuit board or a heat sink, so-called sintered bonding. A method for manufacturing a semiconductor device has been proposed (see, for example, Patent Document 1).

  Sinter bonding is performed by heating a bonding material containing sinterable metal particles having a particle size of nanometer order to several micrometers order in a pressurized state. In general, when the particle size of the metal particle is smaller than a predetermined size, the metal particle has a very active surface state as compared with the bulk metal, and the reaction easily proceeds in the direction of reducing the surface energy. As a result, since it solidifies at a temperature lower than the melting point of the bulk metal, bonding at a low temperature is possible. On the other hand, after the bonding, it does not remelt to the melting point of the bulk metal. Therefore, by using sintered bonding, bonding at a temperature lower than the melting point of the bulk metal becomes possible, so that damage to the semiconductor device or increase in manufacturing cost due to an increase in bonding temperature can be suppressed, and the bonding temperature can be reduced. Thus, a power semiconductor device having high heat resistance can be obtained.

Further, the surface of the sinterable metal particles in the bonding material is covered with an organic protective film in order to suppress the reaction between the metal particles before bonding. And an organic protective film is decomposed | disassembled by the heating at the time of joining, sintering is advanced by encouraging the contact of metal particles by pressurization, and joining is enabled. Therefore, in sintering bonding, it is important to apply sufficient pressure over the entire joining surface, and in regions where the pressing force is insufficient, the sintering does not proceed due to poor contact between metal particles, resulting in a decrease in bonding strength. Occurs. Therefore, in the case where a plurality of semiconductor elements and a circuit member are bonded, if there is a variation in the thickness of the circuit member or the thickness of the bonding material, a semiconductor element whose pressure is insufficient is generated.
Here, as a method of uniformly pressurizing a plurality of semiconductor elements, for example, as shown in Patent Document 2, a metal body, that is, a foam metal or a sintered metal lump having a predetermined gap is formed on each semiconductor element. There is a method of mounting and pressurizing while deforming the metal body.

JP 2012-191238 A JP 2014-127536 A

  However, in the method of Patent Document 2, it is necessary to dispose a metal body for each semiconductor element, and if the number of semiconductor elements is large, productivity may be reduced. Moreover, as a method which can pressurize a several semiconductor element uniformly, the method of using resin-made sheet | seat materials as shown by Unexamined-Japanese-Patent No. 2008-193023 is mentioned. In this case, since it is considered that the resin sheet is more flexible than the metal body of Patent Document 2, the plurality of semiconductor elements are made uniform by pressing the plurality of semiconductor elements through a series of resin sheets. It is assumed that pressurization is possible. Therefore, it is not necessary to arrange a resin sheet for each semiconductor element, and it is considered that productivity is improved.

  However, in this method, the resin sheet is greatly deformed by the high temperature and high pressure at the time of joining, and this may cause unevenness in the applied pressure acting on the semiconductor element.

  The present invention has been made to solve such problems, and an object thereof is to provide a semiconductor device capable of uniformly pressurizing a plurality of semiconductor elements while maintaining high productivity, and a method for manufacturing the same. .

In order to achieve the above object, the present invention is configured as follows.
That is, a semiconductor device in one embodiment of the present invention includes a plurality of semiconductor elements, a single circuit member having a plurality of protrusions to which the semiconductor elements are bonded, and a plurality of the semiconductor elements bonded to the surface of the circuit member. The protrusion is positioned corresponding to the semiconductor element positioned at least at a corner of a region of the circuit member on which the semiconductor element is placed.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, the method for manufacturing a semiconductor device according to the above aspect, wherein a circuit member is formed using a bonding material including sintered metal particles and a heating and pressing apparatus. And a plurality of semiconductor elements, wherein the heating and pressing apparatus has a first and a second pair of pressing plates positioned opposite to each other, and in the thickness direction of the semiconductor device, Between the first pressure plate and the second pressure plate, the circuit member, the bonding material, the semiconductor element, and the pressure sheet are stacked in this order, and the first and second pressure plates are arranged. Heating and relatively approaching and pressurizing to sinter the sintered metal particles to join the semiconductor element and the circuit member, the pressure sheet comprising all the semiconductor elements A sheet having a size covering the first and second sheets. Pressure plate in contact with the pressurizing sheet of the second pressure plate, characterized by having a size to cover all of the semiconductor element.

  According to the semiconductor device of one embodiment of the present invention, since the circuit member has the protrusion corresponding to the corner of the region where the semiconductor element is placed in the circuit member, the thickness of the circuit member or the sintered metal particles can be reduced. Even when there is variation in the thickness of the bonding material to be included, it is possible to reduce uneven pressure when the circuit member and the semiconductor element are bonded with the sintered metal particles. Therefore, it is possible to provide a semiconductor device capable of uniformly bonding a plurality of semiconductor elements at a time and capable of uniformly pressurizing the plurality of semiconductor elements while maintaining high productivity. In addition, since sintered metal bonding is performed, a highly reliable semiconductor element can be obtained at low cost while being excellent in heat resistance.

  According to the method for manufacturing a semiconductor device in another aspect of the present invention, the projecting portion is provided on the circuit member corresponding to the semiconductor element located at a location where the pressure sheet is largely stretched in the plane. Therefore, it can press especially strongly with respect to the semiconductor element in the position where pressurization pressure falls due to extension of a pressurization sheet when joining a semiconductor element and a circuit member. Therefore, it is possible to pressurize a plurality of semiconductor elements uniformly. In addition, since a plurality of semiconductor elements are pressed by a series of pressure sheets, there is no need to mount a pressure sheet for each semiconductor element, and high productivity can be maintained.

FIG. 3 is a cross-sectional view schematically showing the semiconductor device according to the first embodiment of the present invention, and is a cross-sectional view taken along a line AA shown in FIG. 2. FIG. 2 is a plan view of the semiconductor device shown in FIG. 1. FIG. 2 is a plan view showing a position of a protrusion provided on a circuit member of the semiconductor device shown in FIG. 1. It is a top view which shows the modification of the position of the projection part in FIG. 3A. (A) to (d) is a side view showing each step for explaining a method of manufacturing the semiconductor device shown in FIG. FIG. 5 is a plan view of the heating and pressing apparatus shown in FIG. 4 used in the method for manufacturing the semiconductor device shown in FIG. 1. (A) is sectional drawing of the apparatus which performs the joining method in the experiment regarding joining pressure distribution, (b) is a top view which shows the expansion | extension direction of a pressure sheet when it joins. It is a schematic diagram which shows the result of the experiment regarding joining pressure distribution. It is a figure which shows the modification of the semiconductor device shown in FIG. 1, and is the top view which shows the manufacturing state, and the top view which shows the position of a projection part. FIG. 11 is a plan view of still another modification of the semiconductor device shown in FIG. 1. In the semiconductor device shown in FIG. 9, it is a top view which shows the extension direction of the pressurization sheet | seat in the experiment regarding junction pressure distribution. FIG. 10 is a schematic diagram illustrating a result of an experiment relating to a junction pressure distribution in the semiconductor device illustrated in FIG. 9. It is sectional drawing for demonstrating the height of the projection part of the semiconductor device shown in FIG. FIG. 2 is a side view for explaining the distance between a pressure sheet and a circuit pattern in the semiconductor device shown in FIG. 1.

  A semiconductor device and a manufacturing method thereof according to an embodiment of the present invention will be described below with reference to the drawings. In each figure, the same or similar components are denoted by the same reference numerals. In addition, in order to avoid the following description from becoming unnecessarily redundant and to facilitate understanding by those skilled in the art, a detailed description of already well-known matters and a duplicate description of substantially the same configuration may be omitted. . Further, the contents of the following description and the accompanying drawings are not intended to limit the subject matter described in the claims.

  In the following description, a power semiconductor device is taken as an example of the semiconductor device. Therefore, a power semiconductor element is taken as an example of a semiconductor element included in the power semiconductor device. However, the present invention is not intended to be limited to a power semiconductor device, but can also be applied to general semiconductor devices that handle normal power other than power.

Embodiment 1 FIG.
A configuration of the power semiconductor device according to the first embodiment of the present invention will be described.
FIG. 1 is a cross-sectional view showing a power semiconductor device 100 according to the first embodiment, and FIG. 2 is a plan view thereof. Here, FIG. 1 corresponds to the AA cross section shown in FIG. In FIG. 1, only the configuration relating to the junction between the semiconductor element and the circuit member, which is a characteristic portion of the present embodiment, is illustrated, and the other configurations are not shown. Each figure shows a schematic configuration. For example, the thickness of the member is different from the actual size for easy understanding and for convenience of illustration.

The power semiconductor device 100 of this embodiment includes a plurality of semiconductor elements 2, a sintered metal body 3 </ b> A, and a circuit member 4 as basic components.
In the present embodiment, the semiconductor element 2 is a so-called power semiconductor element having a thickness of, for example, about 0.1 to 0.4 mm, and a main surface (front surface) 2f having a rectangular shape. More specifically, the semiconductor element 2 corresponds to, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor), an SBD (Schottky Barrier Diode), a PN diode, or the like. For example, when an IGBT is used as the semiconductor element 2, an emitter electrode and a gate electrode to which a control signal is input are formed on the main surface 2f, and on the back surface facing the main surface 2f in the thickness direction, A collector electrode is formed. In FIG. 1, each electrode of the semiconductor element 2 is not shown.
Further, the semiconductor element 2 is not limited to one made from a Si semiconductor material, and may be a wide band gap semiconductor material, for example, a semiconductor element made from silicon carbide, a gallium nitride-based material, and diamond.

  The sintered metal body 3 </ b> A is a metal layer obtained by sintering and solidifying sinterable metal particles, and is a joining layer that joins the circuit member 4 and the semiconductor element 2. Here, the sinterable metal particles are metal particles having a particle size of nano-order to several micro-order, and are metal particles constituting a bonding material used for so-called sintered bonding. Further, the kind of the sinterable metal particles, that is, the kind of the metal constituting the sintered metal body 3A is a metal that can be sintered and bonded and that has a melting point equal to or higher than the maximum operating temperature of the semiconductor element 2. For example, Ag or Cu is preferable. More specifically, when the semiconductor element 2 is a SiC semiconductor element made of a wide band gap semiconductor material, the sintered metal body 3A is made of a metal having a melting point of 200 ° C. or higher, more preferably 300 ° C. or higher. preferable.

  The circuit member 4 is a plate-like member on which the semiconductor element 2 is mounted and forms a part of the main circuit together with the semiconductor element 2, and is, for example, an insulating substrate on which a heat spreader or a circuit pattern is formed. More specifically, copper (Cu) or copper alloy having excellent electrical and thermal conductivity, a metal block-shaped heat spreader such as aluminum (Al) or a plate material called a lead frame, or an insulating ceramic. Examples thereof include a ceramic insulating substrate having a metal wiring pattern formed on a base material. In the present embodiment, the circuit member 4 is illustrated as an insulating substrate in which a copper circuit pattern 40 is formed on a ceramic 41.

Further, as shown in FIG. 1, a protrusion 40t is formed in the circuit pattern 40 of the circuit member 4. FIG. 3A is a plan view showing an arrangement state of the protrusions 40 t in the circuit member 4. Note that “40tf” illustrated in FIG. 3A represents the main surface of the protrusion 40t.
In the circuit pattern 40 of the circuit member 4, as shown in FIG. 2, the semiconductor elements 2 are arranged in 3 rows and 3 columns (3 × 3) as an example, but the protrusions 40 t are shown in FIG. 3A in this embodiment. As shown, it is formed at the corner in region 43. Here, the region 43 is a region where a plurality of semiconductor elements 2 are arranged, and the outer peripheral end thereof corresponds to a position slightly narrower than the periphery of the circuit pattern 40. “40tf” shown in FIG. 3A indicates the surface of the protrusion 40t. The surface 40tf is provided by applying, for example, a bonding material 3B described later, which is sintered to be a sintered metal body 3A.

The reason for forming the protrusion 40t at the corner in the region 43 will be described later.
3A shows a case where the protrusions 40t are formed in the corners of the region 43 in the circuit pattern 40, but the formation of the protrusions 40t is not limited to this. For example, as illustrated in FIG. 3B, the protrusion 40 t may be formed along the outer peripheral edge 42 of the circuit member 4. The reason will be described later.

  The material of the protrusion 40t may be the same as or different from the material of the circuit pattern 40. However, in the case of different materials, the protrusion 40t and the circuit pattern 40 need to be metal-bonded. And the material of the projection part 40t should just be a material which does not deform | transform with the heating temperature and the applied pressure in the joining process mentioned later. Furthermore, in order to efficiently conduct the heat generated by the operation of the semiconductor element 2 to the circuit pattern 40, it is preferable to use a material having high thermal conductivity, and to operate the power semiconductor device 100 with low power consumption. In addition, a substance having high electrical conductivity is preferable. Therefore, for example, copper (Cu), a copper alloy, aluminum (Al), or the like is preferable.

  The size relationship between the semiconductor element 2, the sintered metal body 3 </ b> A, and the protrusion 40 t has the following relationship in order to uniformly pressurize the semiconductor element 2 and join the entire back surface of the semiconductor element 2 to the protrusion 40 t. It is desirable to have. However, it is assumed that the protrusions 40t, the sintered metal body 3A, and the semiconductor element 2 are joined with their longitudinal and lateral directions aligned with each other.

Longitudinal length of protrusion 40t ≧ longitudinal length of sintered metal body 3A ≧ longitudinal length of semiconductor element 2 and short length of protrusion 40t ≧ short length of sintered metal body 3A ≧ short length of semiconductor element 2 The

  By satisfying the above relationship, as shown in FIGS. 1 and 2, the entire back surface of the semiconductor element 2 facing the circuit member 4 can be bonded to the protrusion 40t. As a result, the heat generated by the operation of the semiconductor element 2 can be efficiently released to the circuit pattern 40. In addition, it is possible to reduce the stress acting on the semiconductor element 2 in the bonding process described later.

  As described above, FIG. 1 shows only the joint portion between the semiconductor element 2 and the circuit member 4 in the power semiconductor device 100, but actually, the wiring not shown on the main surface 2f side of the semiconductor element 2 is also shown. A member etc. are joined. Further, a cooling member may be provided on the lower surface side of the circuit member 4. Furthermore, the circuit surface including the semiconductor element 2 may be sealed with a sealing resin, for example. However, the power semiconductor device 100 of the present embodiment is not limited by the configuration on the main surface 2f side of the semiconductor element 2, the configuration on the lower surface side of the circuit member 4, the sealing method, and the like. Therefore, description of these configurations is omitted.

Next, a method for manufacturing power semiconductor device 100 in the first embodiment will be described.
FIG. 4 is a side view showing each step of the method for manufacturing the power semiconductor device 100 according to the first embodiment. FIG. 5 is a plan view showing a heating and pressing apparatus 200 used in the method for manufacturing the power semiconductor device 100. Hereinafter, as in the description of the power semiconductor device 100, the description will be made by paying attention to the joint portion between the semiconductor element 2 and the circuit member 4.

  First, as illustrated in FIG. 4A, the protrusion 40 t is formed on the circuit member 4. Examples of the forming method include a method of etching the circuit pattern 40 and cutting a part thereof. As described above, the formation position is at least a corner in the region 43 where the semiconductor element 2 is placed in the circuit member 4.

Next, the paste-like bonding material 3B is applied to the surface 40tf (FIG. 3A) of the formed protrusion 40t. Here, the bonding material 3B is a bonding material including sintered metal particles coated with an organic protective film, and is an original material that becomes a sintered metal body 3A when heated and pressurized as described later.
Then, on the applied bonding material 3B, the semiconductor element 2 is arranged with the back surface of the semiconductor element 2 opposed to the bonding material 3B, and the bonding preparation 1 is formed.

  Next, as illustrated in FIG. 4B, a single pressure sheet 50 is provided on the main surface 2 f of the semiconductor element 2 of the bonding preparation product 1 so as to cover the entire main surface 2 f of the plurality of semiconductor elements 2. Place. The pressure sheet 50 has a function of suppressing pressure bias (direction) caused by the inclination of the semiconductor element 2 or the like in the subsequent pressure process. The main surface 2 f corresponds to a surface on the opposite side in the thickness direction (Z direction) of the semiconductor element 2 with respect to the back surface of the semiconductor element 2 facing the circuit member 4.

Next, using the heating and pressing apparatus 200, a pressing operation is performed to pressurize the bonding preparation 1 on which the pressing sheet 50 is placed.
As shown in FIGS. 4C and 4D, the heating and pressing apparatus 200 includes an upper pressure plate 21 corresponding to an example of a first pressure plate and a lower pressure plate corresponding to an example of a second pressure plate. 22. Here, the upper pressure plate 21 and the lower pressure plate 22 are arranged so as to face each other in the thickness direction of the bonding preparation product 1 (Z direction shown in FIG. 4A) and sandwich the bonding preparation product 1. The The upper pressure plate 21 is a pressure plate in contact with the pressure sheet 50, and the lower pressure plate 22 is a pressure plate in contact with the circuit pattern 40 of the circuit member 4. In addition, in order to simplify description in the present embodiment, the object that is in direct contact with the lower pressure plate 22 is described for the circuit pattern 40 of the circuit member 4, but the ceramic 41 on which the circuit member 4 is formed, Alternatively, a cooling device or the like may be used.

  The upper pressure plate 21 and the lower pressure plate 22 are provided with a heater 21h and a heater 22h, respectively. Further, a guide 22g for positioning the bonding preparation 1 is provided on the surface 22f of the lower pressure plate 22 as shown in FIG. In the present embodiment, the guide 22g has an L-shaped projection shape. Note that the shape of the guide 22g is not limited to the L-shape in the present embodiment. For example, the guide 22g contacts and supports at least two adjacent sides on the side surface of the joint preparation 1 such as a U-shape or a C-shape. Any shape other than the projecting structure formed on the lower pressure plate 22 may be used as long as it has a positioning function.

First, as shown in (c) of FIG. 4, the preparation for joining 1 on which the pressure sheet 50 is placed is placed on the surface 22 f of the lower pressure plate 22 of the heating and pressing apparatus 200 and the preparation for joining is performed. The corner of the circuit member 4 in the product 1 is arranged so as to contact the corner portion of the guide 22g. More specifically, the corners of the rectangular circuit member 4 are arranged to abut on the corners of the guide 22g. Thereby, the bonding preparation 1, that is, the semiconductor element 2 is positioned with respect to the lower pressure plate 22.
In addition, it is preferable to preheat the upper pressure plate 21 and the lower pressure plate 22 by energizing the heaters 21h and 22h in advance before pressurizing the bonding preparation product 1. The preheating is a state in which the sinterable metal particles contained in the bonding material 3B are heated to a temperature at which sintering does not occur, and such a temperature is maintained. Thereby, when heating the joining material 3B in the joining process of the semiconductor element 2 and the circuit member 4 which will be described later, it is possible to shorten the time required to obtain a necessary heating temperature.

After the preheating, at least one of the upper pressure plate 21 and the lower pressure plate 22 is moved in the Z direction so as to be relatively close to each other, and as shown in FIG. Between the upper pressure plate 21 and the lower pressure plate 22 and pressurizing the bonding preparation 1.
In this pressurized state, the pressure sheet 50 absorbs variations in the thickness of each member constituting the bonding preparation 1, so that the entire main surface 2 f of the semiconductor element 2 can be uniformly pressed. For example, even when the thickness of each member of the bonding preparation 1 varies due to uneven application of the bonding material 3B and the inclination between the main surface 2f of the semiconductor element 2 and the upper pressure plate 21 is increased, By deforming the pressure sheet 50 in the thickness direction (Z direction), the entire main surface 2f of the semiconductor element 2 can be uniformly pressed.
Further, since the single pressure sheet 50 is provided for all the semiconductor elements 2, it is not necessary to mount a pressure sheet for each semiconductor element, and the semiconductor element 2 can be uniformly pressed with high productivity. .

After the applied pressure reaches a pressure range necessary for joining the circuit pattern 40 of the circuit member 4 and the semiconductor element 2, the upper pressure plate 21 and the lower pressure plate 22 are brought to a temperature necessary for sintering joining, Heat further.
Then, after the temperatures of the pressure sheet 50, the semiconductor element 2, the bonding material 3B, and the circuit member 4 reach the necessary temperatures, the pressing force and the heating temperature are maintained for a necessary time. Thereby, the organic protective film contained in the bonding material 3 </ b> B is decomposed, bonding by the sinterable metal particles is started, and the semiconductor element 2 and the circuit pattern 40 of the circuit member 4 are bonded. When the joining is completed, the joining material 3B becomes a sintered metal body 3A in which the organic protective film is volatilized and the sinterable metal particles are solidified.

In this joining operation, the pressure sheet 50 has a role as a cushion material for preventing the semiconductor element 2 from being damaged, in addition to the uniform applied pressure acting on the semiconductor element 2 as described above. Therefore, the material constituting the pressure sheet 50 may be a material having heat resistance at the sintering temperature of the bonding material 3B and flexibility (elastic modulus) that does not damage the semiconductor element 2 at the temperature. Specifically, it is preferable that the material has a modulus of elasticity of 1 MPa or less at the bonding temperature.
From the role of the pressure sheet 50, the pressure sheet 50 can also be referred to as a resin sheet cushioning material.

  The size of the pressure sheet 50 is preferably in the following relationship in order to sufficiently press the entire main surface 2f of all the semiconductor elements 2 mounted on the circuit member 4. However, the pressure sheet 50 is aligned with the longitudinal direction of the mounting region of the semiconductor element 2, and the short direction of the pressing sheet 50 is aligned with the short direction of the mounting region of the semiconductor element 2. It is assumed that 50 is installed.

Longitudinal length of the pressure sheet 50 ≧ long length of the mounting region of the semiconductor element 2 (length 2nl shown in FIG. 2), and short length of the pressing sheet 50 ≧ short length of the mounting region of the semiconductor element 2 ( (Length 2ml shown in Fig. 2)

By satisfying the above relationship, the main surfaces 2 f of all the semiconductor elements 2 mounted on the circuit member 4 can be reliably pressed via the pressure sheet 50. Therefore, the effect of using the pressure sheet 50 described above is reliably exhibited.
Furthermore, from the viewpoint of workability when the pressure sheet 50 is disposed, it is desirable that the pressure sheet 50 has a size that is about 1 mm larger in length and width than the size of the mounting area of the semiconductor element 2.
Further, the thickness of the pressure sheet 50 is thicker than that of the semiconductor element 2 in a state before pressurization and less than half of the thickness before pressurization after pressurization in order to reduce variation in pressurization force. It is preferable to have a thick thickness.

Next, the effect that the semiconductor element 2 can be more uniformly pressurized by providing the projecting portion 40t on the circuit member 4 will be described below, including the contents relating to the formation location of the projecting portion 40t.
It is desirable to bond the semiconductor element 2 to the circuit member 4 at a lower pressure from the viewpoint of cost reduction or size reduction of the heating and pressing apparatus 200. Also, if bonding at a low pressure is possible, the number of semiconductor elements 2 that can be bonded together even at the same load increases, and productivity can be improved.
However, when the pressure at the time of bonding is reduced, if the pressure in the bonding surface varies, a region that is locally lower than the pressure required for bonding is generated. That is, when the applied pressure at the time of bonding is lowered, pressure variation in the bonded surface, which is not a problem when the applied pressure is large, becomes a problem.
Therefore, first, the pressure distribution acting on the main surface 2f of the semiconductor element 2 was verified in the case where the circuit member 4 was joined without providing the protrusion 40t. This will be described below.

  FIG. 6A is a cross-sectional view including a heating and pressurizing apparatus 200 for explaining a bonding method regarding an experiment relating to pressure distribution applied to the main surface 2f of the semiconductor element 2, and is shown in FIG. The cross section in the position corresponding to a -B cross section is illustrated. In addition, this BB cross section is corresponded in the cross section in the part in which the projection part 40t is not formed in the circuit member 4. FIG. FIG. 6B is a schematic view showing the result of the experiment, and is a plan view showing the distribution of the applied pressure on the main surface 2 f of the semiconductor element 2. In FIG. 6B, the solid line indicates the position of the upper pressure plate 21 of the heating and pressing apparatus 200, the alternate long and short dash line indicates the position of the pressure sheet 50, and the broken line indicates the position of the main surface 2 f of the semiconductor element 2. Is shown. Further, an arrow N (both white and black) shown in FIG. 6B schematically represents the extending direction of the pressure sheet 50.

  In the bonding step, the pressure sheet 50 is pressed between the main surface 2f of the semiconductor element 2 and the upper pressure plate 21, and each center C (black circle shown in FIG. The portion extends radially in the XY direction (a planar direction perpendicular to the thickness direction (Z direction) of the pressure sheet 50). At the portion where the extension direction of the pressure sheet 50 is opposite (white one in the arrow N), the pressure sheet 50 tends to extend in the opposite direction, and as a result, the amount of extension of the pressure sheet 50 is reduced. On the other hand, in a portion where the pressure sheet 50 is not opposed (the black one in the arrow N), the pressure sheet 50 is greatly extended.

  Further, it was confirmed by experiments that the pressure applied to the main surface 2f of the semiconductor element 2 is lower in the black portion shown in FIG. 7 than in the white portion. This is because the pressurizing sheet 50 extends in the XY plane, and the pressing force for pressing the semiconductor element 2 in the Z direction by the amount of extension of the pressing sheet 50 is applied in the XY plane. This is probably because the pressure sheet 50 was consumed for deformation. Here, the black portion shown in FIG. 7 coincides with the portion where the extension of the pressure sheet 50 shown in FIG. 6 is large, and due to the extension of the pressure sheet 50, the pressure of the black portion is changed to the white portion. It is thought that it was lower than that.

For the reasons described above, when the joining state is confirmed by changing the joining pressure with respect to the joining preparation product 1, when the joining pressure is reduced, first, the black portion shown in FIG. Becomes smaller.
Further, as shown in FIG. 7, the area of the black portion is larger than that of the semiconductor element 2 in which the area of the semiconductor element 2 c disposed at the corner is other than the corner.

Therefore, as shown in FIG. 3A, it is possible to particularly strongly press the semiconductor element 2c at the corner by providing the protrusion 40t on the circuit member 4 immediately below the semiconductor element 2c arranged at the corner of the region 43. It becomes. Therefore, it is possible to minimize the possibility of an unjoined region due to variations in the applied pressure. As a result, even when the applied pressure at the time of bonding is reduced, it is possible to minimize the possibility that the semiconductor element 2 and the circuit member 4 will not be bonded.

  Furthermore, in FIG. 7, by providing each of the protrusions 40t on the circuit pattern 40 immediately below each semiconductor element 2 corresponding to the black portion other than the semiconductor element 2c arranged at the corner, as shown in FIG. 3B, The semiconductor element 2 can be pressed more uniformly. As a result, it is possible to suppress a decrease in the applied pressure at all the black portions shown in FIG. 7, so that variations in applied pressure for all the semiconductor elements 2 can be reduced. Therefore, even when the applied pressure in the bonding process is reduced, it is possible to suppress the possibility that an unbonded region is generated between the semiconductor element 2 and the circuit member 4. Further, the circuit members 4 can be firmly bonded to all the semiconductor elements 2 regardless of the arrangement positions of the semiconductor elements 2 in the circuit members 4.

Further, for example, as shown in FIGS. 8A and 8B, there are four sets of 3 × 3 semiconductor element arrangements in a region 43 to which a plurality of semiconductor elements 2 are bonded, and a plurality of (this example In the case where the semiconductor elements 2 placed on the four circuit members 4 are joined together using a single, that is, one, pressure sheet 50, the reason described above is used. Therefore, the applied pressure tends to decrease in the semiconductor element arranged corresponding to the outer peripheral edge portion 42 of the region 43 (the portion along the thick black line in the thick black line shown in FIG. 8A). Therefore, the formation positions of the protrusions 40t need to be arranged as shown in FIG. 8B with respect to the four circuit members 4 respectively.
As described above, the formation position of the protrusion 40t on the circuit member 4 is not limited to the configuration in FIG. 3A, but can be changed variously depending on the joining method (arrangement of the circuit member 4, size of the pressure sheet 50, etc.). It is necessary and can be effective with different configurations.

As another example, as shown in FIG. 9, for example, there is no semiconductor element 2 surrounded by other semiconductor elements 2, and all the semiconductor elements 2 are arranged at the outer peripheral edge 42 of the junction region. To do.
In such a case, a protrusion 40t is formed in the circuit pattern 40 corresponding to the junction region, specifically, the semiconductor element disposed at the corner of the region 43 described above, that is, the semiconductor element 2c shown in FIG. To do. Thereby, generation | occurrence | production of the unjoined part by the dispersion | variation in pressurizing force can be suppressed to the minimum. The reason for this will be described below. Note that “2cf” shown in FIG. 9 represents the main surface of the semiconductor element 2c arranged at the corner.

  First, in the arrangement of the semiconductor elements 2 in 2 rows and 4 columns shown in FIG. 9, when the circuit pattern 40 of the circuit member 4 is joined without providing the protrusions 40 t, it acts on the main surface 2 f of the semiconductor element 2. The pressure distribution was verified. FIG. 10 is a schematic diagram showing an experimental result regarding the distribution of the applied pressure on the main surface 2f of the semiconductor element 2 in this experiment. In FIG. 10, the solid line indicates the position of the upper pressure plate 21 in the heating and pressing apparatus 200, the alternate long and short dash line indicates the position of the pressure sheet 50, and the broken line indicates the position of the main surface 2 f of the semiconductor element 2. . Further, in FIG. 10, an arrow N (both white and black) in the drawing schematically represents the extending direction of the pressure sheet 50.

  At the time of joining, the pressure sheet 50 is pressed between the main surface 2f of the semiconductor element 2 and the upper pressure plate 21, and the pressure sheet 50 is center C of the main surface 2f in each semiconductor element 2 (FIG. 10). Extending in the XY direction radially. At the portion where the extension direction of the pressure sheet 50 is opposite (white one in the arrow N), the pressure sheet 50 tends to extend in the opposite direction, and as a result, the amount of extension of the pressure sheet 50 is reduced. On the other hand, the pressure sheet 50 greatly expands at a portion where the extension direction of the pressure sheet 50 is not opposite (black one of the arrows N). Further, it was confirmed by experiments that the pressure applied to the main surface 2f of the semiconductor element 2 is lower in the black portion shown in FIG. 11 than in the white portion. This is because the pressing force for pressing the semiconductor element 2 in the Z direction is increased in the XY plane by the amount of extension of the pressing sheet 50 due to the pressing sheet 50 extending in the XY plane. This is considered to be due to the consumption of the deformation of the sheet 50. The black portion shown in FIG. 11 coincides with the portion where the extension of the pressure sheet 50 shown in FIG. 10 is large, and due to the extension of the pressure sheet 50, the applied pressure of the black portion is lower than that of the white portion. It is thought that.

For the above reasons, when the joining state is confirmed by changing the pressure at the time of joining with respect to the joint preparation product 1, when the joining pressure is reduced, first, the black portion shown in FIG. Becomes smaller. Further, as shown in FIG. 11, the area of the black portion is larger than that of the semiconductor element 2 in which the area of the semiconductor element 2 c arranged at the corner is other than the corner.
Therefore, as shown in FIG. 9, it is possible to particularly strongly press the semiconductor element 2c at the corner by providing the protrusion 40t on the circuit member 4 immediately below the semiconductor element 2c disposed at the corner of the region 43. Thus, it is possible to minimize the possibility that an unjoined region is generated due to variations in the applied pressure. Therefore, even when the applied pressure at the time of bonding is reduced, the possibility that the semiconductor element 2 and the circuit member 4 are not bonded can be minimized.

  As can be seen from the examples shown in FIGS. 3A, 8, and 9, the semiconductor element 2 and the circuit member 4 may be unbonded even when the pressure applied during bonding is reduced. In order to suppress the performance to the minimum, in the region 43 where the plurality of semiconductor elements 2 are placed in the circuit pattern 40, the protrusions 40t are formed on the circuit pattern 40 immediately below the semiconductor elements 2 arranged at least at the corners. It is effective to provide

  In the case of the arrangement of the semiconductor elements 2 as shown in FIG. 9, for example, as shown in FIG. 9, there is no semiconductor element 2 surrounded by the other semiconductor elements 2 and all the semiconductor elements 2 are arranged at the outer peripheral edge portion 42 of the junction region. When the protrusions 40t are provided on the circuit pattern 40 for all of the semiconductor elements 2 corresponding to the black portions, the height 2ft from the bottom surface of the circuit member 4 (FIG. 1) is the same for all the semiconductor elements 2. It becomes. Therefore, it may be difficult to press the semiconductor element 2c at the corner part particularly strongly. Therefore, as shown in FIG. 9, when there is no semiconductor element 2 surrounded by other semiconductor elements 2 and all the semiconductor elements 2 are arranged at the outer peripheral edge 42 of the junction region, The effect can be exhibited by providing the protrusion 40t only on the circuit member 4 directly below the semiconductor element 2c arranged in the portion.

  FIG. 12 is a cross-sectional view of the circuit member 4. When the height 40th of the protrusion 40t is excessively large, the semiconductor element 2 disposed at a location where the protrusion 40t is not formed is sufficiently pressed. Otherwise, there is a risk that unbonded portions may occur at the location. As a guideline, the thickness of the pressure sheet 50 is assumed to be such that the thickness after pressing is less than half the thickness before pressing, so the upper limit of the height 40th of the protrusion 40t is The pressure sheet 50 is half the thickness. However, the allowable upper limit value of the height 40th of the protrusion 40t becomes smaller as the variation in the thickness of each member constituting the bonding preparation 1 shown in FIG. The relationship between the thickness of the semiconductor element 2 and the height 40th of the protrusion 40t is not particularly limited as long as the thicknesses of the plurality of semiconductor elements 2 are unified.

An advantage over the uniform thickness of the semiconductor element 2 will be described.
Since the thickness of the semiconductor element 2 is unified, only the height 40th of the protrusion 40t needs to be adjusted in order to pressurize the plurality of semiconductor elements 2 uniformly. That is, when the thickness of the semiconductor element 2 is not uniform, it is necessary to adjust the height 40th of the protrusion 40t on which the semiconductor element 2 is arranged according to the thickness of the semiconductor element 2.
Moreover, since the thickness of the semiconductor element 2 is unified, the plurality of semiconductor elements 2 can be easily pressed uniformly. Therefore, the semiconductor element 2 and the circuit member 4 can be firmly joined regardless of the position of the semiconductor element 2 in the circuit member 4.

  Further, when the height 40th of the protrusion 40t is excessively small, the above-described pressure equalization effect cannot be obtained. Therefore, the height 40th of the protrusion 40t needs to be adjusted according to the target density of the sintered metal body 3A, and is often adjusted in the range of 20 to 100 μm.

  Furthermore, the height 40th of the protrusion 40t does not need to be one type, and there may be a plurality of types according to the distribution of the applied pressure acting on the semiconductor element 2 or the target bonding strength. At this time, as described above, if the thickness of the semiconductor element 2 is not uniform, it is necessary to adjust the thickness of the semiconductor element 2 in addition to the height 40th of the protrusion 40t. Therefore, the number of parameters to be adjusted increases and the adjustment becomes complicated. Specifically, the height 40t of the protrusion 40t and the thickness of the semiconductor element 2 are adjusted according to the target density of the sintered metal body 3A. As a result, the circuit of the main surface 2f of the semiconductor element 2 is adjusted. It is necessary to adjust the height 2ft from the bottom surface of the member 4 (FIG. 1).

  In this Embodiment, since it becomes possible to reduce the applied pressure at the time of joining as above-mentioned, the stress concentration concerning the circuit member 4 can be suppressed. Furthermore, the manufacturing cost can be reduced by downsizing the heating and pressing apparatus 200 or the like.

Furthermore, another effect by providing the protrusion 40t will be described.
At the time of bonding, the organic protective film contained in the bonding material 3B is decomposed and volatilized and scattered around. At this time, if the distance between the pressure sheet 50 and the circuit pattern 40 is small, components of the organic protective film are likely to adhere to the circuit pattern 40, and the possibility that the circuit pattern 40 is contaminated increases.
FIG. 13A is a side view showing a state at the time of joining when the protrusion 40t is provided and FIG. 13B is not provided. The distance h540 between the pressure sheet 50 and the circuit pattern 40 is larger when the protrusion 40t is provided, and the component of the volatile organic protective film is less likely to adhere to the circuit pattern 40.

  As described above, by forming the protrusion 40t on the circuit member 4, it is possible to reduce the variation in the applied pressure acting on the semiconductor element 2 in the bonding between the semiconductor element 2 and the circuit member 4, and the bonding material. The possibility that the circuit pattern 40 is contaminated by the components of the organic protective film contained in 3B can also be reduced.

1 Bonding preparation 2 Semiconductor element 3A Sintered metal body 3B Bonding material 4 Circuit member
21, 22 pressure plate, 40t protrusion, 43 region, 50 pressure sheet,
100 Semiconductor device for electric power, 200 Heating and pressing device.

Claims (7)

A plurality of semiconductor elements;
One circuit member having a plurality of protrusions to which the semiconductor element is bonded;
A plurality of sintered metal bodies for bonding the semiconductor element to the surface of the circuit member;
With
The protrusion is located corresponding to the semiconductor element located at least at a corner of the circuit member on which the semiconductor element is placed;
A semiconductor device.   The semiconductor device according to claim 1, wherein the plurality of semiconductor elements have a uniform thickness.   The semiconductor device according to claim 1, wherein the semiconductor element is an element made of a wide band gap semiconductor material. The semiconductor device according to claim 3, wherein the wide band gap semiconductor material is any one of silicon carbide, a gallium nitride-based material, and diamond. 5. The method of manufacturing a semiconductor device according to claim 1, wherein a bonding member including sintered metal particles and a heating and pressing apparatus are used to bond one circuit member and a plurality of semiconductor elements. A manufacturing method to perform,
The heating and pressurizing apparatus has a first and second pair of pressurizing plates positioned opposite to each other,
In the thickness direction of the semiconductor device, between the first pressure plate and the second pressure plate, the circuit member, the bonding material, the semiconductor element, and the pressure sheet are stacked in this order,
Heating the first and second pressure plates and pressing them relatively close together to sinter the sintered metal particles to join the semiconductor element and the circuit member;
Prepared
The pressure sheet is a single sheet having a size covering all the semiconductor elements,
Of the first and second pressure plates, the pressure plate in contact with the pressure sheet has a size that covers all the semiconductor elements.
A method for manufacturing a semiconductor device.   The plurality of protrusions to which the semiconductor element is bonded in the circuit member correspond to the semiconductor element located at a location where the elongation in the plane of the pressure sheet is large when the semiconductor element and the circuit member are bonded. The method for manufacturing a semiconductor device according to claim 5, wherein the semiconductor device is provided.   The method of manufacturing a semiconductor device according to claim 5, wherein the pressure sheet is a material having an elastic modulus at bonding of 1 MPa or less.

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