JP2017098731A - High-accuracy amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-accuracy amplifier which reduces a DC offset component by a remaining ripple without generating a loop-back noise.SOLUTION: The high-accuracy amplifier includes: a signal exchange switch 20 which modulates a differential input signal Vin by a first clock signal φ1 and an inverted signal *φ1 thereof; an amplifier 30 which amplifies a modulation target signal Va output from the signal exchange switch 20; and a signal exchange switch 50 which demodulates an amplified modulation target signal Vb output from the amplifier 30 by the clock signals φ1, *φ1. A dummy switch 40 is connected between the amplifier 30 and the signal exchange switch 50. The dummy switch 40 gives a ripple to the modulation target signal Vb by clock signals φ2, *φ2 having the same frequency as the clock signals φ1, *φ1 and different phases.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a chopper type high precision amplifier.

  In order to amplify a signal component near the direct current with high accuracy, an amplifier having a low input conversion offset voltage is required. Conventional techniques for reducing the input conversion offset voltage mainly include auto zero, chopping, and CDS (Correlated Double Sampling). However, auto zero and CDS have a drawback that noise in the signal band increases due to aliasing noise, and chopping has a disadvantage that an input conversion offset voltage increases due to a ripple component generated by chopping.

  FIG. 5 shows a conventional high precision amplifier using chopping. 10 is an input terminal for receiving a differential input signal Vin, 20 is a first signal exchange switch, 30 is an inverting amplifier, 50 is a second signal exchange switch, and 60 is an output terminal for outputting a differential output signal Vout. (For example, see FIG. 10 of Patent Document 1).

  As shown in FIG. 6A, the signal exchange switch 20 includes input terminals 21 and 22, output terminals 23 and 24, and switches SW21, SW22, SW23, and SW24. The switch SW21 connects the input terminal 21 and the output terminal 23, the switch SW22 connects the input terminal 22 and the output terminal 24, the switch SW23 connects the input terminal 22 and the output terminal 23, and the switch SW24 connects the input terminal 21 and the output terminal. The terminals 24 are connected.

  When the switches SW21 and SW22 are turned on by the clock signal φ1 shown in FIG. 6B and the clock signal * φ1 having the same frequency as that of the clock signal φ1 and a phase different by 180 degrees, the switches SW21 to SW24 are switched. Is turned off, and when the switches SW21 and SW22 are turned off, the switches SW23 and SW24 are controlled to turn on.

  As a result, a signal input to the input terminal 21 of the signal exchange switch 20 is alternately output to the output terminal 23 and the output terminal 24. A signal input to the input terminal 22 is alternately output to the output terminal 24 and the output terminal 23.

  The switches SW21 and SW22 are operated by an analog switch including an NMOS transistor MN1 operating with a clock signal φ1 and a PMOS transistor MP1 operating with a clock signal * φ1 shown in FIG. 7A, or with a clock signal φ1 shown in FIG. 7B. The NMOS transistor MN2 to be operated, or the PMOS transistor MP2 operated by the clock signal * φ1 shown in FIG.

  The switches SW23 and SW24 are analog switches composed of an NMOS transistor MN3 operating with a clock signal * φ1 and a PMOS transistor MP3 operating with a clock signal φ1 shown in FIG. 8A, or a clock signal * φ1 shown in FIG. The NMOS transistor MN4 is operated, or the PMOS transistor MP4 is operated by the clock signal φ1 shown in FIG.

  The signal exchange switch 50 is configured in the same manner as the signal exchange switch 20 and operates in the same manner.

  In the high-precision amplifier shown in FIG. 5, the normal signal of the input voltage Vin input to the input terminal 21 of the first signal exchange switch 20 and the inverted signal of the input voltage Vin input to the input terminal 22 are the first signal. When output to the output terminal 23 and the output terminal 24 of the exchange switch 20, the modulated voltage Va is frequency-converted to the frequency of the clock signal φ1 by switching every half cycle of the clock signals φ1, * φ1. Then, the frequency-converted modulated voltage Va is amplified by the inverting amplifier 30 to become a modulated voltage Vb. At this time, the input conversion offset voltage Voff1 present in the inverting amplifier 30 is also amplified to the offset voltage Voff2. The modulated voltage Vb amplified by the inverting amplifier 30 is demodulated by the second signal exchange switch 50 in the same way as the first signal exchange switch 20 by demodulating the inverted signal and the normal signal by the clock signal φ1, and the input voltage Vin. The output voltage Vout is restored to the frequency component. The modulated input equivalent offset voltage Voff3 included in the output voltage Vout is removed by a low-pass filter (not shown) connected to the output terminal 60. A series of voltage changes in this process is shown in FIG.

  As described above, in the high-precision amplifier shown in FIG. 5, the modulation process using the clocks φ1 and * φ1 in the first signal exchange switch 20 and the demodulation process using the clocks φ1 and * φ1 in the second signal exchange switch 50 are performed. The input conversion offset voltage is moved to the high frequency band and removed by the low pass filter.

  However, in the high-accuracy amplifier shown in FIG. 5, the charge Vr1 accumulated in the switch by passing through the first signal exchange switch 20 is changed as shown in the enlarged view of the modulated signal Vb in FIG. Since the charge (not shown) that is superimposed on the modulated signal Vb and passes through the second signal exchange switch 50 is also superimposed on the output signal Vout, the residual ripple Vrp1 is added to the output signal Vout. Will occur. This is called charge injection. The remaining ripple Vrp1 appears in the output signal Vout with the same polarity. Since the low-pass filter is connected to the subsequent stage of the second signal exchange switch 50 as described above, the DC component due to the residual ripple Vrp1 remains as an offset component in the output signal Vout.

  As a technique for reducing the effect of offset components due to residual ripple caused by such signal exchange, separate signal exchange switches are connected to the front and rear stages of a high-precision amplifier, respectively (Non-patent Document 1). . According to this, the remaining ripple component is symmetric with respect to positive and negative, and the DC component due to the remaining ripple can be suppressed.

Japanese Patent No. 5537342 “A CMOS Nested-Chopper Instrumentation Amplifier with 100-nV Offset” IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL.35 NO.12, DECEMBER 2000.

  However, the technique according to Non-Patent Document 1 has a problem that the number of signal exchange switches is further increased by two stages, and aliasing noise increases by the increase.

  An object of the present invention is to provide a high-accuracy amplifier in which a DC offset component due to a residual ripple is reduced without generating aliasing noise.

  In order to achieve the above object, the invention according to claim 1 is directed to a first signal exchange switch that modulates a differential input signal using a first clock signal and an inverted signal of the first clock signal; An amplifier for amplifying a differential modulated signal output from one signal exchange switch, and a differential modulated signal amplified by the amplifier by means of the first clock signal and an inverted signal of the first clock signal In a high-precision amplifier having a second signal exchange switch for demodulation, a dummy switch is connected between the first signal exchange switch and the amplifier or between the amplifier and the second signal exchange switch. The dummy switch is connected to the modulated signal by a second clock signal having the same frequency and phase as the first clock signal and an inverted signal of the second clock signal. Characterized in that it gives the pull.

  According to a second aspect of the present invention, in the high-precision amplifier according to the first aspect, the second clock signal has a phase difference of 90 degrees with respect to the first clock signal, and the second clock signal The inverted signal has a phase difference of 90 degrees with respect to the inverted signal of the first clock signal.

  According to a third aspect of the present invention, in the high-precision amplifier according to the first or second aspect, the dummy switch turns on / off transmission of one of the differential modulated signals from the input side to the output side. A first switch that turns on, a second switch that turns on / off transmission of the other signal of the differential modulated signal from the input side to the output side, and wiring between both ends of the first switch And a second wiring wired between both ends of the second switch, and the first clock signal and an inverted signal of the second clock signal are used to generate the first wiring. The second switch is turned off when the switch is turned on, and the second switch is turned on when the first switch is turned off.

  According to the present invention, the offset component due to the influence of residual ripple caused by signal exchange can be reduced by the dummy switch.

1 is a circuit block diagram showing a configuration of a high-precision amplifier according to a first embodiment of the present invention. (A) is a circuit diagram of a dummy switch of the high-precision amplifier of FIG. 1, and (b) is a waveform diagram of clock signals φ1, * φ1, φ2, and * φ2. FIG. 3 is an enlarged waveform diagram of voltages Va, Vc, and Vout of the high-precision amplifier according to the first embodiment. It is a circuit block diagram which shows the structure of the high precision amplifier of the 2nd Example of this invention. It is a circuit block diagram which shows the structure of the conventional high precision amplifier. (A) is a circuit diagram of the signal exchange switch 20 of the high-precision amplifier of FIG. 5, and (b) is a waveform diagram of the clock signals φ1, * φ1. (A), (b), (c) is explanatory drawing which shows the structure of switch SW1, SW2 of the signal exchange switch 20 of the high precision amplifier of FIG. (A), (b), (c) is explanatory drawing which shows the structure of switch SW3, SW4 of the signal exchange switch 20 of the high precision amplifier of FIG. FIG. 6 is a waveform diagram of voltages Vin, Va, Vb, and Vout of the high-precision amplifier of FIG. 5. FIG. 6 is an enlarged waveform diagram of voltages Vb and Vout of the high precision amplifier of FIG. 5.

<First embodiment>
FIG. 1 shows the configuration of a high-precision amplifier according to the first embodiment of the present invention. The same components as those described with reference to the high-precision amplifier in FIG. In this embodiment, a dummy switch 40 is connected between the inverting amplifier 30 and the second signal exchange switch 50.

  As shown in FIG. 2A, the dummy switch 40 includes a switch SW41 connected between the input terminal 41 and the output terminal 42, a switch SW42 connected between the input terminal 42 and the output terminal 44, The wiring 45 is connected between the input terminal 41 and the output terminal 42, and the wiring 46 is connected between the input terminal 42 and the output terminal 44. The switch SW41 can be composed of the transistors shown in FIGS. 7A to 7C, and the switch SW42 can be composed of the transistors shown in FIGS. 8A to 8C.

  The switch SW41 is switched by a clock signal φ2 whose phase is advanced by 90 degrees at the same frequency as the clock signal φ1, and the switching SW42 is switched by a clock signal * φ2 whose phase is advanced by 90 degrees at the same frequency as the clock signal * φ1. That is, when the switch SW41 is on, the switch SW42 is off, and when the switch SW41 is off, the switch SW42 is on. FIG. 2B shows the waveforms of the clock signals φ1, * φ1, φ2, and * φ2.

  The dummy switch 40 switches with respect to the modulated voltage Vb amplified by the inverting amplifier 30. Due to this switching, the charge Vr2 accumulated in the switches SW41 and SW42 is related to the output impedance of the inverting amplifier 30 in the previous stage connected to the dummy switch 40 and the input impedance of the second signal exchange switch 50 in the subsequent stage. At a timing that is 90 degrees out of phase with the generation timing of the charge Vr1, it appears in the modulated voltage Vc with a polarity opposite to that of the charge Vr1.

  Therefore, the output voltage Vout obtained by demodulating the modulated voltage Vc by the second signal exchange switch 50 includes the charge Vr1 of the first signal exchange switch 20 and the second signal exchange switch 50 as shown in FIG. In addition to the ripple Vrp1 due to the charge, a ripple Vrp2 having a reverse polarity due to the charge Vr2 appears. Therefore, by inputting the output voltage Vout to a low-pass filter (not shown) in the subsequent stage, the DC component of the ripple Vrp1 is canceled out by the DC component of the ripple Vrp2, and eventually the offset component due to the ripple of the signal exchange switches 20 and 50 is reduced. can do.

<Second embodiment>
FIG. 4 shows the configuration of the high-precision amplifier of the second embodiment. In this embodiment, the dummy switch 40 is connected between the first signal exchange switch 20 and the inverting amplifier 30 and is driven by the clock signals φ2 and * φ2. Therefore, also in this embodiment, the electric charge accumulated in the switches SW41 and SW42 appears in the modulated voltage Vd appearing on the output side of the dummy switch 40, similarly to the modulated voltage Vc shown in FIG. An offset component due to ripple generated in the switches 20 and 50 can be reduced.

<Other examples>
In the above embodiment, the clock signal φ2 is advanced by 90 degrees with respect to the clock signal φ1 and the clock signal * φ2 is advanced by 90 degrees with respect to the clock signal * φ1, but the phase shift amount D is 0 degrees. It is sufficient if <D <180 degrees. That is, the clock signal φ2 is not in phase with the clock signal φ1, and the clock signal * φ2 may not be in phase with the clock signal * φ1. However, the clock signals φ2 and * φ2 require a phase difference of 180 degrees. Further, the inverting amplifier 30 may be a non-inverting amplifier. Further, the size of the ripple Vr2 generated by the dummy switch 40 can be adjusted by the area of the switches SW41 and SW42 so that the ripple Vrp1 can be canceled.

  10: input terminal, 20: first signal exchange switch, 30: inverting amplifier, 40: dummy switch, 50: second signal exchange switch, 60: output terminal

Claims (3)

A first signal exchange switch that modulates a differential input signal with a first clock signal and an inverted signal of the first clock signal, and a differential modulated signal output from the first signal exchange switch And a high-precision amplifier having a second signal exchange switch for demodulating the differential modulated signal amplified by the amplifier by the first clock signal and an inverted signal of the first clock signal,
Connecting a dummy switch between the first signal exchange switch and the amplifier or between the amplifier and the second signal exchange switch;
The dummy switch gives a ripple to the modulated signal by a second clock signal having the same frequency as the first clock signal and having a different phase and an inverted signal of the second clock signal. amplifier. The high precision amplifier according to claim 1.
The second clock signal has a phase difference of 90 degrees with respect to the first clock signal, and the inverted signal of the second clock signal is 90 degrees with respect to the inverted signal of the first clock signal. A high-precision amplifier characterized by having a phase difference. The high precision amplifier according to claim 1 or 2,
The dummy switch includes: a first switch that turns on / off transmission of one signal of the differential modulated signal from an input side to an output side; and the input of the other signal of the differential modulated signal. A second switch for turning on / off transmission from the output side to the output side, a first wiring wired between both ends of the first switch, and a second wiring wired between both ends of the second switch 2 wiring,
According to the second clock signal and an inverted signal of the second clock signal, the second switch is turned off when the first switch is turned on, and the second switch is turned off when the first switch is turned off. A high-precision amplifier characterized by turning on.

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