JP2017083992A - Constant voltage power supply circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a constant voltage power supply circuit that can detect and restrict reverse current that flows when an output terminal is short-circuited, with a simple configuration.SOLUTION: A constant voltage power supply circuit 2 supplies a constant voltage from an output terminal OUT to a load 1. An npn-type transistor 3 as an output transistor is provided on a power path from a power supply VD, and base current is supplied from a constant current source 4. An output voltage Vout is inputted from a terminal B and compared with a reference voltage by an amplifier 6, the transistor 3 is controlled to output the constant voltage. When the output terminal OUT is short-circuited and becomes high potential, reverse current flows from an emitter to a base of the transistor 3 so that large current flows through the transistor 5. A short-circuit detection circuit 7 detects the short circuit, restricts the operation of the amplifier 6 to suppress current through the transistor 5.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a constant voltage power supply circuit.

  Some constant-voltage power supply circuits have an npn-type output transistor in the output stage, and some have an N-channel type output MOSFET to which a protective diode is connected. In these power supply circuits, when an output terminal that outputs a constant voltage causes a power fault that contacts the power supply terminal or the like, a reverse current flows in the power supply circuit. As a result, a large current flows in the power supply circuit and heat is generated. In order to prevent this, conventionally, when a backflow occurs due to a power fault, the current is detected and controlled so that a current exceeding a certain level does not flow, thereby suppressing heat generation due to the power fault. is there.

  For example, there is one that detects a power supply fault by a comparator and turns off an output transistor from the signal to prevent a large current from flowing. Also, there is a Zener diode that breaks down when a power supply fault occurs, and operates the transistor to detect the power fault and turn off the output transistor.

  However, since these conventional techniques add not only a comparator but also various circuit elements in order to detect a power fault, there is a problem that the circuit scale becomes large.

JP 2000-244256 A Japanese Patent Laid-Open No. 06-338733

  The present invention has been made in consideration of the above circumstances, and its object is to provide a constant voltage power supply circuit that can detect and limit a reverse current that flows when the output terminal has a power fault with a simple configuration. Is to provide.

  The constant voltage power supply circuit according to claim 1 is connected between an output terminal for supplying power to a load and a power supply, and an output transistor comprising an npn-type transistor or an n-channel MOSFET having a protective diode between a gate and a source; A control circuit that controls the output transistor to monitor the voltage at the output terminal to obtain a predetermined voltage; and a reverse current that flows from the output terminal between the emitter and base of the output transistor or through the protective diode. And a power fault detection circuit for detecting when it exceeds a predetermined level and stopping or limiting control of the output transistor by the control circuit.

  By adopting the above configuration, the control circuit controls the output transistor to supply a constant voltage to the load. When the output terminal has a power fault, a reverse current is generated in the output transistor. In this case, when the output transistor is an npn transistor, a reverse current flows from the emitter to the base. When the output transistor is an n-channel MOSFET, the reverse current flows from the source to the gate via the protective diode. Current flows.

  Then, the power supply detection circuit can detect a power supply fault state when the backflow current exceeds a predetermined value, and can stop or limit control of the output transistor by the control circuit. As a result, it is possible to control so that the backflow current generated by the power fault does not flow beyond a certain level, and heat generation due to the power fault can be suppressed.

Schematic electrical configuration diagram showing the first embodiment Electrical configuration diagram Time chart showing the transition of the state of each part Schematic electrical configuration diagram showing the second embodiment Electrical configuration diagram Schematic electrical configuration diagram showing the third embodiment Diagram showing an example of amplifier configuration

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS.
In FIG. 1 showing a schematic configuration, a low voltage power supply circuit 2 for supplying a constant voltage to a load 1 is provided in an ECU (electrical control unit). The constant voltage power supply circuit 2 is supplied with power from the DC power supply VD to the power supply terminal A, and supplies a constant output voltage Vout to the load 1 from the output terminal OUT. The npn-type transistor 3 as an output transistor has a collector connected to a terminal A that communicates with a power supply VD, and an emitter connected to an output terminal OUT. The output voltage Vout is input to the monitoring terminal B.

  A constant current source 4 for supplying a base current is connected between the collector and the base of the npn transistor 3. The base of the npn transistor 3 is connected to the emitter of the pnp transistor 5. The pnp transistor 5 functions as a driving transistor, and its base is connected to the output terminal of an amplifier 6 as a control circuit. Further, the collector of the pnp transistor 5 is connected to the ground via the power detector 7.

  A reference voltage Vref is applied to the non-inverting input terminal of the amplifier 6 via the terminal C from the outside. The inverting input terminal of the amplifier 6 is connected to the terminal B, and the output voltage Vout of the output terminal OUT is input. The amplifier 6 compares the output voltage Vout input to the terminal B with the reference voltage Vref, drives the pnp transistor 5 so as to eliminate the difference, and controls the output voltage Vout to a constant voltage. The power supply detection circuit 7 detects the presence of a power supply fault at the output terminal OUT based on the current flowing through the pnp transistor 5 and controls the operation of the amplifier 6.

  By adopting the above configuration, when power is supplied from the power supply VD to the constant voltage power supply circuit 2, the amplifier 6 has a high voltage at the base of the pnp transistor 5 when the output voltage Vout at the output terminal OUT is lower than the reference voltage Vref. And is controlled to be close to off. As a result, the pnp transistor 5 does not flow much current from the constant current source 4, and a large amount of base current is supplied from the constant current source 4 to the npn transistor 3. As a result, the npn transistor 3 outputs a high output voltage Vout as the voltage between the collector and the emitter decreases.

  On the other hand, when the output voltage Vout becomes higher than the constant voltage, the output of the amplifier 6 becomes a low voltage, and the collector current of the pnp transistor 5 increases. As a result, a large amount of current from the constant current source 4 flows through the pnp transistor 5, and the npn transistor 3 acts so that the base current decreases and the collector-emitter voltage increases and the output voltage Vout decreases. By performing the operation as described above, the amplifier 6 controls the output voltage Vout to be a constant voltage.

  Next, the operation when the output terminal OUT is in a power fault state as shown by the broken line in FIG. 1 in the above configuration will be described. When a power supply fault occurs, the potential of the output terminal OUT becomes the voltage of the power supply VD and becomes abnormally high. As a result, a reverse current flows from the emitter to the base of the npn transistor 3. As a result, the collector current of the pnp transistor 5 increases. When the collector current from the pnp transistor 5 increases, the power supply detection circuit 7 detects the power supply state and controls the output voltage at the terminal E so as to limit the output of the amplifier 6. A high voltage is applied to the base of the pnp-type transistor 5, and a large current is suppressed from flowing between the collector and the emitter.

  Next, an example of a specific configuration of the constant voltage power supply circuit 2 will be described with reference to FIG. In FIG. 2, the pnp-type transistor 5 is configured to be divided into a driving transistor 5a and a current detection transistor 5b. The emitters of the transistors 5 a and 5 b are connected to the base of the npn transistor 3, and the base is connected to the terminal E of the amplifier 6. The collector of the transistor 5 a is connected to the ground, and the collector of the transistor 5 b is connected to the power supply detection circuit 7.

  In the amplifier 6, a series circuit of a constant current source 6a, an npn transistor 6b, and a resistor 6c is connected between a power supply VD and the ground. The collector of the npn transistor 6b is connected to the terminal E. Between the collector of the npn-type transistor 6b and the ground, the collector-emitter of the npn-type transistor 6d is connected. The base of the npn transistor 6d is connected to the emitter of the npn transistor 6b.

  A series circuit of a constant current source 6e and an npn transistor 6g is connected between the power supply VD and the ground. The collector of the npn-type transistor 6f is also connected to the base of the npn-type transistor 6b and serves as a node N. Node N is connected to terminal F. The base of the npn transistor 6f is connected to the terminal C and is supplied with a reference voltage Vref.

  The power supply detection circuit 7 includes npn transistors 7a and 7b and a current detection resistor 7c constituting a current mirror circuit. The collector of the npn transistor 7a is connected in common with the base, and is connected to the collector of the pnp transistor 5b. A current detection resistor 7c is connected between the base and emitter of the npn transistor 7a. The base and emitter of npn transistor 7b are connected to the base and emitter of npn transistor 7a, respectively. The collector of the npn transistor 7 b is connected to the terminal F of the amplifier 6. The bases of the npn transistors 7a and 7b are a node S.

  In the above configuration, when the output voltage Vout from the output terminal OUT is a constant voltage and is not in the power supply state, the current from the detection pnp transistor 5b is small and the power supply detection circuit 7 does not operate. It is set to become. In other words, the power supply detection circuit 7 is provided so that the current flowing through the current detection resistor 7c is small and the potential of the node S does not rise to a voltage sufficient to operate the npn transistor 7a.

The operation of the above configuration will be described with reference to FIG. Since the operation when no power fault occurs is similar to the above-described operation, the description thereof is omitted, and the operation when the power fault occurs is described.
The operation when the output terminal OUT is in a power fault state as indicated by a broken line in FIG. 2 will be described. When a power fault occurs at time t1, the potential of the output terminal OUT rises to the voltage of the power supply VD. As a result, the base / emitter of the npn transistor 3 is reverse-biased to break down and flow from the emitter toward the base. The base current Ib of the npn transistor 3 that has been flowing from the base to the emitter gradually decreases, and starts flowing as a backflow current from the emitter to the base at time t2.

  As a result, the collector current of the pnp transistor 5b increases. In the power supply detection circuit 7, when the collector current from the pnp transistor 5b increases, the potential of the node S increases due to the increase in the current flowing through the current detection resistor 7a. When the potential of the node S reaches the base-emitter forward voltage Vf of the npn transistor 7a at time t3, the npn transistor 7a is turned on. As a result, the npn transistor 7b constituting the current mirror circuit is turned on to draw current.

  In the amplifier 6, since the current is drawn from the node N by the power supply detection circuit 7, the base current of the npn transistor 6b is reduced and the collector current is reduced. As a result, the collector current of the npn transistor 6d connected in Darlington also decreases. As a result, the potential of the terminal E of the amplifier 6 is raised to a certain level, so that the base current of the pnp transistors 5a and 5b is reduced and the collector current is controlled to be reduced. As a result, it is possible to suppress a large current from flowing through the pnp transistors 5a and 5b.

  According to the first embodiment, since the power supply detecting circuit 7 for detecting the reverse current of the npn transistor 3 is provided, the pnp transistor due to the reverse flow of the base current of the npn transistor 3 It is possible to limit the operation of the amplifier 6 by detecting a state where the collector current of 5 (5b) becomes a large current. Thereby, it is possible to suppress a large current from flowing through the pnp transistor 5 (5b).

  Further, since the power supply detection circuit 7 is provided with the npn transistors 7a and 7b and the current detection resistor 7c constituting the current mirror circuit, the above operation can be realized with a simple structure.

(Second Embodiment)
FIG. 4 and FIG. 5 show the second embodiment. Hereinafter, parts different from the first embodiment will be described. In this embodiment, a constant voltage power supply circuit 10 is provided in place of the constant voltage power supply circuit 2. The constant voltage power supply circuit 10 is provided with an n-channel MOSFET 11 as an output transistor. In addition, two zener diodes 12 and 13 are connected in series in the reverse direction between the gate and source for protecting the gate of the n-channel MOSFET 11. The Zener diodes 12 and 13 have a Zener voltage that does not turn on in normal operation.

  Similarly, the other bipolar transistors used in the constant voltage power supply circuit 2 are replaced with MOSFETs in the constant voltage power supply circuit 10. That is, a p-channel MOSFET 14 is provided in place of the pnp transistor 5. In addition, the amplifier 6 and the power supply detection circuit 7 are provided with an amplifier 15 and a power supply detection circuit 16 in which the internal transistors are constituted by MOSFETs.

In the above configuration, in a normal operation, the output voltage Vout of the output terminal OUT is controlled to be a constant voltage by the function of the amplifier 15.
When the output terminal OUT is in a power supply state as shown by a broken line in FIG. 4, the potential of the output terminal OUT abnormally rises to the potential of the power supply VD, so that the Zener diode 12 breaks down and the source to the gate side. A reverse current flows through the. This reverse current becomes the drain current of the p-channel MOSFET 14 and a large current tends to flow. At this time, the power detection circuit 16 limits the operation of the amplifier 15 when a large current is detected, thereby suppressing a large current from flowing through the p-channel MOSFET 14.

  Next, an example of a specific configuration of the constant voltage power supply circuit 10 will be described with reference to FIG. In FIG. 5, the p-channel type MOSFET 14 is configured to be divided into a driving MOSFET 14a and a current detecting MOSFET 14b. The sources of the MOSFETs 14 a and 14 b are connected to the gate of the n-channel MOSFET 11, and the gate is connected to the terminal E of the amplifier 15. The drain of the MOSFET 14 a is connected to the ground, and the drain of the MOSFET 14 b is connected to the power detection circuit 16.

  In the amplifier 15, a series circuit of a constant current source 15a, an n-channel MOSFET 15b, and a resistor 15c is connected between the power supply VD and the ground. The drain of the n-channel type MOSFET 15b is connected to the terminal E. The drain-source of the n-channel MOSFET 15d is connected between the drain of the n-channel MOSFET 15b and the ground. The gate of the n-channel MOSFET 15d is connected to the source of the n-channel MOSFET 15b.

  A series circuit of a constant current source 15e and an n-channel MOSFET 15g is connected between the power supply VD and the ground. The drain of the n-channel type MOSFET 15f is also connected to the gate of the n-channel type MOSFET 15b, and serves as a node N. Node N is connected to terminal F. The gate of the n-channel MOSFET 15f is connected to the terminal C and is supplied with a reference voltage Vref.

  The power supply detection circuit 16 includes n-channel MOSFETs 16a and 16b and a current detection resistor 16c constituting a current mirror circuit. The drain of the n-channel MOSFET 16a is connected in common with the gate, and is connected to the drain of the p-channel MOSFET 16b. A current detection resistor 16c is connected between the gate and source of the n-channel MOSFET 16a. The gate and source of the n-channel MOSFET 16b are connected to the gate and source of the n-channel MOSFET 16a, respectively. The drain of the n-channel type MOSFET 16 b is connected to the terminal F of the amplifier 15. The gates of the n-channel MOSFETs 16a and 16b are a node S.

  In the above configuration, when the output voltage Vout from the output terminal OUT is a constant voltage and is not in a power fault state, the current due to the detection p-channel MOSFET 14b is small and the power fault detection circuit 16 does not operate. It is set to become. That is, the power supply detection circuit 16 is provided so that the current flowing through the current detection resistor 16c is small and the potential of the node S does not rise to a voltage sufficient to operate the n-channel MOSFET 16a.

Even in the above configuration, when the output terminal OUT is in a power fault state as indicated by a broken line in FIG. 5, the power fault detection circuit 16 limits the operation of the amplifier 15 when a large current is detected in the same manner as described above. As a result, it is possible to suppress a large current from flowing through the p-channel MOSFET 14.
Also by such 2nd Embodiment, the effect similar to 1st Embodiment can be acquired.

(Third embodiment)
FIG. 6 and FIG. 7 show the third embodiment, and the following description will be focused on differences from the first embodiment.

  In FIG. 6, which shows a schematic configuration, the constant voltage power supply circuit 20 includes a power supply detection circuit 21 that replaces the power supply detection circuit 7. The power detection circuit 21 includes a current detection resistor 21a and a comparison circuit 21b. The current detection resistor 21a is provided so as to detect the base current Ib of the npn transistor 3 serving as an output transistor. The comparison circuit 21b receives the voltage across the current detection resistor 21a, detects a state in which the base current Ib of the npn transistor 3 is flowing in reverse, and outputs a high level detection signal.

  FIG. 7 shows the configuration of the amplifier 22. Unlike the first embodiment, the power supply detection circuit 21 outputs a high level signal when a power supply state is detected. Therefore, even in the configuration of the amplifier 22, control is performed to limit the current when the high level signal is received by the node N. It is comprised so that operation | movement may be performed. In this case, an npn transistor 6g is added to the configuration of the amplifier 6 shown in FIG.

  The collector and emitter of the npn transistor 6g are connected between the node N and the ground. The base of the npn transistor 6g is connected to the terminal F. As a result, when a high level signal is received at the terminal F from the power supply detection circuit 21, the npn transistor 6g is turned on to lower the potential of the node N to the ground level.

  By adopting the above configuration, in the normal state, the base current Ib of the npn transistor 3 is positive, that is, applied so as to flow from the base to the emitter. Therefore, the terminal voltage of the current detection resistor 21a is low at the base-side terminal P, The constant current source 4 side is in a high state. Thereby, in the comparison circuit 21b, since a higher voltage is input to the inverting input terminal side than to the non-inverting input terminal side, a low level signal is output. Thereby, the amplifier 22 performs a normal operation and controls the output voltage Vout to be a constant voltage.

  On the other hand, as indicated by a broken line in FIG. 6, when the output terminal OUT becomes a power supply state, a reverse current flows between the base and the emitter of the npn transistor 3 as described above, and the pnp is passed through the current detection resistor 21a. It flows to the type transistor 5 side. Thereby, in the power supply detection circuit 21, the voltage between the terminals of the current detection resistor 21a becomes higher on the terminal P side, so that the comparison circuit 21b outputs a high level detection signal.

In the amplifier 22, since a high level detection signal is input to the terminal F from the power supply detection circuit 21 side, the npn transistor 6g is turned on, and the potential of the node N is lowered to the ground level. As a result, the amplifier 22 controls the output voltage of the terminal E, and a high voltage is applied to the base of the pnp-type transistor 5, so that a large current is prevented from flowing between the collector and the emitter.
Therefore, the effect similar to 1st Embodiment can be acquired also by such 3rd Embodiment.

(Other embodiments)
In addition, this invention is not limited only to one embodiment mentioned above, It can apply to various embodiment in the range which does not deviate from the summary, For example, it can deform | transform or expand as follows. .

In the first embodiment and the second embodiment, an example of the specific circuit is shown in FIG. 2 or FIG. 5, but the specific circuit is not limited to this, and various circuits that achieve the same function can be employed.
In the third embodiment, the amplifier 22 corresponding to the configuration in which the power supply detection circuit 21 outputs a high level signal by power supply detection is used. However, the power supply detection of the power supply detection circuit 21 is at a low level. It is also possible to configure a circuit. In this case, the amplifier 6 shown in the first embodiment can be employed.

  In the drawing, 1 is a load, 2 is a low voltage circuit, 3 is an npn transistor (output transistor), 4 is a constant current source, 5 and 5b are pnp transistors, 6, 15 and 22 are amplifiers (control circuit), 7 16, 21 are power detection circuits, 7a and 7b are npn transistors (current mirror circuits), 7c and 16c are current detection resistors, 11 is an n-channel MOSFET (output transistor), and 12 and 13 are zener diodes (protection). Diodes 14 and 14b are p-channel MOSFETs (detection transistors), 16a and 16b are n-channel MOSFETs (current mirror circuits), 21a is a current detection resistor, and 21b is a comparison circuit.

Claims (3)

An output transistor (3, 11) comprising an npn-type transistor or an n-channel MOSFET having a protective diode between the gate and the source, connected between an output terminal for supplying power to the load (1) and the power supply;
A control circuit (6, 15, 22) for controlling the output transistor to monitor the voltage at the output terminal to obtain a predetermined voltage;
A fault detection that stops or restricts the control of the output transistor by the control circuit by detecting when a reverse current flowing from the output terminal between the emitter and base of the output transistor or via the protective diode exceeds a predetermined value. A constant voltage power supply circuit comprising a circuit (7, 16, 21). The low voltage power supply circuit according to claim 1,
The power detection circuit (7, 16)
Detecting a current generated by the power supply, and a detection transistor (5b, 14b) comprising a pnp transistor or a p-channel MOSFET;
A current detection resistor (7c, 16c) provided so that a current of the detection transistor flows;
A constant voltage power supply circuit comprising a current mirror circuit (7a, 7b, 16a, 16b) driven by a terminal voltage of the current detection resistor. The constant voltage power supply circuit according to claim 1,
The power detection circuit (21)
A current detection resistor (21a) for detecting a base current of the output transistor;
A constant voltage power supply circuit comprising a comparison circuit (21b) for comparing a voltage generated at both ends of the current detection resistor to detect a reverse current greater than the predetermined value.

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