JP2017079127A - Inductively coupled plasma generating apparatus, self bias applying apparatus, plasma processing apparatus, plasma generating method, and self bias applying method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an inductively coupled plasma generating apparatus which is suitable for a minimal fab system and can be miniaturized, and further to provide a self bias applying apparatus, a plasma processing apparatus, a plasma generating method, and a self bias applying method.SOLUTION: The inductively coupled plasma generating apparatus includes: a high frequency power supply circuit 7 having a bridge circuit 7g for converting DC power 7a into high frequency power and outputting it, a transformer 7j for transforming the high frequency power output from the bridge circuit 7g, and a resonance capacitor C connected in series to the transformer 7j; and a plasma generation antenna 5e which is an inductor and is supplied with the high frequency power transformed by the transformer 7j.SELECTED DRAWING: Figure 2

Description

  The present invention relates to an inductively coupled plasma generator, a self-bias application device, a plasma processing device, a plasma generation method, and a self-bias application method that include a power supply circuit that converts DC power into high-frequency power and outputs the power.

  In recent years, as a semiconductor device production line, it is fundamental to create one device on a 0.5-inch (half-inch) wafer. For this purpose, the manufacturing process is composed of a plurality of portable unit processing devices. , A minimal fab system has been proposed that makes it easy to relocate these multiple unit processing devices to flowships and job shops, making it suitable for ultra-low volume production and multi-product production ( For example, see Patent Document 1.)

  The unit processing apparatus adapted to this minimal fab system is formed in a substantially rectangular parallelepiped shape having a longitudinal direction in the vertical direction and is cut off from the outside air. A housing having a space is provided, and a wafer processing unit for processing a half-inch size wafer is accommodated in the housing (for example, see Patent Literature).

International Publication No. 2012/029775

  However, the minimal fab system of Patent Document 1 is a method of processing half-inch size wafers one by one with a unit processing apparatus. As a plasma processing apparatus for plasma etching the surface of a half-inch size wafer, No suggestion has been made. The housing of the unit processing apparatus adapted to the minimal fab system has an extremely small internal space. For example, in an inductively coupled plasma etcher that can independently control plasma generation and ion incident energy to the wafer. , A power supply circuit for driving a wafer processing unit such as a plasma processing apparatus, a power supply circuit used for a plasma generation unit for generating plasma in a chamber, and a power supply used for a wafer bias unit for applying a bias to a wafer on a stage The circuit is also required to be downsized.

  In order to supply high-frequency power to the plasma generation unit or the wafer bias unit, for example, it is necessary to match the impedance of a load such as an antenna or a bias unit with the impedance of a power source, for example, 50Ω to suppress reflection of the high-frequency power. Therefore, an impedance matching method is used in which the impedance that changes depending on the plasma state is adjusted using a variable capacitor. In this impedance matching method, a mechanical drive part such as a motor for controlling the variable capacitor and its control circuit are required for each of the plasma generation unit and the wafer bias unit, and can be easily accommodated in the case of the above-described minimal fab system. is not. For process methods that require gas replacement at high speed, such as the Bosch process method, a technique that achieves impedance matching at high speed is effective. However, the impedance matching method described above performs impedance matching by mechanical drive of a variable capacitor. In order to adjust, there exists a problem that it is inferior to time responsiveness.

  The present invention has been made from the above-described prior art, and an object of the present invention is to reduce the size of an inductively coupled plasma generator, a self-bias applying device, a plasma processing device, and a plasma generation method suitable for a minimal fab system. And a self-bias application method.

  To achieve the above object, the present invention provides an inverter unit that converts DC power into high-frequency power and outputs it, a transformer unit that transforms high-frequency power output from the inverter unit, and a series connection to the transformer unit. The inductively coupled plasma generator includes a power supply circuit having a resonance capacitor and a plasma generation antenna that is an inductor and is supplied with high-frequency power transformed by the transformer.

  According to the present invention configured as described above, when switching of the inverter unit is performed at a frequency corresponding to the resonance frequency, it is possible to increase the high-frequency current flowing through the load, and when the plasma generating antenna is a load. In this case, the intensity of the induction electromagnetic field increases and plasma generation becomes possible. However, when the plasma is generated or when the plasma state changes, the impedance of the load fluctuates and the resonance frequency fluctuates. The deviation from the resonance state before and after is adjusted by changing the drive frequency, so that the resonance state can always be maintained and high-frequency power can be supplied efficiently. Therefore, since high-frequency power can be input without using a high-frequency power impedance matching device called a so-called matcher, which is generally composed of a variable capacitor group and a mechanical drive part for controlling the capacitor, downsizing is possible. This is possible, and is suitable for a power supply circuit of a minimal fab system configured by a unit processing device standardized to a predetermined size.

  In order to achieve the above object, according to the present invention, the power supply circuit detects a current value between the inverter unit and the transformer unit, and controls a high-frequency power output from the inverter unit. An inductively coupled plasma generator having a section is provided.

  The present invention configured as described above detects a current value between the inverter unit and the transformer unit, and for example, a resonance in which the voltage and current phases of the inverter unit are equal, that is, the load impedance is a pure resistance component. By controlling the frequency of the high-frequency power output from the inverter unit so as to always maintain the state, it is possible to maintain the resonance state following the fluctuation of the load impedance.

  In order to achieve the above object, according to the present invention, the inverter unit includes a plurality of switching elements, and the frequency control unit detects a voltage value of each switching element and a current value of an output current. A phase comparison unit that compares the phase of the detected voltage value and the phase of the current value; a switching frequency control unit that controls the switching frequency of each of the switching elements based on the phase shift compared by the phase comparison unit; An inductively coupled plasma generator having

  The present invention configured as described above detects the voltage value of each switching element and the current value of the output current, and compares the phase of the detected voltage value with the phase of the current value in a phase comparison unit. By controlling the switching frequency of each switching element by the frequency controller so as to eliminate the phase shift, the resonance state can be controlled accurately and at high speed.

In order to achieve the above object, the present invention provides an inverter unit that converts DC power into high-frequency power and outputs it, a transformer unit that transforms high-frequency power output from the inverter unit, and the transformer unit. Self-bias application comprising: a power supply circuit having a resonance inductor connected in series; a self-bias capacitor to which high-frequency power transformed by the transformer is supplied; and a resonance capacitor connected in parallel to the capacitor The device.
It was.

  In the present invention configured as described above, when the inverter unit is switched at a frequency corresponding to the resonance frequency, it is possible to increase the high-frequency current flowing through the load, and when the self-bias capacitor is a load. It is possible to efficiently apply a high frequency voltage to the wafer. However, when the plasma is generated or when the plasma state changes, the impedance of the load fluctuates, so that the resonance frequency fluctuates. For example, a self-bias capacitor is connected as a load. Therefore, the deviation from the resonance state before and after plasma generation can be adjusted by changing the driving frequency, and a high frequency high voltage can always be applied to the wafer. Therefore, since high-frequency power can be input without using a high-frequency power impedance matching device called a so-called matcher, which is generally composed of a variable capacitor group and a mechanical drive part for controlling the capacitor, downsizing is possible. This is possible, and is suitable for a power supply circuit of a minimal fab system configured by a unit processing device standardized to a predetermined size.

  In order to achieve the above object, according to the present invention, the power supply circuit detects a current value between the inverter unit and the transformer unit, and controls a high-frequency power output from the inverter unit. A self-bias application device having a section is provided.

  The present invention configured as described above detects a current value between the inverter unit and the transformer unit, and for example, a resonance in which the voltage and current phases of the inverter unit are equal, that is, the load impedance is a pure resistance component. By controlling the frequency of the high-frequency power output from the inverter unit so as to always maintain the state, it is possible to maintain the resonance state following the fluctuation of the load impedance.

  In order to achieve the above object, according to the present invention, the inverter unit includes a plurality of switching elements, and the frequency control unit detects a voltage value of each switching element and a current value of an output current, A phase comparison unit that compares the phase of the detected voltage value and the phase of the current value; a switching frequency control unit that controls the switching frequency of each of the switching elements based on the phase shift compared by the phase comparison unit; A self-bias application device having

  The present invention configured as described above detects the voltage value of each switching element and the current value of the output current, and compares the phase of the detected voltage value with the phase of the current value in a phase comparison unit. By controlling the switching frequency of each switching element by the frequency controller so as to eliminate the phase shift, the resonance state can be controlled accurately and at high speed.

  In order to achieve the above object, the present invention provides a stage on which a wafer is placed, a chamber covering the stage, a vacuum evacuation unit for evacuating the chamber, and a position facing the stage of the chamber. A gas supply unit provided in the apparatus, a plasma generation unit that includes the inductively coupled plasma generation device according to any one of claims 1 to 3 and generates plasma in an etching gas in the gas supply unit, and A plasma processing apparatus having a self-bias application device according to any one of claims 6 to 6 and a wafer bias unit that induces a direct current self-bias by applying a high-frequency voltage to a wafer placed on the stage.

In the present invention configured as described above, the wafer is placed on the stage, the inside of the chamber is evacuated by the evacuation unit, and then the etching gas is supplied from the gas supply unit to the plasma generation unit. Plasma is generated by supplying high-frequency power. Before and after the plasma generation, the impedance of the load consisting of the plasma generation antenna and the plasma changes, so that the resonance frequency fluctuates, so that the phase of the output current and voltage of the inverter part of the inductively coupled plasma generator are aligned. Thus, by controlling the frequency of the high frequency power, the resonance state can be maintained without using a high speed and variable capacitor. The plasma and radical species generated by the plasma generation unit reach the wafer by diffusion. At the same time, a high-frequency voltage output from the self-bias application device is applied to the wafer. Since the resonance frequency of the wafer bias unit fluctuates when plasma from the plasma generation unit flows into the region including the wafer placed on the stage, the phases of the output current and voltage of the inverter unit of the self-bias application device are aligned. As described above, by controlling the frequency of the high-frequency power in the wafer bias portion, the resonance state can be maintained at high speed without using a variable capacitor.

  That is, in the plasma generation unit, the resonance generated by the plasma generation antenna, the resonance capacitor, and the plasma, and in the wafer bias unit, the resonance generated by the resonance inductor, the self-bias capacitor, the resonance capacitor, and the plasma, It can be maintained by controlling. Therefore, by controlling the high-frequency voltage and current output from the inverter unit to be equal, the wafer bias unit is connected even when the plasma generation antenna is connected as the high-frequency power supply destination. Even in such a case, the resonance state before and after plasma generation can be maintained. For this reason, the resonance state can be maintained without using a high-frequency power impedance matching device, which is generally called a so-called matcher, so that downsizing is possible, and it is standardized to a predetermined size. It is suitable as a control method for a power supply circuit of a minimal fab system composed of unit processing devices. In addition, there is no mechanical drive part that controls the variable capacitor in the matcher, and the resonance state is maintained only by controlling the frequency, so there is also a high speed of time response, and high speed response such as Bosch process. It is also suitable for processes that require high performance.

  In order to achieve the above object, the present invention provides an inverter unit having a plurality of switching elements for converting and outputting DC power to high frequency power, and transforming the high frequency power output from the inverter unit. A plasma generation method using a power supply circuit including a transformer unit, and an inductor and a capacitor connected in series to the transformer unit, wherein the switching is performed so that phases of high-frequency power output from the inverter unit are equal to each other The plasma generation method controls the switching frequency of the element.

  The present invention configured as described above can always maintain a resonance state by controlling the switching frequency of the switching element so that the phases of the high-frequency power output from the inverter unit are equal. On the other hand, since the output power corresponding to the product of the voltage and current in the same phase is determined by the impedance of the output side circuit including the transformer unit connected to the inverter unit and the DC power supply voltage, the stable control can be realized.

  In order to achieve the above object, the present invention provides an inverter unit having a plurality of switching elements for converting and outputting DC power to high frequency power, and transforming the high frequency power output from the inverter unit. A self-bias application method using a power supply circuit comprising a transformer unit, and an inductor and a capacitor connected in series to the transformer unit, wherein the phases of the high-frequency power output from the inverter unit are equal to each other. A self-bias application method for controlling the switching frequency of the switching element was adopted.

  The present invention configured as described above can always maintain a resonance state by controlling the switching frequency of the switching element so that the phases of the high-frequency power output from the inverter unit are equal. On the other hand, since the output power corresponding to the product of the voltage and current in the same phase is determined by the impedance of the output side circuit including the transformer unit connected to the inverter unit and the DC power supply voltage, the stable control can be realized.

  According to the present invention, a large configuration generally composed of a variable capacitor group and a control component group such as a motor and a gear is used. Since the resonance state can be maintained, it can be miniaturized and can be used in a power supply circuit of a minimal fab system configured by a unit processing device standardized to a predetermined size.

  In addition, the above effect can save space for two impedance matching devices called matchers in a plasma processing apparatus that requires high-frequency power for each of a plasma generation unit and a wafer bias unit composed of an inductively coupled plasma source. Therefore, it is suitable for the power supply circuit of the minimal fab system.

It is the schematic which shows the plasma processing apparatus which concerns on one Embodiment of this invention. It is the schematic which shows the power supply circuit which supplies high frequency electric power to the plasma production part of the said plasma processing apparatus. It is the schematic which shows the power supply circuit which supplies high frequency electric power to the wafer bias part of the said plasma processing apparatus. It is a control circuit diagram which shows the inverter part of the said plasma processing apparatus. It is an external view which shows the housing | casing in which the said plasma processing apparatus is accommodated. It is the schematic which shows the layout in the said housing | casing. It is a flowchart which shows the frequency control method by the frequency control part of the power supply circuit which supplies high frequency electric power to the said wafer bias part. It is a flowchart which shows the control method of the frequency by the electric power control part of the said power supply circuit. It is a graph which shows a mode at the time of supplying high frequency electric power to the wafer bias part of the said plasma processing apparatus. It is an electron micrograph which shows the state of the wafer plasma-processed with the said plasma processing apparatus.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a schematic view showing a plasma processing apparatus 10 according to an embodiment of the present invention. FIG. 2 is a schematic diagram showing a high-frequency power supply circuit 7 for supplying high-frequency power to the high-frequency antenna 5 e installed in the plasma generation unit 11 of the plasma processing apparatus 10. FIG. 3 is a schematic diagram showing a high frequency power supply circuit 9 for supplying high frequency power to the stage 6 installed in the process unit 12 of the plasma processing apparatus 10. FIG. 4 is a circuit diagram showing the high frequency power supply circuits 7 and 9 of the plasma processing apparatus 10. FIG. 5 is an external view showing the housing 2 in which the plasma processing apparatus 10 is accommodated. FIG. 6 is a schematic diagram showing a layout in the housing 2.

<Overall configuration>
As shown in FIGS. 5 and 6, the plasma processing apparatus 10 according to an embodiment of the present invention is a minimal etching based on a minimal fabrication concept housed in a case 2 having a standardized size. It is a device, and is accommodated in the processing device 1 for a minimal fab system as a unit processing device (small device). Here, the minimal fab concept is optimal for the semiconductor manufacturing market with a small amount of various products, and can cope with various fabs that save resources, save energy, save investment, and have high performance. For example, it is described in JP 2012-54414 A It realizes a minimal production system that minimizes production.

  The casing 2 is formed in a substantially rectangular parallelepiped shape having a longitudinal direction in the vertical direction, and is unified to a size of width (x) 0.294 m × depth (y) 0.45 m × height (z) 1.44 m. The processing chamber is configured to block the intrusion of fine particles and gas molecules into the interior and from the outside air. A wafer processing unit 2 f for processing the wafer W is provided on the upper part 2 a of the apparatus on the upper side of the housing 2. The wafer processing unit 2f accommodates a plasma processing apparatus 10 which is a processing apparatus main body for ion etching the wafer W. Here, plasma etching by the plasma processing apparatus 10 includes etching the surface of the wafer W in correspondence with the resist pattern laminated on the surface of the wafer W.

  The apparatus upper part 2 a above the plasma processing apparatus 10 accommodates a supply unit 3 a for supplying, for example, an etching gas G used for plasma etching in the plasma processing apparatus 10. Note that the minimal fab system processing apparatus 1 is unified to perform each process with power consumption of AC 100 V and 10 A.

  On the lower side of the housing 2, there is provided an apparatus lower part 2 b for incorporating a control device for controlling the plasma processing apparatus 10 in the apparatus upper part 2 a. The apparatus lower part 2b accommodates a high-pressure cylinder (not shown) filled with an etching gas G used for etching in the plasma processing apparatus 10. On the back surface of the apparatus lower part 2 b, there is provided a discharge part 3 b serving as an outlet for discharging a gas such as an etching gas G after being used for etching in the plasma processing apparatus 10 to the outside of the housing 2. The discharge unit 3b is connected to a tank (not shown) that stores gas discharged from the discharge unit 3b.

  At the middle part of the upper part 2a of the device upper part 2a of the housing 2, the front side of the device upper part 2a is cut into a concave shape upward. An operation panel 2c is attached to the upper front side of the apparatus upper portion 2a. The lower part of the upper part 2 a of the apparatus is a front chamber 2 d for carrying the wafer W into the housing 2. A substantially circular docking port 2e as a shuttle accommodating portion for installing a minimal shuttle (not shown) as a transport container is provided at a substantially central portion on the upper surface of the front chamber 2d. The docking port 2e is provided with a clamp (not shown) for fixing the minimal shuttle fitted to the docking port 2e.

The front chamber 2d is configured to block each of fine particles and gas molecules into the housing 2. In the front chamber 2d, PLAD (Particle Lock Air-tight Docking) as a transfer device for enabling the wafer W accommodated in the minimal shuttle to be taken in and out of the housing 2 without being exposed to the outside air. System 2g is attached. PLAD system 2
g transfers the wafer W loaded from the docking port 2e to a predetermined position of the plasma processing apparatus 10 and unloads the wafer W after being etched by the plasma processing apparatus 10 to the docking port 2e.

<Plasma processing equipment>
The plasma processing apparatus 10 is accommodated in a wafer processing unit 2 f at the upper rear side of the front chamber 2 d in the housing 2. A wafer W to be etched by the plasma processing apparatus 10 has a circular surface having a predetermined size, for example, a diameter of 12.5 mm (half inch size), and is formed in a disk shape made of single crystal silicon (Si). Is formed. A predetermined resist pattern is formed in advance on the surface of the wafer W, and is in a state before plasma etching. Here, the wafer W is a wafer size that conforms to the minimal fab concept, that is, an extremely small wafer size for manufacturing a semiconductor device in a very small unit.

Note that the minimum unit is a semiconductor device of a minimum unit, for example, one semiconductor device having a size of 1 cm ² from a wafer W of 0.5 inch size (half inch size) or the size of the device to be created. Without being limited to one, the minimum unit may be two or more as long as it can be manufactured from one wafer W as long as it is an extremely small wafer size for manufacturing a semiconductor device of a minimum unit.

The plasma processing apparatus 10 is a reactive ion etching apparatus using a so-called high frequency inverter, that is, a plasma etcher of ICP (Inductively Coupled Plasma). The plasma processing apparatus 10 generates a large amount of fluorine radicals (F), electrons and ions in the etching gas G by generating plasma by applying high-frequency power to a high-frequency antenna 5e attached to a plasma-generating insulating tube 5d described later. (SF ²⁺ , Ar ⁺ ) is generated, and a high frequency voltage is applied to the stage 6 to generate an ion sheath, and positive ions (SF ²⁺ , Ar ⁺ ) ionized by the plasma generation unit 11 are generated on the surface of the wafer W. Etch vertically and etch vertically. As shown in FIG. 1, the plasma processing apparatus 10 includes a chamber 5 and a stage 6 installed in the chamber 5, and the stage 6 is hermetically covered with the chamber 5.

<Chamber>
The chamber 5 is composed of, for example, a grounded metal vacuum vessel. The chamber 5 has a cylindrical or rectangular parallelepiped main body part 5a, is installed with the main body part 5a axially extending along the vertical direction, and the upper end side of the main body part 5a is closed by a disk-shaped upper plate 5b. It is made into a shape. A circular opening 5c is formed at the center position of the upper plate 5b, and the lower end side of the plasma generating insulating tube 5d, which is an insulating tube serving as a plasma generating portion, maintains airtightness in the opening 5c. Attached. The plasma generating insulating tube 5d has a cylindrical shape having an outer size smaller than the inner size of the main body 5a and slightly larger than the outer size of the wafer W, and is formed of a circular insulating material tube such as glass or ceramic. . The lower end side of the plasma generating insulating tube 5d is attached to the opening 5c by bonding or O-ring sealing.

An etching gas G such as a mixed gas (SF ₆ / Ar) of sulfur hexafluoride (SF ₆ ) and argon (Ar) is supplied from the upper part of the plasma generating insulating tube 5 d, and this plasma generating insulating tube Plasma P is generated in 5d. As the etching gas G, only sulfur hexafluoride (SF ₆ ) gas, carbon tetrafluoride (CF ₄ ) gas, carbon tetrafluoride (CF ₄ ), argon (Ar), and oxygen (O ₂ ) A mixed gas such as a mixed gas (CF ₄ / Ar / O ₂ ) may be used.

  A high frequency antenna 5e, which is a plasma generation antenna corresponding to an inductor, is attached to the plasma generation insulating tube 5d. The high-frequency antenna 5e is also a radical generator that ionizes the etching gas G inside the plasma generating insulating tube 5d to generate plasma P and generate a large amount of fluorine radicals (F) derived from the plasma P. The high-frequency antenna 5e is a power supply target that is an inductive load of the inductively coupled plasma source. For example, a conductive copper wire or the like is placed outside the plasma generating insulating tube 5d in the direction of several tens to several hundreds of turns. It is configured in a wound coil shape. Antenna terminals 5f and 5g as electrode portions are provided at both ends of the high-frequency antenna 5e, that is, at the upper end and the lower end, respectively.

  Between the antenna terminals 5f and 5g, a high frequency power supply circuit 7 which is a high frequency power supply device as a first power supply circuit for supplying a high frequency current to the high frequency antenna 5e having inductive impedance is attached. The high frequency power supply circuit 7 applies high frequency power between the antenna terminals 5f and 5g, and generates plasma P in the etching gas G passing through the plasma generating insulating tube 5d by an induction electromagnetic field caused by high frequency current flowing through the high frequency antenna 5e. generate. The plasma generating insulating tube 5d is a plasma generating unit 11 that ionizes a part of the etching gas G passing through the plasma generating insulating tube 5d to generate plasma P and fluorine radicals (F). Here, the high frequency antenna 5e and the high frequency power supply circuit 7 constitute an inductively coupled plasma generator 10A.

  A lid 5 h that closes the lower end of the chamber 5 is attached below the chamber 5. A vacuum forming device 8 is attached to the lid 5h as a vacuuming part for evacuating the inside of the chamber 5. The vacuum forming apparatus 8 is accommodated in the apparatus lower part 2 b and evacuates the chamber 5 with the wafer W placed on the stage 6 in the chamber 5.

  As shown in FIG. 2, the high frequency power supply circuit 7 is a full bridge type inverter power supply, and is supplied with DC power from a DC power supply 7a as a DC power supply unit for supplying DC power and DC power supply 7a. A power conversion circuit 7c that converts and outputs a DC current of the DC power to a high frequency power of, for example, several hundred kHz by switching, and a gate driver circuit 7m for controlling the frequency of the high frequency power output by the power conversion circuit 7c. With. The gate driver circuit 7m is configured to control the gate voltage of each switching element S1 to S4.

  The current conversion circuit 7c includes a bridge circuit 7g serving as an inverter power supply unit having a plurality of, for example, a total of four switching elements S1 to S4 made of, for example, FET elements or IGBT elements. Of these switching elements S1 to S4, two switching elements S1 and S2 form a series circuit 7h connected in series and are connected in parallel to a DC power source 7a. The other two switching elements S3 and S4 are also a series circuit 7i connected in series, and the series circuit 7h of the other two switching elements S1 and S2 excluding these two switching elements S3 and S4 and the DC power source 7a. They are connected in parallel to each other. Between the switching elements S1 and S2 and between the switching elements S3 and S4 of each series circuit 7h and 7i, a transformer 7j as a transformer for impedance conversion is connected in series. The transformer 7j is connected in series to the high frequency antenna 5e. A resonance capacitor C is connected in series between the transformer 7j and the high-frequency antenna 5e.

<Stage>
As shown in FIG. 1, the stage 6 is installed in the chamber 5 and vertically below the opening 5 c of the chamber 5 while keeping the axial direction along the vertical direction of the chamber 5. The stage 6 is disposed concentrically with the opening 5c of the chamber 5 and is spaced from the opening 5c by a predetermined distance. The stage 6 includes a columnar main body 6a and is installed in a state where the axial direction of the main body 6a is along the vertical direction. The upper end surface of the main body 6a is closed to form a flat disk-shaped installation surface 6b, and the wafer W is installed on the installation surface 6b. That is, the main body 6 a is formed as an installation surface 6 b having an outer diameter dimension slightly larger than the outer diameter dimension of the wafer W and having a diameter dimension slightly larger than the outer diameter dimension of the wafer W.

  Wafer bias terminals 6c and 6d are connected to the lower surface of the main body 6a of the stage 6 and the lid 5h of the chamber. A high frequency power supply circuit 9 which is a high frequency power supply device is connected between the wafer bias terminals 6c and 6d, and high frequency power is supplied from the high frequency power supply circuit 9 to the wafer bias terminals 6c and 6d. A high frequency voltage is applied between the wafer W and the chamber 5 by the high frequency power supply circuit 9 in a state where electrons and ions in the plasma P generated by the plasma generation unit 11 diffuse and flow into the wafer W. Since the direct current is suppressed by the included blocking capacitor C1, the wafer W is charged, an ion sheath is generated in the vicinity of the wafer W, and a vertical direct current electric field is formed. Therefore, the energy of ions incident on the wafer W is controlled by applying high frequency power to the wafer W by the high frequency power supply circuit 9. That is, the stage 6 is a process unit 12 as a wafer bias unit that applies a bias to the wafer W placed on the stage 6 by high-frequency power supplied from the high-frequency power supply circuit 9. Here, the high-frequency power supply circuit 9 and the wafer bias terminals 6c and 6d constitute a self-bias applying device 10B for generating a DC voltage that is spontaneously formed due to the plasma P.

  The high frequency power supply circuit 9 is a high frequency power application device as a second power supply circuit for applying a high frequency voltage between the wafer stage 6c having capacitive impedance and the chamber 6d. As shown in FIG. 3, the high-frequency power supply circuit 9 is supplied with a DC power supply 9a as a DC power supply unit for supplying DC power and DC power supplied from the DC power supply 9a, as in the case of the high-frequency power supply circuit 7. A power conversion circuit 9c that converts and outputs high-frequency power of 100 kHz and a gate driver circuit 9m for controlling the frequency of the high-frequency power output by the power conversion circuit 9c are provided. The gate driver circuit 9m is configured to control the gate voltage of each switching element S5 to S8.

  The current conversion circuit 9c includes a bridge circuit 9g as an inverter unit having a plurality of, for example, a total of four switching elements S5 to S8 made of, for example, FET elements or IGBT elements. Of these switching elements S5 to S8, two switching elements S5 and S6 form a series circuit 9h connected in series and are connected in parallel to a DC power supply 9a. The other two switching elements S7 and S8 are also a series circuit 9i connected in series, and the series circuit 9h of the other two switching elements S5 and S6 excluding these two switching elements S7 and S8 and the DC power source 9a. They are connected in parallel to each other. Between the switching elements S5 and S6 of each series circuit 9h and 9i and between the switching elements S7 and S8, a transformer 9j as a transformer for transforming high-frequency power is connected in series. The transformer 9j is an output load and is connected in series between wafer bias terminals 6c and 6d corresponding to a capacitor. A resonance capacitor C2 is connected in parallel between the transformer 9j and the wafer bias terminals 6c and 6d. Between the resonance capacitor C2 and the transformer 9j, a resonance inductor I and a blocking capacitor C1, which is a self-bias induction capacitor for making the direct current of the load zero, are connected in series. The resonance inductor I and the resonance capacitor C2 constitute an LC resonance circuit.

  The high frequency power supply circuit 7 (9) is controlled by the control circuit shown in FIG. 4 so as to satisfy each resonance condition and power set value described later. The power control unit 7b (9b) performs PID (Proportional-Integral-Derivative) control by monitoring the voltage value of the DC power output from the DC power source 7a (9a). The power control unit 7b (9b) detects the power value output from the DC power source 7a (9a) and outputs it as a power signal, and the power detection unit 7e (9e) detects the power value. And a PID control circuit 7f (9f) as a power control circuit for controlling the power value of the DC power output from the DC power source 7a (9a) based on the output power signal. The PID control circuit 7f (9f) receives an output power set value for enabling setting of the power value of DC power output from the DC power source 7a (9a).

The frequency control unit 7d (9d) includes an output current of the bridge circuit 7g (9g), that is, a series circuit 7h in which a total of two switching elements S1, S2, S3, S4 (S5, S6, S7, S8) are connected in series. The current value (current signal) between 7i (9h, 9i) and the transformer 7j (9j) is detected, and this current signal and the gate voltage signal of S1 to S4 (S5 to S8) in phase with the output voltage Are compared by the phase comparison circuit 7k (9k), the gate driver circuit 7m (9m) that generates the gate voltages of the switching elements S1 to S4 (S5 to S8), and the phase comparison circuit 7k (9k). An integrator 7n (9n) that integrates the phase difference, and a switching frequency that outputs a clock signal obtained by shifting the frequency of the signal of the integrator 7n (9n) from a predetermined reference voltage that gives an initial frequency. Voltage controlled oscillator as a control unit: and a (Voltage-controlled oscillator VCO) 7p (9p). The phase comparison circuit 7k (9k) receives a voltage signal output from the voltage controlled oscillator 7p (9p) to the gate driver circuit 7m (9m), and a voltage corresponding to the phase of the output voltage of the bridge circuit 7g (9g). The phase of the signal is compared with the phase of the current signal of the output current of the bridge circuit 7g (9g), and the phase difference between the high-frequency voltage and current output by the bridge circuit 7g (9g) is calculated every predetermined time. By this control, the output frequency is set so that the phase difference between the high-frequency voltage and the current becomes zero, that is, the impedance of the load connected to the bridge circuit 7g (9g) becomes a pure resistance component, that is, maintains the resonance state. Adjust automatically. By operating the bridge circuit 7g (9g) and the frequency control unit 7d (9d) at the same time, it is possible to control to maintain the output power constant while maintaining the resonance state.

  Next, a plasma etching method using the plasma processing apparatus 10 of the one embodiment will be described.

  First, the minimal shuttle in which the wafer W before etching is accommodated is installed in the docking port 2e of the front chamber 2d of the housing 2. In this state, a start switch (not shown) displayed on a predetermined position of the housing 2, for example, the operation panel 2c is pressed. Then, the minimal shuttle installed in the docking port 2e is opened, and the wafer W accommodated in the minimal shuttle is transferred to a predetermined position on the stage 6 of the plasma processing apparatus 10 by the PLAD system 2g. At this time, the stage 6 is in a state where the stage 6 is taken out of the chamber 5 by, for example, the stage 6 and the chamber 5 being moved up and down relatively.

  Thereafter, the chamber 5 of the plasma processing apparatus 10 is sealed with a lid 5h, and the vacuum forming apparatus 8 is evacuated until the inside of the chamber 5 is substantially vacuumed. In this state, the etching gas G is supplied to the plasma generation insulating tube 5d connected to the chamber 5, and the pressure in the plasma generation insulating tube 5d and the chamber 5 is maintained at a predetermined pressure. Thereafter, each of the high-frequency power supply circuits 7 and 9 is turned on, high-frequency power is supplied to the high-frequency antenna 5e, and plasma P composed of ions, electrons, and radicals is generated inside the plasma generating insulating tube 5d. Diffuse towards. In the high frequency power supply circuit 9 for applying high frequency power to the stage 6, the direct current is suppressed to zero by the blocking capacitor C1 inserted in series, so that the flux of ions and electrons flowing from the plasma P to the wafer W becomes equal. In addition, the wafer W is charged. As a result, a potential gradient along the direction toward the wafer W is formed in the vicinity of the wafer W, and a vertical electric field is formed.

As a result, the etching gas G generates plasma P in the etching gas G by the high-frequency power applied to the high-frequency antenna 5e when passing through the place where the high-frequency antenna 5e is attached in the plasma generation insulating tube 5d. Then, the fluorine of SF ₆ constituting this etching gas G is radicalized to generate a large amount of fluorine radicals (F). That is, SF ₆ in the etching gas G is separated, and a large amount of fluorine radicals (F) are generated.

Furthermore, the ion sheath and the electric field E along the vertical direction are formed above the stage 6 by the high-frequency power applied to the stage 6 as described above. As a result, the positive ions (SF ²⁺ , Ar ⁺ ) of the plasma P diffusing from the plasma generating insulating tube 5d are accelerated and struck perpendicularly to the wafer W, and the wafer W is etched. At the same time, the radicalized fluorine radical (F) diffused from the plasma generating insulating tube 5d chemically reacts with the wafer W, and the wafer W is etched. Since these two etching processes proceed through a resist pattern provided on the wafer W, the wafer W is plasma etched according to a resist pattern formed in advance.

That is, the fluorine radical (F) and ions (SF ²⁺ , Ar ⁺ ) derived from the plasma P are supplied to the wafer W by the high frequency power applied to the high frequency antenna 5 e, and the wafer W is supplied to the wafer W by the high frequency power applied to the stage 6. The ion incident energy is controlled. The etching process by the chemical reaction between these fluorine radicals (F) and Si overlaps with the physical etching process by ions, so that the silicon etching process proceeds. Further, when mixed with oxygen (O ₂₎ protective film such as gas (SiO ₂₎ for forming an etching gas G includes a protective film formed on the etching hole, physical etching of the bottom protective film by ions, and fluorine The etching process with a high aspect ratio is realized by the simultaneous progress of the silicon etching process by radicals (F).

  Thereafter, after the etching of the wafer W is completed, the sealing of the chamber 5 is released, and the stage 6 is taken out of the chamber 5 by, for example, moving the stage 6 and the chamber 5 up and down relatively. After the wafer W placed on the wafer is placed on the minimal shuttle by the pull back operation by the PLAD system 2g, the minimal shuttle is closed and the wafer W is accommodated. Further, the wafer W is unloaded by removing the minimal shuttle accommodating the wafer W from the docking port 2e of the front chamber 2c.

  Next, resonance control of the high-frequency power supply circuit 7 that applies high-frequency power to the high-frequency antenna 5e of the plasma generation unit 11 of the plasma processing apparatus 10 of the above-described embodiment will be described.

  From the viewpoint of suppressing switching loss, the inverter type high frequency power supply circuit 7 sets the output drive frequency, that is, the frequency of the high frequency power to a relatively low frequency such as 100 kHz to 500 Hz. Since the dielectric magnetic field generated by the high-frequency antenna 5e is proportional to dΦ / dt (Φ: interlinkage magnetic flux), so that the plasma P can be generated by the plasma generator 11 at the frequency of the output high-frequency power. The number of turns of the high-frequency antenna 5e is, for example, in the range of about 30 to 300 turns.

  The frequency of the high-frequency power output from the high-frequency power supply circuit 7 can be easily controlled by using the voltage-controlled oscillator 7p described above as the input clock frequency to the gate driver circuit 7m. Since it is connected to the high frequency antenna 5e via the transformer 7j and the resonance capacitor C that play the role of impedance conversion for operating within the range of the voltage and current capacity of the direct current power supplied from the DC power source 7a, When the inductance of the antenna 5e is L and the capacitance of the resonance capacitor C is C, the maximum frequency f of the high-frequency power to be output is (Expression 1) f = 1 / 2π√ (LC).

  However, when the plasma P is generated in the plasma generating insulating tube 5d, the impedance of the load varies depending on the impedance of the generated plasma P itself. For this reason, by controlling the frequency of the high-frequency power to be output, it is possible to maintain the optimum impedance matching state before and after the plasma P generation, that is, at all times. Therefore, after the plasma P is generated, the input clock frequency to the gate driver circuit 7m is adjusted manually or automatically so that the frequency of the output high-frequency power becomes equal to the resonance frequency, for example, before and after the plasma P generation. Maintain impedance resonance.

  Next, a self-bias induction method and resonance control of the high-frequency power supply circuit 9 that applies a high-frequency voltage to the process unit 12 of the plasma processing apparatus 10 according to the embodiment will be described with reference to FIG.

In the high-frequency power supply circuit 9, the stage 6 on which the wafer W is installed is a load, and the stray capacitance (Csub) between the inner wall of the chamber 5 is the main component of the impedance. Generally, for example, several tens of pF to several tens of pF The value is about 100 pF and is unique to the configuration of each plasma processing apparatus 10. In order to satisfy the resonance condition of Formula 1 above for a capacitive load of about several tens of pF to several hundreds of pF within the frequency range of the high frequency power output from the high frequency power supply circuit 9, for example, a relatively large size of about 1 mH to 100 mH A large inductance is required. Therefore, a configuration in which a resonance capacitor C2 of about several μF sufficiently larger than the stray capacitance (Csub) is connected in parallel to the stage 6 and the load impedance of the high-frequency power supply circuit 9 is determined only by the resonance capacitor C2. Yes.

The main purpose of applying a high-frequency voltage to the stage 6 is to induce a DC self-bias due to the behavior of ions and electrons in the plasma P. A capacitor is inserted in series with the load circuit, and the DC current is zero. In the above embodiment, the circuit must be configured to be several μF.
A blocking capacitor C1, which is a self-bias capacitor, is inserted in series. The resonance condition in this case is (Expression 2) f = 1 / 2π√ (LCs), where Cs = (C1 × C2) / (C1 + C2). At this time, the required inductance is 150 μH that allows a sufficiently small design, and the high-frequency power applied to the stage 6 is determined by the current I output from the transformer 9j and the resonance capacitor C2. Here, since the DC current caused by the plasma charged particles flowing into the stage 6 from the blocking capacitor C1 becomes zero (0), the high frequency power supply circuit 9 automatically and spontaneously applies a DC bias to the stage 6. When applied, an insulator such as an oxide film can be etched.

  Next, referring to FIG. 4, FIG. 7 and FIG. 8 for automatic resonance control and power control of the high-frequency power supply circuits 7 and 9 used in the plasma generation unit 11 and the process unit 12 of the plasma processing apparatus 10 of the above-described embodiment To explain. However, in the above-described embodiment, the high frequency power supply circuits 7 and 9 are equivalent to the DC power supply unit 7a (9a), the gate driver circuit 7m (9m), and the switching elements S1 to S4 (S5 to S8). Therefore, the same control can be applied to each of the high frequency power supply circuits 7 and 9.

  Specifically, the high frequency power supply circuit 7 (9) automatically follows the output voltage of the high frequency power output from the bridge circuit 7g (9g) and the phase of the output current of the high frequency power to be equal. The high frequency power supply circuit 7 (9) is preliminarily input with the initial frequency of the high frequency power output from the bridge circuit 7g (9g) before the plasma P is generated by the plasma generator 11 (step S11). A voltage signal of the gate voltage of each of the switching elements S1 to S4 (S5 to S8) having the same phase as the output voltage of the bridge circuit 7g (9g), and a current signal of high-frequency power output from the bridge circuit 7g (9g) Are input to the phase comparison circuit 7k (9k), the phases of the voltage signal and current signal are compared, and the gate voltage is determined from the resonance frequency of each switching element S1 to S4 (S5 to S8) of the bridge circuit 7g (9g). A value obtained by converting the shift in frequency (gate frequency) into a voltage is output by the phase comparison circuit 7k (9k) (step S12).

  The voltage control is performed so that the frequency of the gate voltage signal of each of the switching elements S1 to S4 (S5 to S8) is equal to the phase of the output current output from the bridge circuit 7g (9g) to the transformer 7j (9j). The clock frequency of the gate voltage of each switching element S1 to S4 (S5 to S8), that is, the switching frequency is controlled by the type oscillator 7p (9p) (step S13).

  When the plasma P is generated by the plasma generation unit 11, the impedance that becomes a load in each of the plasma generation unit 11 and the process unit 12 varies depending on the impedance of the plasma P itself (step S14). Then, whether the phase of the voltage signal of the gate voltage of each switching element S1 to S4 (S5 to S8) is larger than the phase of the current signal of the high frequency power output from the bridge circuit 7g (9g) is the phase comparison circuit 7k (9k). (Step S15).

If the phase of the voltage signal is larger than the phase of the current signal (step S15 / YES), the frequency of the gate signal of each switching element S1 to S4 (S5 to S8) is decreased by the voltage controlled oscillator 7p (9p). When the phase of the voltage signal is equal to or less than the phase of the current signal (step S15 / NO), the voltage-controlled oscillator 7p (9p) uses the gate signals of the switching elements S1 to S4 (S5 to S8). The frequency is controlled to be increased so that the frequency of the gate signal of each of the switching elements S1 to S4 (S5 to S8) in phase with the output voltage of the bridge circuit 7g (9g) is the same as that of the bridge circuit 7g (9g). Step S12 to step S15 are repeated until the phase of the output current output to 9j) becomes equal to the state of the plasma P. It is automatically follow the resonance frequency varies with.

  Further, when the plasma P is generated by the plasma generator 11, the high frequency power supply circuit 7 (9) supplies the high frequency antenna 5e and the stage 6 because the impedance as a load varies depending on the impedance of the plasma P itself. The high frequency power itself is also fluctuating. Therefore, the power control unit 7b (9b) presets the output power set value as the target value, that is, the set power, in the PID control circuit 7f (9f) (step S21). Then, based on the voltage value and the current value output from the DC power supply 7a (9a), the power detection unit 7e (9e) calculates the power value of the DC power output from the DC power supply 7a (9a). A power signal based on the value is output to the PID control circuit 7f (9f) (step S22). Thereafter, the PID control circuit 7f (9f) determines whether the power value corresponding to the output power signal, that is, the output power is larger than the set power (step S23).

  When the output power is larger than the set power (step S23 / YES), the PID control circuit 7f (9f) is controlled to reduce the output power of the DC power source 7a (9a), and the output power is less than the set power. In the case (step S23 / NO), the PID control circuit 7f (9f) is controlled to increase the output power of the DC power supply 7a (9a) until the output power of the DC power supply 7a (9a) becomes equal to the set power. The processes in steps S21 to S23 are repeated, and stable power supply is performed from the DC power source 7a (9a).

In the plasma processing apparatus 10 of the above-described embodiment, for the purpose of optimizing the precision vertical processing having anisotropy and the etching rate at that time, the control of the ion density and radical density in the plasma generation unit 11 and the wafer W are performed. Therefore, it is necessary to control the incident energy of ions with respect to. In particular, when simultaneously performing the process of laminating the protective film on the wafer W and the process of ion etching only the bottom surface of the protective film, it is necessary to apply high-frequency power having a higher frequency to the process unit 12. Regarding this necessity, a high frequency power supply circuit 7 that supplies high frequency power to the high frequency antenna 5e of the plasma generation unit 11 and a high frequency power supply circuit 9 that supplies high frequency power to the stage 6 of the process unit 12 are dealt with separately. Then, automatic control is applied to each as described above.
Yes.

  The processing apparatus 1 for a minimal fab system includes all components including a vacuum exhaust system, a gas control system, a plasma source, a bias power supply, an apparatus control interface, a gas cylinder, and an exclusion facility in a relatively small casing 2. Need to be stored. For this reason, it is necessary to reduce the size of the high-frequency power circuit 7 for the plasma generator 11 and the high-frequency power circuit 9 for the process unit 12. These high-frequency power supply circuits 7 and 9 have a large space occupancy in the housing 2 in the case of using a conventional matcher, and for the purpose of suppressing power loss in the wiring and fluctuations in impedance due to the wiring as much as possible. Since it is necessary to install the matcher close to the load or to attach it directly to the load, the design of the apparatus and the restrictions on the design are very large.

Further, in each of the high frequency power supply circuits 7 and 9, since it is desired to reduce the exhaust heat and power consumption, it is necessary to increase the conversion efficiency from DC power to high frequency power. In particular, when each component is housed in the housing 2, high frequency noise may occur due to the characteristics of the high frequency power to be output, which may cause malfunction or damage of the device. There is a need to. Generally, as a method for suppressing high frequency noise, shielding with a ground metal is effective, but the frequency of the high frequency power to be output is, for example, several M
In the case of Hz to several tens of MHz, a slight deflection of the wiring acts as an inductance, so that characteristics due to high frequency noise change depending on the assembly state of the device.

  In the process unit 12, the relationship between the high-frequency power flowing into the grounded chamber 5 and the current is determined according to the stray capacitance (impedance: 1 / jωCsub) between the wafer W on the stage 6 and the chamber 5. Therefore, when a predetermined high-frequency power is supplied, the higher the frequency of the high-frequency power to be output, the larger the current value, and the influence of noise caused by the current flowing through the chamber 5 and the grounded part and returning to the power source. It gets bigger. Therefore, every time the device is assembled, noise countermeasures and wiring adjustments are required. On the other hand, since the plasma generation unit 11 forms the forward and return paths of current only by the high-frequency antenna 5e, the influence of noise due to the current flowing through the grounded portion is not so great. Therefore, by setting the frequency of the high-frequency power to about 100 kHz to 500 kHz, particularly the influence of noise in the process unit 12 can be reduced.

In order to perform plasma etching on the surface of the wafer W uniformly, it is necessary to make the flux (flux) of incident ions on the wafer W and energy, and the flux of radicals uniform. That is, in addition to the uniformity of the plasma density generated by the plasma generator 11, the flux of incident ions, the surface potential of the wafer W placed on the stage 6, the electron temperature that contributes to the radical generation rate (electron energy distribution) Function) is important. The penetration distance (skin thickness δ) of the high-frequency electromagnetic field into the plasma P generated by the plasma generation unit 11 is (Equation 3) δ = −C / (ωIm (K _p ^1/2 ), K _P = −ω _ps ² / ω ² (1-iv _m / ω), where K _p is the relative permittivity of plasma P, and is used in a plasma generation unit of a general conventional plasma processing apparatus. Assuming that the frequency is 13.56 MHz, argon gas is used, the pressure is 10 mTorr, and the plasma density is 5 × 10 ¹⁷ m ⁻³ , δ is about 5 cm, and most of the electromagnetic field is absorbed around the gas supply pipe of the plasma generation unit. Therefore, high energy electrons are formed in this region, and the electron temperature distribution becomes non-uniform.

  Therefore, the plasma processing apparatus 10 of the above-described embodiment is a matcherless reactive etching apparatus, and the high frequency power supply circuits 7 and 9 are used as the power supply circuits of the plasma generation unit 11 and the process unit 12 of the plasma processing apparatus 10. Yes. These high-frequency power supply circuits 7 and 9 have a configuration in which the frequency of the high-frequency power output from the bridge circuits 7g and 9g can be varied, and an optimum impedance (pure load resistance) can be realized by using the load as an LC resonance circuit. .

  Therefore, even if there is a change in the reactance component of the load impedance based on the generation of the plasma P in the plasma generation unit 11 of the plasma processing apparatus 10 or the change in the plasma P, the high-frequency power supplied to the high-frequency antenna 5e and the stage 6 Therefore, a stable resonance state can be maintained for each of the high-frequency power supplied to the high-frequency antenna 5e and the high-frequency power supplied to the stage 6. It can be realized without using it.

  On the other hand, as described above, it is possible to correct the reactance component by maintaining the resonance state, but in principle, adjustment by the frequency is not effective for the variation of the resistance component of the load impedance accompanying the generation or variation of the plasma P. This is possible, and stable control of the output power is required. Therefore, stable power supply is possible by PID control of the output power of the DC power supply 7a (9a) by the power control unit 7b (9b). Therefore, by using these high-frequency power supply circuits 7 and 9, a stable resonance state of high-frequency power supplied to the high-frequency antenna 5e and the stage 6 can be secured without using a matcher composed of a variable capacitor or the like. At the same time, stable output power can be maintained.

  Further, the high-frequency power supplied to the megafab plasma processing apparatus for processing a relatively large wafer, for example, the high-frequency power supplied to the high-frequency antenna 5e of the plasma generation unit 11 and the stage 6 of the process unit 12 as compared with 13.56 MHz, for example. The frequency is as low as several hundred kHz, for example. For this reason, a change in impedance due to wiring from the high-frequency power supply circuits 7 and 9 to the high-frequency antenna 5e or the stage 6 can be reduced, and noise can be reduced. Therefore, the distance from each of the high frequency power supply circuits 7 and 9 to the high frequency antenna 5e or the stage 6 can be flexibly changed. Therefore, a minimal fab that needs to accommodate each component in a relatively small casing 6 is possible. This is a great advantage in the device design of the system processing apparatus 1.

  Further, the high frequency power supply circuits 7 and 9 are configured using full bridge type bridge circuits 7g and 9g, and the frequency of the high frequency power output from the bridge circuits 7g and 9g is generally about 1 MHz at the maximum. is there. However, since these high frequency power supply circuits 7 and 9 have a configuration capable of realizing a conversion efficiency from DC power of 90% or more to high frequency power, wiring from the high frequency power supply circuits 7 and 9 to the high frequency antenna 5e or the stage 6 is possible. Power loss and impedance fluctuations due to wiring can be suppressed.

  In addition, the frequency of the high-frequency power output from these high-frequency power supply circuits 7 and 9 is lower than that of a power supply circuit using a conventional matcher, and thus the frequency is low. Since the penetration distance (skin thickness δ) of the electromagnetic field increases, the electromagnetic field penetrates into the plasma generation unit 11 and electron heating in the central region is possible, so that the electron temperature or the electron energy distribution function can be made uniform. Become. In particular, the electron temperature has a great influence on the collision generation process during the generation of ions and radicals, so that uniform plasma generation and radical generation are possible, and uniform wafer processing is possible.

  Furthermore, since each of them is a matcher-less high-frequency power supply circuit 7, 9, even a relatively small housing 2 of the minimal fab system processing device 1 does not require a space for installing a matcher that was conventionally required. Thus, these spaces can be used effectively. Therefore, a vacuum exhaust system, a gas introduction system, a controller, or the like can be efficiently incorporated at a more appropriate position in the housing 2. That is, by using the high-frequency voltage application devices 7 and 9, the space that can be effectively used in the housing 2 can be increased.

  Next, for the plasma processing apparatus 10 according to an embodiment of the present invention, refer to FIG. 9 for Example 1 in which self-bias is induced by supplying high frequency power to the process unit 12 using the high frequency power supply circuit 9. To explain. FIG. 9 is a graph showing a state in which high-frequency power is supplied to the process unit 12 of the plasma processing apparatus 10 by the high-frequency power circuit 9.

  Using the high frequency power supply circuit 7, the high frequency power is supplied to the stage 6 of the process unit 12 from the high frequency power supply circuit 9 in a state in which the high frequency power is supplied to the plasma generation unit 11 and the plasma P is constantly generated in the chamber 5. When the potential of the stage 6 was measured, as shown in FIG. 9, the high-frequency power supply circuit 9 was turned on, and at the same time, a high-frequency voltage of 300 Vpp was output from the high-frequency power supply circuit 9 and simultaneously a DC voltage of −100 V was superimposed. It became. As a result, it was found that a direct current (DC) self-bias was induced simultaneously with the application of high-frequency power to the process unit 12.

  Next, Example 2 in which an etching process is performed in the plasma processing apparatus 10 according to an embodiment of the present invention will be described with reference to FIG. FIG. 10 is an electron micrograph showing the state of the wafer W plasma-processed by the plasma processing apparatus 10.

A mixed gas of argon (Ar) gas ₆₀ sccm and sulfur hexafluoride (SF ₆ ) gas 3.7 sccm is introduced as an etching gas G into the plasma generating insulating tube 5 d of the plasma generating unit 11 of the plasma processing apparatus 10. The power consumption of the high frequency power supply circuit 7 is 110 W, the power consumption of the high frequency power supply circuit 9 of the process unit 12 is 18.2 W, and the etching time is 10 minutes. Under this condition, an SEM image of the wafer W when the Si wafer W to which the SiO ₂ patterning mask M was applied was etched by the plasma processing apparatus 10 was confirmed. As shown in FIG. It turned out that the etching rate of the grade was acquired, and it turned out that appropriate reactive etching is performed.

<Others>
In the above embodiment, the plasma processing apparatus 10 is used to etch the wafer W on which the resist pattern is laminated. However, the present invention is not limited to this, and can be used in correspondence with wafers other than the single crystal silicon wafer W on which resist patterns are stacked.

1 Processing equipment for minimal fab system (unit processing equipment)
2 housing 2a upper part 2b lower part 2c operation panel 2d front chamber 2e docking port 2f wafer processing part 2g PLAD system 3a supply part 3b discharge part 5 chamber 5a body part 5b upper plate 5c opening 5d insulating tube for gas generation (gas Supply department)
5e High frequency antenna (plasma generating antenna)
5f, 5g Antenna terminal 5h Lid 6 Stage 6a Main body 6b Installation surface 6c, 6d Wafer bias terminal 7 High frequency power circuit (power circuit)
7a DC power source 7b Power control unit 7c Power conversion circuit 7d Frequency control unit 7e Power detection unit 7f PID control circuit 7g Bridge circuit (inverter unit)
7h, 7i Series circuit 7j Transformer 7k Phase comparison circuit (phase comparison unit)
7m Gate driver circuit 7n Integrator 7p Voltage controlled oscillator (switching frequency controller)
8 Vacuum forming device (evacuation part)
9 High-frequency power circuit (power circuit)
9a DC power source 9b Power control unit 9c Power conversion circuit 9d Frequency control unit 9e Power detection unit 9f PID control circuit 9g Bridge circuit (inverter unit)
9h, 9i Series circuit 9j Transformer 9k Phase comparison circuit (Phase comparison unit)
9m Gate driver circuit 9n Integrator 9p Voltage controlled oscillator (switching frequency controller)
DESCRIPTION OF SYMBOLS 10 Plasma processing apparatus 10A Inductively coupled plasma generator 10B Self-bias application apparatus 11 Plasma generation part 12 Process part (wafer bias part)
G etching gas P plasma W wafer S1 to S8 switching element C resonance capacitor C1 blocking capacitor (self-bias capacitor)
C2 Resonant capacitor I Resonant inductor M Patterning mask

Claims (9)

An inverter unit that converts DC power into high-frequency power and outputs it, a transformer unit for transforming the high-frequency power output from the inverter unit, and a power supply circuit having a resonance capacitor connected in series to the transformer unit;
An antenna for plasma generation that is an inductor and is supplied with high-frequency power transformed by the transformer;
An inductively coupled plasma generator characterized by comprising: The inductively coupled plasma generator according to claim 1,
The power supply circuit includes a frequency control unit that detects a current value between the inverter unit and the transformer unit and controls high-frequency power output from the inverter unit. . The inductively coupled plasma generator according to claim 2,
The inverter unit has a plurality of switching elements,
The frequency control unit detects the voltage value of each switching element and the current value of the output current and compares the detected voltage value phase with the phase of the current value, and compares the phase value with the phase comparison unit. A switching frequency control unit that controls a switching frequency of each of the switching elements based on the phase shift. An inverter unit that converts DC power into high frequency power and outputs it,
A transformer for transforming the high-frequency power output from the inverter, a resonance inductor connected in series to the transformer, and a self-bias capacitor to which the high-frequency power transformed by the transformer is supplied A power circuit having
A resonant capacitor connected in parallel to the capacitor;
A self-bias applying device comprising: The self-bias application device according to claim 4, wherein
The power supply circuit includes a frequency control unit that detects a current value between the inverter unit and the transformer unit and controls high-frequency power output from the inverter unit. The self-bias application device according to claim 5, wherein
The inverter unit has a plurality of switching elements,
The frequency control unit detects the voltage value of each switching element and the current value of the output current, and compares the phase of the detected voltage value with the phase of the current value, and compares the phase value with the phase comparison unit. And a switching frequency control unit that controls the switching frequency of each of the switching elements based on the phase shift. A stage on which the wafer is placed;
A chamber covering this stage;
A vacuuming part for evacuating the chamber;
A gas supply unit provided at a position facing the stage of the chamber;
A plasma generator having the inductively coupled plasma generator according to any one of claims 1 to 3 for generating plasma in an etching gas in the gas supply unit;
A wafer bias unit having the self-bias application device according to any one of claims 4 to 6 and applying a high-frequency voltage to a wafer placed on the stage to induce a DC self-bias. Plasma processing equipment. An inverter unit having a plurality of switching elements and converting DC power to high frequency power and outputting, a transformer unit for transforming high frequency power output from the inverter unit, an inductor connected in series to the transformer unit, and A plasma generation method using a power supply circuit comprising a capacitor,
The plasma generation method, wherein the switching frequency of the switching element is controlled so that the phases of the high-frequency power output from the inverter unit are equal. An inverter unit having a plurality of switching elements and converting DC power to high frequency power and outputting, a transformer unit for transforming high frequency power output from the inverter unit, an inductor connected in series to the transformer unit, and A self-bias application method using a power supply circuit including a capacitor, wherein the switching frequency of the switching element is controlled so that the phases of the high-frequency power output from the inverter unit are equal to each other. Bias application method.