JP2017037066A - Device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a small and low-cost integrated circuit that does not depend on an environmental variation.SOLUTION: A device comprises: a first resistor and a second resistor which have different symbols of piezo coefficient from each other and are series connected to each other; an amplifier which is connected to the first resistor and the second resistor, and outputs an output signal corresponding to a ratio of a resistance value of the first resistor to a resistance value of the second resistor; and a semiconductor element which uses a signal based on the output signal as a driving signal. The amplifier outputs an output signal depending on stress applied on the first resistor and the second resistor.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an apparatus.

Conventionally, it has been known that a circuit element formed on a semiconductor substrate or the like is subjected to a stress depending on a change in use environment such as temperature and humidity, and the element constant varies. For example, since the magnetic sensitivity of a magnetic sensor formed on a semiconductor substrate also varies depending on stress (piezo Hall effect), it has been known to correct the magnetic sensitivity by detecting or calculating the stress (for example, Patent Document 1). To 4, see Non-Patent Document 1).
Patent Document 1 US Pat. No. 6,906,514 Patent Document 2 US Pat. No. 7,437,260 Patent Document 3 US Pat. No. 7,302,357 Patent Document 4 International Publication No. 2014/002387 Non-Patent Document 1 Udo Ausserlechner, Mario Mots, Michael Holliber, "Compensation of the Piezo-Hall Effect in Integrated Hall Sensors on (100) -Si", IEEE Sensors Journal, Vol. 7, No. 11, November 2007

  As described above, the circuit elements formed on the substrate have their element constants fluctuated with changes in the usage environment, and it has been difficult to operate the circuit accurately and stably. In addition, when detecting such stress and correcting the sensitivity or the like, the sensor for detection and the feedback circuit must be formed on the same substrate or the like, which increases the scale of the integrated circuit and reduces the cost. It was high. That is, a highly accurate integrated circuit that is small and low in cost and does not depend on environmental changes has been desired.

  In the first aspect of the present invention, the signs of the piezo coefficients are different, the first resistor and the second resistor connected in series with each other, and the resistance value of the second resistor connected to the first resistor and the second resistor. And an amplifier that outputs an output signal corresponding to the ratio of the resistance value of the first resistor to the semiconductor device, and a semiconductor element that uses a signal based on the output signal as a drive signal. The amplifier includes a first resistor and a second resistor Provided is an apparatus for outputting an output signal depending on stress applied to an object.

  In the second aspect of the present invention, the sign of the piezo coefficient is different from that of the semiconductor element, and is connected to the first resistor and the second resistor connected in series with each other, and the first resistor and the second resistor. Provided is an apparatus that includes an amplifying unit that receives an output signal as an input signal and outputs an output signal corresponding to the ratio of the resistance value of the first resistor to the resistance value of the second resistor. To do.

  In the third aspect of the present invention, the signs of the piezo coefficients are different, the first resistor and the second resistor connected in series with each other, and the resistance value of the second resistor connected to the first resistor and the second resistor. An amplifier that outputs an output signal corresponding to the ratio of the resistance value of the first resistor to the signal, an AD converter that receives a signal based on the output of the semiconductor element as an input signal, and an output of the amplifier as a reference voltage And the amplifying unit provides a device that outputs an output signal depending on the stress applied to the first resistor and the second resistor.

  According to a fourth aspect of the present invention, there is provided a signal output unit that outputs a signal corresponding to the output of the semiconductor element, a first resistor and a second resistor that are connected in series with each other and have different signs of piezo coefficients. A correction unit that corrects a signal according to a stress applied to an element is provided.

  It should be noted that the above summary of the invention does not enumerate all the necessary features of the present invention. In addition, a sub-combination of these feature groups can also be an invention.

1 shows a first configuration example of an apparatus 1000 according to the present embodiment. An example of the fluctuation amount of the output signal Vout with respect to the stress applied to the first resistor 110 and the second resistor 120 in the apparatus 1000 having the first configuration example according to the present embodiment will be described. An example of the result of adjusting the magnetic sensitivity of the Hall element as the semiconductor element 10 by the apparatus 1000 of the first configuration example according to the present embodiment is shown. The 2nd structural example of the signal generation apparatus 100 which concerns on this embodiment is shown. An example of the variation amount of the output signal with respect to the stress applied to the first resistor 110 and the second resistor 120 in the signal generation device 100 of the second configuration example according to the present embodiment is shown. The 3rd structural example of the signal generation apparatus 100 which concerns on this embodiment is shown. 2 shows a second configuration example of an apparatus 1000 according to the present embodiment. The apparatus 1000 of the 2nd structural example which concerns on this embodiment shows an example as a result of adjusting the stress fluctuation | variation of the Hall voltage of a Hall element. The 3rd structural example of the apparatus 1000 which concerns on this embodiment is shown. 4 shows a fourth configuration example of an apparatus 1000 according to the present embodiment. The 5th structural example of the apparatus 1000 which concerns on this embodiment is shown. The structural example by which the apparatus 1000 of the 5th structural example which concerns on this embodiment was packaged is shown. The structural example of the 1st board | substrate 20 which concerns on this embodiment is shown. The structural example of the cross section of the 1st board | substrate 20 which concerns on this embodiment is shown. An example of the design value of LED which concerns on this embodiment, the 1st resistance 110, the 2nd resistance 120, and the resistive element 336 is shown. An example of the variation rate of the light emission amount Lu when the apparatus 1000 according to the present embodiment uses the design value shown in FIG.

  Hereinafter, the present invention will be described through embodiments of the invention, but the following embodiments do not limit the invention according to the claims. In addition, not all the combinations of features described in the embodiments are essential for the solving means of the invention.

  FIG. 1 shows a first configuration example of an apparatus 1000 according to the present embodiment. The apparatus 1000 adjusts the influence of the stress generated with the environmental change of the semiconductor element 10 on the output signal. The device 1000 includes the semiconductor element 10, the signal generation device 100, and the current generation unit 300.

  The semiconductor element 10 is a device that is formed on a substrate or the like, the element constant of which varies as the usage environment changes, and the output signal changes. The semiconductor element 10 may include any of a sensor, a control circuit, an amplifier circuit, a light emitting device, and the like, for example. As an example, the semiconductor element 10 is a Hall element, a magnetoresistive element, an infrared element, or an ultraviolet element. The apparatus 1000 including such a semiconductor element 10 functions as a highly accurate sensor, control circuit, amplifier circuit, and / or light emitting device that does not depend on environmental changes. In this embodiment, an example will be described in which the apparatus 1000 adjusts the sensitivity of a sensor or the like that varies due to the generation of stress.

  The signal generation device 100 outputs a signal for adjusting the semiconductor element 10. A signal generation device 100 illustrated in FIG. 1 illustrates an example of an amplifier circuit that amplifies an input signal. Here, the input signal may be a control signal for controlling the operation of the semiconductor element 10 or a drive signal for driving the semiconductor element 10. The signal generation device 100 may superimpose and output a signal for adjusting the semiconductor element 10 on the input signal. The signal generation device 100 includes an input terminal 102, an output terminal 104, a reference potential 106, a first resistor 110, a second resistor 120, and an amplification unit 130.

  An input signal Vin is input to the input terminal 102. The output terminal 104 outputs an output signal Vout. The reference potential 106 may be a predetermined potential, a reference potential, a set potential, a design potential, or the like. The reference potential 106 is, for example, a GND potential (= 0V).

  The first resistor 110 is formed on the substrate. The first resistor 110 ideally has a resistance value R1. The first resistor 110 may be formed on the semiconductor substrate. The first resistor 110 may be formed of a plurality of resistance elements. In the example of FIG. 1, one end of the first resistor 110 is connected to the output terminal 104 and provided on a path from the output terminal 104 to the reference potential 106.

  The second resistor 120 is formed on the substrate. The second resistor 120 may be formed on substantially the same substrate as the first resistor 110. The second resistor 120 ideally has a resistance value R2. The second resistor 120 may be formed on the semiconductor substrate. Further, the second resistor 120 may be formed of a plurality of resistance elements. In the example of FIG. 1, one end of the second resistor 120 is connected to the other end of the first resistor 110, and the other end of the second resistor 120 is connected to the reference potential 106. The second resistor 120 is provided between the first resistor 110 and the reference potential 106 on the path from the output terminal 104 to the reference potential 106. That is, the first resistor 110 and the second resistor 120 are connected in series with each other.

  The amplifying unit 130 is connected to the first resistor 110 and the second resistor 120, and outputs an output signal with an amplification factor corresponding to the resistance values of the first resistor 110 and the second resistor 120. FIG. 1 shows an example in which the amplifying unit 130 outputs an output signal corresponding to the ratio of the resistance value of the first resistor to the resistance value of the second resistor. The amplifying unit 130 may be an operational amplifier (op-amp) including an inverting input terminal indicated by “−”, a non-inverting input terminal indicated by “+”, and an output terminal in FIG.

  The amplifying unit 130 outputs an output signal Vout obtained by amplifying the input signal Vin. The signal generation device 100 of the first configuration example is provided such that the first resistor 110, the second resistor 120, and the amplifier 130 constitute a non-inverting amplifier circuit. That is, the amplifying unit 130 operates to adjust the output signal Vout so that the resistance voltage between the first resistor 110 and the second resistor 120 approaches the target voltage. More specifically, the first resistor 110 and the second resistor 120 are connected between the output terminal 104 that outputs the output signal Vout and the reference potential 106, and the amplifier 130 receives the input signal Vin and the voltage between the resistors. Then, the output signal Vout is adjusted so that the resistance voltage approaches the voltage of the input signal Vin.

That is, the amplification unit 130 outputs an output signal Vout obtained by amplifying the input signal Vin with an amplification factor corresponding to the resistance values R1 and R2 of the first resistor 110 and the second resistor 120, as shown by the following equation.
(Equation 1)
Vout = (1 + R1 / R2) Vin

  Here, the resistance values R1 and R2 of the first resistor 110 and the second resistor 120 vary depending on the stress. Such a proportional coefficient of stress and resistance is called a piezo coefficient. For example, when the resistance value changes by + 1% by applying a stress of 100 MPa to the resistance, the piezo coefficient is +1 [% / 100 MPa].

  The piezo coefficient of one substance is generated when, for example, electrical characteristics (resistance value, magnetic sensitivity, light) are incident on the substance while applying a known magnitude of stress to the one substance. It can be obtained by measuring a photocurrent or a base-emitter voltage when a transistor is formed using a substance. As an example, the piezo coefficient of the resistance can be obtained by measuring the resistance value while applying a known stress to the resistance and calculating the slope of the rate of change in resistance with respect to the stress. The unit of the piezo coefficient is [% / MPa].

Since the stress is a tensor amount, the piezo coefficient is also expressed as a tensor. An example of the tensor expression of the piezo coefficient and stress in the piezoresistance effect is shown in the following equation.

π is a piezoresistance tensor. Also, π _mn is an abbreviation for π _ijkl , and ijkl indicates the direction of current, the direction of resistance, the surface to which force is applied, and the direction of force. More specifically, it is abbreviated as 11 → 1, 22 → 2, 33 → 3, 23 → 4, 31 → 4, 12 → 6. For example, silicon (Si) single crystal <100>, <010>, indicating the ₁₁₁₁ <001> case of direction 1, 2, 3 directions, [pi ₁₁ is [pi. That is, π ₁₁ is a resistance in the <100> direction when a current is passed in the <100> direction under a condition in which a force in the <100> direction is applied to a surface perpendicular to the <100> direction of the Si single crystal. Indicates the rate of change.

σ is a stress tensor. σ is an X-direction normal stress = σ _x , a Y-direction normal stress = σ _y , a Z-direction normal stress = σ _z , an XY-direction shear stress = τ _xy , when XYZ axes orthogonal to each other are set. The shear stress in the XZ direction = τ _xz and the shear stress in the YZ direction = τ _yz are expressed. The XYZ axes can be arbitrarily determined as long as they are orthogonal to each other regardless of the Si crystal axis.

ρ is the resistivity. Further, the change rate of the resistivity is “π × σ”. Here, l _j and l _k indicate the directions of currents flowing through the resistors. For example, in the case of a resistor laid out in the X direction and flowing a current in the X direction, l _x = 1, l _y = 0, l _z = 0, and the change in resistivity is Δρ / ρ = Δρ _xx / ρ. .

In the present embodiment, when it is described that “the sign of the piezo coefficient of the resistance is different”, it means that the sign of the piezo coefficient of π ₁₁ or π ₁₂ is different. Alternatively, it may mean that the signs of both π ₁₁ and π ₁₂ are different from each other. As an example, N-type polysilicon (N + Poly) and P-type polysilicon (P + Poly) formed on a Si substrate generally depend on the impurity doping concentration, but generally have both π ₁₁ and π ₁₂ piezos. The sign of the coefficient is different.

  As a known stress application method, four-point bending measurement is known. This is a method of applying a known stress to a target element by applying a load to four points on a strip-shaped test piece in which the element to be stressed is arranged near the center. It is.

  In the signal generation device 100 according to the present embodiment, the first resistor 110 and the second resistor 120 are formed so that the signs of such piezo coefficients are different. In addition, the first resistor 110 and the second resistor 120 may have different values of piezo coefficients. Accordingly, the amplifying unit 130 outputs an output signal Vout that depends on the stress applied to the first resistor 110 and the second resistor 120. The semiconductor element 10 uses a signal based on the output signal Vout as a drive signal.

  The current generator 300 generates a current corresponding to the output signal of the signal generator 100. The current generation unit 300 includes a power supply unit 310, an amplification unit 320, an amplification element 332, an amplification element 334, a resistance element 336, an amplification element 342, an amplification element 344, and an amplification element 352.

  The power supply unit 310 supplies a power supply voltage and / or a power supply current to each unit of the apparatus 1000. The power supply unit 310 may supply a power supply voltage and / or a power supply current to the semiconductor element 10. Further, the power supply unit 310 may supply a power supply voltage to the signal generation device 100.

  The amplification unit 320 receives the output signal of the signal generation device 100 and outputs a signal output corresponding to the output signal. The amplifying unit 320 may be an operational amplifier including a non-inverting input and an inverting input. For example, the signal generation device 100 supplies the output voltage Vout to the non-inverting input of the amplifying unit 320.

  The amplifying element 332, the amplifying element 334, the resistance element 336, the amplifying element 342, and the amplifying element 344 may constitute a current mirror circuit. That is, the current I1 that flows from the power supply unit 310 to the reference potential 106 via the amplification element 332, the amplification element 334, and the resistance element 336 is supplied from the power supply unit 310 via the amplification element 342 and the amplification element 344. The current mirror circuit is configured so as to be substantially the same as the current I2 flowing in the path leading to 106.

  Here, when the resistance value of the resistance element 336 is R5, the potential V1 between the amplification element 334 and the resistance element 336 is I1 · R5, and the potential V1 is supplied to the inverting input of the amplification unit 320. Therefore, the amplifying unit 320 adjusts the output signal supplied to the amplifying element 334 so that the potential V1 approaches the output voltage Vout of the signal generation device 100. That is, the current I1 flowing through the resistance element 336 is a constant current corresponding to the output signal Vout of the signal generation device 100 and the resistance value R5.

  In addition, the amplification element 342, the amplification element 344, and the amplification element 352 may constitute a current mirror circuit. That is, the current I2 that flows from the power supply unit 310 to the reference potential 106 via the amplifier element 342 and the amplifier element 344 flows to the current I3 that flows from the semiconductor element 10 to the reference potential 106 via the amplifier element 352. The current mirror circuit is configured so as to be substantially the same. Therefore, the current I3 flowing through the semiconductor element 10 is a constant current having substantially the same current value as the current I1 corresponding to the output signal Vout and the resistance value R5 of the signal generation device 100. The semiconductor element 10 uses the current generated by the current generation unit 300 as the power supply current.

  That is, since the current I3 flowing through the semiconductor element 10 has a current value corresponding to the output signal Vout of the signal generation device 100, the semiconductor element 10 is driven by a signal based on the output signal Vout of the signal generation device 100. Become. Therefore, the signal generation device 100 can adjust the piezo coefficients of the first resistor 110 and the second resistor 120 to be different so as to reduce the output signal that fluctuates with changes in the usage environment of the semiconductor element 10. it can. Next, adjustment of the output fluctuation of the semiconductor element 10 by the signal generation device 100 will be described.

  FIG. 2 shows an example of the fluctuation amount of the output signal Vout with respect to the stress applied to the first resistor 110 and the second resistor 120 in the apparatus 1000 having the first configuration example according to the present embodiment. The horizontal axis in FIG. 2 indicates the stress applied to the first resistor 110 and the second resistor 120, and the vertical axis indicates the fluctuation amount of the output signal Vout of the signal generation device 100 in% units. FIG. 2 shows a calculation example when the piezo coefficient of the first resistor 110 is +1 [% / 100 MPa] and the piezo coefficient of the second resistor 120 is −1 [% / 100 MPa].

  In FIG. 2, a graph indicated by a solid line shows a calculation result when the resistance values R1 and R2 are each 1 kΩ. In this case, when the stress was 0 MPa, the fluctuation amount was 0%, and the result that the fluctuation amount of the output signal Vout increased to 1.0% as the stress increased to 100 MPa was calculated. Moreover, the graph shown with a dotted line shows the calculation result when the resistance value R1 is 1 kΩ and R2 is 3 kΩ. In this case, when the stress was 0 MPa, the fluctuation amount was 0%, and as the stress increased to 100 MPa, the fluctuation amount of the output signal Vout increased to 0.5%.

  Moreover, the graph shown with a dashed-dotted line shows a calculation result in case the resistance value R1 is 3 kΩ and R2 is 1 kΩ. In this case, when the stress was 0 MPa, the fluctuation amount was 0%, and the result that the fluctuation amount of the output signal Vout increased to 1.5% as the stress increased to 100 MPa was calculated. As described above, the signal generation device 100 according to the present embodiment can easily adjust the stress dependency of the output signal Vout based on the piezo coefficients and the resistance values of the first resistor 110 and the second resistor 120.

  For example, the semiconductor element 10 that is driven using the output signal Vout of the signal generation device 100 may cause the output signal to fluctuate due to stress fluctuations in at least a part of the semiconductor element 10 as the usage environment changes. is there. In this case, the signal generation device 100 according to the present embodiment reduces (cancels) the stress dependency of the output signal of the semiconductor element 10 using the piezo coefficients and the resistance values of the first resistor 110 and the second resistor 120. As described above, by adjusting the stress dependence of the output signal Vout, fluctuations in the output signal of the semiconductor element 10 can be reduced.

  As an example, consider a case where the semiconductor element 10 has a fluctuation characteristic of an output signal corresponding to a fluctuation amount of −1.0% with respect to application of a stress of 100 MPa. In this case, the signal generation device 100 sets the piezo coefficient of the first resistor 110 to +1 [% / 100 MPa], the piezo coefficient of the second resistor 120 to −1 [% / 100 MPa], and the resistance values R1 and R2 to 1 kΩ, respectively. As a result, an output signal Vout having a stress dependency of a variation amount of + 1.0% with respect to the application of the stress of 100 MPa is output. By using such an output signal Vout as a drive signal, the semiconductor element 10 can reduce the influence of stress without using a sensor or the like that detects the stress applied to the circuit element. That is, the apparatus 1000 according to the present embodiment can constitute a highly accurate semiconductor integrated circuit that is small in size and low in cost and does not depend on environmental changes.

FIG. 3 shows an example of a result of adjusting the magnetic sensitivity of the Hall element as the semiconductor element 10 by the apparatus 1000 of the first configuration example according to the present embodiment. The Hall element is an element that is formed on the substrate and detects a magnetic field in a predetermined direction. More specifically, when the substrate surface is the XY plane and the direction perpendicular to the XY plane is the Z axis, the Hall element has a Y axis corresponding to the magnetic field B input in the Z axis direction when a current flows in the X axis direction. It is a (Hall effect) element that generates an electromotive force (Hall voltage) Vhall in the direction. Such a Hall voltage Vhall of the semiconductor element 10 is expressed by the following equation using the magnetic sensitivity SI.
(Equation 4)
Vhall = SI ・ I3 ・ B

  In such a Hall element, the magnetic sensitivity SI varies according to the stress applied. Here, an example will be described in which the Hall element has a piezoelectric coefficient of approximately 4 [% / 100 MPa] as the stress dependence of magnetic sensitivity. That is, in the Hall element of this example, for example, when −100 MPa is applied as the compressive stress, the magnetic sensitivity SI is reduced by about 4%. Therefore, when the stress dependency of the current I3 flowing through the Hall element has a negative sign, it can be adjusted so as to reduce the fluctuation of the Hall voltage Vhall of the Hall element.

  The horizontal axis of FIG. 3 shows the stress applied to the Hall element, the first resistor 110, and the second resistor 120, which are the semiconductor elements 10, and the vertical axis shows the change rate of the magnetic sensitivity SI of the Hall element in%. . FIG. 3 shows the stress dependence of the magnetic sensitivity SI of the Hall element (that is, the piezo coefficient: +4 [% / 100 MPa]) with a solid line.

  Here, the resistance value R1 of the first resistor 110 of the signal generation device 100 is 1 kΩ, the resistance value R2 of the second resistor 120 is 0.3 kΩ, the piezo coefficient of the first resistor 110 is −1 [% / 100 MPa], the second When the piezo coefficient of the resistor 120 is 1 [% / 100 MPa], the signal generation device 100 can set the stress dependency of the output signal Vout to approximately −1.5 [% / 100 MPa].

  In addition, since the current I3 flowing through the Hall element depends on the resistance element 336 of the current generation unit 300, the stress dependency of the current I3 may be further adjusted using the piezo coefficient of the resistance element 336. As a result, the apparatus 1000 can make the stress dependence of the current I3 flowing through the Hall element substantially equal to the sum of the stress dependence of the output signal Vout of the signal generation apparatus 100 and the piezo coefficient of the resistance element 336.

  For example, when the device 1000 sets the piezo coefficient of the resistance element 336 to −1 [% / 100 MPa], the stress dependence of the current I3 flowing through the Hall element is approximately −2.5 [% / 100 MPa] in total. be able to. By using the current I3 generated in this way, the apparatus 1000 can further adjust the stress dependence of the Hall voltage Vhall of the Hall element indicated by the dotted line in FIG. 3 to approach 0 [% / 100 MPa]. it can. Thus, it can be seen that the device 1000 can reduce the stress fluctuation of the Hall voltage Vhall of the Hall element by adjusting the stress dependence of the current I3.

  FIG. 4 shows a second configuration example of the signal generation device 100 according to the present embodiment. The apparatus 1000 may include the signal generation apparatus 100 of the second configuration example instead of the signal generation apparatus 100 illustrated in FIG. In the signal generating device 100 of the second configuration example, the same reference numerals are given to the substantially same operations as those of the signal generating device 100 according to the present embodiment shown in FIG. 1, and the description thereof is omitted. The signal generating apparatus 100 of the second configuration example shows an example of configuring an inverting amplifier circuit.

That is, the first resistor 110 and the second resistor 120 are connected between the input terminal 102 that inputs the input signal Vin and the output terminal 104 that outputs the output signal Vout. In addition, the amplifying unit 130 inputs the voltage between the resistors of the first resistor 110 and the second resistor 120 and the reference potential 106 and adjusts the output signal Vout so that the voltage between the resistors approaches the reference potential 106. The amplification unit 130 outputs an output signal Vout obtained by amplifying the input signal Vin with an amplification factor according to the resistance values R1 and R2 of the first resistor 110 and the second resistor 120, as shown by the following equation.
(Equation 5)
Vout≈ (R2 / R1) Vin

  Also in the signal generation device 100 of the second configuration example, the first resistor 110 and the second resistor 120 are formed so as to have different piezo coefficients. Adjustment of stress fluctuations by the signal generation device 100 of the second configuration example will be described with reference to FIG.

  FIG. 5 shows an example of the fluctuation amount of the output signal with respect to the stress applied to the first resistor 110 and the second resistor 120 in the signal generating device 100 of the second configuration example according to the present embodiment. The horizontal axis in FIG. 5 indicates the stress applied to the first resistor 110 and the second resistor 120, and the vertical axis indicates the fluctuation amount of the output signal Vout of the signal generation device 100 in% units. FIG. 5 shows a calculation example when the piezo coefficient of the first resistor 110 is +1 [% / 100 MPa] and the piezo coefficient of the second resistor 120 is −1 [% / 100 MPa].

  In FIG. 5, the graph shown by the solid line shows the calculation result when the resistance values R1 and R2 are each 1 kΩ. In this case, when the stress was 0 MPa, the fluctuation amount was 0%, and as the stress increased to 100 MPa, the fluctuation amount of the output signal Vout was reduced to -2.0%. The calculation result when the resistance value R1 is 1 kΩ and R2 is 3 kΩ, and the calculation result when the resistance value R1 is 3 kΩ and R2 is 1 kΩ, are substantially the same as the graph shown by the solid line.

  That is, also in the signal generation device 100 of the second configuration example, the stress dependency of the output signal Vout can be easily adjusted based on the piezo coefficients of the first resistor 110 and the second resistor 120. As an example, when the input signal Vin has a variation amount of + 2.0% with respect to the application of the stress 100 MPa, the signal generation device 100 sets the piezo coefficient of the first resistor 110 to +1 [% / 100 MPa], the second resistance By setting the piezo coefficient of 120 to −1 [% / 100 MPa], the stress dependence of the input signal Vin can be adjusted. Thus, the apparatus 1000 can configure a highly accurate semiconductor integrated circuit that does not depend on environmental fluctuations by using the output signal Vout in which the stress dependency is adjusted as a drive signal for the semiconductor element 10.

  FIG. 6 shows a third configuration example of the signal generation device 100 according to the present embodiment. The apparatus 1000 may include the signal generation apparatus 100 of the third configuration example instead of the signal generation apparatus 100 illustrated in FIG. In the signal generation device 100 of the third configuration example, the same reference numerals are given to substantially the same operations as those of the signal generation device 100 according to the present embodiment shown in FIGS. 1 and 4, and the description thereof is omitted.

  In the signal generating apparatus 100 of the third configuration example, the input terminal 102 functions as a first input terminal that inputs the first input signal V1. The signal generating apparatus 100 of the third configuration example includes a second input terminal 202 for inputting the second input signal V2, a third resistor 210, and a fourth resistor 220, and configures a differential amplifier circuit. An example is shown.

  The third resistor 210 and the fourth resistor 220 are formed on the substrate and ideally have resistance values R1 and R2, respectively. The third resistor 210 and the fourth resistor 220 may be formed on substantially the same substrate as the first resistor 110. Similar to the first resistor 110, the resistance values R1 and R2 of the third resistor 210 and the fourth resistor 220 vary in proportion to the stress, respectively. The third resistor 210 and the fourth resistor 220 may be formed on the semiconductor substrate. The third resistor 210 and the fourth resistor 220 may be formed substantially the same as the first resistor 110 and the second resistor 120. The third resistor 210 and the fourth resistor 220 may be formed of a plurality of resistance elements.

  In FIG. 6, the first resistor 110 and the second resistor 120 are connected in series with each other between the input terminal 102 that receives the first input signal V1 and the output terminal 104 that outputs the output signal. The third resistor 210 and the fourth resistor 220 are connected in series between the second input terminal 202 for inputting the second input signal V2 and the reference potential 106. The amplifying unit 130 outputs the output signal Vout according to the difference between the first resistance voltage between the first resistance 110 and the second resistance 120 and the second resistance voltage between the third resistance 210 and the fourth resistance 220. Is output.

That is, the amplification unit 130 determines the difference signal (V2−V1) between the first input signal V1 and the second input signal V2 according to the resistance value of the first resistor 110 to the fourth resistor 220, as shown by the following equation. An output signal Vout amplified by the amplification factor is output.
(Equation 6)
Vout = (R2 / R1) (V2-V1)

  Also in the signal generation device 100 of the third configuration example, the third resistor 210 and the fourth resistor 220 are formed so as to have different piezo coefficients, like the first resistor 110 and the second resistor 120. The ratio (R2 / R1) of the resistance values is used as a coefficient for the output signal Vout output from the signal generation device 100 of the third configuration example shown in (Expression 5), as in the expression (4). Therefore, in the signal generation device 100 of the third configuration example, the tendency of the fluctuation amount of the output signal with respect to the stress applied from the first resistor 110 to the fourth resistor 220 is substantially the same as the tendency of the fluctuation amount of the output signal shown in FIG. Match. That is, in the case of the signal generation device 100 of the third configuration example, the stress dependence of the output signal Vout can be easily adjusted based on the piezo coefficients of the first resistor 110 to the fourth resistor 220.

  FIG. 7 shows a second configuration example of the apparatus 1000 according to the present embodiment. The device 1000 includes the semiconductor element 10 and the signal generation device 100 of the third configuration example. The signal generation device 100 adjusts the output of the semiconductor element 10 and outputs a signal in which the variation in sensitivity due to stress is reduced.

  That is, the signal generation device 100 has a first resistor 110 and a second resistor 120 that are different in sign of the piezo coefficient and are connected in series. In addition, the signal generation device 100 includes a third resistor 210 and a fourth resistor 220 that have different piezo coefficients and are connected in series. In addition, the signal generation device 100 receives a signal output from the semiconductor element 10 as an input signal, and an output signal corresponding to the input signal and the ratio of the resistance value of the first resistor 110 to the resistance value of the second resistor 120. Is output.

  In the present embodiment, an example in which the semiconductor element 10 is a Hall element will be described. That is, the apparatus 1000 functions as a magnetic sensor that adjusts the Hall voltage Vhall generated by the Hall element to reduce the sensitivity variation due to stress. In the present embodiment, the signal generation device 100 operates as a subsequent circuit connected to the subsequent stage of the semiconductor element 10.

  As described with reference to FIG. 6, the signal generation device 100 of the third configuration example has the stress dependency of the output signal Vout output from the output terminal 104 in accordance with the piezoelectric coefficient of the first resistor 110 to the fourth resistor 220. Can be easily adjusted. Accordingly, the signal generation device 100 can adjust the output signal Vout so as to reduce the stress dependency of the Hall voltage Vhall even if the Hall voltage Vhall output from the Hall element has stress dependency. . The adjustment of the stress fluctuation of the Hall voltage Vhall by the signal generation device 100 will be described with reference to FIG.

  FIG. 8 shows an example of a result of adjusting the stress fluctuation of the Hall voltage of the Hall element by the apparatus 1000 of the second configuration example according to the present embodiment. The horizontal axis of FIG. 8 shows the stress applied to the Hall element and the first resistor 110 to the fourth resistor 220, and the vertical axis shows the change rate of the Hall voltage of the Hall element in%. Moreover, FIG. 8 shows the stress dependence Hall_SI of the Hall voltage with a solid line. The stress dependency of the Hall voltage Hall_SI is substantially the same as the piezoelectric coefficient of the magnetic sensitivity of the Hall element from Equation (4), and is +4 [% / 100 MPa] in this example.

  As described with reference to FIG. 6, the signal generation device 100 of the third configuration example outputs an output signal Vout having a stress dependency of approximately −2 [% / 100 MPa] as illustrated in FIG. 5, for example. Can be adjusted. Therefore, the device 1000 of the second configuration example can reduce the stress dependence of the Hall voltage by amplifying the Hall voltage using such a signal generation device 100. The dotted line in FIG. 8 shows the result of amplifying the Hall voltage having a stress dependency of +4 [% / 100 MPa] using the signal generation device 100 having a stress dependency of an output signal of approximately −2 [% / 100 MPa]. An example is shown. It can be seen that the device 1000 of the second configuration example can be adjusted to reduce the stress dependence of the Hall voltage.

  As described above, the device 1000 of the second configuration example according to the present embodiment can amplify the Hall voltage while adjusting the stress fluctuation of the Hall voltage supplied from the Hall element. Therefore, the apparatus 1000 can detect the magnetic field with high accuracy while preventing an increase in circuit scale by using the signal generation apparatus 100 as a subsequent circuit of the semiconductor element 10.

  In addition, the apparatus 1000 of the first configuration example can adjust the stress fluctuation of the current I3 flowing through the Hall element, and the apparatus 1000 of the second configuration example adjusts the stress fluctuation of the Hall voltage generated by the Hall element. Each explained what can be done. Therefore, by combining the device 1000 of the first configuration example and the device 1000 of the second configuration example, the stress fluctuations of the current flowing through the Hall element and the Hall voltage generated by the Hall element may be adjusted comprehensively.

  FIG. 9 shows a third configuration example of the apparatus 1000 according to the present embodiment. In the apparatus 1000, the same reference numerals are given to the same operations as those of the apparatus 1000 of the first and second configuration examples shown in FIGS. 9 and 11, and the description thereof is omitted. The apparatus 1000 combines the apparatus 1000 according to the first configuration example and the apparatus 1000 according to the second configuration example, and comprehensively adjusts the current flowing through the Hall element and the stress fluctuation of the Hall voltage generated by the Hall element.

  The device 1000 according to the third configuration example includes the semiconductor element 10, the signal generation device 100 according to the first configuration example, a current generation unit 300, and a rear-stage device 500. That is, the device 1000 of the third configuration example is substantially the same as the configuration of the device 1000 of the first configuration example shown in FIG. 1 with the signal generation device 100 shown in FIGS.

  As an example, the device 1000 uses the signal generation device 100 and the current generation unit 300 of the first configuration example to adjust the stress fluctuation of the current IH flowing through the Hall element. In addition, the apparatus 1000 uses the subsequent apparatus 500 to adjust the stress fluctuation of the Hall voltage generated by the Hall element.

  In FIG. 9, in order to distinguish the post-stage device 500 from the signal generation device 100, a reference numeral different from that of the signal generation device 100 of the third configuration example illustrated in FIG. 6 is attached. However, the input terminal 502, the output terminal 504, the fifth resistor 510, the sixth resistor 520, the amplifying unit 530, the second input terminal 602, the seventh resistor 610, and the eighth resistor 620 included in the latter-stage device 500 are illustrated in FIG. Corresponding to each part of the signal generating apparatus 100 of the third configuration example shown, substantially the same operation may be executed.

  That is, the post-stage device 500 inputs a signal output from the semiconductor element 10 as an input signal. Further, as described with reference to FIG. 7, the post-stage device 500 has the fifth resistor 510 and the sixth resistor 520, the seventh resistor 610, and the eighth resistor 620, which have different piezo coefficients and are connected in series. And an amplifying unit 530 that is connected to the fifth to eighth resistors 620 and outputs an output signal corresponding to the ratio of the resistance value of the fifth resistor 510 to the resistance value of the sixth resistor 520. Thereby, the apparatus 1000 of the third configuration example can correct and correct the magnetic sensitivity of the Hall element more accurately.

  The apparatus 1000 according to this embodiment has been described with respect to the example in which the output dependency of the output signal Vout and / or the output signal Iout of the semiconductor element 10 is adjusted and output. Note that the apparatus 1000 is not limited to these. For example, the apparatus 1000 adjusts the stress dependency of the output signal so as to cancel the stress dependency of a circuit connected to the subsequent stage of the semiconductor element 10. As an example, a configuration in which the apparatus 1000 adjusts the stress dependence of the reference voltage of the AD converter 250 connected to the subsequent stage of the semiconductor element 10 will be described with reference to FIG.

  FIG. 10 shows a fourth configuration example of the apparatus 1000 according to the present embodiment. In the device 1000 of the fourth configuration example, the same reference numerals are given to the substantially same operations as those of the device 1000 according to the present embodiment shown in FIG. 1, and the description thereof is omitted. The device 1000 of the fourth configuration example shows an example of a configuration in which the signal generation device 100 of the first configuration example and the AD converter 250 are combined.

  The AD converter 250 receives the output signal Vout from the signal generation device 100 of the first configuration example as a reference voltage. That is, the AD converter 250 inputs a reference voltage input from the outside via the signal generation device 100. Further, the AD converter 250 inputs an analog signal to be converted into a digital signal from the semiconductor element 10. That is, in the AD converter 250, a signal based on the output of the semiconductor element 10 is input as an input signal, and the output of the amplification unit 130 of the signal generation device 100 is input as a reference voltage.

  As described above, in the device 1000 illustrated in FIG. 10, the AD converter 250 converts the stress-dependent analog signal output from the semiconductor element 10 into a digital signal based on the reference voltage supplied from the signal generation device 100. Then, the converted digital signal is output from the output terminal 204. Here, if the input analog signal and / or the reference voltage has stress dependency, the AD converter 250 changes the input signal according to the environmental change. May deteriorate.

  Therefore, as described with reference to FIGS. 1 and 2, the device 1000 according to the present embodiment uses the piezo coefficients and the resistance values of the first resistor 110 and the second resistor 120 to output the output signal Vout of the signal generator 100. The stress dependence of the AD converter 250 is adjusted to reduce deterioration of the conversion accuracy. That is, when the reference voltage supplied from the outside has a stress dependency, the signal generation device 100 adjusts the stress dependency of the reference voltage so as to reduce (cancel) the stress, thereby reducing the stress dependency. A reference voltage is supplied to the AD converter 250.

  As described above, the apparatus 1000 reduces the stress dependence of the reference voltage used by the AD converter 250, so that the analog signal input from the semiconductor element 10 is converted into a digital signal without degrading the conversion accuracy of the AD converter 250. It can be converted and output from the output terminal 204.

  Further, in the apparatus 1000 according to the present embodiment, when the analog signal output from the semiconductor element 10 has stress dependency, the stress dependency of the reference voltage is reduced so as to reduce (cancel) the stress dependency of the analog signal. May be adjusted. That is, the signal generation device 100 adjusts the reference voltage supplied from the outside to generate stress dependency. In this case, the signal generation device 100 may adjust the stress dependency of the reference voltage so as to substantially match the stress dependency of the analog signal.

  That is, for example, even if the voltage value of the analog signal increases (decreases) with stress fluctuation, the signal generation device 100 increases (decreases) the reference voltage in the same manner, so that the conversion result to the digital signal is substantially constant. Keep on. Thus, the apparatus 1000 can convert an analog signal into a digital signal and output it without degrading the conversion accuracy of the AD converter 250.

  In addition, the apparatus 1000 according to the present embodiment adjusts the stress dependency of the reference voltage even when the reference voltage supplied from the outside and the analog signal output from the semiconductor element 10 have stress dependency. The influence of the stress dependence of the two signals may be reduced. In this case, the signal generation device 100 adjusts the stress dependency of the reference voltage so as to substantially match the stress dependency of the analog signal. Thus, the apparatus 1000 can convert an analog signal into a digital signal and output it without degrading the conversion accuracy of the AD converter 250.

  As described above, the apparatus 1000 according to the present embodiment has been described with respect to the example in which the stress dependency of the semiconductor element 10 and / or the circuit connected to the subsequent stage of the semiconductor element 10 is reduced. The apparatus 1000 is not limited to this example, and may further include, for example, an attenuation unit that attenuates the output signal. For example, when the apparatus 1000 of the second configuration example shown in FIG. 7 outputs an output signal in which the stress dependency is adjusted while increasing the input signal, the output signal may be attenuated by an attenuation unit connected to the subsequent stage. As a result, the apparatus 1000 can output with the output signal strength set to a predetermined signal strength level, so that the degree of freedom in circuit design can be improved.

  In the above example, even if the attenuation unit has stress dependency, the signal generation device 100 may adjust the stress dependency of the output signal so as to reduce the stress dependency of the entire device 1000. . As a result, the apparatus 1000 can output an output signal having an intended signal level while reducing the stress dependency inside the apparatus 1000.

  The apparatus 1000 according to the present embodiment has been described as an example including one or two signal generation apparatuses 100. Alternatively, the apparatus 1000 may include three or more signal generation apparatuses 100. That is, the apparatus 1000 uses the plurality of signal generation apparatuses 100 to adjust the stress dependency of the input signal and output signal of the semiconductor element 10 and / or the device connected to the semiconductor element 10 and the output signal level. The degree of freedom can be further improved.

  The apparatus 1000 according to the present embodiment has been described to adjust the stress dependency of the semiconductor element 10 using the signal generation apparatus 100 including the amplification unit 130. Here, when an amplifier circuit or the like is provided outside the device 1000, or when the output signal of the semiconductor element 10 does not need to be amplified, the signal generation device 100 may not include the amplification unit 130. In this case, the signal generation device 100 may function as a correction device for the semiconductor element 10 because it does not amplify the signal.

  The correction device includes, for example, a signal output unit and a correction unit. The signal output unit outputs a signal corresponding to the output of the semiconductor element 10. The signal output unit may include a wiring that is connected to the output terminal of the semiconductor element 10 and transmits an output signal. The correction unit includes a first resistor 110 and a second resistor 120 that are connected in series to the wiring and have different signs of piezo coefficients, and correct the output signal according to the stress applied to the semiconductor element 10.

  That is, the correction unit may include a first resistor 110 and a second resistor 120 connected in series in a path from the output terminal of the semiconductor element 10 to the reference potential. Then, the correction unit may output the inter-resistance voltage of the first resistor 110 and the second resistor 120, respectively. In addition, when the semiconductor element 10 has a plurality of output terminals, the correction device may further include a plurality of first resistors 110 and second resistors 120 corresponding to the plurality of output terminals.

  As described above, the correction device may output the voltage V · R2 / (R1 + R2) obtained by dividing the output voltage V by the first resistor 110 and the second resistor 120 as the output signal Vout. In this case, the output signal Vout is multiplied by the coefficients of the first resistor 110 and the second resistor 120. Therefore, by changing the signs of the piezo coefficients of the first resistor 110 and the second resistor 120, the output signal Vout depends on the stress of the output signal. Sex can be corrected.

  It has been described that the device 1000 according to this embodiment includes the first resistor 110 and the second resistor 120 having different piezo coefficients. Here, at least one of the first resistor 110 and the second resistor 120 may be a variable resistor whose resistance value can be changed. Thereby, the amplified signal generating apparatus 100 can easily adjust the stress dependency and the signal amplification degree.

  Further, at least one of the first resistor 110 and the second resistor 120 may include a resistance portion extending in the first direction and a resistance portion extending in a second direction different from the first direction. Since the device 1000 adjusts the stress dependency based on the change in resistance value of the first resistor 110 and the second resistor 120 when stress is applied, even if the direction in which the stress is applied changes, It is desirable to be constant. Therefore, the first resistor 110 and the second resistor 120 have portions extending in a plurality of different directions on the substrate, and even if the direction of the stress changes, substantially the same resistance value change occurs for the same stress. It may be formed to occur.

  Note that the first resistor 110 and the second resistor 120 are preferably formed of substantially the same material. Further, it is desirable that the first resistor 110 and the second resistor 120 have substantially the same temperature characteristic of the resistance value. As an example, N + Poly and P + Poly formed on a Si substrate generally depend on the impurity doping concentration, but generally have substantially the same temperature characteristics. Therefore, the first resistor 110 and the second resistor 120 are formed of N + Poly, P + Poly, or the like, so that the temperature characteristics are substantially the same and the signs of the piezo coefficients are different. As a result, the apparatus 1000 can generate an output signal Vout having no temperature dependence and having a stress dependence, and can reduce the influence of the stress regardless of the temperature.

  More specifically, in the present embodiment, the output signal Vout of the amplifying unit 130 is a signal corresponding to the ratio of the resistance values of the first resistor 110 and the second resistor 120. That is, when resistors having similar temperature characteristics are used as the first resistor 110 and the second resistor 120, the temperature characteristics of the output signal Vout of the amplifier 130 are offset, so that temperature dependency can be reduced.

  When the temperature characteristics of the resistance values of the first resistor 110 and the second resistor 120 are not substantially the same, the amplifying unit 130 has an amount by which the ratio of the first resistor 110 and the second resistor 120 varies according to a temperature change. Accordingly, temperature dependence occurs in the output signal Vout. That is, the device 1000 can adjust the temperature dependence of the output signal Vout by making the materials of the first resistor 110 and the second resistor 120 different. In this case, the amplifying unit 130 may further output an output signal corresponding to the temperature dependence of the first resistor 110 and the second resistor 120.

  That is, the amplifying unit 130 outputs an output signal corresponding to a temperature variation amount of the ratio of the first resistor 110 and the second resistor 120, for example. Therefore, when the semiconductor element 10 outputs a signal having temperature dependence, the amplifier 130 sets the temperature dependence of the output signal Vout so as to cancel (reduce) the temperature dependence of the semiconductor element 10. Good. As a result, the apparatus 1000 can cancel (reduce) the influence of the temperature dependency of the semiconductor element 10.

  The apparatus 1000 according to the present embodiment has been described to adjust the material and the like of the first resistor 110 and the second resistor 120. In addition, the device 1000 may further adjust the position where the first resistor 110 and the second resistor 120 are formed. That is, the first resistor 110 and the second resistor 120 may be formed on different substrates. Such an apparatus 1000 will be described next.

  FIG. 11 shows a fifth configuration example of the apparatus 1000 according to the present embodiment. In the apparatus 1000 of the fifth configuration example, substantially the same components as those of the apparatus 1000 of the first configuration example according to the present embodiment shown in FIG. In the device 1000 of the fifth configuration example, the semiconductor element 10 and the second resistor 120 are formed on the same first substrate 20, and the amplification unit 130 and the first resistor 110 are different from the first substrate 20. The example formed above is shown.

  The first substrate 20 is preferably a GaAs substrate, Si substrate, AlN substrate, sapphire substrate, or the like. Thereby, the semiconductor element 10 can be easily formed (film formation) on the first substrate 20. From the viewpoint of improving the crystallinity and the like of the semiconductor element 10, when using a Hall element or an infrared element as the semiconductor element 10, a GaAs substrate or an Si substrate is preferable, and when using an ultraviolet element, an AlN substrate, A sapphire substrate or Si substrate is preferred.

  The second substrate 30 is preferably a semiconductor substrate such as a Si substrate. The second substrate 30 can facilitate a circuit formation process by using a Si substrate as a substrate on which the amplification unit 130 is formed. As described above, both the first substrate 20 and the second substrate 30 may be Si substrates, or different types of substrates such as GaAs substrates and Si substrates may be used. Moreover, a glass substrate, a ceramic substrate, etc. may be sufficient according to the element formed on each board | substrate.

  Different types of semiconductor substrates may be selected for the first substrate 20 and the second substrate 30 so as to be materials suitable for forming the semiconductor element 10 and the amplifying unit 130. In this case, for example, compared to the case where all elements and circuits are formed on the Si substrate, the formation of the semiconductor element 10 and the like can be facilitated, and the crystallinity can be improved, and the characteristics of the semiconductor element 10 are improved. Can be made.

  The first resistor 110 and the second resistor 120 are formed to have different combinations of resistors depending on the sign of the piezo coefficient, regardless of whether the types of substrates to be formed are the same or different. can do. In addition, since the stress value that varies due to the environmental variation is different between the first resistor 110 and the second resistor 120, the value of the ratio of R1 / R2 varies under the influence of the environmental variation. That is, as described above, the value of the output signal Vout of the amplifying unit 130 varies in response to the stress variation, and as a result, the driving signal (driving current) of the semiconductor element 10 varies. Then, by determining the stress dependency of the driving signal (driving current) so as to cancel (reduce) the stress dependency of the semiconductor element 10, it is possible to suppress fluctuations in the output of the semiconductor element 10 due to environmental fluctuations.

  Note that the absolute value of the piezo coefficient of the second resistor 120 formed on the first substrate 20 on which the semiconductor element 10 that should cancel the influence of stress is formed is the first resistor 110 formed on the second substrate 30. The absolute value of the piezo coefficient is preferably larger. As described above, increasing the absolute value of the piezo coefficient of the second resistor 120 that varies in response to the stress variation of the semiconductor element 10 cancels the influence of the stress (information that the semiconductor element 10 desires to reduce). This is equivalent to increasing the weight of. Therefore, the apparatus 1000 can reflect the adjustment of the drive signal (drive current) of the semiconductor element 10 with high sensitivity.

  Ideally, the absolute value of the piezo coefficient of the second resistor 120 formed on the first substrate 20 is sufficiently larger than the absolute value of the piezo coefficient of the first resistor 110 formed on the second substrate 30. Is preferable. In this case, most of the stress dependence of the driving signal (driving current) can be set to a value corresponding to the fluctuation of the second resistor 120, and the influence of the stress of the semiconductor element 10 can be more easily canceled (reduced), and the higher It becomes easy to realize accurate correction.

  The first substrate 20 and the second substrate 30 are electrically connected by wiring 40. The wiring 40 may be a bonding wire or the like. An example of the apparatus 1000 formed as described above is shown in FIG. FIG. 12 shows a configuration example in which the device 1000 of the fifth configuration example according to the present embodiment is packaged. FIG. 12 shows an example of a cross-sectional structure of the apparatus 1000. The apparatus 1000 further includes a third substrate 50, an electrode 60, and a package 70.

  The first substrate 20 and the second substrate 30 are formed on the third substrate 50. The third substrate 50 may be a common substrate. The third substrate 50 is electrically connected to the first substrate 20 and the second substrate 30, respectively. The third substrate 50 is electrically connected to the outside through the electrode 60. That is, the first substrate 20 and the second substrate 30 exchange electric signals with the outside through the third substrate 50 and the electrode 60, respectively. The package 70 seals the first substrate 20, the second substrate 30, and the third substrate 50. The package 70 may be sealed so as to cover a part or all of these members with resin and / or plastic.

  Further, in order to reflect the influence of the stress of the semiconductor element 10, the semiconductor element 10 and the second resistor 120 may be formed of substantially the same material. Further, the semiconductor element 10 and the second resistor 120 may be formed in substantially the same shape. Thereby, the stress fluctuation of the second resistor 120 can be made comparable to the stress fluctuation of the semiconductor element 10, and the design for reducing the stress fluctuation of the semiconductor element 10 can be facilitated. In addition, the variation depending on the temperature of the second resistor 120 can be set to the same level as the temperature dependency of the semiconductor element 10. A plurality of semiconductor elements 10 may be formed on the first substrate 20.

  FIG. 13 shows a configuration example of the first substrate 20 according to the present embodiment. FIG. 13 shows an example of a top view of the first substrate 20 on which the plurality of semiconductor elements 10 and the second resistors 120 are formed. In addition, let the surface in which the semiconductor element 10 and the 2nd resistance 120 of the 1st board | substrate 20 were formed be XY plane. FIG. 14 shows a configuration example of a cross section of the first substrate 20 according to the present embodiment. FIG. 14 shows an example of a cross section parallel to the XZ plane substantially perpendicular to the XY plane of the second resistor 120. 13 and 14 show an example in which the first substrate 20 is further provided with the electrode 22, the electrode 24, the electrode 26, and the electrode 28. FIG.

  The electrode 22 and the electrode 24 exchange electric signals with the plurality of semiconductor elements 10. In addition, the first substrate 20 may further include electrodes that transmit and receive electrical signals from the plurality of semiconductor elements 10. In addition, the first substrate 20 may include electrodes that exchange electrical signals with each of the plurality of semiconductor elements 10. The electrode 26 and the electrode 28 exchange electric signals with the second resistor 120.

  Here, for example, the plurality of semiconductor elements 10 include a plurality of mesa-shaped compound semiconductor elements connected in series, and at least one of the plurality of compound semiconductor elements and the second resistor 120 have the same mesa shape. Have As for the 1st board | substrate 20, it is desirable for the several semiconductor element 10 and the 2nd resistance 120 to be formed in a substantially the same shape with a substantially the same material. Accordingly, the stress fluctuations of the plurality of semiconductor elements 10 can be made substantially the same, and the second resistor 120 has a stress fluctuation of the same degree as the stress fluctuations of the semiconductor element 10, so that the plurality of semiconductor elements 10 Ten stress fluctuations can be reduced by using one second resistor 120.

  As described above, in the device 1000 of the fifth configuration example, the first resistor 110 and the second resistor 120 are formed on different substrates, and the semiconductor element 10 and the second resistor 120 are formed on the same substrate. Thus, the stress fluctuation of the semiconductor element 10 can be easily reduced. This reduction in stress fluctuation will be described more specifically by taking the case where the semiconductor element 10 is an LED and the first substrate is a GaAs substrate as an example.

The light emission amount Lu of the LED can be expressed by the following equation as an example. Here, I is a current value flowing through the _LED , R _LED is a resistance value of the LED, R ₁ is a resistance value of the first resistor 110, R ₂ is a resistance value of the second resistor 120, and R ₅ is a resistance value of the resistance element 336. Respectively.

Note that the piezo coefficients of the LED, the first resistor 110, the second resistor 120, and the resistor element 336 are α _LED , α ₁ , α ₂ , and α ₅ , respectively, and the stress applied to each is σ _LED , σ ₁ , σ ₂ and σ ₅ . _{Thus, R LED, R 1, R} 2, and _{R 5} is represented by the following equation. R _LED0 , R ₁₀ , R ₂₀ , and R ₅₀ represent initial values when the stress is 0, respectively.

By substituting the equation (8) into the equation (7), the following equation is obtained.

Here, since the LED and the second resistor 120 are formed on the GaAs substrate, if the piezoelectric coefficient of the GaAs substrate is α _S and the applied stress is σ _S , the product of the piezoelectric coefficient of the LED and the second resistor 120 and the stress is , Which is about the same as these products.

From the equation (9) and the equation (10), the following equation is calculated.

Here, it is assumed that the piezoelectric coefficient of the first resistor 110 and the resistance element 336 is small enough to be ignored as compared with the piezoelectric coefficient of the second resistor 120. For example, the first resistor 110 and the resistor element 336 are formed as metal resistors on the Si substrate that is the second substrate 30, so that the piezo coefficient can be made smaller than that of the second resistor 120. In this case, the following equation is established.

From the formula (11) and the formula (12), the following formula is calculated.

Since α _S · σ _S is a fluctuation of about several percent, when (α _S · σ _S ) ² is approximated to 0, Equation (13) is calculated as follows.

From the equation (14), the component Var that varies in accordance with the stress of the light emission amount Lu of the LED can be expressed by the following equation.

From equation (15), it is understood that when R ₁₀ = R ₂₀ , Var = 1, so that the light emission amount Lu of the LED becomes a substantially constant value even when stress is applied. That is, the LED and the second resistor 120 are formed on the same substrate, a resistor having a small piezoelectric coefficient is adopted as the first resistor 110 and the resistor element 336, and the first resistor 110 and the second resistor 120 have substantially the same resistance value. By doing so, highly accurate stress correction can be easily realized.

  FIG. 15 shows an example of design values of the LED, the first resistor 110, the second resistor 120, and the resistance element 336 according to the present embodiment. FIG. 16 shows an example of the variation rate of the light emission amount Lu when the apparatus 1000 according to the present embodiment uses the design value shown in FIG. FIG. 15 and FIG. 16 show the results of the simulation based on the above calculation, and it can be seen that the variation rate of the light emission amount Lu can be reduced.

  The horizontal axis of FIG. 16 shows the stress applied to the LED or the like, and the vertical axis shows the fluctuation rate of the light emission amount of the LED. The characteristic indicated by the dotted line in FIG. 16 shows an example in which the first resistor 110 and the second resistor 120 having substantially the same piezoelectric coefficient and the resistance element 336 having a piezoelectric coefficient that is negligibly small are employed. In this case, the current for driving the LED does not depend on temperature and stress, and a substantially constant current flows. Therefore, the fluctuation rate of the light emission amount of the LED reflected the piezo coefficient of the LED, and a result having a slope of about −3 [% / 100 MPa] was obtained.

  On the other hand, the characteristic shown by the solid line in FIG. 16 shows an example of the result using the design value shown in FIG. That is, the design of FIG. 15 is such that the piezo coefficient of the second resistor 120 formed on the same substrate as the LED is substantially the same as the piezo coefficient of the LED, and the piezo coefficients of the first resistor 110 and the resistance element 336 can be ignored. An example of making it smaller will be shown. As a result, the current for driving the LED fluctuates by about +3 [% / 100 MPa] depending on the stress, and the fluctuation reflecting the piezo coefficient of the LED is offset and the fluctuation rate of the light emission amount can be reduced. Obtained.

  Note that the piezo coefficient of the first resistor 110 only needs to have an absolute value smaller than the piezo coefficient of the second resistor 120, and the sign does not matter. Therefore, by setting the sign of the piezo coefficient of the LED and the first resistor 110 to + and the sign of the second resistor 120 to-, the layout area of the first resistor 110 is reduced while realizing highly accurate stress correction. be able to.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

  The order of execution of each process such as operations, procedures, steps, and stages in the apparatus, system, program, and method shown in the claims, the description, and the drawings is particularly “before” or “prior to”. It should be noted that the output can be realized in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flow in the claims, the description, and the drawings, even if it is described using “first”, “next”, etc. for convenience, it means that it is essential to carry out in this order. It is not a thing.

DESCRIPTION OF SYMBOLS 10 Semiconductor element, 20 1st board | substrate, 22 electrode, 24 electrode, 26 electrode, 28 electrode, 30 2nd board | substrate, 40 wiring, 50 3rd board | substrate, 60 electrode, 70 package, 100 signal generator, 102 input terminal, 104 Output terminal, 106 reference potential, 110 first resistor, 120 second resistor, 130 amplifying unit, 202 second input terminal, 204 output terminal, 210 third resistor, 220 fourth resistor, 250 AD converter, 300 current generating unit , 310 power supply unit, 320 amplifying unit, 332 amplifying element, 334 amplifying element, 336 resistance element, 342 amplifying element, 344 amplifying element, 352 amplifying element, 500 subsequent device, 502 input terminal, 504 output terminal, 510 fifth resistor, 520, sixth resistor, 530, amplifying unit, 602, second input terminal, 610, seventh resistor, 620 8th resistor, 1000 devices

Claims (20)

A first resistor and a second resistor having different signs of piezo coefficients and connected in series with each other;
An amplifying unit connected to the first resistor and the second resistor and outputting an output signal according to a ratio of a resistance value of the first resistor to a resistance value of the second resistor;
A semiconductor element using a signal based on the output signal as a drive signal;
With
The amplifying unit outputs an output signal depending on a stress applied to the first resistor and the second resistor.   The apparatus according to claim 1, wherein the amplifying unit further outputs the output signal according to temperature dependence of the first resistance and the second resistance.   The apparatus according to claim 1, wherein the amplifying unit outputs the output signal obtained by amplifying an input signal with an amplification factor according to resistance values of the first resistor and the second resistor.   The apparatus according to claim 3, wherein the amplifying unit adjusts the output signal to bring a resistance voltage between the first resistor and the second resistor closer to a target voltage. The first resistor and the second resistor are connected between an output terminal that outputs the output signal and a reference potential,
The apparatus according to claim 4, wherein the amplifying unit inputs the input signal and the voltage between the resistors, and adjusts the output signal so that the voltage between the resistors approaches the voltage of the input signal. The first resistor and the second resistor are connected between an input terminal for inputting the input signal and an output terminal for outputting the output signal,
The apparatus according to claim 4, wherein the amplifying unit inputs the voltage between the resistors and a reference potential, and adjusts the output signal so that the voltage between the resistors approaches the reference potential. A third resistor and a fourth resistor having different signs of piezo coefficients connected in series with each other;
The first resistor and the second resistor are connected between a first input terminal that inputs a first input signal and an output terminal that outputs the output signal,
The third resistor and the fourth resistor are connected between a second input terminal for inputting a second input signal and a reference potential,
The amplifying unit outputs the output signal according to a difference between a first resistance voltage between the first resistance and the second resistance and a second resistance voltage between the third resistance and the fourth resistance. The apparatus according to claim 4. An apparatus according to any one of claims 1 to 7;
A post-stage device that inputs a signal output from the semiconductor element as an input signal;
With
The latter apparatus is
A fifth resistor and a sixth resistor having different signs of piezo coefficients and connected in series with each other;
An amplifier connected to the fifth resistor and the sixth resistor and outputting an output signal corresponding to a ratio of a resistance value of the fifth resistor to a resistance value of the sixth resistor;
Having a device. A semiconductor element;
A first resistor and a second resistor having different signs of piezo coefficients and connected in series with each other;
A signal connected to the first resistor and the second resistor and output from the semiconductor element is input as an input signal, and the ratio of the input signal and the resistance value of the first resistor to the resistance value of the second resistor An amplifier that outputs an output signal according to
A device comprising:   The device according to any one of claims 1 to 9, wherein at least one of the first resistor and the second resistor is a variable resistor. The at least one of the first resistor and the second resistor has a resistance portion extending in a first direction and a resistance portion extending in a second direction different from the first direction. The device according to item.   The apparatus according to claim 1, further comprising an attenuation unit that attenuates the output signal. A first resistor and a second resistor having different signs of piezo coefficients and connected in series with each other;
An amplifying unit connected to the first resistor and the second resistor and outputting an output signal according to a ratio of a resistance value of the first resistor to a resistance value of the second resistor;
An AD converter in which a signal based on an output of the semiconductor element is input as an input signal, and an output of the amplifying unit is input as a reference voltage;
With
The amplifying unit outputs an output signal depending on a stress applied to the first resistor and the second resistor. The semiconductor element and the second resistor are formed on the same first substrate,
The apparatus according to claim 1, wherein the amplification unit and the first resistor are formed on a second substrate different from the first substrate.   The apparatus according to claim 14, wherein the first substrate is one of a GaAs substrate, a Si substrate, an AlN substrate, and a sapphire substrate.   The device according to claim 14 or 15, wherein the semiconductor element and the second resistor are formed of the same material. The semiconductor element comprises a plurality of mesa-shaped compound semiconductor elements connected in series with each other,
The apparatus according to claim 14, wherein at least one of the plurality of compound semiconductor elements and the second resistor have the same mesa shape.   The apparatus according to any one of claims 15 to 17, wherein an absolute value of a piezo coefficient of the second resistor is larger than an absolute value of a piezo coefficient of the first resistor. A signal output unit that outputs a signal according to the output of the semiconductor element;
A correction unit connected in series to each other, having a first resistor and a second resistor having different signs of piezo coefficients, and correcting the signal according to a stress applied to the semiconductor element;
A device comprising:   The apparatus according to claim 1, wherein the semiconductor element is any one of a Hall element, a magnetoresistive element, an infrared element, and an ultraviolet element.

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