JP2017001907A - β-Ga2O3 SUBSTRATE, SEMICONDUCTOR MULTILAYER STRUCTURE, AND SEMICONDUCTOR ELEMENT - Google Patents

β-Ga2O3 SUBSTRATE, SEMICONDUCTOR MULTILAYER STRUCTURE, AND SEMICONDUCTOR ELEMENT Download PDF

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JP2017001907A
JP2017001907A JP2015116909A JP2015116909A JP2017001907A JP 2017001907 A JP2017001907 A JP 2017001907A JP 2015116909 A JP2015116909 A JP 2015116909A JP 2015116909 A JP2015116909 A JP 2015116909A JP 2017001907 A JP2017001907 A JP 2017001907A
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main surface
substrate
width
center
crystal
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佳弘 山下
Yoshihiro Yamashita
佳弘 山下
飯塚　和幸
Kazuyuki Iizuka
和幸 飯塚
嘉克 森島
Yoshikatsu Morishima
嘉克 森島
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Tamura Corp
Koha Co Ltd
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Koha Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To provide a β-GaOsubstrate excellent in the orientation of a crystal not only at the center point of a principal plane but also in a wider region containing the center point, and a semiconductor multilayer structure and a semiconductor element containing the β-GaOsubstrate.SOLUTION: There is provided a β-GaOsubstrate 2, wherein the half-value width of an X ray locking curve of a principal plane 2a is 100 arcsec or less, which is obtained by setting (-201) or (101) plane to the principal plane 2a and, at the center of the principal plane 2a, irradiating a rectangular region 51 of a width 2.3 mm in a [010] direction and a width 10 mm of a direction perpendicular to the [010] direction with an X ray from a direction in which an orthogonal projection direction onto the principal plane 2a is the [010] direction, and wherein the half-value width of the X ray locking curve of the principal plane 2a is 50 arcsec or less, which is obtained by irradiating, at the center of the principal plane 2a, a rectangular region 52 of a width 0.5 mm in the [010] direction and a width 0.15 mm in a direction perpendicular to the [010] direction with the X ray from a direction in which the orthogonal projection direction onto the principal plane 2a is the [010] direction.SELECTED DRAWING: Figure 6

Description

本発明は、β−Ｇａ２Ｏ３基板、半導体積層構造体、及び半導体素子に関する。 The present invention relates to a β-Ga 2 O 3 substrate, a semiconductor multilayer structure, and a semiconductor element.

従来、主面である（−２０１）面のＸ線回折のロッキングカーブの半値幅が約１７秒であるβ−Ｇａ２Ｏ３基板が知られている（例えば、非特許文献１参照）。 Conventionally, a β-Ga 2 O 3 substrate in which the half-value width of the rocking curve of X-ray diffraction of the (−201) plane which is the main surface is about 17 seconds is known (see, for example, Non-Patent Document 1).

Ｘ線ロッキングカーブの半値幅は結晶の配向性の指標となり、半値幅が小さいほど、基板上のＸ線照射領域における結晶の配向性がよいことを示す。   The full width at half maximum of the X-ray rocking curve is an index of crystal orientation. The smaller the full width at half maximum, the better the crystal orientation in the X-ray irradiation region on the substrate.

T. Masui et al., 「２インチ（−２０１）β−Ｇａ２Ｏ３基板の作製と評価」、第６１回応用物理学会春期学術講演会予稿集T. Masui et al., “Preparation and Evaluation of 2-inch (−201) β-Ga2O3 Substrate”, Proceedings of the 61st JSAP Spring Meeting

通常、Ｘ線ロッキングカーブは主面の中心点において測定され、主面の中心点におけるＸ線ロッキングカーブの半値幅が、その基板のＸ線ロッキングカーブの半値幅として扱われる。   Usually, the X-ray rocking curve is measured at the center point of the main surface, and the half width of the X-ray rocking curve at the center point of the main surface is treated as the half width of the X-ray rocking curve of the substrate.

本発明の目的は、主面の中心点のみならず、中心点を含むより広い領域において結晶の配向性に優れるβ−Ｇａ２Ｏ３基板、並びにそのβ−Ｇａ２Ｏ３基板を含む半導体積層構造体及び半導体素子を提供することにある。 An object of the present invention is to provide a β-Ga 2 O 3 substrate having excellent crystal orientation in a wider region including the center point as well as the center point of the main surface, and a semiconductor laminate including the β-Ga 2 O 3 substrate The object is to provide a structure and a semiconductor element.

本発明の一態様は、上記目的を達成するために、［１］、［２］のβ−Ｇａ２Ｏ３基板を提供する。また、本発明の他の態様は、上記目的を達成するために、［３］の半導体積層構造体を提供する。また、本発明の他の態様は、上記目的を達成するために、［４］の半導体素子を提供する。 One embodiment of the present invention provides a β-Ga 2 O 3 substrate of [1] and [2] in order to achieve the above object. Moreover, in order to achieve the above object, another aspect of the present invention provides a semiconductor laminated structure according to [3]. Moreover, in order to achieve the above object, another aspect of the present invention provides the semiconductor element of [4].

［１］（−２０１）面又は（１０１）面を主面とし、前記主面の中心における、［０１０］方向の幅２．３ｍｍ、［０１０］方向に垂直な方向の幅１０ｍｍの長方形の領域に、前記主面上への正射影の方向が［０１０］方向である方向からＸ線を照射して得られる前記主面のＸ線ロッキングカーブの半値幅が１００ａｒｃｓｅｃ以下であり、前記主面の中心における、［０１０］方向の幅０．５ｍｍ、［０１０］方向に垂直な方向の幅０．１５ｍｍの長方形の領域に、前記主面上への正射影の方向が［０１０］方向である方向からＸ線を照射して得られる前記主面のＸ線ロッキングカーブの半値幅が５０ａｒｃｓｅｃ以下である、β−Ｇａ２Ｏ３基板。 [1] A rectangular region having a (−201) plane or a (101) plane as a main surface and having a width of 2.3 mm in the [010] direction and a width of 10 mm in the direction perpendicular to the [010] direction at the center of the main surface In addition, the half width of the X-ray rocking curve of the main surface obtained by irradiating X-rays from the direction in which the orthogonal projection onto the main surface is the [010] direction is 100 arcsec or less, A direction in which the orthogonal projection direction on the main surface is the [010] direction in a rectangular region having a width of 0.5 mm in the [010] direction and a width of 0.15 mm in the direction perpendicular to the [010] direction at the center A β-Ga 2 O 3 substrate in which the half width of the X-ray rocking curve of the main surface obtained by irradiating X-rays from 50 to 50 arcsec or less.

［２］前記主面内の［０１０］方向に垂直な、前記主面の中心を通る線分上の、前記主面の［０１０］方向へのオフセット角度の分布の、最大値と最小値の差が０．１６°以下である、前記［１］に記載のβ−Ｇａ２Ｏ３基板。 [2] Maximum value and minimum value of the offset angle distribution in the [010] direction of the main surface on a line segment passing through the center of the main surface perpendicular to the [010] direction in the main surface The β-Ga 2 O 3 substrate according to [1], wherein the difference is 0.16 ° or less.

［３］前記［１］又は［２］に記載のβ−Ｇａ２Ｏ３基板と、前記β−Ｇａ２Ｏ３基板上に形成された、ＡｌｘＧａｙＮ（０≦ｘ≦１、０≦ｙ≦１、ｘ＋ｙ＝１）を主成分とするバッファ層と、前記バッファ層を介して前記β−Ｇａ２Ｏ３基板上に形成された、ＡｌｘＧａｙＩｎｚＮ（０≦ｘ≦１、０≦ｙ≦１、０≦ｚ≦１、ｘ＋ｙ＋ｚ＝１）結晶を主成分とする窒化物半導体層と、を有する、半導体積層構造体。 [3] The β-Ga 2 O 3 substrate according to [1] or [2], and Al x Ga y N (0 ≦ x ≦ 1, 0) formed on the β-Ga 2 O 3 substrate. ≦ y ≦ 1, x + y = 1) as a main component, and Al x Ga y In z N (0 ≦ x ≦) formed on the β-Ga 2 O 3 substrate via the buffer layer. 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) a nitride semiconductor layer having a crystal as a main component.

［４］前記［３］に記載の半導体積層構造体を含む、半導体素子。 [4] A semiconductor element including the semiconductor multilayer structure according to [3].

本発明によれば、主面の中心点のみならず、中心点を含むより広い領域において結晶の配向性に優れるβ−Ｇａ２Ｏ３基板、並びにそのβ−Ｇａ２Ｏ３基板を含む半導体積層構造体及び半導体素子を提供することができる。 According to the present invention, not only the central point of the main surface but also a β-Ga 2 O 3 substrate excellent in crystal orientation in a wider region including the central point, and a semiconductor laminate including the β-Ga 2 O 3 substrate A structure and a semiconductor element can be provided.

図１は、第１の実施の形態に係る半導体積層構造体の垂直断面図である。FIG. 1 is a vertical cross-sectional view of the semiconductor multilayer structure according to the first embodiment. 図２は、第１の実施の形態に係るＥＦＧ結晶製造装置の垂直断面図である。FIG. 2 is a vertical sectional view of the EFG crystal manufacturing apparatus according to the first embodiment. 図３は、第１の実施の形態に係るβ−Ｇａ２Ｏ３単結晶の成長中の様子を表す斜視図である。FIG. 3 is a perspective view showing a state during growth of the β-Ga 2 O 3 single crystal according to the first embodiment. 図４は、種結晶を切り出すためのβ−Ｇａ２Ｏ３単結晶を育成する様子を表す斜視図である。FIG. 4 is a perspective view showing a state of growing a β-Ga 2 O 3 single crystal for cutting out a seed crystal. 図５は、第２の実施の形態に係るＬＥＤ素子の垂直断面図である。FIG. 5 is a vertical cross-sectional view of an LED element according to the second embodiment. 図６（ａ）は、第１のＸＲＣ半値幅を測定するためのＸ線照射領域を示す模式図である。図６（ｂ）は、第２のＸＲＣ半値幅を測定するためのＸ線照射領域を示す模式図である。FIG. 6A is a schematic diagram showing an X-ray irradiation region for measuring the first XRC half width. FIG. 6B is a schematic diagram showing an X-ray irradiation region for measuring the second XRC half width. 図７は、β−Ｇａ２Ｏ３基板の主面の中心における第１のＸＲＣ半値幅と、β−Ｇａ２Ｏ３基板を用いて製造されたＬＥＤ素子の歩留まりとの関係を示すグラフである。Figure 7 is a graph showing the relationship between the β-Ga 2 O 3 and the first XRC FWHM at the center of the main surface of the substrate, the yield of the LED device manufactured by using a β-Ga 2 O 3 substrate . 図８は、β−Ｇａ２Ｏ３基板の主面の中心における第２のＸＲＣ半値幅と、β−Ｇａ２Ｏ３基板を用いて製造されたＬＥＤ素子の２Ｖの電圧を印加したときのリーク電流との関係を示すグラフである。Figure 8 is a leak at the time of applying the second XRC FWHM of β-Ga 2 O 3 center of the main surface of the substrate, a 2V voltage of the LED device manufactured by using a β-Ga 2 O 3 substrate It is a graph which shows the relationship with an electric current. 図９（ａ）は、β−Ｇａ２Ｏ３基板の主面におけるオフセット角度分布を表すグラフである。図９（ｂ）は、β−Ｇａ２Ｏ３基板上の窒化物半導体層の主面におけるオフセット角度分布を表すグラフである。FIG. 9A is a graph showing the offset angle distribution on the main surface of the β-Ga 2 O 3 substrate. FIG. 9B is a graph showing the offset angle distribution on the main surface of the nitride semiconductor layer on the β-Ga 2 O 3 substrate. 図１０（ａ）は、β−Ｇａ２Ｏ３基板の主面におけるオフセット角度分布を表すグラフである。図１０（ｂ）は、β−Ｇａ２Ｏ３基板上の窒化物半導体層の主面におけるオフセット角度分布を表すグラフである。FIG. 10A is a graph showing the offset angle distribution on the main surface of the β-Ga 2 O 3 substrate. FIG. 10B is a graph showing the offset angle distribution on the main surface of the nitride semiconductor layer on the β-Ga 2 O 3 substrate. 図１１（ａ）は、β−Ｇａ２Ｏ３基板の主面におけるオフセット角度分布を表すグラフである。図１１（ｂ）は、β−Ｇａ２Ｏ３基板上の窒化物半導体層の主面におけるオフセット角度分布を表すグラフである。FIG. 11A is a graph showing the offset angle distribution on the main surface of the β-Ga 2 O 3 substrate. FIG. 11B is a graph showing the offset angle distribution on the main surface of the nitride semiconductor layer on the β-Ga 2 O 3 substrate. 図１２（ａ）は、β−Ｇａ２Ｏ３基板の主面における第２のＸＲＣ半値幅の分布を表すグラフである。図１２（ｂ）は、β−Ｇａ２Ｏ３基板上の窒化物半導体層の主面における第２のＸＲＣ半値幅の分布を表すグラフである。FIG. 12A is a graph showing the distribution of the second XRC half width on the main surface of the β-Ga 2 O 3 substrate. FIG. 12B is a graph showing the distribution of the second XRC half width on the main surface of the nitride semiconductor layer on the β-Ga 2 O 3 substrate. 図１３（ａ）は、β−Ｇａ２Ｏ３基板の主面における第２のＸＲＣ半値幅の分布を表すグラフである。図１３（ｂ）は、β−Ｇａ２Ｏ３基板上の窒化物半導体層の主面における第２のＸＲＣ半値幅の分布を表すグラフである。FIG. 13A is a graph showing the distribution of the second XRC half width on the main surface of the β-Ga 2 O 3 substrate. FIG. 13B is a graph showing a second XRC half-value width distribution in the main surface of the nitride semiconductor layer on the β-Ga 2 O 3 substrate. 図１４（ａ）は、β−Ｇａ２Ｏ３基板の主面における第２のＸＲＣ半値幅の分布を表すグラフである。図１４（ｂ）は、β−Ｇａ２Ｏ３基板上の窒化物半導体層の主面における第２のＸＲＣ半値幅の分布を表すグラフである。FIG. 14A is a graph showing the distribution of the second XRC half width on the main surface of the β-Ga 2 O 3 substrate. FIG. 14B is a graph showing the second XRC half-value width distribution in the main surface of the nitride semiconductor layer on the β-Ga 2 O 3 substrate. 図１５は、β−Ｇａ２Ｏ３基板の主面の中心における第１のＸＲＣ半値幅と、窒化物半導体層の主面の中心における第１のＸＲＣ半値幅との関係を示すグラフである。FIG. 15 is a graph showing the relationship between the first XRC half width at the center of the main surface of the β-Ga 2 O 3 substrate and the first XRC half width at the center of the main surface of the nitride semiconductor layer. 図１６は、β−Ｇａ２Ｏ３基板の主面の中心における第１のＸＲＣ半値幅と、β−Ｇａ２Ｏ３基板の主面のオフセット角度分布の最大値と最小値の差との関係を示すグラフである。16, β-Ga 2 O 3 and the first XRC FWHM at the center of the main surface of the substrate, β-Ga 2 O 3 relationship between the difference between the maximum value and the minimum value of the offset angle distribution of the main surface of the substrate It is a graph which shows.

〔第１の実施の形態〕
（半導体積層構造体の構造）
図１は、第１の実施の形態に係る半導体積層構造体１の垂直断面図である。半導体積層構造体１は、β−Ｇａ２Ｏ３基板２と、β−Ｇａ２Ｏ３基板２の主面２ａ上に形成されたバッファ層３と、バッファ層３を介してβ−Ｇａ２Ｏ３基板２の主面２ａ上に形成された窒化物半導体層４とを有する。 [First Embodiment]
(Structure of semiconductor laminated structure)
FIG. 1 is a vertical sectional view of a semiconductor multilayer structure 1 according to the first embodiment. Semiconductor laminated structure 1, β-Ga 2 O 3 substrate 2, β-Ga 2 O 3 and the buffer layer 3 formed on the main surface 2a of the substrate 2, β-Ga 2 O through the buffer layer 3 3 having a nitride semiconductor layer 4 formed on the main surface 2a of the substrate 2.

β−Ｇａ２Ｏ３基板２は、β−Ｇａ２Ｏ３結晶からなる。β−Ｇａ２Ｏ３基板２は、Ｓｉ、Ｓｎ等の導電型不純物を含んでもよい。β−Ｇａ２Ｏ３基板２の厚さは、例えば、７００μｍである。また、β−Ｇａ２Ｏ３基板２は、例えば、直径２インチの円形基板である。 The β-Ga 2 O 3 substrate 2 is made of β-Ga 2 O 3 crystal. The β-Ga 2 O 3 substrate 2 may contain conductive impurities such as Si and Sn. The thickness of the β-Ga 2 O 3 substrate 2 is, for example, 700 μm. Further, the β-Ga 2 O 3 substrate 2 is, for example, a circular substrate having a diameter of 2 inches.

β−Ｇａ２Ｏ３基板２の主面２ａは、（−２０１）面又は（１０１）面である。（−２０１）面と（１０１）面は、ともに［０１０］方向に平行な面である。（−２０１）面内では、［１０２］方向が［０１０］方向に直交し、（１０１）面内では、［１０−１］方向が［０１０］方向に直交する。 The main surface 2a of the β-Ga 2 O 3 substrate 2 is a (−201) plane or a (101) plane. Both the (−201) plane and the (101) plane are parallel to the [010] direction. In the (−201) plane, the [102] direction is orthogonal to the [010] direction, and in the (101) plane, the [10-1] direction is orthogonal to the [010] direction.

β−Ｇａ２Ｏ３基板２の主面２ａの中心における、［０１０］方向の幅２．３ｍｍ、［０１０］方向に垂直な方向の幅１０ｍｍの長方形の領域に、主面２ａ上への正射影の方向が［０１０］方向である方向からＸ線を照射して得られる主面２ａのＸ線ロッキングカーブの半値幅は、１００ａｒｃｓｅｃ以下である。 In the center of the main surface 2a of the β-Ga 2 O 3 substrate 2, a rectangular region having a width of 2.3 mm in the [010] direction and a width of 10 mm in the direction perpendicular to the [010] direction is formed on the main surface 2a. The full width at half maximum of the X-ray rocking curve of the main surface 2a obtained by irradiating X-rays from the direction in which the projection direction is the [010] direction is 100 arcsec or less.

以下、β−Ｇａ２Ｏ３基板２の［０１０］方向の幅２．３ｍｍ、［０１０］方向に垂直な方向の幅１０ｍｍの長方形の領域に、主面２ａ上への正射影の方向が［０１０］方向である方向からＸ線を照射して得られるＸ線ロッキングカーブの半値幅を第１のＸＲＣ半値幅と呼ぶ。すなわち、β−Ｇａ２Ｏ３基板２の主面２ａの中心における、主面２ａの第１のＸＲＣ半値幅は、１００ａｒｃｓｅｃ以下である。 Hereinafter, the direction of the orthogonal projection on the main surface 2a is [rectangular region of the width of 2.3 mm in the [010] direction of the β-Ga 2 O 3 substrate 2 and the width of 10 mm in the direction perpendicular to the [010] direction [ The half width of the X-ray rocking curve obtained by irradiating X-rays from the direction that is the [010] direction is referred to as a first XRC half width. That is, the first XRC half-width of the main surface 2a at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2 is 100 arcsec or less.

この第１のＸＲＣ半値幅を１００ａｒｃｓｅｃ以下とすることにより、半導体積層構造体１を用いて製造される半導体素子のリーク特性を良好にし、歩留まりを良好にすることができる。   By setting the first XRC half-width to 100 arcsec or less, the leakage characteristics of the semiconductor element manufactured using the semiconductor multilayer structure 1 can be improved, and the yield can be improved.

また、β−Ｇａ２Ｏ３基板２の主面２ａの中心における、［０１０］方向の幅０．５ｍｍ、［０１０］方向に垂直な方向の幅０．１５ｍｍの長方形の領域に、主面２ａ上への正射影の方向が［０１０］方向である方向からＸ線を照射して得られる主面２ａのＸ線ロッキングカーブの半値幅は、５０ａｒｃｓｅｃ以下である。 Further, in the center of the main surface 2a of the β-Ga 2 O 3 substrate 2, a main surface 2a is formed in a rectangular region having a width of 0.5 mm in the [010] direction and a width of 0.15 mm in the direction perpendicular to the [010] direction. The full width at half maximum of the X-ray rocking curve of the main surface 2a obtained by irradiating X-rays from the direction in which the upward orthogonal projection direction is the [010] direction is 50 arcsec or less.

以下、β−Ｇａ２Ｏ３基板２の［０１０］方向の幅０．５ｍｍ、［０１０］方向に垂直な方向の幅０．１５ｍｍの長方形の領域に、主面２ａ上への正射影の方向が［０１０］方向である方向からＸ線を照射して得られるＸ線ロッキングカーブの半値幅を第２のＸＲＣ半値幅と呼ぶ。すなわち、β−Ｇａ２Ｏ３基板２の主面２ａの中心における、主面２ａの第２のＸＲＣ半値幅は、５０ａｒｃｓｅｃ以下である。 Hereinafter, the direction of orthogonal projection onto the main surface 2a in a rectangular region having a width of 0.5 mm in the [010] direction and a width of 0.15 mm in the direction perpendicular to the [010] direction of the β-Ga 2 O 3 substrate 2 The half width of the X-ray rocking curve obtained by irradiating X-rays from the direction in which [10] is the [010] direction is referred to as a second XRC half width. That is, the second XRC half width of the main surface 2a at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2 is 50 arcsec or less.

この第２のＸＲＣ半値幅を５０ａｒｃｓｅｃ以下とすることにより、半導体積層構造体１を用いて製造される半導体素子のリーク特性を良好にすることができる。   By setting the second XRC half-value width to 50 arcsec or less, the leakage characteristics of the semiconductor element manufactured using the semiconductor multilayer structure 1 can be improved.

また、β−Ｇａ２Ｏ３基板２の主面２ａ内の［０１０］方向に垂直な、主面２ａの中心を通る線分上の、主面２ａの［０１０］方向へのオフセット角度の分布の、最大値と最小値の差が０．１６°以下であることが好ましい。 Further, the distribution of the offset angle in the [010] direction of the main surface 2a on the line segment that passes through the center of the main surface 2a and is perpendicular to the [010] direction in the main surface 2a of the β-Ga 2 O 3 substrate 2. The difference between the maximum value and the minimum value is preferably 0.16 ° or less.

バッファ層３は、ＡｌｘＧａｙＮ（０≦ｘ≦１、０≦ｙ≦１、ｘ＋ｙ＝１）、例えば、ＡｌＮを主成分とする。バッファ層３は、Ｓｉ等の導電型不純物を含んでもよい。バッファ層３の厚さは、例えば、１〜９６ｎｍである。 The buffer layer 3 is mainly composed of Al x Ga y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y = 1), for example, AlN. The buffer layer 3 may contain a conductivity type impurity such as Si. The thickness of the buffer layer 3 is, for example, 1 to 96 nm.

バッファ層３は、例えば、β−Ｇａ２Ｏ３基板２の主面２ａ上に４５０〜５３０℃の成長温度でＡｌＮを成長させることにより、形成される。 The buffer layer 3 is formed, for example, by growing AlN on the main surface 2a of the β-Ga 2 O 3 substrate 2 at a growth temperature of 450 to 530 ° C.

窒化物半導体層４は、窒化物半導体、すなわちＡｌｘＧａｙＩｎｚＮ（０≦ｘ≦１、０≦ｙ≦１、０≦ｚ≦１、ｘ＋ｙ＋ｚ＝１）の結晶からなり、特に、高い品質の結晶が得られやすいＧａＮ結晶（ｙ＝１、ｘ＝ｚ＝０）からなることが好ましい。窒化物半導体層４の厚さは、例えば、５μｍである。窒化物半導体層４は、Ｓｉ等の導電型不純物を含んでもよい。 The nitride semiconductor layer 4 is made of a nitride semiconductor, that is, a crystal of Al x Ga y In z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1), and is particularly high. It is preferably made of a GaN crystal (y = 1, x = z = 0) from which a quality crystal can be easily obtained. The thickness of the nitride semiconductor layer 4 is, for example, 5 μm. The nitride semiconductor layer 4 may contain a conductivity type impurity such as Si.

窒化物半導体層４は、例えば、β−Ｇａ２Ｏ３基板２の主面２ａ上にバッファ層３を介して、１０００℃の成長温度でＡｌｘＧａｙＩｎｚＮ（０≦ｘ≦１、０≦ｙ≦１、０≦ｚ≦１、ｘ＋ｙ＋ｚ＝１）結晶をエピタキシャル成長させることにより、形成される。窒化物半導体層４の主面４ａは、（０００１）面である。 The nitride semiconductor layer 4 is, for example, Al x Ga y In z N (0 ≦ x ≦ 1, at a growth temperature of 1000 ° C. via the buffer layer 3 on the main surface 2a of the β-Ga 2 O 3 substrate 2. 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) The crystal is formed by epitaxial growth. The main surface 4a of the nitride semiconductor layer 4 is a (0001) plane.

（β−Ｇａ２Ｏ３基板の製造方法）
以下に、β−Ｇａ２Ｏ３基板２の製造方法の一例を具体的に説明する。 (Manufacturing method of a β-Ga 2 O 3 substrate)
The following specifically describes an example of a β-Ga 2 O 3 substrate manufacturing method 2.

図２は、第１の実施の形態に係るＥＦＧ(Edge Defined Film Fed Growth)結晶製造装置１０の垂直断面図である。   FIG. 2 is a vertical cross-sectional view of an EFG (Edge Defined Film Fed Growth) crystal manufacturing apparatus 10 according to the first embodiment.

ＥＦＧ結晶製造装置１０は、石英管１８内に設置されたＧａ２Ｏ３融液３０を受容するルツボ１１と、このルツボ１１内に設置されたスリット１２ａを有するダイ１２と、ダイ１２の開口部１２ｂを含む上面を露出させるようにしてルツボ１１の開口部を閉塞する蓋１３と、種結晶３１を保持する種結晶保持具１４と、種結晶保持具１４を昇降可能に支持するシャフト１５と、ルツボ１１を載置するための支持台１６と、石英管１８の内壁に沿って設けられた断熱材１７と、石英管１８の周囲に設けられた高周波誘導加熱用の高周波コイル１９と、石英管１８及び断熱材１７を支持する基部２２と、基部２２に取り付けられた脚部２３とを有する。 The EFG crystal manufacturing apparatus 10 includes a crucible 11 for receiving a Ga 2 O 3 melt 30 installed in a quartz tube 18, a die 12 having a slit 12 a installed in the crucible 11, and an opening of the die 12. A lid 13 that closes the opening of the crucible 11 so that the upper surface including 12b is exposed; a seed crystal holder 14 that holds the seed crystal 31; and a shaft 15 that supports the seed crystal holder 14 so as to be movable up and down. A support 16 for placing the crucible 11, a heat insulating material 17 provided along the inner wall of the quartz tube 18, a high-frequency coil 19 for high-frequency induction heating provided around the quartz tube 18, and a quartz tube 18 and a base 22 that supports the heat insulating material 17, and a leg 23 attached to the base 22.

ＥＦＧ結晶製造装置１０は、さらに、ルツボ１１上のβ−Ｇａ２Ｏ３単結晶３２が育成される領域を囲むように設けられたＩｒ等からなるアフターヒーター２０と、アフターヒーター２０上に蓋のように設けられたＩｒ等からなる反射板２１を有する。アフターヒーター２０及び反射板２１は、ＥＦＧ結晶製造装置１０から自由に着脱することができる。 The EFG crystal manufacturing apparatus 10 further includes an after heater 20 made of Ir or the like provided so as to surround a region where the β-Ga 2 O 3 single crystal 32 on the crucible 11 is grown, and a lid on the after heater 20. The reflector 21 made of Ir or the like is provided. The after heater 20 and the reflecting plate 21 can be freely attached and detached from the EFG crystal manufacturing apparatus 10.

ルツボ１１は、Ｇａ２Ｏ３原料を溶解させて得られたＧａ２Ｏ３融液３０を収容する。ルツボ１１は、Ｇａ２Ｏ３融液３０を収容し得るＩｒ等の高い耐熱性を有する材料からなる。 The crucible 11 contains a Ga 2 O 3 melt 30 obtained by dissolving a Ga 2 O 3 raw material. The crucible 11 is made of a material having high heat resistance such as Ir that can accommodate the Ga 2 O 3 melt 30.

ダイ１２は、ルツボ１１内のＧａ２Ｏ３融液３０を毛細管現象により上昇させるためのスリット１２ａを有する。ダイ１２は、ルツボ１１と同様に、Ｉｒ等の高い耐熱性を有する材料からなる。 The die 12 has a slit 12a for raising the Ga 2 O 3 melt 30 in the crucible 11 by capillary action. Similar to the crucible 11, the die 12 is made of a material having high heat resistance such as Ir.

蓋１３は、ルツボ１１から高温のＧａ２Ｏ３融液３０が蒸発することを防止し、蒸発物がルツボ１１外の部材に付着することを防ぐ。 The lid 13 prevents the high-temperature Ga 2 O 3 melt 30 from evaporating from the crucible 11 and prevents the evaporated material from adhering to members outside the crucible 11.

高周波コイル１９は、石英管１８の周囲に螺旋状に配置され、図示しない電源から供給される高周波の電流により、ルツボ１１及びアフターヒーター２０を誘導加熱する。これにより、ルツボ内のＧａ２Ｏ３原料が溶解してＧａ２Ｏ３融液３０が得られる。 The high-frequency coil 19 is helically disposed around the quartz tube 18 and induction-heats the crucible 11 and the after-heater 20 with a high-frequency current supplied from a power source (not shown). Thereby, Ga 2 O 3 melt 30 was dissolved Ga 2 O 3 raw material in the crucible is obtained.

断熱材１７は、ルツボ１１の周囲に所定の間隔を有して設けられている。断熱材１７は、保温性を有し、誘導加熱されたルツボ１１等の急激な温度変化を抑制することができる。   The heat insulating material 17 is provided around the crucible 11 with a predetermined interval. The heat insulating material 17 has a heat retaining property and can suppress a rapid temperature change of the induction heated crucible 11 or the like.

アフターヒーター２０は、誘導加熱により発熱し、反射板２１は、アフターヒーター２０及びルツボ１１から発せられた熱を下方に反射する。アフターヒーター２０は、ホットゾーンの径方向（水平方向）の温度勾配を低減することができ、反射板２１は、ホットゾーンの結晶成長方向の温度勾配を低減することができることが、本願発明者により確認されている。   The after heater 20 generates heat by induction heating, and the reflector 21 reflects the heat generated from the after heater 20 and the crucible 11 downward. According to the present inventors, the after heater 20 can reduce the temperature gradient in the radial direction (horizontal direction) of the hot zone, and the reflector 21 can reduce the temperature gradient in the crystal growth direction of the hot zone. It has been confirmed.

アフターヒーター２０及び反射板２１をＥＦＧ結晶製造装置１０に設けることにより、β−Ｇａ２Ｏ３単結晶３２の結晶配向性を広い範囲で向上させることができる。このため、上記の主面２ａの第１のＸＲＣ半値幅が１００ａｒｃｓｅｃ以下であり、かつ主面２ａの第２のＸＲＣ半値幅が５０ａｒｃｓｅｃ以下であるβ−Ｇａ２Ｏ３基板２をβ−Ｇａ２Ｏ３単結晶３２から得るためには、アフターヒーター２０及び反射板２１を用いることが重要である。 By providing the after heater 20 and the reflector 21 in the EFG crystal manufacturing apparatus 10, the crystal orientation of the β-Ga 2 O 3 single crystal 32 can be improved in a wide range. Therefore, the β-Ga 2 O 3 substrate 2 in which the first XRC half-width of the main surface 2a is 100 arcsec or less and the second XRC half-width of the main surface 2a is 50 arcsec or less is β-Ga 2. In order to obtain from the O 3 single crystal 32, it is important to use the after heater 20 and the reflection plate 21.

図３は、第１の実施の形態に係るβ−Ｇａ２Ｏ３単結晶３２の成長中の様子を表す斜視図である。図３においては、β−Ｇａ２Ｏ３単結晶３２の周囲の部材の図示を省略する。 FIG. 3 is a perspective view showing a state during growth of the β-Ga 2 O 3 single crystal 32 according to the first embodiment. In FIG. 3, illustration of members around the β-Ga 2 O 3 single crystal 32 is omitted.

β−Ｇａ２Ｏ３単結晶３２を育成するには、まず、ルツボ１１内のＧａ２Ｏ３融液３０をダイ１２のスリット１２ａを通してダイ１２の開口部１２ｂまで上昇させ、種結晶３１をダイ１２の開口部１２ｂにあるＧａ２Ｏ３融液３０に接触させる。次に、Ｇａ２Ｏ３融液３０に接触させた種結晶３１を鉛直方向に引き上げ、β−Ｇａ２Ｏ３単結晶３２を成長させる。 In order to grow the β-Ga 2 O 3 single crystal 32, first, the Ga 2 O 3 melt 30 in the crucible 11 is raised to the opening 12 b of the die 12 through the slit 12 a of the die 12, and the seed crystal 31 is made to die. 12 is brought into contact with the Ga 2 O 3 melt 30 in the opening 12b. Next, the seed crystal 31 brought into contact with the Ga 2 O 3 melt 30 is pulled up in the vertical direction to grow a β-Ga 2 O 3 single crystal 32.

種結晶３１は、双晶面を含まない、又はほぼ含まないβ−Ｇａ２Ｏ３単結晶である。種結晶３１は、育成するβ−Ｇａ２Ｏ３単結晶３２と幅及び厚さがほぼ等しい。このため、幅方向Ｗ及び厚さ方向Ｔに肩を広げることなく、β−Ｇａ２Ｏ３単結晶３２を育成することができる。 The seed crystal 31 is a β-Ga 2 O 3 single crystal that does not include or substantially does not include twin planes. The seed crystal 31 has substantially the same width and thickness as the β-Ga 2 O 3 single crystal 32 to be grown. For this reason, the β-Ga 2 O 3 single crystal 32 can be grown without expanding the shoulder in the width direction W and the thickness direction T.

β−Ｇａ２Ｏ３単結晶３２の育成は幅方向Ｗに肩を広げる工程を含まないため、β−Ｇａ２Ｏ３単結晶３２の双晶化が抑えられる。なお、厚さ方向Ｔへの肩広げは、幅方向Ｗの肩広げと異なり、双晶が生じにくいため、β−Ｇａ２Ｏ３単結晶３２の育成は厚さ方向Ｔに肩を広げる工程を含んでもよいが、厚さ方向Ｔへの肩広げを行わない場合は、β−Ｇａ２Ｏ３単結晶３２のほぼ全体が基板を切り出すことのできる平板状の領域となり、基板製造のコストを低減することができるため、図３に示されるように、β−Ｇａ２Ｏ３単結晶３２の厚さを確保するために厚さの大きい種結晶３１を用いて、厚さ方向Ｔへの肩広げを行わないことが好ましい。 Since the growth of the β-Ga 2 O 3 single crystal 32 does not include a step of expanding the shoulder in the width direction W, twinning of the β-Ga 2 O 3 single crystal 32 is suppressed. Note that the shoulder expansion in the thickness direction T is different from the shoulder expansion in the width direction W, and twins are unlikely to be formed. Therefore, the growth of the β-Ga 2 O 3 single crystal 32 involves a process of expanding the shoulder in the thickness direction T. In the case where shoulder expansion in the thickness direction T is not performed, almost the entire β-Ga 2 O 3 single crystal 32 becomes a plate-like region from which the substrate can be cut, thereby reducing the substrate manufacturing cost. Therefore, as shown in FIG. 3, the seed crystal 31 having a large thickness is used to secure the thickness of the β-Ga 2 O 3 single crystal 32, and the shoulder is expanded in the thickness direction T. It is preferable not to perform.

また、β−Ｇａ２Ｏ３単結晶を肩を広げて育成する場合、肩広げの角度によって結晶の配向性の劣化や転位の増加が起こるおそれがあるが、β−Ｇａ２Ｏ３単結晶３２の育成は少なくとも幅方向Ｗに肩を広げる工程を含まないため、肩広げに起因する結晶の配向性の劣化や転位の増加を抑えることができる。 Further, when a β-Ga 2 O 3 single crystal is grown with its shoulders widened, the orientation of the crystal may be deteriorated or dislocations may be increased depending on the angle of shoulder expansion, but the β-Ga 2 O 3 single crystal 32 Since the growth does not include at least a step of expanding the shoulder in the width direction W, it is possible to suppress deterioration in crystal orientation and increase in dislocation due to the expansion of the shoulder.

種結晶３１の水平方向に向いた面３３の面方位と、β−Ｇａ２Ｏ３単結晶３２の主面３４の面方位が一致する。このため、例えば、β−Ｇａ２Ｏ３単結晶３２から主面４の面方位が（−２０１）であるβ−Ｇａ２Ｏ３基板２を切り出す場合は、種結晶３１の面３３の面方位が（−２０１）である状態でβ−Ｇａ２Ｏ３単結晶３２を育成する。 The plane orientation of the surface 33 of the seed crystal 31 facing the horizontal direction coincides with the plane orientation of the main surface 34 of the β-Ga 2 O 3 single crystal 32. Therefore, for example, when the β-Ga 2 O 3 substrate 2 in which the plane orientation of the main surface 4 is (−201) is cut out from the β-Ga 2 O 3 single crystal 32, the plane orientation of the surface 33 of the seed crystal 31. The β-Ga 2 O 3 single crystal 32 is grown in a state where is (−201).

次に、β−Ｇａ２Ｏ３単結晶３２と同等の幅を有する幅広の種結晶３１を四角柱状の幅の小さい種結晶を用いて形成する方法について述べる。 Next, a method for forming a wide seed crystal 31 having a width equivalent to that of the β-Ga 2 O 3 single crystal 32 by using a square columnar seed crystal having a small width will be described.

図４は、種結晶３１を切り出すためのβ−Ｇａ２Ｏ３単結晶３６を育成する様子を表す斜視図である。 FIG. 4 is a perspective view showing a state in which a β-Ga 2 O 3 single crystal 36 for cutting out the seed crystal 31 is grown.

種結晶３１は、β−Ｇａ２Ｏ３単結晶３６の双晶面を含まない、又はほとんど含まない領域から切り出される。このため、β−Ｇａ２Ｏ３単結晶３６の幅（幅方向Ｗの大きさ）は、種結晶３１の幅よりも大きい。 The seed crystal 31 is cut out from a region that does not include or hardly includes the twin plane of the β-Ga 2 O 3 single crystal 36. For this reason, the width (size in the width direction W) of the β-Ga 2 O 3 single crystal 36 is larger than the width of the seed crystal 31.

また、β−Ｇａ２Ｏ３単結晶３６の厚さ（厚さ方向Ｔの大きさ）は、種結晶３１の厚さより小さくてもよいが、その場合は、β−Ｇａ２Ｏ３単結晶３６から直接種結晶３１を切り出すのではなく、β−Ｇａ２Ｏ３単結晶３６から切り出した種結晶を用いて厚さ方向Ｔに肩を広げて育成したβ−Ｇａ２Ｏ３単結晶から種結晶３１を切り出す。 Further, the thickness of the β-Ga 2 O 3 single crystal 36 (the size in the thickness direction T) may be smaller than the thickness of the seed crystal 31, but in this case, the β-Ga 2 O 3 single crystal 36 The seed crystal 31 is not directly cut out from the β-Ga 2 O 3 single crystal 36, but is seeded from the β-Ga 2 O 3 single crystal grown from the β-Ga 2 O 3 single crystal 36 with the shoulder expanded in the thickness direction T. Cut out 31.

β−Ｇａ２Ｏ３単結晶３６の育成には、β−Ｇａ２Ｏ３単結晶３２の育成に用いられるＥＦＧ結晶製造装置１０とほぼ同じ構造のＥＦＧ結晶製造装置１００を用いることができる。ただし、β−Ｇａ２Ｏ３単結晶３６の幅、又は幅と厚さがβ−Ｇａ２Ｏ３単結晶３２と異なるため、ＥＦＧ結晶製造装置１００のダイ１１２の幅、又は幅と厚さは、ＥＦＧ結晶製造装置１０のダイ１２と異なる。ダイ１１２の開口部１１２ｂの大きさは、ダイ１２の開口部１２ｂと通常は等しいが、等しくなくてもよい。 For the growth of the β-Ga 2 O 3 single crystal 36, an EFG crystal manufacturing apparatus 100 having substantially the same structure as the EFG crystal manufacturing apparatus 10 used for the growth of the β-Ga 2 O 3 single crystal 32 can be used. However, since the width or width and thickness of the β-Ga 2 O 3 single crystal 36 are different from those of the β-Ga 2 O 3 single crystal 32, the width or width and thickness of the die 112 of the EFG crystal manufacturing apparatus 100 is , Different from the die 12 of the EFG crystal manufacturing apparatus 10. The size of the opening 112b of the die 112 is usually equal to the size of the opening 12b of the die 12, but may not be equal.

種結晶３５は、育成するβ−Ｇａ２Ｏ３単結晶３６よりも幅の小さい四角柱状のβ−Ｇａ２Ｏ３単結晶である。 The seed crystal 35 is a square columnar β-Ga 2 O 3 single crystal having a smaller width than the β-Ga 2 O 3 single crystal 36 to be grown.

β−Ｇａ２Ｏ３単結晶３６を育成するには、まず、ルツボ１１内のＧａ２Ｏ３融液３０をダイ１１２のスリットを通してダイ１１２の開口部１１２ｂまで上昇させ、種結晶３５の水平方向の位置がダイ１２の幅方向Ｗの中心から幅方向Ｗにずれた状態で、種結晶３５をダイ１１２の開口部１１２ｂにあるＧａ２Ｏ３融液３０に接触させる。このとき、より好ましくは、種結晶３５の水平方向の位置がダイ１１２の幅方向Ｗの端の上にある状態で、種結晶３５をダイ１１２の上面を覆うＧａ２Ｏ３融液３０に接触させる。 In order to grow the β-Ga 2 O 3 single crystal 36, first, the Ga 2 O 3 melt 30 in the crucible 11 is raised to the opening 112 b of the die 112 through the slit of the die 112, and the horizontal direction of the seed crystal 35 is increased. Is shifted from the center in the width direction W of the die 12 in the width direction W, the seed crystal 35 is brought into contact with the Ga 2 O 3 melt 30 in the opening 112 b of the die 112. At this time, more preferably, the seed crystal 35 is brought into contact with the Ga 2 O 3 melt 30 covering the upper surface of the die 112 in a state where the horizontal position of the seed crystal 35 is on the end in the width direction W of the die 112. Let

次に、Ｇａ２Ｏ３融液３０に接触させた種結晶３５を鉛直方向に引き上げ、β−Ｇａ２Ｏ３単結晶３６を成長させる。 Next, the seed crystal 35 brought into contact with the Ga 2 O 3 melt 30 is pulled up in the vertical direction to grow a β-Ga 2 O 3 single crystal 36.

上述のように、β−Ｇａ２Ｏ３単結晶は、（１００）面における劈開性が強く、結晶成長の肩広げの過程で（１００）面を双晶面（対称面）とする双晶が生じやすい。そのため、β−Ｇａ２Ｏ３単結晶３２からなるべく大きな双晶を含まない結晶を切り出すために、（１００）面がβ−Ｇａ２Ｏ３単結晶３２の成長方向に平行になるような方向、例えばｂ軸方向やｃ軸方向、にβ−Ｇａ２Ｏ３単結晶３２を成長させることが好ましい。 As described above, the β-Ga 2 O 3 single crystal has a strong cleavage in the (100) plane, and a twin crystal having the (100) plane as a twin plane (symmetric plane) in the process of crystal growth shoulder expansion. Prone to occur Therefore, β-Ga 2 O 3 in order to cut out as much as possible crystal containing no large twin monocrystalline 32, (100) plane direction such as to be parallel to the growth direction of the β-Ga 2 O 3 single crystal 32, For example, it is preferable to grow the β-Ga 2 O 3 single crystal 32 in the b-axis direction or the c-axis direction.

特に、β−Ｇａ２Ｏ３単結晶はｂ軸方向へ成長しやすい性質を有するため、β−Ｇａ２Ｏ３単結晶３２をｂ軸方向に成長させることがより好ましい。 In particular, since the β-Ga 2 O 3 single crystal has the property of easily growing in the b-axis direction, it is more preferable to grow the β-Ga 2 O 3 single crystal 32 in the b-axis direction.

また、育成するβ−Ｇａ２Ｏ３単結晶が幅方向への肩広げ工程において双晶化するときは、種結晶に近い領域に双晶面が生じやすく種結晶から離れた位置では双晶面が生じにくい。 In addition, when the β-Ga 2 O 3 single crystal to be grown twins in the shoulder expansion process in the width direction, twin planes are likely to be generated in a region close to the seed crystal, and the twin plane is separated from the seed crystal. Is unlikely to occur.

本実施の形態のβ−Ｇａ２Ｏ３単結晶３６の育成方法は、このようなβ−Ｇａ２Ｏ３単結晶の双晶化の性質を利用したものである。本実施の形態によれば、種結晶３５の水平方向の位置がダイ１２の幅方向Ｗの中心から幅方向Ｗにずれた状態でβ−Ｇａ２Ｏ３単結晶３６を成長させるため、種結晶３５の水平方向の位置がダイ１２の幅方向Ｗの中心にある状態でβ−Ｇａ２Ｏ３単結晶３６を成長させる場合と比較して、種結晶３５からの距離が大きい領域がβ−Ｇａ２Ｏ３単結晶３６中に生じる。このような領域には双晶面が生じにくいため、幅広の種結晶３１を切り出すことができる。 The method for growing the β-Ga 2 O 3 single crystal 36 according to the present embodiment utilizes the twinning properties of the β-Ga 2 O 3 single crystal. According to the present embodiment, since the β-Ga 2 O 3 single crystal 36 is grown in a state where the horizontal position of the seed crystal 35 is shifted from the center of the die 12 in the width direction W, the seed crystal 35 is grown. Compared with the case where the β-Ga 2 O 3 single crystal 36 is grown in a state where the horizontal position of 35 is in the center of the width direction W of the die 12, the region where the distance from the seed crystal 35 is large is β-Ga. It occurs in 2 O 3 single crystal 36. Since such a region is unlikely to have twin planes, a wide seed crystal 31 can be cut out.

なお、上記の種結晶３５を用いたβ−Ｇａ２Ｏ３単結晶３６の育成、及びβ−Ｇａ２Ｏ３単結晶３６からの種結晶の切り出しには、特開２０１４−２２１７０７に開示された技術を適用することができる。 Note that the cut-out of the seed crystal from the β-Ga 2 O 3 single crystal growth 36, and β-Ga 2 O 3 single crystal 36 using the above-mentioned seed crystal 35, which is disclosed in JP 2014-221707 Technology can be applied.

次に、育成したβ−Ｇａ２Ｏ３単結晶３２からβ−Ｇａ２Ｏ３基板２を切り出す方法の一例について述べる。 Next, an example of a method of cutting the β-Ga 2 O 3 substrate 2 from the grown β-Ga 2 O 3 single crystal 32 will be described.

まず、例えば、厚さが１８ｍｍのβ−Ｇａ２Ｏ３単結晶３２を育成した後、単結晶育成時の熱歪緩和と電気特性の向上を目的とするアニールを行う。このアニールは、例えば、窒素等の不活性雰囲気において、１４００〜１６００℃の温度を６〜１０時間保持することにより行われる。 First, for example, after a β-Ga 2 O 3 single crystal 32 having a thickness of 18 mm is grown, annealing is performed for the purpose of relaxing thermal strain and improving electrical characteristics during single crystal growth. This annealing is performed, for example, by maintaining a temperature of 1400 to 1600 ° C. for 6 to 10 hours in an inert atmosphere such as nitrogen.

次に、種結晶３１とβ−Ｇａ２Ｏ３単結晶３２の分離を行うため、ダイヤモンドブレードを用いて切断を行う。まず、カーボン系のステージに熱ワックスを介してβ−Ｇａ２Ｏ３単結晶３２を固定する。切断機にステージに固定されたβ−Ｇａ２Ｏ３単結晶３２をセッティングし、切断を行う。ブレードの粒度は＃２００〜＃６００（ＪＩＳＢ４１３１による規定）程度であることが好ましく、切断速度は毎分６〜１０ｍｍくらいが好ましい。切断後は、熱をかけてカーボン系ステージからβ−Ｇａ２Ｏ３単結晶３２を取外す。 Next, in order to separate the seed crystal 31 and the β-Ga 2 O 3 single crystal 32, cutting is performed using a diamond blade. First, the β-Ga 2 O 3 single crystal 32 is fixed to a carbon-based stage via a thermal wax. A β-Ga 2 O 3 single crystal 32 fixed on the stage is set in a cutting machine, and cutting is performed. The blade particle size is preferably about # 200 to # 600 (specified by JISB4131), and the cutting speed is preferably about 6 to 10 mm per minute. After cutting, the β-Ga 2 O 3 single crystal 32 is removed from the carbon stage by applying heat.

次に、超音波加工機やワイヤー放電加工機を用いてβ−Ｇａ２Ｏ３単結晶３２の縁を円形に加工する。また、円形に加工されたβ−Ｇａ２Ｏ３単結晶３２の縁にオリエンテーションフラットを形成してもよい。 Next, the edge of the β-Ga 2 O 3 single crystal 32 is processed into a circle using an ultrasonic processing machine or a wire electric discharge machine. Further, an orientation flat may be formed on the edge of the β-Ga 2 O 3 single crystal 32 processed into a circle.

次に、マルチワイヤーソーにより、円形に加工されたβ−Ｇａ２Ｏ３単結晶３２を１ｍｍ程度の厚さにスライスし、β−Ｇａ２Ｏ３基板２を得る。この工程において、所望のオフセット角をつけてスライスを行うことができる。ワイヤーソーは固定砥粒方式のものを用いることが好ましい。スライス速度は毎分０．１２５〜０．３ｍｍ程度が好ましい。 Next, the β-Ga 2 O 3 single crystal 32 processed into a circular shape is sliced to a thickness of about 1 mm by a multi-wire saw, and the β-Ga 2 O 3 substrate 2 is obtained. In this step, slicing can be performed with a desired offset angle. The wire saw is preferably a fixed abrasive type. The slicing speed is preferably about 0.125 to 0.3 mm per minute.

次に、加工歪緩和、及び電気特性向上、透過性向上を目的とするアニールをβ−Ｇａ２Ｏ３基板２に施す。昇温時には酸素雰囲気でのアニールを行い、昇温後に温度を保持する間は窒素雰囲気等の不活性雰囲気に切替えてアニールを行う。保持温度は１４００〜１６００℃が好ましい。 Next, the β-Ga 2 O 3 substrate 2 is subjected to annealing for the purpose of relaxing processing strain, improving electrical characteristics, and improving transparency. Annealing is performed in an oxygen atmosphere when the temperature is raised, and the annealing is performed while switching to an inert atmosphere such as a nitrogen atmosphere while the temperature is maintained after the temperature is raised. The holding temperature is preferably 1400 to 1600 ° C.

次に、β−Ｇａ２Ｏ３基板２のエッジに所望の角度にて面取り（べベル）加工を施す。 Next, chamfering (beveling) is performed on the edge of the β-Ga 2 O 3 substrate 2 at a desired angle.

次に、ダイヤモンドの研削砥石を用いて、所望の厚さになるまでβ−Ｇａ２Ｏ３基板２を研削する。砥石の粒度は＃８００〜１０００（ＪＩＳＢ４１３１による規定）程度であることが好ましい。 Next, the β-Ga 2 O 3 substrate 2 is ground to a desired thickness using a diamond grinding wheel. The particle size of the grindstone is preferably about # 800 to 1000 (specified by JISB4131).

次に、研磨定盤とダイヤモンドスラリーを用いて、所望の厚さになるまでβ−Ｇａ２Ｏ３単結晶基板を研磨する。研磨定盤は金属系やガラス系の材質のものが好ましい。ダイヤモンドスラリーの粒径は０．５μｍ程度が好ましい。 Next, the β-Ga 2 O 3 single crystal substrate is polished using a polishing platen and diamond slurry until a desired thickness is obtained. The polishing surface plate is preferably made of a metal or glass material. The particle size of the diamond slurry is preferably about 0.5 μm.

次に、ポリッシングクロスとＣＭＰ（Ｃｈｅｍｉｃａｌ Ｍｅｃｈａｎｉｃａｌ Ｐｏｌｉｓｈｉｎｇ）用のスラリーを用いて、原子レベルの平坦性が得られるまでβ−Ｇａ２Ｏ３基板２を研磨する。ポリッシングクロスはナイロン、絹繊維、ウレタン等の材質のものが好ましい。スラリーにはコロイダルシリカを用いることが好ましい。ＣＭＰ工程後のβ−Ｇａ２Ｏ３基板２の主面の平均粗さはＲａ０．０５〜０．１ｎｍくらいである。 Next, using a polishing cloth and a slurry for CMP (Chemical Mechanical Polishing), the β-Ga 2 O 3 substrate 2 is polished until flatness at the atomic level is obtained. The polishing cloth is preferably made of nylon, silk fiber, urethane or the like. It is preferable to use colloidal silica for the slurry. The average roughness of the main surface of the β-Ga 2 O 3 substrate 2 after the CMP process is about Ra 0.05 to 0.1 nm.

さらに、ＣＭＰ工程後、β−Ｇａ２Ｏ３基板２に塩素系ガス等を用いたドライエッチングを施す。このドライエッチングにより、ＣＭＰによりβ−Ｇａ２Ｏ３基板２の表面に生じた研磨ダメージを除去し、主面２ａ結晶配向性を広い範囲で向上させることができる。このため、上記の主面２ａの第１のＸＲＣ半値幅が１００ａｒｃｓｅｃ以下であり、かつ主面２ａの第２のＸＲＣ半値幅が５０ａｒｃｓｅｃ以下であるβ−Ｇａ２Ｏ３基板２をβ−Ｇａ２Ｏ３単結晶３２から得るためには、ＣＭＰ工程後にこのドライエッチングを実施することが重要である。 Further, after the CMP process, the β-Ga 2 O 3 substrate 2 is subjected to dry etching using a chlorine-based gas or the like. By this dry etching, polishing damage caused on the surface of the β-Ga 2 O 3 substrate 2 by CMP can be removed, and the crystal orientation of the main surface 2a can be improved in a wide range. Therefore, the β-Ga 2 O 3 substrate 2 in which the first XRC half-width of the main surface 2a is 100 arcsec or less and the second XRC half-width of the main surface 2a is 50 arcsec or less is β-Ga 2. In order to obtain from the O 3 single crystal 32, it is important to perform this dry etching after the CMP process.

〔第２の実施の形態〕
（半導体素子の構造）
第２の実施の形態は、第１の実施の形態の半導体積層構造体１を含む半導体素子についての形態である。以下に、その半導体素子の一例として、ＬＥＤ素子について説明する。 [Second Embodiment]
(Structure of semiconductor element)
2nd Embodiment is a form about the semiconductor element containing the semiconductor laminated structure 1 of 1st Embodiment. Hereinafter, an LED element will be described as an example of the semiconductor element.

図５は、第２の実施の形態に係るＬＥＤ素子４０の垂直断面図である。ＬＥＤ素子４０は、β−Ｇａ２Ｏ３基板４１と、β−Ｇａ２Ｏ３基板４１上のバッファ層４２と、バッファ層４２上のｎ型クラッド層４３と、ｎ型クラッド層４３上の発光層４４と、発光層４４上のｐ型クラッド層４５と、ｐ型クラッド層４５上のコンタクト層４６と、コンタクト層４６上のｐ側電極４７と、β−Ｇａ２Ｏ３基板４１のバッファ層４２と反対側の面上のｎ側電極４８とを有する。 FIG. 5 is a vertical cross-sectional view of the LED element 40 according to the second embodiment. The LED element 40 includes a β-Ga 2 O 3 substrate 41, a buffer layer 42 on the β-Ga 2 O 3 substrate 41, an n-type cladding layer 43 on the buffer layer 42, and light emission on the n-type cladding layer 43. Layer 44, p-type cladding layer 45 on light-emitting layer 44, contact layer 46 on p-type cladding layer 45, p-side electrode 47 on contact layer 46, and buffer layer of β-Ga 2 O 3 substrate 41 42 and an n-side electrode 48 on the opposite surface.

また、バッファ層４２、ｎ型クラッド層４３、発光層４４、ｐ型クラッド層４５、及びコンタクト層４６から構成される積層体の側面は、絶縁膜４９に覆われる。   In addition, the side surface of the stacked body including the buffer layer 42, the n-type cladding layer 43, the light emitting layer 44, the p-type cladding layer 45, and the contact layer 46 is covered with an insulating film 49.

ここで、β−Ｇａ２Ｏ３基板４１、バッファ層４２、及びｎ型クラッド層４３は、第１の実施の形態の半導体積層構造体１を構成するβ−Ｇａ２Ｏ３基板２、バッファ層３、及び窒化物半導体層４からそれぞれ構成される。β−Ｇａ２Ｏ３基板４１、バッファ層４２、及びｎ型クラッド層４３の厚さは、例えば、それぞれ７００μｍ、５ｎｍ、５μｍである。 Here, the β-Ga 2 O 3 substrate 41, the buffer layer 42, and the n-type cladding layer 43 are the β-Ga 2 O 3 substrate 2 and the buffer layer that constitute the semiconductor multilayer structure 1 of the first embodiment. 3 and the nitride semiconductor layer 4. The thicknesses of the β-Ga 2 O 3 substrate 41, the buffer layer 42, and the n-type cladding layer 43 are, for example, 700 μm, 5 nm, and 5 μm, respectively.

発光層４４は、例えば、３層の多重量子井戸構造と、その上の厚さ１０ｎｍのＧａＮ結晶膜からなる。各多重量子井戸構造は、厚さ８ｎｍのＧａＮ結晶膜と厚さ２ｎｍのＩｎＧａＮ結晶膜からなる。発光層４４は、例えば、成長温度７５０℃で各結晶膜をｎ型クラッド層４３上にエピタキシャル成長させることにより形成される。   The light emitting layer 44 is composed of, for example, a three-layer multiple quantum well structure and a GaN crystal film having a thickness of 10 nm thereon. Each multiple quantum well structure includes a GaN crystal film having a thickness of 8 nm and an InGaN crystal film having a thickness of 2 nm. The light emitting layer 44 is formed, for example, by epitaxially growing each crystal film on the n-type cladding layer 43 at a growth temperature of 750 ° C.

ｐ型クラッド層４５は、例えば、厚さ１５０ｎｍの、濃度５．０×１０１９／ｃｍ３のＭｇを含むＧａＮ結晶膜である。ｐ型クラッド層４５は、例えば、成長温度１０００℃でＭｇを含むＧａＮ結晶を発光層４４上にエピタキシャル成長させることにより形成される。 The p-type cladding layer 45 is, for example, a GaN crystal film having a thickness of 150 nm and containing Mg having a concentration of 5.0 × 10 19 / cm 3 . The p-type cladding layer 45 is formed, for example, by epitaxially growing a GaN crystal containing Mg on the light emitting layer 44 at a growth temperature of 1000 ° C.

コンタクト層４６は、例えば、厚さ１０ｎｍの、濃度１．５×１０２０／ｃｍ３のＭｇを含むＧａＮ結晶膜である。コンタクト層４６は、例えば、成長温度１０００℃でＭｇを含むＧａＮ結晶をｐ型クラッド層４５上にエピタキシャル成長させることにより形成される。 The contact layer 46 is, for example, a GaN crystal film having a thickness of 10 nm and containing Mg having a concentration of 1.5 × 10 20 / cm 3 . The contact layer 46 is formed, for example, by epitaxially growing a GaN crystal containing Mg at a growth temperature of 1000 ° C. on the p-type cladding layer 45.

バッファ層４２、ｎ型クラッド層４３、発光層４４、ｐ型クラッド層４５、及びコンタクト層４６の形成においては、Ｇａ原料としてＴＭＧ(トリメチルガリウム)ガス、Ｉｎ原料としてＴＭＩ(トリメチルインジウム)ガス、Ｓｉ原料としてＭｔＳｉＨ３（モノメチルシラン）ガス、Ｍｇ原料としてＣｐ２Ｍｇ(ビスシクロペンタジエニルマグネシウム)ガス、Ｎ原料としてＮＨ３(アンモニア)ガスを用いることができる。 In the formation of the buffer layer 42, the n-type cladding layer 43, the light emitting layer 44, the p-type cladding layer 45, and the contact layer 46, TMG (trimethylgallium) gas as the Ga material, TMI (trimethylindium) gas as the In material, Si MtSiH 3 (monomethylsilane) gas can be used as the raw material, Cp 2 Mg (biscyclopentadienyl magnesium) gas can be used as the Mg raw material, and NH 3 (ammonia) gas can be used as the N raw material.

絶縁膜４９は、ＳｉＯ２等からなる絶縁材料からなり、例えば、スパッタリングにより形成される。 The insulating film 49 is made of an insulating material made of SiO 2 or the like, and is formed by sputtering, for example.

ｐ側電極４７及びｎ側電極４８は、それぞれコンタクト層４６及びβ−Ｇａ２Ｏ３基板４１にオーミック接合する電極であり、例えば、蒸着により形成される。 The p-side electrode 47 and the n-side electrode 48 are electrodes that are in ohmic contact with the contact layer 46 and the β-Ga 2 O 3 substrate 41, respectively, and are formed by vapor deposition, for example.

ＬＥＤ素子４０は、ウエハ状態のβ−Ｇａ２Ｏ３基板４１上に、バッファ層４２、ｎ型クラッド層４３、発光層４４、ｐ型クラッド層４５、コンタクト層４６、ｐ側電極４７、及びｎ側電極４８を形成した後、これらをダイシングによって、例えば、１ｍｍ角のチップサイズに分離することにより得られる。 The LED element 40 has a buffer layer 42, an n-type cladding layer 43, a light emitting layer 44, a p-type cladding layer 45, a contact layer 46, a p-side electrode 47, and n on a β-Ga 2 O 3 substrate 41 in a wafer state. After the side electrodes 48 are formed, they are obtained by dicing them into, for example, 1 mm square chips.

ＬＥＤ素子４０は、例えば、β−Ｇａ２Ｏ３基板４１側から光を取り出すＬＥＤチップであり、キャンタイプのステムにＡｇペーストを用いて実装される。 The LED element 40 is, for example, an LED chip that extracts light from the β-Ga 2 O 3 substrate 41 side, and is mounted on a can-type stem using Ag paste.

ＬＥＤ素子４０は、ＬＥＤ素子４０は、第１の実施の形態に係るβ−Ｇａ２Ｏ３基板２を含む半導体積層構造体１を用いて製造されるため、リーク特性に優れる。 Since the LED element 40 is manufactured using the semiconductor multilayer structure 1 including the β-Ga 2 O 3 substrate 2 according to the first embodiment, the LED element 40 is excellent in leak characteristics.

（実施の形態の効果）
第１の実施の形態によれば、主面２ａの中心点のみならず、中心点を含むより広い領域において結晶の配向性に優れるβ−Ｇａ２Ｏ３基板２を得ることができる。 (Effect of embodiment)
According to the first embodiment, it is possible to obtain the β-Ga 2 O 3 substrate 2 having excellent crystal orientation not only in the central point of the main surface 2a but also in a wider region including the central point.

また、第２の実施の形態によれば、このようなβ−Ｇａ２Ｏ３基板２を含む半導体積層構造体１を用いて、リーク特性に優れる半導体素子を製造することができる。 Further, according to the second embodiment, a semiconductor element having excellent leakage characteristics can be manufactured using the semiconductor multilayer structure 1 including such a β-Ga 2 O 3 substrate 2.

本実施例において、上記実施の形態に係るβ−Ｇａ２Ｏ３基板２、結晶積層構造体１、及びＬＥＤ素子４０に対して、下記の各評価を実施した。 In this example, the following evaluations were performed on the β-Ga 2 O 3 substrate 2, the crystal multilayer structure 1, and the LED element 40 according to the above embodiment.

本実施例においては、上記実施の形態の一態様として、主面２ａが（−２０１）面であるβ−Ｇａ２Ｏ３基板２、ＡｌＮからなるバッファ層３、ＧａＮからなる窒化物半導体層４、ｐ側電極４７の形状が１ｍｍ角の正方形であるＬＥＤ素子４０を用いて評価を行った。なお、本実施例におけるβ−Ｇａ２Ｏ３基板２のＸＲＣ半値幅は、（−４０２）面での回折によるＸ線ロッキングカーブの半値幅である。当然のことながら、（−４０２）面、（−６０３）面、（−８０４）面等の（−２０１）面と平行な面での回折によるＸ線ロッキングカーブの半値幅は、（−２０１）面での回折によるＸ線ロッキングカーブの半値幅とほぼ等しく、主面２ａのＸ線ロッキングカーブの半値幅を求めるために、（−２０１）面と平行な面のどの面での回折によるＸ線ロッキングカーブを測定してもよい。 In this example, as an aspect of the above-described embodiment, the β-Ga 2 O 3 substrate 2 whose main surface 2a is the (−201) plane, the buffer layer 3 made of AlN, and the nitride semiconductor layer 4 made of GaN. Evaluation was performed using the LED element 40 in which the shape of the p-side electrode 47 was a square of 1 mm square. Note that the XRC half-value width of the β-Ga 2 O 3 substrate 2 in this example is the half-value width of the X-ray rocking curve by diffraction on the (−402) plane. Naturally, the half-value width of the X-ray rocking curve by diffraction on a plane parallel to the (−201) plane such as the (−402) plane, the (−603) plane, or the (−804) plane is (−201). In order to obtain the full width at half maximum of the X-ray rocking curve of the principal surface 2a, which is approximately equal to the half-value width of the X-ray rocking curve due to diffraction at the surface, A rocking curve may be measured.

図６（ａ）は、上記実施の形態における第１のＸＲＣ半値幅を測定するためのＸ線照射領域５１を示す模式図である。図６（ｂ）は、上記実施の形態における第２のＸＲＣ半値幅を測定するためのＸ線照射領域５２を示す模式図である。   FIG. 6A is a schematic diagram showing an X-ray irradiation region 51 for measuring the first XRC half width in the above embodiment. FIG. 6B is a schematic diagram showing an X-ray irradiation region 52 for measuring the second XRC half width in the above embodiment.

Ｘ線照射領域５１は、β−Ｇａ２Ｏ３基板２の主面２ａの中心における、［０１０］方向の幅２．３ｍｍ、［０１０］方向に垂直な方向である［１０２］方向の幅１０ｍｍの長方形の領域である。 The X-ray irradiation region 51 has a width of 2.3 mm in the [010] direction and a width of 10 mm in the [102] direction that is perpendicular to the [010] direction at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2. This is a rectangular area.

Ｘ線照射領域５２は、β−Ｇａ２Ｏ３基板２の［０１０］方向の幅０．５ｍｍ、［０１０］方向に垂直な方向である［１０２］方向の幅０．１５ｍｍの長方形の領域である。 The X-ray irradiation region 52 is a rectangular region having a width of 0.5 mm in the [010] direction of the β-Ga 2 O 3 substrate 2 and a width of 0.15 mm in the [102] direction that is perpendicular to the [010] direction. is there.

なお、図６（ｂ）において複数のＸ線照射領域５２が［１０２］方向に沿って並んでいるのは、主面２ａ内の［０１０］方向に垂直な、主面２ａの中心を通る線分上の、各位置におけるＸ線ロッキングカーブを測定するときの測定領域を模式的に示したものである。主面２ａの中心におけるＸ線ロッキングカーブを測定するときには、主面２ａの中心における１つのＸ線照射領域５２において測定を行う。   In FIG. 6B, the plurality of X-ray irradiation regions 52 are arranged along the [102] direction that is a line that passes through the center of the main surface 2a and is perpendicular to the [010] direction in the main surface 2a. The measurement area | region when measuring the X-ray rocking curve in each position on the upper side is typically shown. When measuring the X-ray rocking curve at the center of the main surface 2a, the measurement is performed in one X-ray irradiation region 52 at the center of the main surface 2a.

また、図６（ａ）、（ｂ）に示されるように、Ｘ線は、β−Ｇａ２Ｏ３基板２の主面２ａ上への正射影の方向が［０１０］方向である方向から照射される。 Further, as shown in FIGS. 6A and 6B, X-rays are irradiated from the direction in which the orthogonal projection direction onto the main surface 2a of the β-Ga 2 O 3 substrate 2 is the [010] direction. Is done.

（β−Ｇａ２Ｏ３基板のＸＲＣ半値幅と半導体素子のリーク特性の関係）
図７は、β−Ｇａ２Ｏ３基板２の主面２ａの中心における第１のＸＲＣ半値幅と、β−Ｇａ２Ｏ３基板２を用いて製造されたＬＥＤ素子４０の歩留まりとの関係を示すグラフである。 (Relationship between XRC half-width of β-Ga 2 O 3 substrate and leakage characteristics of semiconductor element)
7, a first XRC FWHM at the center of the β-Ga 2 O 3 principal surface 2a of the substrate 2, the relationship between the yield of the LED elements 40 produced using the β-Ga 2 O 3 substrate 2 It is a graph to show.

ここで、ＬＥＤ素子４０の歩留まりは、１枚のβ−Ｇａ２Ｏ３基板２から切り出したおよそ９００個のＬＥＤ素子４０のうち、２Ｖの電圧を印加したときのリーク電流が１×１０−６Ａ以下である良品の割合である。 Here, the yield of the LED elements 40 is 1 × 10 −6 when a voltage of 2 V is applied among about 900 LED elements 40 cut out from one β-Ga 2 O 3 substrate 2. It is the ratio of good products that are A or less.

図７に示されるように、β−Ｇａ２Ｏ３基板２の主面２ａの中心における第１のＸＲＣ半値幅が１００ａｒｃｓｅｃ以下である場合に、ＬＥＤ素子４０の歩留まりが特に良好になる。 As shown in FIG. 7, the yield of the LED elements 40 is particularly good when the first XRC half-width at the center of the main surface 2 a of the β-Ga 2 O 3 substrate 2 is 100 arcsec or less.

図８は、β−Ｇａ２Ｏ３基板２の主面２ａの中心における、主面２ａの第２のＸＲＣ半値幅と、β−Ｇａ２Ｏ３基板２を用いて製造されたＬＥＤ素子４０の２Ｖの電圧を印加したときのリーク電流との関係を示すグラフである。 8, at the center of the β-Ga 2 O 3 principal surface 2a of the substrate 2, a second XRC FWHM of the main surface 2a, a β-Ga 2 O 3 LED element 40 that is manufactured using the substrate 2 It is a graph which shows the relationship with the leakage current when the voltage of 2V is applied.

図８に示されるように、β−Ｇａ２Ｏ３基板２の主面２ａの中心における、主面２ａの第２のＸＲＣ半値幅が５０ａｒｃｓｅｃ以下である場合に、ＬＥＤ素子４０のリーク電流を効果的に抑制できる。 As shown in FIG. 8, when the second XRC half width of the main surface 2 a at the center of the main surface 2 a of the β-Ga 2 O 3 substrate 2 is 50 arcsec or less, the leakage current of the LED element 40 is effective. Can be suppressed.

（オフセット角度分布の測定）
図９（ａ）、１０（ａ）、１１（ａ）は、β−Ｇａ２Ｏ３基板２の主面２ａにおけるオフセット角度分布を表すグラフである。図９（ｂ）、図１０（ｂ）、図１１（ｂ）は、β−Ｇａ２Ｏ３基板２上の窒化物半導体層４の主面４ａにおけるオフセット角度分布を表すグラフである。 (Measurement of offset angle distribution)
9A, 10A, and 11A are graphs showing the offset angle distribution on the main surface 2a of the β-Ga 2 O 3 substrate 2. FIGS. 9B, 10 </ b> B, and 11 </ b> B are graphs showing offset angle distributions on the principal surface 4 a of the nitride semiconductor layer 4 on the β-Ga 2 O 3 substrate 2.

ここで、図９（ａ）、図９（ｂ）に係るβ−Ｇａ２Ｏ３基板２の主面２ａの中心における主面２ａの第１のＸＲＣ半値幅は、２８．１ａｒｃｓｅｃである。また、図１０（ａ）、図１０（ｂ）に係るβ−Ｇａ２Ｏ３基板２の主面２ａの中心における主面２ａの第１のＸＲＣ半値幅は、９５．４ａｒｃｓｅｃである。また、図１１（ａ）、図１１（ｂ）に係るβ−Ｇａ２Ｏ３基板２の主面２ａの中心における主面２ａの第１のＸＲＣ半値幅は、２８６．２ａｒｃｓｅｃである。 Here, the first XRC half-width of the main surface 2a at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2 according to FIGS. 9A and 9B is 28.1 arcsec. Further, the first XRC half-width of the main surface 2a at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2 according to FIGS. 10A and 10B is 95.4 arcsec. Further, the first XRC half-value width of the main surface 2a at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2 according to FIGS. 11A and 11B is 286.2 arcsec.

図９（ａ）、１０（ａ）、１１（ａ）の横軸は、β−Ｇａ２Ｏ３基板２の主面２ａ内の［０１０］方向に垂直な、主面２ａの中心を通る線分（以下、第１の線分と呼ぶ）上の、主面２ａの中心を原点とする位置である。図９（ｂ）、図１０（ｂ）、図１１（ｂ）の横軸は、上記第１の線分の真上に位置する、窒化物半導体層４の主面４ａ内の線分（以下、第２の線分と呼ぶ）上の、主面４ａの中心を原点とする位置である。 9 (a), 10 (a), 11 (a) is a line passing through the center of the main surface 2a perpendicular to the [010] direction in the main surface 2a of the β-Ga 2 O 3 substrate 2. This is a position on the minute (hereinafter referred to as the first line segment) with the center of the main surface 2a as the origin. 9 (b), FIG. 10 (b), and FIG. 11 (b) are line segments within the main surface 4a of the nitride semiconductor layer 4 (hereinafter referred to as “horizontal axes”) located immediately above the first line segment. , Referred to as a second line segment), the position having the center of the main surface 4a as the origin.

図９（ａ）、１０（ａ）、１１（ａ）の縦軸は、上記第１の線分上の各位置における、［０１０］方向への主面２ａのオフセット角度である。図９（ｂ）、図１０（ｂ）、図１１（ｂ）の縦軸は、上記第２の線分上の各位置における、β−Ｇａ２Ｏ３基板２の［０１０］方向への主面４ａのオフセット角度である。 9A, 10A, and 11A, the vertical axis represents the offset angle of the main surface 2a in the [010] direction at each position on the first line segment. 9B, FIG. 10B, and FIG. 11B are the main axes in the [010] direction of the β-Ga 2 O 3 substrate 2 at each position on the second line segment. This is the offset angle of the surface 4a.

上記の主面２ａ又は主面４ａのオフセット角度は、それぞれ、図６（ｂ）に示されるように、主面２ａ上への正射影の方向が［０１０］方向である方向から、第１の線分又は第２の線分上に並んだＸ線照射領域５２にＸ線を照射することにより得られる主面２ａ又は主面４ａのＸ線ロッキングカーブのピーク位置から求められる。   As shown in FIG. 6B, the offset angle of the main surface 2a or the main surface 4a is the first angle from the direction in which the orthogonal projection direction on the main surface 2a is the [010] direction. It is obtained from the peak position of the X-ray rocking curve of the main surface 2a or the main surface 4a obtained by irradiating the X-ray irradiation region 52 arranged on the line segment or the second line segment with X-rays.

図１２（ａ）、１３（ａ）、１４（ａ）は、β−Ｇａ２Ｏ３基板２の主面２ａにおける、主面２ａの第２のＸＲＣ半値幅の分布を表すグラフである。図１２（ｂ）、図１３（ｂ）、図１４（ｂ）は、β−Ｇａ２Ｏ３基板２上の窒化物半導体層４の主面４ａにおける、主面４ａの第２のＸＲＣ半値幅の分布を表すグラフである。 12A, 13A, and 14A are graphs showing the distribution of the second XRC half width of the main surface 2a on the main surface 2a of the β-Ga 2 O 3 substrate 2. FIG. FIGS. 12B, 13 </ b> B, and 14 </ b> B show the second XRC half width of the main surface 4 a in the main surface 4 a of the nitride semiconductor layer 4 on the β-Ga 2 O 3 substrate 2. It is a graph showing distribution of.

ここで、図１２（ａ）、図１２（ｂ）に係るβ−Ｇａ２Ｏ３基板２の主面２ａの中心における主面２ａの第１のＸＲＣ半値幅は、２８．１ａｒｃｓｅｃである。また、図１３（ａ）、図１３（ｂ）に係るβ−Ｇａ２Ｏ３基板２の主面２ａの中心における主面２ａの第１のＸＲＣ半値幅は、９５．４ａｒｃｓｅｃである。また、図１４（ａ）、図１４（ｂ）に係るβ−Ｇａ２Ｏ３基板２の主面２ａの中心における主面２ａの第１のＸＲＣ半値幅は、２８６．２ａｒｃｓｅｃである。 Here, the first XRC half-width of the main surface 2a at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2 according to FIGS. 12A and 12B is 28.1 arcsec. Further, the first XRC half-value width of the main surface 2a at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2 according to FIGS. 13A and 13B is 95.4 arcsec. Further, the first XRC half-width of the main surface 2a at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2 according to FIGS. 14A and 14B is 286.2 arcsec.

図１２（ａ）、１３（ａ）、１４（ａ）の横軸は、上記主面２ａ内の第１の線分上の、主面２ａの中心を原点とする位置である。図１２（ｂ）、図１３（ｂ）、図１４（ｂ）の横軸は、上記主面４ａ内の第２の線分上の、主面４ａの中心を原点とする位置である。   12 (a), 13 (a), and 14 (a) are positions on the first line segment in the main surface 2a with the center of the main surface 2a as the origin. The horizontal axis of FIG.12 (b), FIG.13 (b), FIG.14 (b) is a position which makes the origin the center of the main surface 4a on the 2nd line segment in the said main surface 4a.

図１２（ａ）、１３（ａ）、１４（ａ）の縦軸は、上記第１の線分上の各位置における、主面２ａの第２のＸＲＣ半値幅である。図１２（ｂ）、図１３（ｂ）、図１４（ｂ）の縦軸は、上記第２の線分上の各位置における、主面４ａの第２のＸＲＣ半値幅である。   12 (a), 13 (a), and 14 (a), the vertical axis represents the second XRC half-value width of the main surface 2a at each position on the first line segment. The vertical axes in FIGS. 12B, 13B, and 14B represent the second XRC half-value width of the main surface 4a at each position on the second line segment.

上記の主面２ａ又は主面４ａの第２のＸＲＣ半値幅は、それぞれ、図６（ｂ）に示されるように、主面２ａ上への正射影の方向が［０１０］方向である方向から、第１の線分又は第２の線分上に並んだＸ線照射領域５２にＸ線を照射することにより得られる主面２ａ又は主面４ａＸ線ロッキングカーブの半値幅から得られる。   The second XRC half width of the main surface 2a or the main surface 4a is from the direction in which the orthogonal projection direction on the main surface 2a is the [010] direction, as shown in FIG. 6B. The main surface 2a or the main surface 4a obtained by irradiating X-rays to the X-ray irradiation region 52 arranged on the first line segment or the second line segment is obtained from the half width of the X-ray rocking curve.

次の表１は、図９〜図１４に示される測定結果から、β−Ｇａ２Ｏ３基板２の主面２ａの中心における主面２ａの第１のＸＲＣ半値幅、β−Ｇａ２Ｏ３基板２の主面２ａの中心における主面２ａの第２のＸＲＣ半値幅、主面２ａ内のオフセット角度分布における最大値と最小値との差をまとめたものである。 The following Table 1 shows from the measurement results shown in FIGS. 9 to 14, the first XRC half width of the main surface 2 a at the center of the main surface 2 a of the β-Ga 2 O 3 substrate 2, β-Ga 2 O 3. The second XRC half-value width of the main surface 2a at the center of the main surface 2a of the substrate 2 and the difference between the maximum value and the minimum value in the offset angle distribution in the main surface 2a are summarized.

Figure 2017001907
Figure 2017001907

表１にまとめられた測定結果において着目すべき点は、β−Ｇａ２Ｏ３基板２の主面２ａの中心における第２のＸＲＣ半値幅が小さい場合であっても、第１のＸＲＣ半値幅が小さいとは限らないことである。すなわち、β−Ｇａ２Ｏ３基板２の主面２ａの中心における第２のＸＲＣ半値幅が小さい場合であっても、主面２ａの広い範囲において結晶配向性が優れているとはいえない。これは、主面２ａの中心における第２のＸＲＣ半値幅の大きさにかかわらず、主面２ａのオフセット角度分布のばらつきが大きい場合には、第１のＸＲＣ半値幅が大きくなることによる。 The point to be noted in the measurement results summarized in Table 1 is that even when the second XRC half width at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2 is small, the first XRC half width. Is not necessarily small. That is, even if the second XRC half width at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2 is small, it cannot be said that the crystal orientation is excellent in a wide range of the main surface 2a. This is because the first XRC half-value width becomes large when the offset angle distribution of the main surface 2 a is large regardless of the magnitude of the second XRC half-value width at the center of the principal surface 2 a.

図１５は、β−Ｇａ２Ｏ３基板２の主面２ａの中心における主面２ａの第１のＸＲＣ半値幅と、窒化物半導体層４の主面４ａの中心における主面４ａの第１のＸＲＣ半値幅との関係を示すグラフである。 15 shows the first XRC half width of the main surface 2a at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2 and the first of the main surface 4a at the center of the main surface 4a of the nitride semiconductor layer 4. It is a graph which shows the relationship with a XRC half value width.

図１５に示されるように、ＬＥＤ素子４０の歩留まりが良好になる、β−Ｇａ２Ｏ３基板２の主面２ａの中心における主面２ａの第１のＸＲＣ半値幅が１００ａｒｃｓｅｃ以下の場合には、窒化物半導体層４の主面４ａの中心における結晶配向性も良好である。 As shown in FIG. 15, when the yield of the LED elements 40 is good and the first XRC half-value width of the main surface 2 a at the center of the main surface 2 a of the β-Ga 2 O 3 substrate 2 is 100 arcsec or less. The crystal orientation at the center of the main surface 4a of the nitride semiconductor layer 4 is also good.

図１６は、β−Ｇａ２Ｏ３基板２の主面２ａの中心における主面２ａの第１のＸＲＣ半値幅と、β−Ｇａ２Ｏ３基板２の主面２ａのオフセット角度分布の最大値と最小値の差との関係を示すグラフである。 16, β-Ga 2 O 3 first XRC full width at half maximum and, β-Ga 2 O 3 maximum value of the offset angle distribution of the main surface 2a of the substrate 2 of the main surface 2a at the center of the main surface 2a of the substrate 2 It is a graph which shows the relationship between the difference of a minimum value.

このβ−Ｇａ２Ｏ３基板２の主面２ａのオフセット角度分布は、図９（ａ）、１０（ａ）、１１（ａ）に示されるような、上記第１の線分上の各位置における、［０１０］方向への主面２ａのオフセット角度の分布である。 The offset angle distribution of the main surface 2a of the β-Ga 2 O 3 substrate 2 is the position on the first line segment as shown in FIGS. 9 (a), 10 (a), and 11 (a). Is the distribution of the offset angle of the main surface 2a in the [010] direction.

図１６中の直線はプロットデータの近似直線であり、この近似直線によれば、ＬＥＤ素子４０の歩留まりが良好になる、β−Ｇａ２Ｏ３基板２の主面２ａの中心における主面２ａの第１のＸＲＣ半値幅が１００ａｒｃｓｅｃ以下の場合には、β−Ｇａ２Ｏ３基板２の主面２ａのオフセット角度分布の最大値と最小値の差がおよそ０．１６以下になる。 The straight line in FIG. 16 is an approximate straight line of plot data. According to this approximate straight line, the yield of the LED elements 40 is improved, and the main surface 2a at the center of the main surface 2a of the β-Ga 2 O 3 substrate 2 is obtained. When the first XRC half width is 100 arcsec or less, the difference between the maximum value and the minimum value of the offset angle distribution of the main surface 2a of the β-Ga 2 O 3 substrate 2 is about 0.16 or less.

なお、上記実施例においては、主面２ａが（−２０１）面であるβ−Ｇａ２Ｏ３基板２について評価を行ったが、主面２ａが（１０１）面であるβ−Ｇａ２Ｏ３基板２について評価を行った場合にも、同様の結果が得られる。 In the above embodiments, but it was evaluated β-Ga 2 O 3 substrate 2 is the main surface 2a is (-201) plane, the principal surface 2a is (101) is a plane β-Ga 2 O 3 Similar results are obtained when the substrate 2 is evaluated.

本発明は、上記の実施の形態及び実施例に限定されず、発明の主旨を逸脱しない範囲内において種々変形実施が可能である。例えば、第２の実施の形態においては、第１の実施の形態の半導体積層構造体を含む半導体素子として、ＬＥＤ素子を一例として挙げたが、半導体素子はこれに限定されるものではなく、トランジスタ等の他の素子であってもよい。   The present invention is not limited to the embodiments and examples described above, and various modifications can be made without departing from the spirit of the invention. For example, in the second embodiment, an LED element is given as an example of a semiconductor element including the semiconductor multilayer structure of the first embodiment. However, the semiconductor element is not limited to this, and a transistor Other elements such as may be used.

また、上記の実施の形態及び実施例は、特許請求の範囲に係る発明を限定するものではない。また、実施の形態及び実施例の中で説明した特徴の組合せの全てが発明の課題を解決するための手段に必須であるとは限らない点に留意すべきである。   Moreover, said embodiment and Example do not limit the invention which concerns on a claim. It should be noted that not all combinations of features described in the embodiments and examples are necessarily essential to the means for solving the problems of the invention.

１…半導体積層構造体、 ２…β−Ｇａ２Ｏ３基板、 ２ａ…主面、 ３…バッファ層、 ４…窒化物半導体層、 ４ａ…主面、 ４０…ＬＥＤ素子 1 ... semiconductor stack, 2 ... β-Ga 2 O 3 substrate, 2a ... main surface, 3 ... buffer layer, 4 ... nitride semiconductor layer, 4a ... main surface, 40 ... LED element

Claims (4)

（−２０１）面又は（１０１）面を主面とし、
前記主面の中心における、［０１０］方向の幅２．３ｍｍ、［０１０］方向に垂直な方向の幅１０ｍｍの長方形の領域に、前記主面上への正射影の方向が［０１０］方向である方向からＸ線を照射して得られる前記主面のＸ線ロッキングカーブの半値幅が１００ａｒｃｓｅｃ以下であり、
前記主面の中心における、［０１０］方向の幅０．５ｍｍ、［０１０］方向に垂直な方向の幅０．１５ｍｍの長方形の領域に、前記主面上への正射影の方向が［０１０］方向である方向からＸ線を照射して得られる前記主面のＸ線ロッキングカーブの半値幅が５０ａｒｃｓｅｃ以下である、
β−Ｇａ２Ｏ３基板。 The (−201) plane or the (101) plane is the main plane,
At the center of the main surface, the orthogonal projection direction on the main surface is the [010] direction in a rectangular region having a width of 2.3 mm in the [010] direction and a width of 10 mm in the direction perpendicular to the [010] direction. The half width of the X-ray rocking curve of the main surface obtained by irradiating X-rays from a certain direction is 100 arcsec or less,
In the center of the main surface, the orthogonal projection direction on the main surface is [010] in a rectangular region having a width of 0.5 mm in the [010] direction and a width of 0.15 mm in the direction perpendicular to the [010] direction. The half width of the X-ray rocking curve of the principal surface obtained by irradiating X-rays from the direction which is the direction is 50 arcsec or less,
β-Ga 2 O 3 substrate. 前記主面内の［０１０］方向に垂直な、前記主面の中心を通る線分上の、前記主面の［０１０］方向へのオフセット角度の分布の、最大値と最小値の差が０．１６°以下である、
請求項１に記載のβ−Ｇａ２Ｏ３基板。 The difference between the maximum value and the minimum value of the distribution of the offset angle in the [010] direction of the main surface on a line segment passing through the center of the main surface perpendicular to the [010] direction in the main surface is 0. .16 ° or less,
The β-Ga 2 O 3 substrate according to claim 1. 請求項１又は２に記載のβ−Ｇａ２Ｏ３基板と、
前記β−Ｇａ２Ｏ３基板上に形成された、ＡｌｘＧａｙＮ（０≦ｘ≦１、０≦ｙ≦１、ｘ＋ｙ＝１）を主成分とするバッファ層と、
前記バッファ層を介して前記β−Ｇａ２Ｏ３基板上に形成された、ＡｌｘＧａｙＩｎｚＮ（０≦ｘ≦１、０≦ｙ≦１、０≦ｚ≦１、ｘ＋ｙ＋ｚ＝１）結晶を主成分とする窒化物半導体層と、
を有する、
半導体積層構造体。 The β-Ga 2 O 3 substrate according to claim 1 or 2,
A buffer layer mainly composed of Al x Ga y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y = 1) formed on the β-Ga 2 O 3 substrate;
Al x Ga y In z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) formed on the β-Ga 2 O 3 substrate via the buffer layer. A nitride semiconductor layer mainly composed of crystals;
Having
Semiconductor laminated structure. 請求項３に記載の半導体積層構造体を含む、半導体素子。   A semiconductor device comprising the semiconductor multilayer structure according to claim 3.
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