JP2016507826A5 - - Google Patents

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Publication number
JP2016507826A5
JP2016507826A5 JP2015551844A JP2015551844A JP2016507826A5 JP 2016507826 A5 JP2016507826 A5 JP 2016507826A5 JP 2015551844 A JP2015551844 A JP 2015551844A JP 2015551844 A JP2015551844 A JP 2015551844A JP 2016507826 A5 JP2016507826 A5 JP 2016507826A5
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JP
Japan
Prior art keywords
volatile memory
memory devices
power
power consumption
data
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JP2015551844A
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English (en)
Japanese (ja)
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JP6039107B2 (ja
JP2016507826A (ja
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Priority claimed from US13/736,268 external-priority patent/US9760149B2/en
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Publication of JP2016507826A publication Critical patent/JP2016507826A/ja
Publication of JP2016507826A5 publication Critical patent/JP2016507826A5/ja
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Publication of JP6039107B2 publication Critical patent/JP6039107B2/ja
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JP2015551844A 2013-01-08 2014-01-07 インテリジェントな電流/電力消費最小化を伴う、向上した動的メモリ管理 Active JP6039107B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/736,268 2013-01-08
US13/736,268 US9760149B2 (en) 2013-01-08 2013-01-08 Enhanced dynamic memory management with intelligent current/power consumption minimization
PCT/US2014/010546 WO2014110051A1 (en) 2013-01-08 2014-01-07 Enhanced dynamic memory management with intelligent current/power consumption minimization

Publications (3)

Publication Number Publication Date
JP2016507826A JP2016507826A (ja) 2016-03-10
JP2016507826A5 true JP2016507826A5 (https=) 2016-10-27
JP6039107B2 JP6039107B2 (ja) 2016-12-07

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ID=50073428

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015551844A Active JP6039107B2 (ja) 2013-01-08 2014-01-07 インテリジェントな電流/電力消費最小化を伴う、向上した動的メモリ管理

Country Status (8)

Country Link
US (2) US9760149B2 (https=)
EP (1) EP2943848B1 (https=)
JP (1) JP6039107B2 (https=)
KR (1) KR101718462B1 (https=)
CN (1) CN104903815B (https=)
ES (1) ES2602287T3 (https=)
HU (1) HUE028997T2 (https=)
WO (1) WO2014110051A1 (https=)

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US10877693B2 (en) * 2018-06-29 2020-12-29 Intel Corporation Architecture for dynamic transformation of memory configuration
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