JP2016213245A - Wiring board, semiconductor device, semiconductor package, and manufacturing method of wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board which achieves high cooling performance, and to provide a semiconductor device, a semiconductor package, and a manufacturing method of the wiring board.SOLUTION: A wiring board according to an embodiment includes: a substrate part in which an insulating layer is made of a ceramic material and a wiring layer is formed on one main surface of the insulating layer; a conductive layer formed on the other surface of the substrate part; a core member made of a metallic material and erected on the conductive layer of the substrate part; and a cover layer formed by a plating film made of a metallic material and provided on an outer surface of the core member.SELECTED DRAWING: Figure 1

Description

  Embodiments described herein relate generally to a wiring board, a semiconductor device, a semiconductor package, and a manufacturing method of the wiring board.

  The semiconductor package includes, for example, a semiconductor circuit substrate and a sealing member that seals the semiconductor circuit substrate. The semiconductor circuit board is, for example, a conductive base material including an insulating base material such as ceramic or resin and a metal foil fixed on both sides or one side of the insulating base material, and a semiconductor fixed to one conductive base material with solder or the like. A circuit including elements and the like.

  For example, a power semiconductor element such as an insulated gate bipolar transistor (IGBT) generates heat by switching. Therefore, the semiconductor circuit board is fixed in contact with a heat sink via a diffusion plate that diffuses heat. Cooled by.

  In recent years, when power semiconductors switch at high speeds under high voltage and large current, the amount of heat generated is increased by switching at high speeds under large currents. Therefore, heat dissipation and cooling performance are improved for semiconductor circuits including power semiconductors. Is desired.

  In addition, with the practical application of hybrid cars and electric vehicles, power semiconductor packages are desired to be reduced in size, weight, and cost.

JP 2002-329938 A JP 2002-315358 A

  If the configuration interposed between the semiconductor element and the cooling surface is reduced, the thermal resistance of the entire package can be reduced, which is advantageous for improving the cooling performance.

  In order to improve heat dissipation, it is conceivable to use a ceramic material substrate having a relatively low thermal resistance as an insulating material and to provide a cooling structure such as a heat sink. However, since the ceramic material has a high thermal conductivity, heat does not diffuse in the substrate and the heat density becomes high, so that it is difficult to design a cooling structure.

  Further, when the cooling structure is joined to the substrate made of a ceramic material, for example, depending on the material of the solder, the thermal resistance increases, and the cooling performance decreases. On the other hand, when the cooling structure is bonded to the substrate by brazing, the substrate may be deformed because the bonding process is performed at a relatively high temperature.

  Embodiments of the present invention have been made in view of such circumstances, and an object thereof is to provide a wiring board having a high cooling performance and a semiconductor package including the wiring board.

  In the wiring board according to one embodiment, the insulating layer is made of a ceramic material, the substrate part having the wiring layer formed on one main surface of the insulating layer, and the conductive layer formed on the other surface of the substrate part And a core member that is made of a metal material and is erected on the conductive layer of the substrate part, and a cover layer that is made of a plating film of the metal material and is provided on the outer surface of the core member.

Explanatory drawing which shows the structure of the semiconductor device which concerns on 1st Embodiment. 2 is an explanatory diagram illustrating a configuration of the semiconductor device. FIG. Explanatory drawing which shows the structure of the semiconductor package. The perspective view which shows the structure of the core member of the semiconductor device. Explanatory drawing which shows the manufacturing process of the wiring board of the semiconductor device. Explanatory drawing which shows the structure of the semiconductor device which concerns on 2nd Embodiment. Explanatory drawing which shows the structure of the semiconductor device which concerns on 3rd Embodiment. Explanatory drawing which shows the structure of the semiconductor device which concerns on other embodiment. Explanatory drawing which shows the structure of the semiconductor device which concerns on other embodiment. 2 is an explanatory diagram illustrating a configuration of the semiconductor device. FIG. Explanatory drawing which shows the structure of the core member of the semiconductor device which concerns on other embodiment. Explanatory drawing which shows the structure of the core member of the semiconductor device which concerns on other embodiment. Explanatory drawing of the manufacturing method of the core member of the semiconductor device which concerns on other embodiment. Explanatory drawing which shows the structure of the core member of the semiconductor device which concerns on other embodiment. Explanatory drawing which shows the structure of the core member of the semiconductor device which concerns on other embodiment.

[First Embodiment]
Hereinafter, the semiconductor device 1 including the wiring substrate 21 and the wiring substrate 21 according to the embodiment will be described with reference to FIGS. 1 to 5. In each figure, the structure is appropriately enlarged, reduced, or omitted for explanation.

  FIG. 1 is an explanatory view showing the configurations of the wiring board 21 and the semiconductor device 1 of the first embodiment in cross section, and FIG. 2 is an explanatory view showing the wiring board 21 and the semiconductor device 1 in a cross section seen from other directions. It is. FIG. 3 is an explanatory view showing the configuration of a semiconductor package 100 including the semiconductor device 1 in cross section. In FIG. 2, a part is shown on the side surface for explanation.

As shown in FIGS. 1 to 3, the semiconductor package 100 of the present embodiment includes the semiconductor device 1 and a cooling flow path jacket 50 provided on the other side of the wiring substrate 21.
The semiconductor device 1 includes a wiring substrate 21, semiconductor elements 10 and 21 mounted on the wiring substrate, and a sealing structure 60 that seals the semiconductor element 10.

  The wiring substrate 21 includes an insulating substrate 20 as a substrate portion, a bonding pad 30 formed on the first surface 20a of the insulating substrate 20, and a fin structure portion 40 provided on the second surface 20b of the insulating substrate 20. It is equipped with.

  The semiconductor element 10 is a semiconductor switch such as an IGBT, an FET (Field-Effect Transistor), a GTO (Gate-Turn-Off Thyristor), a transistor, or various semiconductor elements used in an electric circuit such as a diode. The semiconductor element 10 is fixed to the surface of the bonding pad 30 of the wiring substrate 21 by, for example, solder 12.

  The insulating substrate 20 is made of a ceramic material. The insulating substrate 20 is formed in a rectangular plate shape having a first surface 20a on which the bonding pads 30 are bonded and a semiconductor element 10 is mounted, and a second surface 20b facing the first surface 20a. .

The insulating substrate 20 is formed by sintering a powdery material into a sheet. In the present embodiment, the insulating substrate 20 is formed of a ceramic sheet such as silicon nitride (SiN) or alumina (Al ₂ O ₃ ), for example. A plurality of sheets can be stacked and formed. In particular, silicon nitride has high strength and a low coefficient of linear expansion, so that it is difficult to deform even in a high temperature environment. Silicon nitride has a higher thermal conductivity than alumina or resin. Since the insulating substrate 20 is ceramic, hardly corrodes, is hard, and has high strength, the insulating substrate 20 has sufficient resistance to an increase in the flow rate of the cooling medium and a boiling phenomenon. For example, the thickness of the insulating substrate 20, that is, the dimension in the Z direction is configured to be about 0.3 mm in the case of silicon nitride and about 0.6 mm in the case of alumina.

  The bonding pad 30 is a wiring layer formed by patterning a conductive material such as a copper material or aluminum used for circuit wiring. In the present embodiment, the bonding pad 30 is made of, for example, copper, and has a thickness, that is, a Z-direction dimension of about 0.3 mm. The bonding pad 30 is soldered or brazed to the surface of the insulating substrate 20, for example.

  As an example of the conditions of the brazing process, for example, a vacuum of 1 × 10 −3 Pa or less, a temperature of 790 to 850 ° C., and a melting time of 1 to 5 minutes are used to place and join. As the brazing material, Ag-Cu-Ti, Cu-Sn-Ti, Co-Ti, Ni-Ti, Al alloy, or the like is used. For example, in this embodiment, Ag-28 wt% Cu- (1-3) wt% Ti is used as an example.

  The bonding pad 30 is patterned on the insulating substrate 20. The bonding pad 30 may constitute a part of a circuit including the semiconductor element 10 and may include a connection pad 31 to which a lead 11 that supplies current from the outside is connected.

  The bonding pad 30 serves as a heat spreader for diffusing the heat generated in the semiconductor element 10 in the direction of the substrate surface of the insulating substrate 20, that is, in the direction orthogonal to the direction in which the semiconductor element 10, the bonding pad 30, and the insulating substrate 20 are stacked. Also works.

  The fin structure portion 40 is integrally joined to the second surface 20b of the insulating substrate 20. The fin structure portion 40 includes a base layer 41 that is a conductive layer formed of a plating film, a plurality of columnar core members 42, and a cover layer 43 that covers the surface of the core member 42, and the second surface 20b. The plurality of columnar portions 44 are configured to protrude from.

  The fin structure portion 40 constitutes a predetermined flow path 45 that is a gap through which the cooling medium passes. The surface of the fin structure portion 40 constitutes the cooling surface 40a.

  The underlayer 41 is made of, for example, a nickel plating film. The underlayer 41 is formed on the surface of the second surface of the insulating substrate 20 by, for example, electroless plating. The thickness of the foundation layer 41 is set to a thickness equivalent to the thickness of the bonding pad 30, for example, about 0.3 mm in consideration of the warpage of the wiring board.

  As shown in FIG. 4, the core member 42 is an elongated pin-shaped member made of a metal such as Cu, and extends along the stacking direction. A plurality of core members 42 are arranged and erected at arbitrary positions on the second surface of the insulating substrate 20 on which the base layer 41 is formed. For example, a plurality of core members 42 are aligned in the vertical and horizontal directions in a rectangular region on the base layer 41.

  The core member 42 includes a base portion 42a that is long in one direction, and a protrusion 42b that is provided at an end portion in the longitudinal direction of the base portion 42a. The core member is formed, for example, by punching with a press.

  The longitudinal direction of the core member 42 extends along the Z direction intersecting the XY direction which is the surface direction of the insulating substrate 20. That is, the core member 42 is erected on the opposite side of the semiconductor element 10 along the stacking direction of the insulating substrate 20, the bonding pad 30, and the semiconductor element 10.

  The base portion 42a has a cross-sectional shape orthogonal to the Z direction, for example, a rectangular plate shape. The base portion 42a is configured such that the longitudinal dimension along the Z direction is about several millimeters, for example, and the width dimension along the X direction is about 1 mm, for example. The thickness dimension along the Y direction is about 1 mm.

  The protrusion 42b is configured to have a Z-direction dimension of, for example, about 0.05 mm, a width dimension along the X direction of about 0.1 mm, and a thickness dimension along the Y direction of about 1 mm, similar to the base section 42a.

  A step 42 c is formed at the end of the core member 42 by the protrusion 42 b. By this step 42 c, the bonding area between the base layer 41 and the cover layer 43 and the bonding area between the surface of the core member 42 and the cover layer 43 are expanded. Therefore, the bonding strength between the base layer 41 and the cover layer 43 is improved, and the core member 42 is firmly fixed to the insulating substrate 20 by the cover layer 43.

  The number and positions of the protrusions 42b are not limited to this. However, when the protrusions 42b are provided at one end in the longitudinal direction, an effect that the flow of the cooling water near the tip can be controlled efficiently is obtained.

  The cover layer 43 is made of, for example, a nickel plating film. The cover layer 43 is formed on the outer surface of the core member 42 and the surface of the base layer 41 by, for example, electrolytic plating. At this time, the metal material enters and adheres to the gap formed in the step 43 c at the end of the core member 42, and the bonding area with the base layer 41 can be increased. The cover layer 43 has a thickness of about 0.1 mm, for example.

  By forming the cover layer 43 on the corner portion or the ridge portion formed at the corner portion of the end portion of the core member 42 or the connection portion with the insulating substrate 20, the corner portion or the ridge portion of the fin structure portion 40 is formed. The outer surface constitutes a smooth curved surface. Therefore, the wall defining the refrigerant flow path 45 formed by the gap formed by the fin structure portion 40 becomes a smooth surface, and the fluid resistance of the refrigerant can be lowered.

  The flow path jacket 50 includes a case portion 51 that forms a recess 51 a that houses the fin structure portion 40. The case part 51 includes a peripheral wall part 51 b that covers the outer periphery of the fin structure part 40, and a bottom wall part 51 c that is disposed opposite to the second surface side of the insulating substrate 20. An end of the peripheral wall 51b opposite to the bottom wall 51c forms an opening 51d. A gap between the case portion 51 and the outer surface of the fin structure portion 40 serves as a cooling medium flow path 45.

  The opening edge of the peripheral wall portion 51b is fixed to the outer peripheral edge of the insulating substrate 20 by a fastening member 54 such as a screw. A step portion 52 is formed at the opening edge of the peripheral wall portion 51 b, and an O-ring 53 is disposed on the step portion 52. The O-ring 53 is a sealing member, and is sandwiched between the insulating substrate 20 and the step portion 52 to seal between the insulating substrate 20 and the flow path jacket 50.

  The sealing structure portion 60 is an insulator formed of, for example, a resin. The sealing structure unit 60 covers and seals the semiconductor element 10 and the bonding pad 30 of the semiconductor package, for example, by molding or potting. The sealing structure 40 prevents the semiconductor element 10 from coming into contact with water or air by sealing at least the semiconductor element 10, and avoids deterioration of the semiconductor element 10. The sealing structure 60 may be arranged so as to expose a part of the bonding pad 30.

  In the semiconductor device 1 and the semiconductor package 100, the coolant flows through the flow path 45 formed between the columnar portions 44 of the fin structure portion 40, thereby cooling the fin structure portion 40 with water. The refrigerant flowing through the flow path 45 is, for example, water, ethylene glycol or the like.

  Hereinafter, with reference to FIG. 5, a method for manufacturing the wiring substrate 21 used in the semiconductor device 1 and the semiconductor package 100 according to the present embodiment will be described.

  The manufacturing process of the wiring substrate 21 includes a conductive layer forming step of forming a base layer 41 as a conductive layer on the surface of the insulating substrate, and a core member 42 constituting the fin structure portion 40 at a predetermined position on the base layer 41. A core member arranging step of arranging, and a cover layer forming step of forming the cover layer 43 on the outer surface of the core member and the base layer 41 by plating.

  Specifically, first, for example, the insulating substrate 20 having a predetermined shape is manufactured by sintering a powdery material of a ceramic material into a sheet shape.

  Then, an electroless plating process is performed on the surface of the insulating substrate to form a thin film conductive layer as a conductive layer to be the base layer 41 (conductive layer forming step).

  Next, a pin-shaped core member 42 is temporarily attached to a predetermined position on the base layer 41 with a bonding material 46 made of, for example, an Ag nanomaterial interposed so that the longitudinal direction intersects the plane direction (core member). Placement process). The core member 42 is formed in a predetermined shape by punching by press processing in advance.

  Specifically, for example, a plurality of core members 42 are set up above the substrate and subjected to a transfer process in which the core members 42 are dropped while applying vibration, thereby aligning the plurality of core members in a standing position on the surface of the insulating substrate 20. And supply.

  At this time, a supply portion 28a for supporting the plurality of core members 42 on the insulating substrate 20, a positioning jig 28b having a hole portion 28c corresponding to a desired position, and a taper for guiding the core member 42 into the hole portion. The core member 42 can be arranged in a standing position at a desired position by using the transfer type supply device 28 provided with the guide member 28d.

  In a state where the core member 42 is set on the second surface of the substrate 20 in a standing state, the core member 42 is suppressed by pressing with a support member 29 made of a conductive rubber material, and an electrolytic plating apparatus is used. By performing an electrolytic plating process, a conductive plating film is formed on the base layer 41 and on the surface of the core member 42 to form the cover layer 43 (cover layer forming step).

  At this time, the cover layer 43 adheres to the surface of the base layer 41 and the core member 42, whereby the core member 42 and the cover layer 43 are fixed, and the columnar portion 44 is formed on the second surface 20b of the insulating substrate 20. The fin structure 40 is configured.

  At this time, the plating film of the cover layer 43 enters the gap formed in the step 42 c around the protrusion 42 b and is fixed to the core member 42 and the base layer 41, so that the core member 42 and the cover layer 43 are fixed to the base layer 41. In addition, high bonding strength can be obtained.

  Furthermore, the wiring board 21 is manufactured by forming the bonding pads 30 and the connection pads 31 for lead connection on the first surface 20a of the insulating substrate 20 by a process such as brazing.

  The semiconductor device 10 is mounted on the bonding pads 30 of the wiring board 21 configured as described above using the solder 12 to complete the semiconductor device 1. Further, the sealing structure 60 is formed by a resin sealing process. On the other hand, the flow path jacket 50 is placed on the second surface 20b side and fixed by screwing or the like, thereby completing the semiconductor package 100.

  The semiconductor device 1 configured as described above includes the solder 12, the bonding pad 30, and the insulating substrate 20 between the semiconductor element 10 that is a heat source and the cooling surface 40a of the fin structure portion 40 that is in contact with the cooling medium. And a fin structure portion 40. Therefore, the heat generated in the semiconductor element 10 is transferred to the bonding pad 30 and further transferred to the fin structure 40 via the insulating substrate 20 and cooled by the cooling medium. Further, when a lead is connected to the bonding pad 30, heat is generated at a connection portion between the lead and the bonding pad 30 due to a current flowing from the lead to the bonding pad 30. The heat generated between the lead and the bonding pad 30 is transferred to the bonding pad 30, further transferred to the fin structure 40 via the insulating substrate 20, and cooled by the cooling medium.

  In the semiconductor device 1 and the semiconductor package 100 of this embodiment, the back surface of the insulating substrate 20 is sealed with a conductive layer made of a plating film having a higher thermal resistance than, for example, a joint portion formed by brazing the surface of the insulating substrate 20. Thus, the heat transfer rate from the insulating substrate 20 made of a ceramic material to the fin structure portion 40 can be delayed. Therefore, heat can be diffused in the surface direction in the insulating substrate 20. For this reason, compared with the structure which provides the thick copper plate for diffusing heat on the surface of the board | substrate of a ceramic material, for example, high cooling performance can be obtained, suppressing a thickness dimension small.

  Further, according to the wiring substrate 21, since the base layer 41 made of a plating film is formed on the insulating substrate 20, it is possible to prevent the wiring substrate 21 from being warped or deformed during processing at a high temperature such as brazing. Can do.

  Furthermore, by forming the fin structure portion 40 on the back surface of the insulating substrate 20 and providing the cooling medium flow path 45, the area of the cooling surface 40a can be expanded and the cooling performance can be improved.

  The semiconductor device 1 and the semiconductor package 100 of the present embodiment are configured to include the semiconductor element 10, the bonding pad 30, and the sealing structure portion 60 on the wiring substrate 21, so that a bonding material such as solder is interposed therebetween. Thus, since the number of members and processes is reduced as compared with the conventional configuration in which, for example, a copper base plate is provided under the insulating substrate, it is possible to realize a reduction in size, weight, and cost. Also, heat can be transmitted and transmitted more efficiently than when the base plate and the cooler are connected via grease.

  Furthermore, since a desired fin structure 40 can be constructed with a structure in which a core member having a predetermined shape is installed on the surface of an insulating substrate made of a ceramic material and covered with a plating film, the wiring substrate and the wiring substrate having high cooling performance at low cost Can be provided. For example, compared with the case where fins made of a ceramic material are manufactured by stacking on a ceramic substrate, a simple process of installing a core member and forming a plating film is sufficient, so the manufacturing cost of the fin structure portion 40 can be reduced. It can be kept low.

  Further, the shape and layout of the fin structure portion 40 can be arbitrarily set by setting the shape of the core member 42 and the arrangement of the hole portions of the jig.

Further, the cover layer 43 is formed with a plating film on the outer surface of the fin structure portion 40, so that the plating film is deposited on the corner portion, a smooth continuous wall surface can be formed, and the resistance of the flow path 45 can be kept low. In addition to being able to guide the cooling fluid with high efficiency, it is possible to prevent air bubbles from staying due to, for example, boiling of the refrigerant.
[Second Embodiment]
The wiring board 22 and the semiconductor device 2 according to the second embodiment will be described below with reference to FIG. FIG. 6 is an explanatory diagram showing the configuration of the semiconductor device according to the second embodiment. Note that the wiring board 22 and the semiconductor device 2 according to the second embodiment have the fin structure part 140 that includes the core member 142 having a plate shape and a plurality of wall-like members 144 that form flow paths. Different from the embodiment. Since the rest is the same as that of the wiring substrate 21 and the semiconductor device 1 according to the first embodiment, a duplicate description is omitted.

  FIG. 6 is a cross-sectional view for explaining an example of the configuration of the wiring board 22 and the semiconductor device 2 of the second embodiment. In addition, in FIG. 6, a part is shown by the side surface for description.

  The semiconductor device 2 includes a fin structure portion 140 having a plurality of wall-like portions 144 erected in the Z direction from the insulating substrate 20 in parallel with the X direction. The fin structure section 140 has a laminated structure of a base layer 141 made of a conductive layer, a beam-like core member 142, and a cover layer 143 made of a plating film.

  The core member 142 is a beam-like member that is disposed along the Y direction, for example, from a metal material such as copper, and forms a predetermined wall along the YZ plane. The core member 142 has a protrusion 142b and a step 142c. A cover layer 143 made of a plating film is formed on the outer surface of the core member 142.

  The fin structure section 140 includes a plurality of wall-shaped sections 144, each of which extends along the YZ plane, in parallel in the X direction. For this reason, on the back side of the semiconductor element 10 of the semiconductor device 2, a flow path 145 is formed along the Y direction in the gaps between the plurality of wall portions 144, and the flow direction is guided in the Y direction by the wall portions 144. The

Also in this embodiment, there exists an effect similar to the said 1st Embodiment. In addition, by configuring the predetermined flow path using the wall-shaped core member 142, the flow of the refrigerant can be guided, so that the cooling efficiency is improved.
[Third Embodiment]
The wiring board 23 and the semiconductor device 3 according to the third embodiment will be described below with reference to FIG. FIG. 7 is an explanatory diagram showing the configuration of the semiconductor device according to the second embodiment. The wiring board 23 and the semiconductor device 3 according to the third embodiment are different from the first embodiment in that a convex portion 70 is provided on the back side of the installation portion of the semiconductor element 10. Since the rest is the same as that of the wiring substrate 21 and the semiconductor device 1 according to the first embodiment, a duplicate description is omitted.

  FIG. 7 is a cross-sectional view for explaining an example of the configuration of the wiring board 23 and the semiconductor device 3 of the third embodiment. The cross-sectional view along the XZ plane is the same as FIG.

  In the semiconductor device 3, the convex portion 70 is provided in the region on the second surface 20 b side of the insulating substrate 20 and on the back side of the installation portion of the semiconductor element 10, that is, the installation site of the bonding pad 30. The convex portion 70 is configured by laminating a plurality of plate-like members made of, for example, metal.

  The core member 42 is disposed in a portion excluding the region on the back side of the installation portion of the semiconductor element 10, that is, the installation portion of the pad 30 portion.

  A cover layer 43 made of a plating film is formed on the outer surfaces of the core member 42 and the convex portion 70.

  That is, as shown in FIG. 7, the fin structure portion 40 does not have the columnar portion 44 on the back side of the bonding pad 30, and the center position of the bonding pad 30 in the X direction and the Y direction protrudes lower than the height of the columnar portion 44. Become.

  Also in this embodiment, there exists an effect similar to the said 1st Embodiment. In addition, if the insulating substrate 20 is too thin in the portion where the semiconductor element 10 is mounted, sufficient strength as a substrate cannot be obtained, and the insulating substrate 20 is damaged when an impact or the like is applied. In the embodiment, the mounting portion of the semiconductor element 10 is protected by the plate-like member constituting the convex portion 70, so that the impact resistance is improved.

In addition to guiding the refrigerant in the Y direction as a cooling means, it is also possible to inject the refrigerant to the back side of the semiconductor element 10 as indicated by an arrow in FIG. Also in this case, the refrigerant can be circulated efficiently. Further, when bubbles are generated by boiling cooling, the bubbles are guided around the both sides of the raised portion as shown by the broken arrows in FIG. 7, thereby preventing the bubbles from staying on the wall surface.
[Fourth Embodiment]
Hereinafter, the wiring board 24 and the semiconductor device 4 according to the fourth embodiment will be described with reference to FIGS. 8 and 9. 8 and 9 are explanatory views showing the configuration of the semiconductor device according to the fourth embodiment. 8 is a diagram viewed from the Y-axis direction, and FIG. 9 is a diagram viewed from the X-axis direction. In FIG. 9, a part is shown on the side surface for explanation.
Note that the wiring substrate 24 and the semiconductor device 4 according to the fifth embodiment are different from the fin structure portion 40 having the plurality of columnar portions 44 according to the first embodiment in that the outer surface on the tip side of the core member 42 is the insulating substrate 20. The cooling structure 240 continues in a planar shape along the surface direction. Since the rest is the same as that of the wiring substrate 21 and the semiconductor device 1 according to the first embodiment, a duplicate description is omitted.

  The cooling structure 240 includes a base layer 241, a plurality of core members 242 standing on the base layer 241, and a cover layer 243 that covers them. The core member 242 has, for example, a pin shape or a plate shape, and a plurality of the core members 242 are arranged in an area including the back side of the installation site of the semiconductor element 10. The longitudinal dimension of the core member 242 is about 10 mm.

  In the wiring board 24 according to this embodiment, the surface of the cover layer 243 is continuous in a planar shape.

  Also in the present embodiment, similarly to the first embodiment, in the insulating substrate 20 whose back surface is sealed by the base layer 241, heat can be diffused in the surface direction by reducing the heat transfer rate. It is. For this reason, high cooling performance is obtained while keeping the dimension in the thickness direction small.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  For example, the flow path jacket 50 may be omitted. Even in that case, the same effects as those of the wiring substrate and the semiconductor package of the first embodiment described above can be obtained. In the first embodiment and the second embodiment, the sealing structure 40 may be disposed so as to cover the semiconductor element 10 by exposing a part of the bonding pad 30. Even in such a case, the same effects as those of the first and second embodiments described above can be obtained. Further, the method of fixing the wiring board 21 to the flow path jacket 50 is not limited to the method described above.

  Further, the arrangement and shape of the core members 42 and 142 forming the flow path are not limited to the above. For example, in the first embodiment, the columnar portion 44 is disposed on the back side of the mounting portion of the semiconductor element 10. However, the present invention is not limited to this. For example, as in the wiring substrate 25 and the semiconductor device 5 illustrated in FIG. The columnar portion 44 and the wall-shaped portion 144 may be arranged at a position excluding the region on the back side of the 10 mounting portions.

  Further, for example, the core member 342 according to another embodiment may have a shape obtained by cutting a shaft member having a circular cross-sectional view obliquely with respect to the axial direction as illustrated in FIG. 11, for example. Even in this case, the plating process is performed in a state where the tip portion is held opposite to the base layer 41 on the back surface of the substrate, so that the plating film enters the gap formed around the tip portion so that strong bonding is achieved. It becomes possible.

  Further, for example, the core member 442 according to another embodiment may be formed of a shaft member having a circular cross-sectional view as shown in FIG. 12, for example, and having a protruding portion 442b protruding in the axial direction at a part of the tip surface. . For example, as shown in FIG. 13, cutting is performed with a projection remaining in a part by cutting with a cutter 445 having a step. Even in this case, a strong bonding is possible because the plating film enters the gap formed in the step 442c by plating the base layer 41 on the back surface of the substrate while holding the tip portion facing the substrate. It becomes.

  Further, for example, the core member 542 according to another embodiment may be formed of a rod-like member having a rectangular cross-sectional view as shown in FIG. 14, for example, and may have a shape having a protrusion protruding in the axial direction at a part of the tip surface.

  In addition, although the projection part 42b showed the example provided only in the end of the core member 42, it is not restricted to this. For example, like the core member 642 shown in FIG. 15, it is good also as a structure which has the projection part 642b at a longitudinal direction both ends. When the protrusions 642b are provided at both ends as described above, it is not necessary to adjust the direction when supplying the core member 642 in the manufacturing process, and the alignment can be easily performed by the transfer method, so that productivity is high.

  Further, the structure of the fin structure portions 40 and 140 is not limited to the above embodiment. For example, other shapes such as covering the tips of the plurality of columnar portions 44 and the plurality of wall-shaped portions 144 with continuous plate-like members may be used.

  DESCRIPTION OF SYMBOLS 1, 2, 3 ... Semiconductor device, 10 ... Semiconductor element, 21, 22, 23, 24 ... Wiring board, 20 ... Insulating substrate (board | substrate part), 20A ... 1st surface, 20B ... 2nd surface, 30 ... Bonding pad 31 ... Connection pad 40 ... Fin structure part 40A ... Cooling surface 41 ... Cover layer 41 ... Underlayer (conductive layer) 42 ... Core member 42A ... Base part 42B ... Protrusion part 42C ... Step, 43 ... Cover layer, 44 ... Columnar part, 45 ... Channel, 50 ... Channel jacket, 51 ... Case part, 51A ... Recess, 51B ... Peripheral wall part, 51C ... Bottom wall part, 51D ... Opening, 52 ... Step , 53 ... O-ring, 54 ... fastening member, 60 ... sealing structure part, 70 ... convex part, 100 ... semiconductor package, 140 ... cooling structure part, 142 ... core member, 144 ... wall-like part.

Claims (8)

A substrate part in which the insulating layer is made of a ceramic material, and a wiring layer is formed on one main surface of the insulating layer;
A conductive layer formed on the other surface of the substrate portion;
A core member made of a metal material and erected on the conductive layer of the substrate portion;
A cover layer that is formed of a plating film of a metal material and is provided on the outer surface of the core member;
A wiring board comprising: A bonding pad made of metal is provided on the first surface of the substrate portion,
The conductive layer is provided on a second surface of the substrate portion facing the first surface;
The wiring board according to claim 1, wherein the cover layer fixes the core member to the conductive layer by covering a surface of the conductive layer and an outer surface of the core member disposed on the conductive layer. The core member has a pin shape,
The wiring board according to claim 1, wherein the core member and the cover layer constitute a fin structure portion including a plurality of columnar portions.   The wiring board according to claim 1, wherein the core member and the cover layer constitute a wall-shaped portion that guides a cooling fluid.   The wiring substrate according to claim 2, wherein the core member has a step at an end portion facing the substrate portion. A wiring board according to any one of claims 1 to 5,
A semiconductor element disposed on the first surface of the substrate portion of the wiring board;
A sealing structure for sealing the semiconductor element;
A semiconductor device comprising: A semiconductor device according to claim 6;
A semiconductor package comprising: a channel jacket disposed opposite to the second surface of the substrate unit facing the first surface and forming a channel with the wiring substrate. Forming a conductive layer on the surface of the substrate portion made of a ceramic material;
A core member is disposed at a predetermined position on the conductive layer, and a cover layer formed of a plating film is formed on the core member and the conductive layer by plating;
A method of manufacturing a wiring board comprising: