JP2016200534A - Electronic device, pressure sensor, altimeter, electronic apparatus, and mobile body - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic device with an excellent reliability, and a pressure sensor, an altimeter, an electronic apparatus, and a mobile body which have the electronic device.SOLUTION: An electronic device 1 of the present application includes: a substrate 2; a piezoresistive element 5 on the substrate 2; a wall part near one surface of the substrate 2 surrounding the piezoresistive element 5 in a planar view of the substrate 2; and a ceiling part opposite to the substrate 2 with respect to the wall part, forming a hollow part S with the substrate 2 and the wall part. An inner peripheral edge 643 at an edge of the wall part near the ceiling part has a convex corner 6432 projecting to become further from the center of the hollow part S in a planer view.SELECTED DRAWING: Figure 2

Description

  The present invention relates to an electronic device, a pressure sensor, an altimeter, an electronic apparatus, and a moving object.

  An electronic device having a cavity formed by using a semiconductor manufacturing process is known (for example, see Patent Document 1). As an example of such an electronic device, for example, an electronic apparatus according to Patent Document 1 can be cited. This electronic apparatus includes a substrate, a functional element formed on the substrate, and a cavity in which the functional element is disposed. And defining a covering structure. The covering structure of the electronic device has a surrounding wall formed so as to surround the functional element, and a covering layer (ceiling part) that covers the opposite side of the surrounding wall from the substrate, and the inner peripheral edge of the surrounding wall is It has a square shape. Such a covering structure of an electronic device can be manufactured using a semiconductor manufacturing process.

  However, in the electronic device according to Patent Document 1, since the inner peripheral edge of the surrounding wall is a simple square, stress is concentrated near the corner of the coating layer due to heat shrinkage or the like, and the coating layer is cracked. As a result, there was a problem that the airtightness of the hollow portion was lowered to deteriorate the characteristics.

JP 2008-114354 A

  An object of the present invention is to provide an electronic device having excellent reliability, and to provide a pressure sensor, an altimeter, an electronic apparatus, and a moving body including the electronic device.

Such an object is achieved by the present invention described below.
[Application Example 1]
An electronic device of the present invention includes a substrate,
A functional element provided on the substrate;
A wall portion disposed on one side of the substrate surrounding the functional element in a plan view of the substrate;
A ceiling portion which is disposed on the opposite side of the substrate with respect to the wall portion and constitutes an internal space together with the substrate and the wall portion;
With
An inner peripheral edge of an end portion of the wall portion on the ceiling portion side has a corner portion protruding in a direction away from the center of the internal space in the plan view.

  According to such an electronic device, the inner peripheral edge of the end portion on the ceiling side of the wall portion has a convex corner portion protruding in a direction away from the center of the internal space in a plan view (projecting outward). Thereby, when the thermal contraction etc. of a ceiling part arises, the stress concentration to the middle part of a ceiling part can be reduced. Therefore, it is possible to reduce damage caused by thermal contraction of the ceiling portion. Therefore, an electronic device having excellent reliability can be provided.

[Application Example 2]
In the electronic device according to the aspect of the invention, it is preferable that the ceiling portion is a film shape.

  Such a film-like ceiling is easily damaged by stress concentration. Therefore, when the present invention is applied to an electronic device having such a ceiling, the effect becomes remarkable.

[Application Example 3]
In the electronic device according to the aspect of the invention, the inner peripheral edge extends in the first direction and extends in the first direction and faces a pair of first sides and a second direction different from the first direction. A pair of second sides extending along the opposite sides of each other, and
The corner is preferably provided between the first side and the second side that are adjacent to each other.

  Thereby, when the thermal contraction of the ceiling portion or the like occurs, the stress concentration in the vicinity between the first side and the second side adjacent to each other can be reduced. On the other hand, when there is no corner protruding outward, the ceiling is extremely difficult to bend near the corner formed between the first side and the second side adjacent to each other. When this occurs, stress concentrates between the part that is difficult to bend and the part adjacent to the part, and the ceiling part is easily damaged.

[Application Example 4]
In the electronic device according to the aspect of the invention, it is preferable that the corner portion includes a curved portion in the plan view.

  Thereby, when the thermal contraction etc. of a ceiling part arise, the stress concentration of the corner vicinity of a ceiling part can be reduced.

[Application Example 5]
In the electronic device according to the aspect of the invention, it is preferable that the central portion of the internal space is between the two corners in the plan view.

  Thereby, when the thermal contraction etc. of a ceiling part arise, the stress concentration to a ceiling part can be reduced efficiently.

[Application Example 6]
In the electronic device of the present invention, it is preferable that the wall portion has a laminated structure.

  Thus, the film-like ceiling portion can be easily formed together with the wall portion using a semiconductor process such as a CMOS process.

[Application Example 7]
In the electronic device of the present invention, it is preferable that the substrate has a recess in which at least a part of the wall portion is disposed.
Thereby, the height reduction of the electronic device can be achieved.

[Application Example 8]
In the electronic device of the present invention, the substrate has a diaphragm portion that is bent and deformed by pressure reception,
It is preferable that the functional element is provided in the diaphragm portion and outputs an electric signal due to distortion.
Thereby, a pressure sensor is realizable.

[Application Example 9]
The pressure sensor of the present invention includes the electronic device of the present invention.
Such a pressure sensor can exhibit excellent reliability.

[Application Example 10]
An altimeter according to the present invention includes the electronic device according to the present invention.
Such an altimeter can exhibit excellent reliability.

[Application Example 11]
An electronic apparatus according to the present invention includes the electronic device according to the present invention.
Such an electronic device can exhibit excellent reliability.

[Application Example 12]
The moving body of the present invention includes the electronic device of the present invention.
Such a moving body can exhibit excellent reliability.

It is sectional drawing which shows the electronic device (physical quantity sensor) which concerns on 1st Embodiment of this invention. It is a top view which shows arrangement | positioning of the functional element with which the electronic device shown in FIG. 1 is provided, and a wall part. It is a figure for demonstrating the effect | action of the electronic device shown in FIG. 1, Comprising: (a) is sectional drawing which shows a pressurization state, (b) is a top view which shows a pressurization state. (A) is the elements on larger scale for demonstrating the wall part with which the electronic device shown in FIG. 1 is provided, (b) is a partial enlarged plan view for demonstrating the conventional wall part. It is a figure which shows the manufacturing process of the electronic device shown in FIG. It is a figure which shows the manufacturing process of the electronic device shown in FIG. It is a top view which shows arrangement | positioning of the functional element with which the electronic device which concerns on 2nd Embodiment of this invention is equipped, and a wall part. It is the elements on larger scale for demonstrating the wall part with which the electronic device shown in FIG. 7 is provided. It is sectional drawing which shows the electronic device (oscillator) which concerns on 3rd Embodiment of this invention. It is a top view which shows arrangement | positioning of the functional element with which the electronic device shown in FIG. 9 is provided, and a wall part. It is sectional drawing which shows an example of the pressure sensor of this invention. It is a perspective view which shows an example of the altimeter of this invention. It is a front view which shows an example of the electronic device of this invention. It is a perspective view which shows an example of the moving body of this invention.

  Hereinafter, an electronic device, a pressure sensor, an altimeter, an electronic apparatus, and a moving body of the present invention will be described in detail based on each embodiment shown in the accompanying drawings.

1. Electronic Device <First Embodiment>
FIG. 1 is a cross-sectional view showing an electronic device (physical quantity sensor) according to a first embodiment of the present invention. FIG. 2 is a plan view showing the arrangement of functional elements and wall portions included in the electronic device shown in FIG. 3A and 3B are diagrams for explaining the operation of the electronic device shown in FIG. 1, wherein FIG. 3A is a cross-sectional view showing a pressurized state, and FIG. 3B is a plan view showing the pressurized state. In the following, for convenience of explanation, the upper side in FIG. 1 is referred to as “upper” and the lower side is referred to as “lower”.

  An electronic device 1 shown in FIG. 1 is a physical quantity sensor capable of detecting pressure. The electronic device 1 includes a substrate 2 having a diaphragm portion 20, a plurality of piezoresistive elements 5 (sensor elements) that are functional elements arranged in the diaphragm portion 20, and a cavity portion S (pressure reference chamber) together with the substrate 2. And the intermediate layer 3 disposed between the substrate 2 and the laminated structure 6.

Hereinafter, each part which comprises the electronic device 1 is demonstrated sequentially.
-Board-
The substrate 2 includes a semiconductor substrate 21, an insulating film 22 provided on one surface of the semiconductor substrate 21, and an insulating film 23 provided on the surface of the insulating film 22 opposite to the semiconductor substrate 21. Have.

  The semiconductor substrate 21 includes a silicon layer 211 (handle layer) made of single crystal silicon, a silicon oxide layer 212 (box layer) made of a silicon oxide film, and a silicon layer made of single crystal silicon. 213 (device layer) is an SOI substrate laminated in this order. The semiconductor substrate 21 is not limited to the SOI substrate, and may be another semiconductor substrate such as a single crystal silicon substrate.

  The insulating film 22 is, for example, a silicon oxide film and has an insulating property. Further, the insulating film 23 is, for example, a silicon nitride film, and has an insulation property and resistance to an etching solution containing hydrofluoric acid. Here, since the insulating film 22 (silicon oxide film) is interposed between the semiconductor substrate 21 (silicon layer 213) and the insulating film 23 (silicon nitride film), the stress generated when the insulating film 23 is formed. Is transmitted to the semiconductor substrate 21 by the insulating film 22. The insulating film 22 can also be used as an inter-element isolation film when a semiconductor circuit is formed on and above the semiconductor substrate 21. Note that the insulating films 22 and 23 are not limited to the above-described constituent materials, and any one of the insulating films 22 and 23 may be omitted as necessary.

  A patterned intermediate layer 3 is disposed on the insulating film 23 of the substrate 2. This intermediate layer 3 is formed so as to surround the periphery of the diaphragm portion 20 in plan view, and is between the upper surface of the intermediate layer 3 and the upper surface of the substrate 2 and on the center side (inner side) of the diaphragm portion 20. A step portion corresponding to the thickness of the intermediate layer 3 is formed. Thereby, when the diaphragm part 20 bends and deform | transforms by receiving pressure, stress can be concentrated on the boundary part between the level | step-difference parts of the diaphragm part 20. FIG. Therefore, the detection sensitivity can be improved by disposing the piezoresistive element 5 at the boundary portion (or the vicinity thereof).

  The intermediate layer 3 is made of, for example, single crystal silicon, polycrystalline silicon (polysilicon), or amorphous silicon. The intermediate layer 3 may be configured by doping (diffusing or implanting) impurities such as phosphorus and boron into single crystal silicon, polycrystalline silicon (polysilicon), or amorphous silicon, for example. In this case, since the intermediate layer 3 has conductivity, for example, when a MOS transistor is formed on the substrate 2 outside the cavity S, a part of the intermediate layer 3 can be used as the gate electrode of the MOS transistor. . A part of the intermediate layer 3 can also be used as a wiring.

  Such a substrate 2 is provided with a diaphragm portion 20 which is thinner than the surrounding portion and is bent and deformed by receiving pressure. The diaphragm portion 20 is formed by providing a bottomed recess 24 on the lower surface of the semiconductor substrate 21. That is, the diaphragm portion 20 is configured to include the bottom portion of the concave portion 24 opened on one surface of the substrate 2. The diaphragm 20 has a pressure receiving surface 25 on the lower surface. In the present embodiment, as shown in FIG. 2, the diaphragm portion 20 has a square (rectangular) plan view shape.

  In the substrate 2 of the present embodiment, the recess 24 penetrates the silicon layer 211, and the diaphragm portion 20 is composed of four layers of a silicon oxide layer 212, a silicon layer 213, an insulating film 22, and an insulating film 23. Here, as will be described later, the silicon oxide layer 212 can be used as an etching stop layer when the recess 24 is formed by etching in the manufacturing process of the electronic device 1, and the thickness of the diaphragm portion 20 for each product. Variations can be reduced.

  The concave portion 24 may not penetrate the silicon layer 211, and the diaphragm portion 20 may be constituted by five layers of the thin portion of the silicon layer 211, the silicon oxide layer 212, the silicon layer 213, the insulating film 22, and the insulating film 23. .

-Piezoresistive element (functional element)-
As shown in FIG. 1, the plurality of piezoresistive elements 5 are respectively formed on the cavity portion S side of the diaphragm portion 20. Here, the piezoresistive element 5 is formed in the silicon layer 213 of the semiconductor substrate 21.

  As shown in FIG. 2, the plurality of piezoresistive elements 5 are composed of a plurality of piezoresistive elements 5 a, 5 b, 5 c, and 5 d disposed on the outer periphery of the diaphragm portion 20.

  The piezoresistive element 5a, the piezoresistive element 5b, and the piezoresistor respectively correspond to the four sides of the diaphragm portion 20 that form a quadrangle when viewed from the thickness direction of the substrate 2 (hereinafter simply referred to as “planar view”). An element 5c and a piezoresistive element 5d are arranged.

  The piezoresistive element 5 a extends along a direction perpendicular to the corresponding side of the diaphragm portion 20. A pair of wirings 214a is electrically connected to both ends of the piezoresistive element 5a. Similarly, the piezoresistive element 5 b extends along a direction perpendicular to the corresponding side of the diaphragm portion 20. A pair of wirings 214b is electrically connected to both ends of the piezoresistive element 5b.

  On the other hand, the piezoresistive element 5 c extends along a direction parallel to the corresponding side of the diaphragm portion 20. A pair of wirings 214c is electrically connected to both ends of the piezoresistive element 5c. Similarly, the piezoresistive element 5 d extends along a direction parallel to the corresponding side of the diaphragm portion 20. A pair of wirings 214d is electrically connected to both ends of the piezoresistive element 5d.

  Hereinafter, the wirings 214a, 214b, 214c, and 214d are collectively referred to as “wiring 214”.

  The piezoresistive element 5 and the wiring 214 are each made of silicon (single crystal silicon) doped (diffused or implanted) with impurities such as phosphorus and boron. Here, the impurity doping concentration in the wiring 214 is higher than the impurity doping concentration in the piezoresistive element 5. Note that the wiring 214 may be made of metal.

  Further, the plurality of piezoresistive elements 5 are configured such that, for example, resistance values in a natural state are equal to each other.

  The piezoresistive element 5 as described above constitutes a bridge circuit (Wheatstone bridge circuit) via the wiring 214 and the like. A driving circuit (not shown) that supplies a driving voltage is connected to the bridge circuit. The bridge circuit outputs a signal (voltage) corresponding to the resistance value of the piezoresistive element 5.

-Laminated structure-
The laminated structure 6 is formed so as to define a cavity S between itself and the substrate 2 described above. Here, the laminated structure 6 is disposed on the piezoresistive element 5 side of the diaphragm portion 20, and defines (configures) the cavity portion S (internal space) together with the diaphragm portion 20 (or the substrate 2).

  The laminated structure 6 includes an interlayer insulating film 61 formed on the substrate 2 so as to surround the piezoresistive element 5 in plan view, a wiring layer 62 formed on the interlayer insulating film 61, a wiring layer 62, and an interlayer An interlayer insulating film 63 formed on the insulating film 61; a wiring layer 64 formed on the interlayer insulating film 63 and having a covering layer 641 having a plurality of pores 642 (openings); the wiring layer 64 and the interlayer A surface protective film 65 formed on the insulating film 63 and a sealing layer 66 provided on the covering layer 641 are provided.

  The interlayer insulating films 61 and 63 are each composed of, for example, a silicon oxide film. The wiring layers 62 and 64 and the sealing layer 66 are each made of a metal such as aluminum. Further, the sealing layer 66 seals the pores 642 included in the coating layer 641. The surface protective film 65 is a silicon nitride film, for example.

  In such a laminated structure 6, the structure including the wiring layer 62 and the wiring layer 64 excluding the covering layer 641 is disposed on one surface side of the substrate 2 so as to surround the piezoresistive element 5 in plan view. "Wall". Further, the structure including the covering layer 641 and the sealing layer 66 is disposed on the opposite side of the substrate 2 from the wall portion, and the cavity S (internal space) is configured together with the substrate 2 and the wall portion. It constitutes the "ceiling part". And the inner peripheral edge 643 of the edge part by the side of the ceiling part of a wall part has the four convex corner parts 6432 which protrude in the direction away from the center of the cavity part S by planar view. Thereby, the damage resulting from the thermal contraction etc. of a ceiling part can be reduced. Here, the inner peripheral edge 643 is an inner peripheral edge of a portion of the wiring layer 64 that penetrates the interlayer insulating film 63. In addition, a wall part, a ceiling part, and the matter relevant to these are explained in full detail behind.

  Moreover, such a laminated structure 6 can be formed using a semiconductor manufacturing process such as a CMOS process. Note that a semiconductor circuit may be formed on and above the silicon layer 213. This semiconductor circuit has active elements such as MOS transistors, and other circuit elements such as capacitors, inductors, resistors, diodes, and wires (including wires connected to the piezoresistive element 5) formed as necessary. ing.

  The cavity S defined by the substrate 2 and the laminated structure 6 is a sealed space. The cavity S functions as a pressure reference chamber that serves as a reference value for the pressure detected by the electronic device 1. In this embodiment, the cavity S is in a vacuum state (300 Pa or less). By setting the cavity S to a vacuum state, the electronic device 1 can be used as an “absolute pressure sensor” that detects a pressure based on the vacuum state, and the convenience is improved.

However, the cavity S may not be in a vacuum state, may be atmospheric pressure, may be in a reduced pressure state where the atmospheric pressure is lower than atmospheric pressure, or is a pressurized state where the atmospheric pressure is higher than atmospheric pressure. It may be. The cavity S may be filled with an inert gas such as nitrogen gas or a rare gas. If the cavity S is a sealed space, it can be used as an “absolute pressure sensor”.
The configuration of the electronic device 1 has been briefly described above.

  In the electronic device 1 having such a configuration, as shown in FIG. 3A, the diaphragm portion 20 is deformed according to the pressure P received by the pressure receiving surface 25 of the diaphragm portion 20, and as a result, FIG. As shown, the piezoresistive elements 5a, 5b, 5c and 5d are distorted, and the resistance values of the piezoresistive elements 5a, 5b, 5c and 5d change. Accordingly, the output of the bridge circuit formed by the piezoresistive elements 5a, 5b, 5c, and 5d changes, and the magnitude of the pressure received by the pressure receiving surface 25 can be obtained based on the output.

  More specifically, in the natural state before the deformation of the diaphragm portion 20 as described above, for example, when the resistance values of the piezoresistive elements 5a, 5b, 5c, 5d are equal to each other, the piezoresistive elements 5a, 5b Is equal to the product of the resistance values of the piezoresistive elements 5c and 5d, and the output (potential difference) of the bridge circuit is zero.

  On the other hand, when the deformation of the diaphragm portion 20 as described above occurs, compressive strain along the longitudinal direction and tensile strain along the width direction are generated in the piezoresistive elements 5a and 5b as shown in FIG. At the same time, tensile strain along the longitudinal direction and compressive strain along the width direction are generated in the piezoresistive elements 5c and 5d. Therefore, when the deformation of the diaphragm portion 20 as described above occurs, one of the resistance values of the piezoresistive elements 5a and 5b and the piezoresistive elements 5c and 5d increases, and the other resistance. The value decreases.

  Due to the distortion of the piezoresistive elements 5a, 5b, 5c, and 5d, a difference between the product of the resistance values of the piezoresistive elements 5a and 5b and the product of the resistance values of the piezoresistive elements 5c and 5d occurs. The output (potential difference) is output from the bridge circuit. Based on the output from the bridge circuit, the magnitude (absolute pressure) of the pressure received by the pressure receiving surface 25 can be obtained.

  Here, when the deformation of the diaphragm portion 20 as described above occurs, one of the resistance values of the piezoresistive elements 5a and 5b and the resistance values of the piezoresistive elements 5c and 5d increases. Since the resistance value decreases, the change in the difference between the product of the resistance values of the piezoresistive elements 5a and 5b and the product of the resistance values of the piezoresistive elements 5c and 5d can be increased. The output can be increased. As a result, the pressure detection sensitivity can be increased.

  As described above, in the electronic device 1, the substrate 2 has the diaphragm portion 20, and the piezoresistive element 5 is provided on the diaphragm portion 20, thereby realizing a pressure sensor.

(Wall and ceiling)
Hereinafter, a wall part and a ceiling part are explained in full detail.

  4A is a partially enlarged view for explaining a wall portion included in the electronic device shown in FIG. 1, and FIG. 4B is a partially enlarged plan view for explaining a conventional wall portion.

  As described above, in the laminated structure 6 shown in FIG. 1, the structure composed of the wiring layer 62 and the wiring layer 64 excluding the covering layer 641 surrounds the piezoresistive element 5 in a plan view on one surface side of the substrate 2. This constitutes the “wall” arranged in Further, the structure including the covering layer 641 and the sealing layer 66 is disposed on the opposite side of the substrate 2 from the wall portion, and the cavity S (internal space) is configured together with the substrate 2 and the wall portion. It constitutes the "ceiling part".

  As shown in FIG. 2, the inner peripheral edge 643 at the end of the wall portion on the ceiling side includes four sides 6431 and four corners 6432 provided between two sides 6431 adjacent to each other. .

  The four sides 6431 extend in a first direction and a pair of sides 6431a and 6431b (first sides) facing each other, and extend in a second direction different from the first direction (orthogonal in the present embodiment). And a pair of sides 6431c and 6431d (second sides) facing each other.

  The four corners 6432 are provided between the corner 6432a provided between the two sides 6431a and 6431c adjacent to each other and the two sides 6431b and 6431d adjacent to each other. A corner 6432b, a corner 6432c provided between two adjacent sides 6431b and 6431c, and a corner 6432d provided between two adjacent sides 6431a and 6431d , Is composed of.

  Each corner 6432 (6432a, 6432b, 6432c, 6432d) has a convex shape protruding in a direction away from the center of the cavity S in a plan view (projecting outward). As a result, when a thermal contraction or the like of the ceiling portion occurs, to the midway portion of the ceiling portion (more specifically, near the line segment c between two adjacent sides 6431 as shown in FIG. 4A). Stress concentration can be reduced. That is, it is possible to easily bend the portion outside the line segment c of the ceiling, and to reduce the concentration of stress near the line segment c. Therefore, it is possible to reduce damage caused by thermal contraction of the ceiling portion. Here, the corner 6432 is located outside the line segment a obtained by extending each of the two sides 6431 adjacent to each other. Note that a line segment c in FIG. 4A is a line segment that connects the ends of two sides 6431 adjacent to each other.

  On the other hand, when there is no corner portion 6432 protruding outward as described above, as shown in FIG. 4B, the corner portion 6433 formed between two adjacent sides 6431 of the inner peripheral edge 643X. In the vicinity, the ceiling becomes extremely difficult to bend. Therefore, when a thermal contraction or the like of the ceiling portion occurs, a portion that is difficult to bend (region surrounded by the line segment c ′ and the two sides 6431) and a portion adjacent to the portion (portion inside the line segment c ′). Stress concentrates in the vicinity of the line segment (near the line segment c ′), and the ceiling part is easily damaged.

  In particular, since the ceiling is a film, it is easily damaged by stress concentration. Therefore, the effect of reducing the damage to the ceiling is remarkable by providing the corner 6432 as described above.

  Further, since the wall portion has a laminated structure, a film-like ceiling portion can be easily formed using a semiconductor process such as a CMOS process.

  In the present embodiment, each corner 6432 has a shape along an arc. More specifically, each corner 6432 has a shape obtained by cutting a quarter of a circle, and the center of the circle is provided so as to coincide with the intersection b of two line segments a. 6431 is connected to form a continuous curve. As described above, each corner portion 6432 includes a curved line in a plan view, so that stress concentration in the vicinity of the corner portion 6432 of the ceiling portion can be reduced when the thermal contraction or the like of the ceiling portion occurs.

  In addition, as shown in FIG. 2, the two corners 6432a and 6432b are arranged so as to sandwich the central part of the cavity S in plan view, and similarly, the two corners 6432c and 6432d are the center of the cavity S. It arrange | positions so that a part may be pinched | interposed. That is, in the plan view, there is a central part of the cavity S between the two corners 6432a and 6432b, and similarly, there is a central part of the cavity S between the two corners 6432c and 6432d. Thereby, when the thermal contraction or the like of the ceiling portion occurs, the strain generated in the ceiling portion can be efficiently dispersed by the four corner portions 6432, and the stress concentration on the ceiling portion can be efficiently reduced.

  The protruding length L1 of the corner 6432 (the protruding length from the point b) is preferably 5% or more and 20% or less with respect to the distance L between the pair of sides 6431 facing each other. More preferably, it is 10% or more and 15% or less. Thereby, the stress concentration of a ceiling part can be reduced efficiently. On the other hand, if the protrusion length L1 is too small, the effect of reducing the stress concentration at the ceiling may be insufficient depending on the shape, width, and the like of the corner 6432. On the other hand, if the protruding length L1 is too large, not only the effect of the corner 6432 can be obtained, but also the electronic device 1 is increased in size. Here, although the distance L is not specifically limited, For example, it is about 100 micrometers or more and 200 micrometers or less.

  The width L2 (the length of the line segment c) of the corner 6432 is preferably 5% or more and 20% or less with respect to the distance L between the pair of sides 6431 facing each other, and is preferably 10% or more and 15 % Or less is more preferable. Thereby, the stress concentration of a ceiling part can be reduced efficiently. On the other hand, if the width L2 is too small, the effect of reducing the stress concentration at the ceiling may be insufficient depending on the shape, width, and the like of the corner 6432. On the other hand, if the width L2 is too large, the entire ceiling portion is easily bent, and on the contrary, the ceiling portion is easily damaged.

  According to the electronic device 1 configured as described above, the inner peripheral edge 643 of the end portion of the wall portion on the ceiling portion side protrudes in a direction away from the center of the cavity portion S in plan view (projects outward). ) By having the convex corner portion 6432, it is possible to reduce the stress concentration on the middle portion of the ceiling portion when thermal contraction or the like of the ceiling portion occurs. Therefore, it is possible to reduce damage caused by thermal contraction of the ceiling portion. Therefore, the electronic device 1 having excellent reliability can be provided.

(Electronic device manufacturing method)
Next, a method for manufacturing the electronic device 1 will be briefly described.

  5 and 6 are diagrams showing manufacturing steps of the electronic device shown in FIG. Hereinafter, the manufacturing method of the electronic device 1 is demonstrated based on these figures.

[Element / insulating film formation process]
First, a semiconductor substrate 21 that is an SOI substrate is prepared. Then, as shown in FIG. 5A, the insulating film 22 is formed on the silicon layer 213.

  The insulating film 22 can be formed by, for example, a sputtering method, a CVD method, or the like.

  Next, by doping (ion implantation) impurities such as phosphorus (n-type) or boron (p-type) into the silicon layer 213 of the semiconductor substrate 21, a plurality of piezoresistive elements are obtained as shown in FIG. 5 and wiring 214 are formed.

For example, when ion implantation of boron is performed at +80 keV, the ion implantation concentration into the piezoresistive element 5 is set to about 1 × 10 ¹⁴ atoms / cm ² . Further, the ion implantation concentration into the wiring 214 is made higher than that of the piezoresistive element 5. For example, when boron is ion-implanted at 10 keV, the ion implantation concentration into the wiring 214 is set to about 5 × 10 ¹⁵ atoms / cm ² . Further, after the ion implantation as described above, for example, annealing is performed at about 1000 ° C. for about 20 minutes.

  Next, as shown in FIG. 5C, the insulating film 23 and the intermediate layer 3 are formed in this order on the insulating film 22.

  The insulating film 23 can be formed by, for example, a sputtering method, a CVD method, or the like. The intermediate layer 3 is formed, for example, by depositing polycrystalline silicon by a sputtering method, a CVD method or the like, and then doping (ion-implanting) impurities such as phosphorus or boron into the film as necessary, followed by patterning by etching. Can be formed.

[Interlayer insulation film / wiring layer formation process]
Next, as shown in FIG. 5D, a sacrificial layer 41, a wiring layer 62, a sacrificial layer 42, and a wiring layer 64 are formed in this order on the insulating film 23.

  The sacrificial layers 41 and 42 are partly removed by a cavity forming step to be described later, and the remaining portions become the interlayer insulating films 61 and 63. The sacrificial layers 41 and 42 are formed by forming a silicon oxide film by sputtering, CVD, or the like, and patterning the silicon oxide film by etching.

  The thicknesses of the sacrificial layers 41 and 42 are not particularly limited, but are, for example, about 1000 nm to 5000 nm.

  The wiring layers 62 and 64 are formed by patterning after forming a layer made of aluminum, for example, by sputtering or CVD.

  Here, the thicknesses of the wiring layers 62 and 64 are not particularly limited, but are, for example, about 300 nm to 900 nm.

  Such a laminated structure composed of the sacrificial layers 41 and 42 and the wiring layers 62 and 64 is formed using a normal CMOS process, and the number of laminated layers is appropriately set as necessary. That is, more sacrificial layers and wiring layers may be stacked as necessary.

[Cavity formation process]
Next, by removing a part of the sacrificial layers 41 and 42, a cavity S (cavity) is formed between the insulating film 23 and the covering layer 641, as shown in FIG. 6 (e). Thereby, interlayer insulating films 61 and 63 are formed.

  The cavity S is formed by removing a part of the sacrificial layers 41 and 42 by etching through the plurality of pores 642 formed in the coating layer 641. Here, when wet etching is used as such etching, an etching solution such as hydrofluoric acid or buffered hydrofluoric acid is supplied from the plurality of pores 642, and when dry etching is used, hydrofluoric acid gas or the like is supplied from the plurality of pores 642. Etching gas is supplied. In such etching, the insulating film 23 functions as an etching stop layer. In addition, since the insulating film 23 has resistance to the etching solution, the function of protecting the components below the insulating film 23 (for example, the insulating film 22, the piezoresistive element 5, the wiring 214, etc.) from the etching solution. It also has.

  Here, before the etching, the surface protective film 65 is formed by sputtering, CVD, or the like. Thereby, the part used as the interlayer insulation films 61 and 62 of the sacrificial layers 41 and 42 can be protected in the case of this etching. The constituent material of the surface protective film 65 includes, for example, a silicon oxide film, a silicon nitride film, a polyimide film, an epoxy resin film, etc. having resistance to protect the element from moisture, dust, scratches, etc. A silicon nitride film is preferable. Although the thickness of the surface protective film 65 is not specifically limited, For example, it is about 500 nm or more and 2000 nm or less.

[Sealing process]
Next, as shown in FIG. 6F, a sealing layer 66 made of a silicon oxide film, a silicon nitride film, a metal film such as Al, Cu, W, Ti, TiN, or the like is formed on the coating layer 641 by a sputtering method. The pores 642 are sealed by a CVD method or the like. Thus, the cavity S is sealed with the sealing layer 66, and the laminated structure 6 is obtained.

  Here, the thickness of the sealing layer 66 is not particularly limited, but is, for example, about 1000 nm to 5000 nm.

[Diaphragm formation process]
Next, after grinding the lower surface of the silicon layer 211 as necessary, a part of the lower surface of the silicon layer 211 is removed (processed) by etching to form a recess 24 as shown in FIG. To do. Thereby, the diaphragm part 20 which opposes the coating layer 641 through the cavity part S is formed.

  Here, when part of the lower surface of the silicon layer 211 is removed, the silicon oxide layer 212 functions as an etching stop layer. Thereby, the thickness of the diaphragm part 20 can be prescribed | regulated with high precision.

Note that a method for removing a part of the lower surface of the silicon layer 211 may be dry etching, wet etching, or the like.
The electronic device 1 can be manufactured through the steps as described above.

Second Embodiment
Next, a second embodiment of the present invention will be described.

  FIG. 7: is a top view which shows arrangement | positioning of the functional element with which the electronic device which concerns on 2nd Embodiment of this invention is provided, and a wall part. FIG. 8 is a partially enlarged view for explaining a wall portion included in the electronic device shown in FIG. 7.

  Hereinafter, although 2nd Embodiment of this invention is described, it demonstrates centering around difference with embodiment mentioned above, The description of the same matter is abbreviate | omitted.

  This embodiment is the same as the first embodiment described above except that the shapes of the wall and the ceiling are different.

  An electronic device 1A shown in FIG. 7 includes a wiring layer 64A, and a structure including a coating layer (not shown) and a sealing layer (not shown) included in the wiring layer 64A constitutes a “ceiling part”. In addition, the structure composed of the wiring layer 62 and the wiring layer 64A excluding the covering layer constitutes a “wall portion”.

  As shown in FIG. 7, the inner peripheral edge 643 </ b> A at the end of the wall on the ceiling side has four sides 6431 and four corners 6434 provided between two sides 6431 adjacent to each other. .

  The four corners 6434 are corners 6434a provided between two sides 6431a and 6431c adjacent to each other and corners provided between two sides 6431b and 6431d adjacent to each other. 6434b, a corner 6434c provided between two adjacent sides 6431b and 6431c, and a corner 6434d provided between two adjacent sides 6431a and 6431d. It is configured.

  Each corner 6434 (6434a, 6434b, 6434c, 6434d) has a convex shape protruding in a direction away from the center of the cavity S in plan view (projecting outward). As a result, when heat contraction or the like of the ceiling portion occurs, stress concentration occurs in the middle portion of the ceiling portion (more specifically, in the vicinity of a line segment c between two adjacent sides 6431 as shown in FIG. 8). Can be reduced.

In the present embodiment, each corner 6434 has a shape along a rectangle.
The protruding length L1 of the corner 6434 (the protruding length from the point b) is preferably 10% or more and 40% or less with respect to the distance L between the pair of sides 6431 facing each other. More preferably, it is 20% or more and 30% or less. Thereby, the stress concentration of a ceiling part can be reduced efficiently.

  The width L2 of the corner 6434 (the length of the line segment c) is preferably 5% or more and 20% or less with respect to the distance L between the pair of sides 6431 facing each other, and is preferably 10% or more and 15 or less. % Or less is more preferable. Thereby, the stress concentration of a ceiling part can be reduced efficiently.

  Also according to the second embodiment as described above, it is possible to provide the electronic device 1 </ b> A having reduced ceiling damage and excellent reliability.

<Third Embodiment>
Next, a third embodiment of the present invention will be described.

  FIG. 9 is a cross-sectional view showing an electronic device (oscillator) according to the third embodiment of the present invention. FIG. 10 is a plan view showing the arrangement of functional elements and wall portions included in the electronic device shown in FIG.

  Hereinafter, the third embodiment of the present invention will be described. The description will focus on differences from the above-described embodiment, and description of similar matters will be omitted.

  The present embodiment is the same as the first embodiment described above except that the present invention is applied to an oscillator.

  An electronic device 1B shown in FIG. 9 is a MEMS (Micro Electro Mechanical Systems) oscillator and has a function of oscillating a signal having a predetermined frequency. As shown in FIG. 9, the electronic device 1B includes a substrate 2B, a vibration element 5B (functional element) disposed on the substrate 2B, and a cavity S for housing the vibration element 5B together with the substrate 2B. A laminated structure 6B; reinforcing portions 31, 32, 33 provided between the substrate 2B and the laminated structure 6B; and a semiconductor circuit 7 formed on the substrate 2B and the laminated structure 6. Yes.

  The substrate 2B includes a semiconductor substrate 21B having a recess 24B open to the upper surface so as to exclude the edge, an insulating film 22 stacked on the inner surface of the recess 24B, and an insulating film 23 stacked on the insulating film 22. ,have. The semiconductor substrate 21B is, for example, a silicon substrate. The semiconductor substrate 21B may be, for example, one obtained by epitaxially growing a silicon single crystal on a silicon single crystal substrate. Further, the semiconductor substrate 21 is not limited to a silicon substrate, and for example, an SOI substrate may be used.

  In addition, the semiconductor circuit 7 is formed in a portion outside the recess 24B of the semiconductor substrate 21B. As will be described in detail later, the semiconductor circuit 7 includes, for example, an oscillation circuit for exciting the vibration element 5B. In addition, for example, a phase synchronization circuit (PLL circuit) or an oscillation circuit is provided as necessary. 1 has a multiplication circuit (frequency adjustment circuit) that multiplies the output frequency from the signal, an output circuit that converts the signal into a predetermined output format, and a peripheral circuit such as a memory. Such a semiconductor circuit 7 includes circuit elements such as a MOS transistor, a capacitor, an inductor, a resistor, a diode, and a wiring as necessary.

  Thus, by making the semiconductor circuit 7 in the electronic device 1B, the overall size of the apparatus can be reduced as compared with, for example, the case where the electronic device 1B and the semiconductor circuit 7 are separate. . In addition, since the semiconductor circuit 7 can be disposed close to the vibration element 5B, it is difficult for noise to be applied to the signal output from the vibration element 5B, and the electronic device 1B has good oscillation characteristics. In FIG. 9, only the MOS transistor 71 is illustrated as the semiconductor circuit 7 for convenience of explanation.

  Further, as shown in FIGS. 9 and 10, in the recess 24B, a frame-shaped reinforcing portion 31 (frame portion) and four columnar reinforcing portions 32 (column portions) arranged inside the reinforcing portion 31 are provided. ) And a reinforcing portion 33 disposed outside the reinforcing portion 31.

  The four reinforcing portions 32 are provided inside the reinforcing portion 31 so as to be separated from the reinforcing portion 31, and are provided so as to be separated from each other along the periphery of the vibration element 5B. Moreover, each reinforcement part 32 has a substantially square planar view shape. These four reinforcing portions 32 function as support portions that support the laminated structure 6B from below. Therefore, bending deformation downward (in the cavity S) of the multilayer structure 6B is reduced, and contact between the multilayer structure 6B and the vibration element 5B can be prevented.

  The four reinforcing portions 32 are electrically connected to the vibration element 5B, and are used as a part of wiring (electrical path) for drawing out the electrode of the vibration element 5B to the outside. Thus, since the reinforcing part 32 also serves as a part of the wiring, the reinforcing part 32 can be used effectively, there is no need to separately route the wiring, the electronic device 1B has a simple device configuration, and the electronic device 1B. Can be miniaturized. Such a reinforcing part 32 is made of, for example, polysilicon doped (diffused or implanted) with impurities such as phosphorus and boron. The number of reinforcing portions 32 is not limited to four.

  The reinforcing portion 31 has a frame shape and is erected on the bottom of the concave portion 24B so as to surround the vibration element 5B and the reinforcing portion 32 in plan view. A space inside the reinforcing portion 31 is a hollow portion S.

  Here, the reinforcing portion 32 constitutes a “wall portion” disposed on one surface side of the substrate 2B so as to surround the vibration element 5B in a plan view. As described above, since the substrate 2B has the concave portion 24B in which at least a part of the wall portion of the cavity portion S is disposed, the height of the electronic device 1B can be reduced. The laminated structure 6B constitutes a “ceiling” that is disposed on the opposite side of the wall 2 from the substrate 2B and forms the cavity S (internal space) together with the substrate 2B and the wall. ing.

  And the inner peripheral edge 310 of the edge part by the side of the laminated structure 6B (ceiling part) of the reinforcement part 31 (wall part) has the same shape as the inner peripheral edge 643 of 1st Embodiment mentioned above, as shown in FIG. There is no. That is, the inner peripheral edge 310 has four sides 311 and four corners 312 provided between two adjacent sides 311, and each corner 312 is configured by a curve along a circle. ing. Thereby, when thermal contraction etc. of laminated structure 6B arise, stress concentration to the middle part of laminated structure 6B can be reduced. Therefore, it is possible to reduce damage caused by thermal contraction or the like of the laminated structure 6B.

Such a reinforcing portion 31 is made of, for example, polysilicon. A reinforcing portion 33 that reinforces the reinforcing portion 31 is provided on the outer peripheral side of the reinforcing portion 31 (between the reinforcing portion 31 and the inner surface of the recess 24B). Thereby, the mechanical strength of the electronic device 1B can be increased. Such a reinforcing portion 33 is made of, for example, silicon dioxide (SiO ₂ ).

  The laminated structure 6B is provided on the upper surface side of the substrate 2B and closes the opening of the recess 24B and the opening of the reinforcing portion 31. As a result, a hollow portion S hermetically sealed is formed between the substrate 2B and the laminated structure 6B. The vibration element 5B is disposed in the cavity S, whereby the vibration element 5B can be protected and the vibration element 5B can be driven in a predetermined environment (a stable environment). Therefore, the reliability of the electronic device 1B is improved.

  As shown in FIG. 9, such a laminated structure 6B is connected to the upper surface of each reinforcing portion 32 and supported by the covering layer 67, and the sealing layer 68 stacked on the covering layer 67. And a structure 69 laminated on the sealing layer 68 and the substrate 2B.

  The covering layer 67 includes an insulating layer 671 and a conductive layer 672 stacked on the insulating layer 671. Further, the coating layer 67 has a plurality of communication holes 67 a that communicate the inside and the outside of the cavity S. The communication hole 67a is a release hole for removing the sacrificial layer in the cavity S by etching during manufacturing.

  In addition, the conductive layer 672 includes a contact portion 672 a that penetrates the insulating layer 671 and is electrically connected to the reinforcing portion 32. Such a contact portion 672 a is used as a part of wiring for connecting the vibration element 5 </ b> B to the semiconductor circuit 7, similarly to the reinforcing portion 32.

  In such a covering layer 67, the insulating layer 671 is made of, for example, silicon nitride (SiN), and the conductive layer 672 is made of, for example, polysilicon doped (diffused or implanted) with an impurity such as phosphorus or boron. It is configured.

  The sealing layer 68 is laminated on the covering layer 67 and closes the communication hole 67a. Thereby, the cavity S is hermetically sealed. Thus, by sealing the cavity S in an airtight manner, the atmosphere of the vibration element 5B accommodated in the cavity S can be stabilized. The cavity S is preferably in a vacuum state (depressurized state). Thereby, viscous resistance decreases and the vibration element 5B can be driven more efficiently and stably.

  In addition, the sealing layer 68 includes a contact portion 681 that is independently arranged in an island shape from the periphery on the contact portion 672a and is electrically connected to the contact portion 672a. Such a contact portion 681 is used as a part of wiring for connecting the vibration element 5B to the semiconductor circuit 7 in the same manner as the reinforcing portion 32 and the contact portion 672a.

  As such a sealing layer 68, metal materials (conductive material), such as Al, Cu, W, Ti, TiN, can be used, for example.

  The structure 69 includes an interlayer insulating film 691, a wiring layer 692 formed over the interlayer insulating film 691, an interlayer insulating film 693 formed over the wiring layer 692 and the interlayer insulating film 691, and an interlayer insulating film 693. A wiring layer 694 formed and a surface protective layer 695 formed on the wiring layer 694 and the interlayer insulating film 693 are provided. Among these, the wiring layers 692 and 694 function as wiring of the semiconductor circuit 7, and the semiconductor circuit 7 is drawn to the upper surface of the electronic device 1B by the wiring layers 692 and 694, and a part of the wiring layer 694 is external connection terminals 694a. (Mounting terminal). The surface protective layer 695 protects the electronic device 1B from moisture, dust, scratches, and the like.

In such a structure 69, the interlayer insulating films 691 and 693 are made of, for example, silicon dioxide (SiO ₂ ), and the wiring layers 692 and 694 are made of, for example, aluminum (Al). The protective layer 695 is made of, for example, silicon dioxide (SiO ₂ ), silicon nitride (SiN), polyimide, epoxy resin, or the like.

  The vibration element 5B is a capacitance type (electrostatic drive type) vibration element, and is disposed in the recess 24B. Thus, by arranging the vibration element 5B in the recess 24B, it is possible to reduce the height of the electronic device 1B.

  As shown in FIG. 10, the vibration element 5B includes a vibration part electrode 51 and a substrate electrode 52 provided on the substrate 2B.

  The vibration part electrode 51 is disposed between a fixed part 511 provided on the substrate 2B, a vibration body 512 disposed opposite to the fixed part 511 with a gap, and between the vibration body 512 and the fixed part 511. And a support portion 513 that supports 512 to the fixing portion 511. The vibrating body 512 includes a base portion 512a supported by the support portion 513 and four vibration portions 512b, 512c, 512d, and 512e connected to the base portion 512a, and has a substantially cross shape. . In addition, the number of vibration parts is not limited to four of this embodiment, 1-3 may be sufficient and five or more may be sufficient.

  On the other hand, the substrate electrode 52 includes an electrode 521 provided on the substrate 2B and disposed to face the vibrating portion 512b, and an electrode 522 provided on the substrate 2B and disposed to face the vibrating portion 512d. Have.

  Each of the vibration part electrode 51 and the substrate electrode 52 is made of polysilicon doped (diffused or implanted) with impurities such as phosphorus and boron, for example.

  Further, the vibration part electrode 51 and the substrate electrode 52 are electrically connected to the semiconductor circuit 7 via the reinforcing part 32, respectively, and a predetermined frequency is provided between the vibration part electrode 51 and the substrate electrode 52 from the semiconductor circuit 7. When an alternating voltage (frequency substantially equal to the resonance frequency of the vibration part electrode 51) is applied, the vibration parts 512b and 512d and the vibration parts 512c and 512e are generated by the electrostatic force generated between the vibration body 512 and the substrate electrode 52. And vibrate in reverse phase. A signal (frequency signal) based on this vibration is output from the substrate electrode 52 (or the vibration part electrode 51), and a signal having a predetermined frequency can be output by processing the output signal in the semiconductor circuit 7. .

  According to such a vibration element 5 </ b> B, the plurality of vibration portions 512 b to 512 e extend from the base portion 512 a in different directions, so that vibration leakage can be reduced.

  According to the third embodiment as described above, it is possible to provide the electronic device 1B having excellent reliability by reducing the damage to the ceiling.

2. Pressure sensor Next, a pressure sensor including the electronic device of the present invention (pressure sensor of the present invention) will be described. FIG. 11 is a cross-sectional view showing an example of the pressure sensor of the present invention.

  As shown in FIG. 11, the pressure sensor 100 of the present invention includes an electronic device 1, a casing 101 that houses the electronic device 1, and a calculation unit 102 that calculates a signal obtained from the electronic device 1 to pressure data. ing. The electronic device 1 is electrically connected to the calculation unit 102 via the wiring 103.

  The electronic device 1 is fixed to the inside of the housing 101 by fixing means (not shown). In addition, the housing 101 has a through-hole 104 through which the diaphragm portion 20 of the electronic device 1 communicates with, for example, the atmosphere (outside the housing 101).

  According to such a pressure sensor 100, the diaphragm portion 20 receives pressure through the through hole 104. The pressure-received signal is transmitted to the calculation unit via the wiring 103 to calculate pressure data. The calculated pressure data can be displayed via a display unit (not shown) (for example, a monitor of a personal computer).

3. Next, an example of an altimeter (the altimeter of the present invention) including the electronic device of the present invention will be described. FIG. 12 is a perspective view showing an example of the altimeter of the present invention.

  The altimeter 200 can be worn on the wrist like a wristwatch. In addition, the electronic device 1 is mounted inside the altimeter 200, and the altitude from the current location above sea level, the atmospheric pressure at the current location, or the like can be displayed on the display unit 201.

  The display unit 201 can display various information such as the current time, the user's heart rate, and weather.

4). Next, a navigation system to which an electronic apparatus including the electronic device of the present invention is applied will be described. FIG. 13 is a front view showing an example of an electronic apparatus of the present invention.

  The navigation system 300 includes map information (not shown), position information acquisition means from a GPS (Global Positioning System), self-contained navigation means using a gyro sensor, an acceleration sensor, and vehicle speed data, and an electronic device 1. The display unit 301 displays predetermined position information or course information.

  According to this navigation system, altitude information can be acquired in addition to the acquired position information. By obtaining altitude information, for example, when traveling on an elevated road that shows approximately the same position as a general road, if you do not have altitude information, you are traveling on an ordinary road or on an elevated road The navigation system was unable to determine whether or not the vehicle was being used, and the general road information was provided to the user as priority information. Therefore, in the navigation system 300 according to the present embodiment, altitude information can be acquired by the electronic device 1, an altitude change caused by entering the elevated road from a general road is detected, and navigation information in the traveling state of the elevated road is obtained. Can be provided to the user.

  The display unit 301 is configured to be small and thin, such as a liquid crystal panel display or an organic EL (Organic Electro-Luminescence) display.

  Note that the electronic apparatus including the electronic device of the present invention is not limited to the above-described ones. For example, a personal computer, a mobile phone, a smartphone, a tablet terminal, a clock, a medical device (for example, an electronic thermometer, a blood pressure monitor, a blood glucose meter, an electrocardiogram The present invention can be applied to measuring devices, ultrasonic diagnostic devices, electronic endoscopes), various measuring devices, instruments (for example, vehicles, aircraft, ship instruments), flight simulators, and the like.

5. Next, the moving body (the moving body of the present invention) to which the electronic device of the present invention is applied will be described. FIG. 14 is a perspective view showing an example of the moving body of the present invention.

  As shown in FIG. 14, the moving body 400 includes a vehicle body 401 and four wheels 402, and is configured to rotate the wheels 402 by a power source (engine) (not shown) provided in the vehicle body 401. ing. Such a moving body 400 incorporates a navigation system 300 (electronic device 1).

  As mentioned above, although the electronic device, pressure sensor, altimeter, electronic device, and moving body of the present invention have been described based on the illustrated embodiments, the present invention is not limited thereto, and the configuration of each part is the same. Any structure having a function can be substituted. Moreover, other arbitrary components may be added.

  Moreover, although the number of piezoresistive elements (functional elements) provided in one diaphragm portion has been described as an example in the first and second embodiments described above, the number is not limited to this. For example, It may be 1 or more and 3 or less, or 5 or more. Further, the arrangement, shape, and the like of the piezoresistive element are not limited to the above-described embodiment. For example, in the above-described embodiment, the piezoresistive element may be arranged at the center of the diaphragm portion.

  In the first and second embodiments described above, the case where a piezoresistive element is used as a sensor element for detecting the deflection of the diaphragm portion has been described as an example. However, such an element is not limited to this, for example, It may be a resonator.

DESCRIPTION OF SYMBOLS 1 ... Electronic device 1A ... Electronic device 1B ... Electronic device 2 ... Substrate 2B ... Substrate 3 ... Intermediate layer 5 ... Piezoresistive element 5B ... Vibration element 5a ... Piezoresistive element 5b ... Piezoresistor Element 5c ... Piezoresistive element 5d ... Piezoresistive element 6 ... Multilayer structure 6B ... Multilayer structure 7 ... Semiconductor circuit 20 ... Diaphragm part 21 ... Semiconductor substrate 21B ... Semiconductor substrate 22 ... Insulating film 23 ... Insulating film 24 ... Recess 24B ... Recess 25 ... Pressure-receiving surface 31 ... Reinforcement part 32 ... Reinforcement part 33 ... Reinforcement part 41 ... Sacrificial layer 42 ... Sacrificial layer 51 ... Vibration part electrode 52 ... substrate electrode 61 ... interlayer insulating film 62 ... wiring layer 63 ... interlayer insulating film 64 ... wiring layer 64A ... wiring layer 65 ... surface protective film 66 ... sealing layer 67 ... covering layer 67a ... Communication hole 68 Sealing layer 69 Structure 71 Transistor 100 Pressure sensor 101 Case 102 Calculation unit 103 Wiring 104 Through hole 200 Altimeter 201 Display unit 211 Silicon layer 212 Silicon oxide layer 213 Silicon layer 214 Wiring 214a Wiring 214b Wiring 214c Wiring 214d Wiring 300 Navigation system 301 Display section 310 Inner peripheral edge 311 Side 312 Corner 400 Moving body 401 ··· Body 402 ··· Wheel 511 ··· Fixed portion 512 ··· Vibrating body 512a ··· Base portion 512b ··· Vibrating portion 512c ··· Vibrating portion 512d ··· Vibrating portion 512e ··· Vibrating portion 513 ··· Supporting portion 521 Electrode 522 Electrode 641 Cover layer 642 Pore 643 Inner periphery 643A Inner periphery 643X Inner periphery 671 Insulating layer 672 ... conductive layer 672a ... contact part 681 ... contact part 691 ... interlayer insulating film 692 ... wiring layer 693 ... interlayer insulating film 694 ... wiring layer 694a ... external connection terminal 695 ... surface protection Layer 6431 ... side 6431a ... side 6431b ... side 6431c ... side 6431d ... side 6432 ... corner 6432b ... corner 6432b ... corner 6432c ... corner 6432d ... corner 6433 ... corner Section 6434 ... Corner 6434a ... Corner 6434b ... Corner 6434c ... Corner 6434d ... Corner a ... Line segment b ... Intersection c ... Line segment L ... Distance L1 ... Projection length L2 ... Width P ... Pressure S ... Cavity

Claims (12)

A substrate,
A functional element provided on the substrate;
A wall portion disposed on one side of the substrate surrounding the functional element in a plan view of the substrate;
A ceiling portion which is disposed on the opposite side of the substrate with respect to the wall portion and constitutes an internal space together with the substrate and the wall portion;
With
The electronic device according to claim 1, wherein an inner peripheral edge of an end portion of the wall portion on the ceiling portion side has a corner portion protruding in a direction away from the center of the internal space in the plan view.   The electronic device according to claim 1, wherein the ceiling is a film. The inner peripheral edge extends along the first direction and is opposed to each other in the plan view, and extends along a second direction different from the first direction. A pair of opposing second sides,
The electronic device according to claim 1, wherein the corner is provided between the first side and the second side that are adjacent to each other.   The electronic device according to claim 1, wherein the corner portion includes a curved portion in the plan view.   5. The electronic device according to claim 1, wherein a central portion of the internal space is between the two corners in the plan view.   The electronic device according to claim 1, wherein the wall portion has a laminated structure.   The electronic device according to claim 1, wherein the substrate has a recess in which at least a part of the wall portion is disposed. The substrate has a diaphragm portion that is bent and deformed by pressure reception,
The electronic device according to claim 1, wherein the functional element is provided in the diaphragm portion and outputs an electrical signal due to distortion.   A pressure sensor comprising the electronic device according to claim 1.   An altimeter comprising the electronic device according to claim 1.   An electronic apparatus comprising the electronic device according to claim 1.   A moving body comprising the electronic device according to claim 1.

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