JP2016149507A - Semiconductor device manufacturing method, soar cell manufacturing method and solar cell - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method which can inhibit the occurrence of abnormal diffusion while ensuring more number of semiconductor substrates capable of being processed at once in a diffusion furnace.SOLUTION: A solar cell manufacturing method comprises: an impurity diffusion process of supplying an n-type impurity diffusion source to a rear face of an n-type single crystal silicon substrate which has a light receiving surface where a p-type impurity diffusion source is formed and a rear face opposite to the light receiving surface to form a p-type diffusion layer on the light receiving surface and an n-type diffusion layer on the rear face; and a heat diffusion process of performing a heat treatment by sandwiching at least one diffusion control board 20 among first and second processed substrate groups each composed of solar cell formation substrates 10 which are arranged in such a manner that every two solar cell formation substrates 10 are arranged with light receiving surfaces 10A facing each other at a position where rear faces 10B face each other among first and second processed substrate groups.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a semiconductor device manufacturing method, a solar cell manufacturing method, and a solar cell, and more particularly to impurity diffusion.

  Conventionally, in the manufacture of solar cells, a semiconductor substrate in which n-type impurities are diffused on one surface and p-type impurities are diffused on the other surface is used. Such a semiconductor substrate is formed as follows, for example. That is, a first diffusion source layer containing a first conductivity type impurity element is formed on one surface of a semiconductor substrate, and a second diffusion source containing a second conductivity type impurity element is formed on the other surface of the semiconductor substrate. Form a layer. Then, the plurality of semiconductor substrates on which the respective diffusion source layers are formed are arranged in the diffusion furnace with the one surface and the other surface being aligned. After the semiconductor substrate is placed in the diffusion furnace, the semiconductor substrate is subjected to heat treatment to thermally diffuse the impurity diffusion component contained in each diffusion source layer into the semiconductor substrate.

  During the heat treatment in the diffusion furnace, a part of the impurity diffusion component is out-diffused, that is, out-diffused into the gas atmosphere in the diffusion furnace. For this outward diffusion, in the conventional method of arranging a plurality of semiconductor substrates in a diffusion furnace with one first diffusion source layer of the semiconductor substrates adjacent to each other and the other second diffusion source layer facing each other, There is a possibility that an impurity diffusion component containing an impurity element released from the first diffusion source layer of one semiconductor substrate into the gas atmosphere may adhere to the second diffusion source layer of the other semiconductor substrate. Further, there is a possibility that an impurity diffusion component containing an impurity element released from the second diffusion source layer of the other semiconductor substrate into the gas atmosphere may adhere to the first diffusion source layer of one semiconductor substrate. In this case, abnormal diffusion may occur in which an impurity element having a conductivity type different from the conductivity type of the impurity element to be diffused diffuses on the surface of the semiconductor substrate.

  As a method for preventing this abnormal diffusion, for example, the distance between semiconductor substrates arranged in a diffusion furnace is increased, and an impurity diffusion component containing an impurity element emitted from a diffusion source layer of one semiconductor substrate is adjacent to the semiconductor substrate. A method for preventing the arrival of the

  As another method, Patent Document 1 discloses that an impurity diffusion component containing an n-type impurity element is dissolved in an organic solvent and an impurity diffusion component containing a p-type impurity element is dissolved in an organic solvent. After coating each on different surfaces of a single semiconductor substrate, a plurality of semiconductor substrates are arranged in a diffusion furnace so that diffusion source layers containing impurity diffusion components containing impurity elements of the same conductivity type face each other As a result, impurity diffusion components released from each diffusion source layer into the gas atmosphere in the diffusion furnace during thermal diffusion adhere to the diffusion source layer of the same conductivity type on the adjacent semiconductor substrate, and abnormal diffusion occurs. The point which prevents generation | occurrence | production is disclosed.

JP 2011-171600 A

  In the method of increasing the distance between the semiconductor substrates described above, it is necessary to increase the distance necessary for preventing outward diffusion depending on the flow rate of the gas flowing in the furnace during the heat treatment. For this reason, there is a problem that the number of semiconductor substrates that can be placed in the diffusion furnace at a time is extremely reduced, and the production efficiency of the semiconductor substrates is lowered.

  Further, even in the method of Patent Document 1, the effect of preventing outward diffusion cannot be sufficiently expected if the distance between adjacent substrates is short, and an impurity diffusion source, that is, a dopant material is applied to both surfaces of the semiconductor substrate. Therefore, it cannot be used, for example, when the vapor phase diffusion method is applied to at least one surface.

  The present invention has been made in view of the above, and suppresses the occurrence of abnormal diffusion while securing a large number of semiconductor substrates that can be processed at a time in a diffusion furnace in a method of manufacturing a plurality of semiconductor substrates by heat treatment. An object of the present invention is to obtain a method for manufacturing a semiconductor device.

  In order to solve the above-described problems and achieve the object, the present invention includes a first main surface on which an impurity diffusion source of the first conductivity type is formed, and a second main surface opposite to the first main surface. An impurity diffusion source of a second conductivity type is supplied to the semiconductor substrate with respect to the second main surface, and the first conductivity type diffusion layer is provided on the first main surface and the second conductivity type diffusion layer is provided on the second main surface. A method of manufacturing a semiconductor device including an impurity diffusion step to be formed. Between the first and second target substrate groups configured by arranging two semiconductor substrates so as to face each other with the first main surface facing inside, between the first and second target substrate groups, It includes a thermal diffusion process in which heat treatment is performed with at least one substrate interposed between the second main surfaces facing each other.

  According to the present invention, it is possible to suppress the occurrence of abnormal diffusion while securing a large number of semiconductor substrates that can be processed at once in a diffusion furnace.

It is a figure which shows the solar cell formed with the manufacturing method of the solar cell of Embodiment 1, (a) is a top view, (b) is AA sectional drawing of (a). (A) to (d) are process cross-sectional views illustrating the method for manufacturing the solar cell of the first embodiment. (A)-(c) is process sectional drawing which shows the manufacturing method of the solar cell of Embodiment 1. FIG. Schematic diagram showing a diffusion step in the method for manufacturing the solar cell of the first embodiment Flowchart showing a method for manufacturing the solar cell of the first embodiment. Schematic diagram showing the impurity diffusion device of the first embodiment Schematic diagram of a diffusion gas generator connected to the impurity diffusion device of the first embodiment Schematic diagram showing the structure of a parent boat and a child boat used in the impurity diffusion device of the first embodiment The figure which shows the diffusion control board | substrate used with the impurity diffusion apparatus of Embodiment 1 It is a figure which shows the solar cell formed with the manufacturing method of the solar cell of Embodiment 2, (a) is a top view, (b) is AA sectional drawing of (a). (A)-(d) is process sectional drawing which shows the manufacturing method of the solar cell of Embodiment 2. FIG. (A)-(c) is process sectional drawing which shows the manufacturing method of the solar cell of Embodiment 2. FIG. Schematic diagram showing the diffusion step in the method for manufacturing the solar cell of the second embodiment Schematic diagram showing the diffusion step in the method for manufacturing the solar cell of the second embodiment Flowchart showing a method for manufacturing the solar cell of the second embodiment Schematic diagram showing the diffusion step in the method for manufacturing the solar cell of the third embodiment

  Below, the manufacturing method of the semiconductor device concerning the embodiment of the present invention, the manufacturing method of a solar cell, and a solar cell are explained in detail based on a drawing. In addition, this invention is not limited by this embodiment, In the range which does not deviate from the summary of this invention, it can change suitably. In the drawings shown below, the scale of each member may be different from the actual scale for easy understanding. The same applies between the drawings.

Embodiment 1 FIG.
1A and 1B are diagrams showing a solar cell formed by the solar cell manufacturing method of Embodiment 1, wherein FIG. 1A is a top view, and FIG. 1B is a cross-sectional view taken along line AA in FIG. 2 (a) to 2 (d) and FIGS. 3 (a) to 3 (c) are process cross-sectional views illustrating the method for manufacturing the solar cell of the first embodiment. FIG. 4 is a schematic diagram showing a diffusion step in the method for manufacturing the solar cell of the first embodiment, and FIG. 5 is a flowchart showing the method for manufacturing the solar cell of the first embodiment. In the first embodiment, when collectively processing a plurality of semiconductor substrates, between the first and second target substrate groups in which two semiconductor substrates are arranged so as to face each other with the second main surface facing inside, The heat treatment is performed by arranging the diffusion control substrate 20 composed of at least one silicon substrate at a position where the first main surface faces. In the first embodiment, the semiconductor substrate has a first main surface that is a light receiving surface 1A on which an impurity diffusion source of the first conductivity type is formed, and a second main surface that is a back surface 1B that faces the light receiving surface 1A. The n-type single crystal silicon substrate 1 is supplied with phosphorus oxychloride POCl ₃ as an impurity diffusion source of a second conductivity type opposite to the first conductivity type with respect to the second main surface 1B. Impurity diffusion step of forming a p-type diffusion layer 2 as a first conductivity type diffusion layer on the first main surface on the 1A side and an n-type diffusion layer 4 as a second conductivity type diffusion layer on the second main surface on the back side 1B 1, a silicon substrate as the diffusion control substrate 20 is disposed between the semiconductor substrates, and a plurality of solar cell substrates are collectively processed.

  In this method, impurities of the second conductivity type are diffused in the semiconductor substrate, and the outward diffusion at the time of forming the second conductivity type diffusion layer occurs on the surface of the adjacent substrate, that is, the diffusion control substrate 20, and is arranged every other one. The effect on the semiconductor substrate is reduced. Thereby, the formation of the second conductivity type impurity on the surface having the diffusion source layer containing the first conductivity type impurity diffusion component can be prevented, and the generation of the leakage current is suppressed.

  Hereinafter, although the manufacturing method of the solar cell concerning Embodiment 1 of this invention is demonstrated in detail, the apparatus used for spreading | diffusion is demonstrated prior to description. 6 is a schematic diagram showing an impurity diffusion device used in the impurity diffusion method in the solar cell manufacturing method according to Embodiment 1, and FIG. 7 is a diffusion gas connected to the impurity diffusion device of Embodiment 1. FIG. 8 is a schematic diagram showing the structure of the parent boat and the child boat used in the impurity diffusion device of the first embodiment.

  As shown in FIG. 6, the impurity diffusion device 100 according to the first embodiment includes a horizontal furnace including a cylindrical quartz tube 101 and a cylindrical heater 110. The cylindrical heater 110 is arranged on the outer peripheral portion of the quartz tube 101 so as to uniformly heat the quartz tube 101.

  An end 109 on the right side in FIG. 6 of the quartz tube 101 serves as an entrance / exit of a parent boat 116 described later. Although not shown, the door is provided with a door for closing the door and an exhaust hood for collecting the purge gas remaining in the quartz tube 101 when the door is opened. The left end of the quartz tube 101 is closed, and a diffusion gas introduction tube 102 described later is inserted therethrough. In addition, in order to show the state in the case where heat treatment is performed in the quartz tube 101, the child boat 108 on which the substrate 107 is placed is shown in the quartz tube 101. However, the child boat 108 is placed and transported into the furnace. The parent boat 116 is omitted. Further, a diffusion gas discharge port 104 is provided above the right side of the quartz tube 101 rather than in the middle of the quartz tube 101. In FIG. 6, the diffusion gas discharge direction 105 is indicated by an arrow. Further, heat barriers 106a and 106b made of a disk-shaped silicon substrate are disposed on the diffusion gas introduction tube 102 side of the quartz tube 101 and the end 109 side which is an inlet / outlet.

  The diffusion gas generated by the diffusion gas generator is supplied to the diffusion gas introduction pipe 102 of the impurity diffusion device 100 shown in FIG. As shown in FIG. 7, the diffusion gas generator 111 bubbles the container 112 that houses the liquid diffusion source 113, the carrier gas introduction pipe 115 that supplies the carrier gas into the quartz tube 101, and the liquid diffusion source 113. And a source gas introduction pipe 114 for supplying the source gas to the container. The diffusion gas generator 111 includes the saturated vapor of the liquid diffusion source 113 in the source gas by bubbling, and merges the source gas with the carrier gas to form a diffusion gas. A diffusion gas is introduced into the quartz tube 101.

  For the liquid diffusion source 113, for example, phosphoryl chloride, that is, phosphorus oxychloride may be used. As the carrier gas and the source gas, nitrogen gas or oxygen gas or a mixed gas obtained by mixing them is used.

In FIG. 8, the child boat 108 is arranged on the parent boat 116 that forms a substantially rectangular tray, and this is arranged in the direction of the central axis D ₁ of the quartz tube 101. When mounting a plurality of child boats 108, they are preferably arranged in the direction of the central axis of the quartz tube 101. The child boat 108 is formed by welding quartz glass into a bowl shape. As will be described later, the n-type single crystal silicon substrate 1 that is the substrate to be processed is stacked two by two so that the surface on which the p-type diffusion layer 2 is formed is located inside to form a substrate group to be processed. A diffusion control substrate 20 is disposed between the processing substrate groups. In the substrate group to be processed and the diffusion control substrate 20, the thickness direction is aligned in the direction perpendicular to the longitudinal direction of the quartz tube 101 at equal intervals and is arranged in the child boat 108. The parent boat 116 is also formed by combining quartz glass and welding them together like a carriage. The diffusion gas can freely flow in the child boat 108.

  Next, the solar cell of Embodiment 1 is demonstrated with a manufacturing method. 1A and 1B are solar cells obtained by the solar cell manufacturing method of Embodiment 1. FIG. In the manufacturing process of the solar cell according to the first embodiment, an n-type single crystal silicon substrate 1 having a light receiving surface 1A and a back surface 1B is used as a crystalline semiconductor substrate. A p-type diffusion layer 2 is formed on the light receiving surface 1A of the n-type single crystal silicon substrate 1. A high-concentration n-type impurity diffusion source 4a made of a dopant paste containing high-concentration phosphorus, which is a first diffusion source, is formed in a predetermined part of the back surface 1B of the n-type single crystal silicon substrate 1 deep. Then, phosphorus as an impurity is diffused from the high-concentration n-type impurity diffusion source 4a to form the high-concentration n-type diffusion layer 4 as the first impurity diffusion layer. Thereafter, silicon nitride films as passivation films 6 a and 6 b are formed on the p-type diffusion layer 2 and the high-concentration n-type diffusion layer 4. Then, a collecting electrode 7a constituting a light receiving surface electrode is formed on the light receiving surface 1A side, and a collecting electrode 7b constituting a back electrode is formed on the back surface 1B side. The collecting electrode 7a constituting the light receiving surface electrode is composed of a grid electrode 7aG and a bus electrode 7aB. On the other hand, although not shown, the collector electrode 7b constituting the back electrode is also formed with a grid electrode and a bus electrode.

  Embodiments of a method for manufacturing a solar cell according to the present invention will be described below in detail with reference to the accompanying drawings. FIGS. 2A to 2D and FIGS. 3A to 3C are process cross-sectional views illustrating the manufacturing process of the solar cell according to the first embodiment. FIG. 5 is a flowchart showing the manufacturing process. First, in start step S000, as shown in FIG. 2A, an n-type single crystal silicon substrate 1 which is a semiconductor substrate is prepared. Next, in texture formation step S001, as shown in FIG. 2B, the unevenness called texture 1T is formed on the light receiving surface 1A that is the first main surface and the back surface 1B that is the second main surface of the n-type single crystal silicon substrate 1. Form a structure. An acidic or alkaline etching solution is used to form the unevenness. Concavity and convexity may be formed only on the light receiving surface 1A side. Moreover, you may implement the process of removing the damage layer on the substrate surface before uneven | corrugated formation. In addition, it is desirable to improve the performance by performing gettering treatment of impurities in the substrate after the damaged layer removing step. As the gettering process, a phosphorus diffusion process or the like is used. In order to form unevenness only on the surface on the light receiving surface 1A side and keep the surface on the back surface 1B side flat, a process of contacting an etching solution only on the surface on the light receiving surface 1A side, or a state in which a protective film is formed on the back surface 1B side Then, the n-type single crystal silicon substrate 1 is etched.

  After the unevenness is formed, as shown in FIG. 2C, a boron layer 2a and a silicon oxide layer 3 are formed on one side of the substrate in this order using an atmospheric pressure chemical vapor deposition (APCVD) method. Form. The thickness of the boron layer 2a is preferably 30 nm to 50 nm, and the thickness of the silicon oxide layer 3 is preferably 50 nm to 500 nm. The silicon oxide layer 3 is formed to protect the boron layer 2a when the phosphorus layer described later is removed. However, when the boron layer 2a is thick or formed at the phosphorus layer forming stage described later, the silicon oxide layer 3 is formed. When it is small, it is not always necessary to form it. In step S002, after the boron layer 2a and the silicon oxide layer 3 are formed, the substrate is heated to diffuse boron, and the p-type diffusion layer 2 is formed. Oxidation further proceeds in the heating process, and in step S003, the silicon oxide layer 3 is formed on the surface having a desired film thickness. Here, the boron layer 2a is actually a boron-containing glass layer in many cases, but may be the p-type diffusion layer 2 by heat treatment.

Next, in step S004, an n-type diffusion source layer 4a is formed as shown in FIG. 2D, and a high-concentration n-type diffusion layer 4 and a low-concentration n-type are formed as shown in FIG. The diffusion layer 5 is formed. The diffusion source layer 4a has the same conductivity type as phosphorus described later. The n-type diffusion source layer 4a is preferably subjected to paste printing, for example. Subsequently, phosphorus is thermally diffused in the gas phase, whereby a diffusion layer having a selective resistance pattern can be formed in the substrate surface. For phosphorus diffusion in the gas phase, for example, gas phase POCl ₃ can be used as a diffusion source. Here, when phosphorus diffusion in the gas phase is performed, n-type diffusion layers are formed on both surfaces of the n-type single crystal silicon substrate 1, and a high-concentration n-type that is a high-concentration layer of phosphorus is formed near the substrate surface. A diffusion layer 4 is formed. Therefore, one side of the substrate, that is, the light-receiving surface 1A that is the boron layer forming surface, or the phosphorus in the thickness direction, that is, the side surface of the n-type single crystal silicon substrate 1, and the back surface 1B that is the other side, The structure as shown in FIG. 3A is obtained by removing the high concentration layer of phosphorus with, for example, HF. The low concentration n-type diffusion layer 5 is formed by a gas phase. Although FIG. 3A shows the silicon oxide layer 3, it may be removed during the above-described processing such as HF.

  Next, as shown in FIG. 3B, passivation films 6a and 6b are formed on the light receiving surface 1A and the back surface 1B in step S005. A silicon nitride film is used for the passivation films 6a and 6b. For example, an insulating film such as a silicon oxide film or a silicon nitride film may be used, or a stacked structure of a silicon nitride film and a silicon oxide film may be used.

  After forming the passivation films 6a and 6b, in step S006, as shown in FIG. 3C, the current collector electrodes 7a and 7b made of a metal paste are formed on the passivation films 6a and 6b by screen printing. Form. The width of the current collecting electrode 7a on the light receiving surface 1A side is preferably as narrow as possible to suppress light shielding, but the current collecting resistance increases. Therefore, it is desirable that the collector electrode 7a on the light receiving surface 1A side has a large layer thickness, and a screen printing method may be used in which the current collector electrode 7a is repeatedly stacked in the same pattern. And the solar cell shown to Fig.1 (a) and (b) is formed through baking step S007. In the first embodiment, the width of the bus electrode 7aB of the current collecting electrode 7a on the light receiving surface 1A side is 70 μm, and the layer thickness is 40 μm. In addition to screen printing, a plating method or the like may be used. The collecting electrode 7b on the back surface 1B side can also be formed on the passivation film 6b by full-surface printing. After the collector electrode 7a on the light receiving surface 1A side and the collector electrode 7b on the back surface 1B side are printed, baking is performed.

  A solar cell is formed through the above steps, and the impurity element diffusion method of Embodiment 1 will be described in detail. FIG. 4 corresponds to the substrate 107 inserted into the child boat 108 in FIG. FIG. 4 shows a state in which the solar cell forming substrate 10 and the diffusion control substrate 20 which are substrates to be processed are viewed from the substrate alignment direction. The solar cell forming substrate 10 is an n-type single crystal silicon substrate 1 on which a diffusion source for forming a solar cell is formed. As shown in FIG. A p-type diffusion layer 2 and a silicon oxide layer 3 are formed on the light receiving surface 1A side, and an n-type diffusion source layer 4a is formed on the back surface 1B side. The substrate 107 placed on the child boat 108 is composed of a type single crystal silicon substrate 1 and a diffusion control substrate 20 made of a non-doped single crystal silicon substrate having the same size as the n type single crystal silicon substrate 1. Yes. Although the diffusion control substrate 20 is a substrate having a flat surface, the diffusion control substrate 20 may have an uneven structure similar to the texture 1T of the n-type single crystal silicon substrate 1 shown in FIG. This n-type single crystal silicon substrate 1 shows the substrate in the state shown in FIG. 2D, and has an n-type diffusion source layer 4a containing an n-type impurity diffusion component on one substrate surface, that is, the back surface 1B side. The substrate having the p-type diffusion layer 2 of the opposite conductivity type to the first conductivity type on the other substrate surface, that is, the light receiving surface 1A side.

  When a non-doped single crystal silicon substrate is used as the diffusion control substrate 20, since there is no diffusion of impurities from the diffusion control substrate 20, the amount of impurities returning to the n-type single crystal silicon substrate 1 does not increase, and controllability is good. There is the feature that it is. Further, a defective wafer having a defect may be used among the wafers cut out from the end portion of the ingot obtained in the same single crystal pulling process as the n-type single crystal silicon substrate 1 used for the solar cell forming substrate 10. . In this case, the diffusion control substrate 20 having a texture can be obtained by performing the same process up to the texture formation step in the solar cell formation step and using this as the diffusion control substrate. Further, a defective wafer to be rejected can be used without increasing the number of manufacturing steps, and can be used without increasing the cost. Further, the diffusion control substrate 20 may be cleaned together with the jig in the cleaning process of the thermal diffusion furnace, or can be repeatedly used by cleaning together with the cleaning process of the solar cell forming substrate 10.

  Further, when a wafer containing the same impurity element at the same concentration as the diffusion layer formed in the diffusion process is used as the diffusion control substrate 20, it is possible to realize diffusion with a higher precision impurity concentration. It becomes.

  The method of disposing the n-type single crystal silicon substrate 1 on which the n-type diffusion source layer 4a is formed and the diffusion control substrate 20 as the solar cell forming substrate 10 and the diffusion control substrate 20 on the child boat 108 is as follows. The formation substrates 10 are arranged so that the n-type diffusion source layer 4a faces outward and the p-type diffusion layer 2 faces inward, and then the diffusion control substrate 20 is placed on both sides of the two solar cell formation substrates 10. Are arranged one by one, and then two solar cell forming substrates 10 are repeatedly arranged side by side with the n-type diffusion source layer 4a facing outward and the p-type diffusion layer 2 facing inward. To do. Here, the p-type diffusion layer 2 on the light receiving surface 1A side is a diffusion layer formed by diffusing the boron layer 2a, which is a p-type diffusion source, to the surface of the n-type single crystal silicon substrate 1 by heat treatment. When the heat treatment temperature when forming the diffusion layer is equal to or higher than the diffusion temperature of the p-type impurity, it also acts as a diffusion source.

  A child boat 108 on which a substrate group to be processed on which a plurality of solar cell forming substrates 10 arranged in this manner are arranged and a diffusion control substrate 20 is placed is placed on a parent boat 116, and the quartz tube 100 Transfer to In the quartz tube 101, the diffusion source layer 4 a is thermally diffused by applying heat with the heater 110. When heated by a heater, there are components that diffuse outward from the substrate in addition to components that diffuse from the diffusion source layer 4a into the substrate. Since the diffusion source layer 4a of the n-type single crystal silicon substrate 1 that is the solar cell forming substrate 10 faces the diffusion control substrate 20, the diffusion control substrate 20 is diffused outwardly from the left and right diffusion source layers 4a. Although the components adhere, since the diffusion control substrate 20 serves as a barrier, the outward diffusion between the adjacent n-type single crystal silicon substrates 1 is suppressed to the extent of reaching each other.

As for the diffusion control substrate 20, when a substrate having a concavo-convex structure on the surface is used, the diffusion control substrate 20 and the diffusion control substrate 20 in the state of FIG. In the adjacent n-type single crystal silicon substrate 1, the sheet resistance value measured from the direction A <b> 1 is low, and the in-plane uniformity is high. Such an effect is considered to be due to the fact that the surface area of the substrate is larger when the surface has a concavo-convex structure than when the surface is a flatter structure. The amount of phosphorus deposited on the diffusion control substrate 20 by a gas phase such as POCl ₃ is larger when the surface area of the diffusion control substrate 20 is larger than when the surface area is small. Is considered to bring about an effect of depositing on the n-type single crystal silicon substrate 1 constituting the adjacent solar cell forming substrate 10.

In the first embodiment, when a diffusion layer having a selective resistance pattern is formed in the substrate surface, an object is to suppress outward diffusion caused by the diffusion source layer 4a used for forming the low resistance region. However, as shown in the cross-sectional view of FIG. 9, when a substrate having a concavo-convex structure on the surface is used as the diffusion control substrate 20, POCl ₃ has the effect of increasing the low resistance effect by the diffusion agent of the diffusion source layer 4a. It can be said that the diffusing agent can be reduced. For high resistance control, the diffusion control substrate 20 is preferably a substrate having a flatter surface.

  As described above, according to the impurity diffusion method using the impurity diffusion device of the first embodiment, the outward diffusion from the semiconductor substrate for forming the solar cell forming substrate 10 mainly occurs in the diffusion control substrate 20, Outdiffusion to other n-type single crystal silicon substrates 1 can be suppressed.

  Further, according to the impurity diffusion device used in the first embodiment, the first interval formed between the light receiving surface 10A, which is the first main surface of the solar cell forming substrate 10, and the diffusion control substrate 20 is: It is desirable to make it larger than the second interval formed between the back surfaces 10B as the second main surface. Thereby, the influence of the wraparound due to the outward diffusion of the diffusing agent to the opposing second conductivity type substrate surface is suppressed.

According to the impurity diffusion device used in the first embodiment, selective diffusion is efficiently realized from the dopant paste selectively formed on the back surface 10B. An impurity diffusion source that realizes impurity diffusion to the back surface 10B contains gas, and the low-concentration n-type diffusion layer 5 is formed from the phosphorus layer deposited from POCl ₃ .

  Note that the diffusion control substrate 20 is not limited to a textured non-doped single crystal silicon substrate, and for example, doped single crystal silicon, a silicon-based substrate such as polycrystalline silicon, or a substrate such as quartz is used. It is possible.

Embodiment 2. FIG.
The impurity diffusion method according to the second embodiment has a feature in the configuration of the diffusion source layer and the diffusion layer as compared with the first embodiment. In the first embodiment, selective diffusion using an n-type diffusion source layer is performed. In the second embodiment, selective diffusion using a p-type diffusion source layer is also performed. Below, the manufacturing method of the solar cell of Embodiment 2 is demonstrated.

  10A and 10B are diagrams showing a solar cell formed by the method for manufacturing a solar cell according to the second embodiment. FIG. 10A is a top view, and FIG. 10B is a cross-sectional view taken along line AA in FIG. 11 (a) to 11 (d) and FIGS. 12 (a) to 12 (c) are process cross-sectional views illustrating the method for manufacturing the solar cell of the second embodiment. FIG. 13 and FIG. 14 are schematic diagrams showing a diffusion step in the method for manufacturing the solar cell of the second embodiment, and FIG. 15 is a flowchart showing the method for manufacturing the solar cell of the second embodiment.

  The solar cell of this embodiment selectively supplies the first conductivity type impurity having a lower concentration than the first conductivity type impurity diffusion source to the semiconductor substrate on which the first conductivity type impurity diffusion source is formed. However, impurity diffusion is performed to form a first conductivity type high concentration diffusion layer and a first conductivity type low concentration diffusion layer, and a first conductivity type high concentration is formed on the first main surface. A diffusion layer and a first conductivity type low-concentration diffusion layer are formed, and a second conductivity type impurity diffusion is formed in a semiconductor substrate on which a second conductivity type impurity diffusion source is selectively formed on the second main surface. Second diffusion step of forming a second conductivity type high concentration diffusion layer and a second conductivity type low concentration diffusion layer by performing impurity diffusion while supplying a second conductivity type impurity having a lower concentration than the source And obtained.

  First, in start step S000, as shown in FIG. 11A, an n-type single crystal silicon substrate 11 which is a semiconductor substrate is prepared as in FIG. 2A of the first embodiment.

  In FIG. 11B, as in FIG. 2B, an uneven structure called texture 11T is formed on the surface of the n-type single crystal silicon substrate 11 in step S101.

  After forming the concavo-convex structure, as shown in FIG. 11C, a p-type diffusion source layer 12a is formed on one surface of the n-type single crystal silicon substrate 11 with a paste or the like. In step S102, the same quartz as in FIG. It is diffused by applying heat with an impurity diffusion apparatus using a tube furnace.

  Next, in step S103 of forming a silicon oxide layer, the boron layer 13 and the silicon oxide layer 14 are formed in this order using the atmospheric pressure chemical vapor deposition method, thereby obtaining a structure as shown in FIG. It is done. The boron layer 13 may have a thickness of 30 nm to 50 nm, and the silicon oxide layer 14 may have a thickness of 50 nm to 500 nm. When the boron layer 13 and the silicon oxide layer 14 are formed, the substrate is then heated to diffuse boron, and the boron layer 13 becomes a low-concentration p-type diffusion layer.

Next, as shown in FIG. 12A, in the n-type diffusion source layer and diffusion layer forming step S104, a high-concentration n-type diffusion source layer 15a is formed, and then diffused, and the high-concentration n-type diffusion layer 15 and A low concentration n-type diffusion layer 16 is formed. Note that the diffusion source layer 15a is the same n-type as phosphorus described later. Subsequently, phosphorus is thermally diffused in the gas phase, whereby a diffusion layer having a selective resistance pattern can be formed in the substrate surface. The n-type diffusion source layer 15a described above is preferably subjected to paste printing, for example. For the phosphorus diffusion in the gas phase, for example, gas phase POCl ₃ can be used.

  Here, when phosphorous diffusion is carried out in the gas phase, a phosphorous diffusion layer is formed on both sides of the substrate, and a high concentration layer of phosphorous is formed near the substrate surface. The boron layer forming surface 11A or the phosphorus in the thickness direction of the substrate and the back surface 11B which is the other surface of the substrate, that is, the high concentration layer of phosphorus on the surface on which the n-type diffusion source layer 15a is formed are removed using, for example, HF By doing so, a structure as shown in FIG. 12B is obtained. The low concentration n-type diffusion layer 16 is formed by diffusion from a diffusion source containing phosphorus formed by a gas phase.

  Although FIG. 12B shows the silicon oxide layer 14, it may be removed during the above-described processing such as HF. Next, as shown in FIG. 12C, passivation films 17a and 17b are formed. As the passivation films 17a and 17b, for example, an insulating film such as a silicon nitride film or a silicon oxide film may be used, or a laminated structure thereof may be used.

  In step S105, passivation films 17a and 17b are formed. Thereafter, in electrode pattern forming step S106, current collecting electrodes 18a and 18b made of metal paste are formed on the passivation films 17a and 17b by screen printing. The width of the current collecting electrode 18a on the light receiving surface side is preferably as narrow as possible in order to suppress light shielding, but the resistance increases. Therefore, it is desirable that the current collecting electrode 18a on the light receiving surface side has a large layer thickness, and a screen printing method may be used so as to repeatedly overlap the same pattern. In the present embodiment, the collector electrode 18a on the light receiving surface side has a width of 70 μm and a layer thickness of 40 μm. In addition to screen printing, a plating method or the like may be used. The current collecting electrode 18b on the back side can also be formed on the passivation film 17b by printing on the entire surface. After printing the current collecting electrode 18a on the light receiving surface side and the current collecting electrode 18b on the back surface side, firing is performed in a firing step S107, and the current collecting electrodes 18a and 18b penetrate through the passivation films 17a and 17b by the fire-through, respectively. The p-type diffusion layer 12 and the high-concentration n-type diffusion layer 15 are contacted.

  Although the solar cell is formed through the above steps, the impurity element diffusion method of Embodiment 2 will be described in detail. FIG. 13 shows a state where the substrate inserted into the sub boat 108 in FIG. 8 is viewed from the substrate alignment direction. The diffusion control substrate 20 in the second embodiment is composed of the diffusion control substrate 20 having the same size as the solar cell forming substrate 10, but the diffusion control substrate 20 is characterized by having an uneven structure. The solar cell forming substrate 10 is a substrate in the state shown in FIG. 11C, and has a p-type diffusion source layer 12a including a p-type impurity diffusion component on one substrate surface. The diffusion control substrate 20 is the same as that used in the first embodiment, and may be a substrate such as silicon or quartz. The method of arranging the solar cell forming substrate 10 and the diffusion control substrate 20 on the child boat 108 is as follows. First, the two solar cell forming substrates 10 are arranged so that the p-type diffusion source layer 12a faces outward, and then In addition, one diffusion control substrate 20 is arranged on both sides of the two solar cell substrates described above, and then two solar cell forming substrates 10 are arranged, and a p-type diffusion source layer 12a is arranged outside. Arrange them repeatedly so that they face each other.

  The child boat 108 on which the plurality of solar cell substrates 10 and the diffusion control substrate 20 arranged in this manner are placed is placed on the parent boat 116 and transferred into the quartz tube 101. In the quartz tube 101, the p-type diffusion source layer 12 a is thermally diffused by applying heat with the heater 110. When heated by the heater 110, there is a component that diffuses outward from the substrate in addition to a component that diffuses from the p-type diffusion source layer 12a into the substrate. Since the p-type diffusion source layer 12a of the solar cell forming substrate 10 faces the diffusion control substrate 20, the outward diffusion components from the adjacent left and right p-type diffusion source layers 12a adhere to the diffusion control substrate 20. However, since the diffusion control substrate 20 serves as a barrier, the outward diffusion between the substrates of the adjacent solar cell formation substrates 10 is suppressed from reaching each other.

  FIG. 14 shows a state in which the solar cell forming substrate 10 in the state of FIG. 12A inserted in the child boat 108 in FIG. 8 is viewed from the substrate alignment direction. Although the diffusion control board 30 in this Embodiment is comprised from the board | substrate of the same magnitude | size as the solar cell formation board | substrate 10, the diffusion control board 30 has the characteristic in having an uneven structure. Solar cell forming 10 shows the substrate in the state shown in FIG. 12A, and the p-type diffusion containing the same p-type impurity diffusion component as the diffusion source layer 12a containing the p-type impurity diffusion component on one substrate surface. This is a substrate having a layer 12a and an n-type diffusion source layer 15a containing an n-type impurity diffusion component on the other substrate surface. The diffusion control substrate 30 may be a substrate such as silicon or quartz. The method of disposing the solar cell forming substrate 10 and the diffusion control substrate 30 on the sub-boat 108 is as follows. First, the two solar cell forming substrates 10 are arranged so that the n-type diffusion source layer 15a faces the outside. In addition, one diffusion control substrate 30 is disposed on each side of the two solar cell formation substrates 10 described above, and then two solar cell formation substrates 10 are arranged with an n-type diffusion source layer 15a. Arrange them repeatedly so that they face outward.

  The child boat 108 on which the plurality of solar cell forming substrates 10 and the interpolating diffusion control substrate 30 placed in this manner are placed is placed on the parent boat 116 and transferred into the quartz tube 100. To do. In the quartz tube 101, the diffusion source layer 5 a is thermally diffused by applying heat with the heater 110. When heated by the heater 110, there is a component that diffuses outward from the substrate in addition to a component that diffuses from the n-type diffusion source layer 15a into the substrate. Since the n-type diffusion source layer 15a of the solar cell forming substrate 10 faces the diffusion control substrate 30, the outward diffusion components from the adjacent left and right n-type diffusion source layers 15a adhere to the diffusion control substrate 30. However, since the diffusion control substrate 30 serves as a barrier, the extent of the outward diffusion between the adjacent solar cell forming substrates 10 is suppressed.

  In the solar cell thus obtained, the concentration of the first conductivity type impurity, that is, boron on the back surface 10B is lower than the boron concentration other than the high concentration region on the light receiving surface 10A. This is because the formation of impurities could be prevented as a result of suppressing the influence of wraparound due to the outward diffusion of the diffusing agent to the opposing substrate surface. Therefore, generation of leakage current can be suppressed.

When a substrate having a concavo-convex structure on the surface is used as the diffusion control substrate 30, the diffusion control substrate 30 and the substrate in the state of FIG. In the adjacent solar cell forming substrate 10, the sheet resistance value measured from the direction A <b> 3 is reduced, and the in-plane uniformity is good. The above effect is considered due to the fact that the surface area of the diffusion control substrate 30 is larger when the surface has an uneven structure than when the surface is a flatter structure. The amount of phosphorus deposited on the diffusion control substrate 30 by a gas phase such as POCl ₃ is larger when the surface area of the diffusion control substrate 30 is larger than when the surface area is small. Is considered to bring about an effect of depositing on the adjacent solar cell forming substrate 10.

The purpose of Embodiment 2 is to suppress outward diffusion caused by a diffusing agent used for forming a low resistance region when a diffusion layer having a selective low resistance pattern is formed in the substrate surface. When a substrate having a concavo-convex structure on the surface is used as the diffusion control substrate 30, it can be said that POCl ₃ has an effect of increasing the low resistance effect by the diffusing agent, and the diffusing agent can be reduced. For high resistance control, the diffusion control substrate 30 may be a substrate having a flatter surface.

  Further, the diffusion control substrate 30 is not limited to a non-doped single crystal silicon substrate having a texture formed, like the diffusion control substrate 20 used in the first embodiment. For example, doped single crystal silicon or polycrystalline silicon may be used. It is possible to use a silicon-based substrate such as quartz or a substrate such as quartz.

  In the solar cell manufacturing method using the impurity diffusion method of the second embodiment described above, in the first diffusion step shown in FIG. 13, the semiconductor in which the first conductivity type impurity diffusion source is selectively formed. Impurity diffusion is performed while supplying a first conductivity type impurity having a lower concentration than the first conductivity type impurity diffusion source to the substrate, and a first conductivity type high concentration diffusion layer and a first conductivity type low concentration are provided. Forming a diffusion layer. In the second diffusion step shown in FIG. 14, a conductive type high concentration diffusion layer and a first conductivity type low concentration diffusion layer are formed on the first main surface, and selective on the second main surface. In addition, impurity diffusion is performed while supplying a second conductivity type impurity having a concentration lower than that of the second conductivity type impurity diffusion source to the semiconductor substrate on which the second conductivity type impurity diffusion source is formed. And a second conductivity type low concentration diffusion layer.

  In any of the steps shown in FIG. 13 and FIG. 14, the diffusion control substrate 20 having the concavo-convex structure and the diffusion control substrate 30 having the concavo-convex structure are used, and therefore, outward diffusion from the solar cell forming substrate 10 is mainly performed. It is possible to suppress the outward diffusion to other solar cell forming substrates 10 that occurs in the adjacent diffusion control substrate 20 and the diffusion control substrate 30. Here, the surface states of the diffusion control substrate 20 and the diffusion control substrate 30 are formed so as to have appropriate uneven density.

  Also in the second embodiment, the first interval formed between the light receiving surface 10A of the solar cell forming substrate 10 and the diffusion control substrate 20 is the second interval formed between the back surfaces 10B. It is desirable to make it larger than the interval. As a result, abnormal diffusion due to the influence of wraparound due to outward diffusion of the diffusing agent on the opposing second conductivity type substrate surface is suppressed, and a diffusion layer having an impurity concentration as designed is stably and efficiently formed. be able to.

Embodiment 3 FIG.
In the first and second embodiments, the two solar cell forming substrates are arranged with the p-type diffusion layer forming surface inside, but as shown in FIG. 16, the solar cell forming substrate 10 is formed. The first main surfaces 10A may be arranged so as to overlap each other. The present embodiment is the same as Embodiment 1 except that a gap is not formed between the first main surfaces 10A of the solar cell forming substrate 10 but directly stacked.

  According to the third embodiment, in addition to suppressing the influence of wraparound due to the outward diffusion of the diffusing agent to the opposing second conductivity type substrate surface, the number of substrates that can be processed at a time is increased and the mass production efficiency is improved. Become. In FIG. 16, the sub boat 108 is omitted, but a holder made of an elastic body may be added so that the solar cell forming substrates 10 can be directly stacked on the sub boat.

  FIG. 16 is a modification of the method for manufacturing the solar cell according to the first embodiment shown in FIG. 4, but in the diffusion step in the method for manufacturing the solar cell shown in FIGS. 13 and 14 in the second embodiment. Needless to say, a modification in which the substrates are directly stacked and arranged in the same manner is also effective.

  In the first to third embodiments described above, the impurity diffusion source is a dopant paste and a solid phase diffusion source, so that the high concentration n-type diffusion layers 4 and 15 and the low concentration n-type diffusion layer are particularly formed. In selective doping such as when forming 5 and 16, the handling is easy and it is highly effective when used at the time of diffusion on a substrate, and the effectiveness of the dopant paste is high in a highly useful printing process.

  Further, the configuration of the solar cell is not limited to the diffusion type solar cell used in the embodiment, and a heterojunction type solar cell can be appropriately selected. The present invention can be applied to a solar cell manufacturing method including a heat treatment step at a high temperature.

  Furthermore, although the solar cell has been described in the above embodiment, the present invention is not limited to the solar cell, but can be applied to a semiconductor device having a diffusion layer of another conductivity type on the first main surface and the second main surface. Needless to say.

  1 n-type single crystal silicon substrate, 2a boron layer, 3 silicon oxide layer, 4a diffusion source layer, 4 n-type diffusion layer, 5 low-concentration n-type diffusion layer, 6a, 6b passivation film, 7a, 7b current collecting electrode, DESCRIPTION OF SYMBOLS 10 Solar cell formation substrate, 20, 30 Diffusion control substrate, 11 n-type single crystal silicon substrate, 12a p-type diffusion source layer, 13 boron layer, 14 silicon oxide layer, 15a n-type diffusion source layer, 15 high concentration N-type diffusion layer, 16 low-concentration n-type diffusion layer, 17a, 17b passivation film, 18a, 18b current collecting electrode, 100 impurity diffusion device, 101 quartz tube, 102 diffusion gas introduction tube, 103 diffusion gas introduction direction 104 diffusion gas discharge port, 105 diffusion gas discharge direction, 106a, 106b heat barrier, 107 substrate, 108 child boat, 109 end, 1 0 Heater, 111 diffusing gas generator, 112 diffusion source container 113 liquid diffusion source, 114 a source gas inlet pipe, 115 a carrier gas inlet, 116 a parent boat.

Claims (14)

For a semiconductor substrate having a first main surface on which an impurity diffusion source of the first conductivity type is formed and a second main surface opposite to the first main surface,
Supplying a second conductivity type impurity diffusion source to the second main surface;
A method of manufacturing a semiconductor device including an impurity diffusion step of forming a first conductivity type diffusion layer on the first main surface and a second conductivity type diffusion layer on the second main surface,
Between the first and second target substrate groups configured by arranging the two semiconductor substrates so as to face each other with the first main surface facing inward,
A semiconductor device comprising: a heat diffusion step of performing a heat treatment by sandwiching at least one diffusion control substrate at a position where the second main surface faces between the first and second substrate groups to be processed. Production method.   The method of manufacturing a semiconductor device according to claim 1, wherein the diffusion control substrate has irregularities in a region facing the second main surface of the semiconductor substrate.   The first interval formed between the second main surface and the diffusion control substrate is larger than a second interval formed between the first main surfaces. Or the manufacturing method of the semiconductor device of 2.   4. The semiconductor device according to claim 1, wherein the first and second target substrate groups are arranged such that the first main surfaces of the semiconductor substrate are directly overlapped with each other. 5. Manufacturing method.   5. The method of manufacturing a semiconductor device according to claim 1, wherein impurity diffusion is selectively performed on at least one of the first main surface and the second main surface. 6.   6. The method for manufacturing a semiconductor device according to claim 1, wherein the second conductivity type impurity diffusion source is a dopant paste selectively formed on the second main surface. .   The method of manufacturing a semiconductor device according to claim 1, wherein the impurity diffusion source that realizes impurity diffusion into the second main surface includes a gas.   The method of manufacturing a semiconductor device according to claim 1, wherein the diffusion control substrate is formed of the same material as the semiconductor substrate.   The method of manufacturing a semiconductor device according to claim 1, wherein the diffusion control substrate is a silicon substrate having a texture.   10. The method of manufacturing a semiconductor device according to claim 9, wherein the diffusion control substrate is a semiconductor wafer formed in the same process as the semiconductor substrate up to a texture formation process. The thermal diffusion step diffuses the second conductivity type impurity to the second main surface in a gas atmosphere containing the second conductivity type impurity,
11. The method of manufacturing a semiconductor device according to claim 1, wherein the first conductivity type impurity is diffused from the first conductivity type impurity diffusion source to the first main surface. 11. . It is a manufacturing method of the solar cell containing the manufacturing method of the semiconductor device of any one of Claim 1 to 11,
The thermal diffusion step includes
Forming a first conductivity type impurity diffusion source on a first main surface of a semiconductor substrate having a second conductivity type;
Supplying a second conductivity type impurity diffusion source to a part of the second main surface of the semiconductor substrate;
And a diffusion step of diffusing the first conductivity type impurity and the second conductivity type impurity into the semiconductor substrate from the first conductivity type impurity diffusion source and the second conductivity type impurity diffusion source. A method for manufacturing a solar cell. The diffusion step includes
An impurity diffusion is performed while supplying a first conductivity type impurity having a concentration lower than that of the first conductivity type impurity diffusion source to the semiconductor substrate on which the first conductivity type impurity diffusion source is selectively formed. A first diffusion step of forming a high conductivity diffusion layer of one conductivity type and a low concentration diffusion layer of the first conductivity type;
The first conductivity type high concentration diffusion layer and the first conductivity type low concentration diffusion layer are formed on the first main surface, and the second conductivity type impurity diffusion is selectively formed on the second main surface. Impurity diffusion is performed while supplying a second conductivity type impurity having a lower concentration than the second conductivity type impurity diffusion source to the semiconductor substrate on which the source is formed, and a second conductivity type high concentration diffusion layer; The method for manufacturing a solar cell according to claim 12, further comprising a second diffusion step of forming a second conductivity type low-concentration diffusion layer. A solar cell manufactured by the method for manufacturing a solar cell according to claim 12 or 13,
The solar cell, wherein a concentration of the first conductivity type impurity on the second main surface is lower than a concentration of the first conductivity type impurity on the first main surface.

Images