JP2016127075A - Semiconductor device manufacturing method - Google Patents
Semiconductor device manufacturing method Download PDFInfo
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- JP2016127075A JP2016127075A JP2014265373A JP2014265373A JP2016127075A JP 2016127075 A JP2016127075 A JP 2016127075A JP 2014265373 A JP2014265373 A JP 2014265373A JP 2014265373 A JP2014265373 A JP 2014265373A JP 2016127075 A JP2016127075 A JP 2016127075A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 149
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 42
- 238000007747 plating Methods 0.000 claims abstract description 155
- 229910052751 metal Inorganic materials 0.000 claims abstract description 107
- 239000002184 metal Substances 0.000 claims abstract description 107
- 239000000758 substrate Substances 0.000 claims abstract description 51
- 239000011347 resin Substances 0.000 claims abstract description 50
- 229920005989 resin Polymers 0.000 claims abstract description 50
- 238000000034 method Methods 0.000 claims abstract description 22
- 238000007789 sealing Methods 0.000 claims description 6
- 229910000510 noble metal Inorganic materials 0.000 description 23
- 238000007796 conventional method Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000004090 dissolution Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
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Abstract
Description
本発明は、半導体装置の製造方法に関する。 The present invention relates to a method for manufacturing a semiconductor device.
従来、ＥＬＰ（Ｅｔｃｈｅｄ Ｌｅａｄｌｅｓｓ Ｐａｃｋａｇｅ）構造の配線を有する表面実装型の樹脂封止型半導体装置は、金属板上に、内部端子、外部端子及び配線部を金属めっきで形成した基板を用いて製造されている。
そして、従来、このような構造の半導体装置の製造方法は、例えば、次の特許文献１に記載されている。
2. Description of the Related Art Conventionally, a surface-mount type resin-encapsulated semiconductor device having an ELP (etched leadless package) structure wiring is manufactured using a substrate in which internal terminals, external terminals, and wiring portions are formed by metal plating on a metal plate. ing.
Conventionally, a method for manufacturing a semiconductor device having such a structure is described in, for example, the following
特許文献１に記載の半導体装置の製造方法には、金属板上に金属板側から外部端子部を有する外部端子面がめっき形成され、その上に中間層が同じ形状でめっき形成され、更にその上に内部端子部を有する内部端子面が同じ形状でめっき形成された基板を用いて、内部端子面の上に半導体素子を搭載し、半導体素子の電極と内部端子を接続し、半導体素子搭載部を樹脂封止した後、基板の一部である金属板を除去し、樹脂裏面に突出している内部端子、外部端子及び配線部である金属めっき層を覆うよう樹脂層を形成し、外部との接続のために外部端子の面が露出するよう樹脂層に開口部を設けることが開示されている。
In the method for manufacturing a semiconductor device described in
しかし、特許文献１に記載の製造方法では、内部端子、外部端子及び配線部としてめっき層により形成された半導体素子搭載部は、例えば生産性を考慮して幅広の金属製の基板に多数のめっき層が３０μｍ程度の高さに形成された場合、めっき条件や装置構成等による製造時のばらつきによって５〜８μｍ程度の高低差が生じることがあり搭載する半導体素子が傾く原因になる。また上述の通り、内部端子、外部端子及び配線部である金属めっき層を覆うよう樹脂層を形成し、更に外部との接続のために外部端子の面のみが露出するよう樹脂層に開口部を設ける工程が必要であり、その分、半導体装置の生産性が悪くなる。
However, in the manufacturing method described in
本発明は、このような問題に鑑みてなされたものであり、半導体素子と電気的接続をする内部端子部の高さのばらつきによる高低差を無くし、搭載する半導体素子の傾きを防止してボンディング等の接続不良によって最終的に導通不良となることを解消できる半導体装置の製造方法と、外部端子部のみが露出する開口部を形成する工程が省略できる半導体装置の製造方法を提供することを目的としている。 The present invention has been made in view of such problems, eliminates the height difference due to the variation in the height of the internal terminal portion electrically connected to the semiconductor element, and prevents the inclination of the mounted semiconductor element for bonding. An object of the present invention is to provide a method for manufacturing a semiconductor device that can eliminate a conduction failure due to a connection failure such as a semiconductor device, and a method for manufacturing a semiconductor device that can omit the step of forming an opening from which only an external terminal portion is exposed. It is said.
上記の目的を達成するために、本発明による半導体装置の製造方法は、金属板上に内部端子となるめっき層が形成され、前記めっき層の上に部分的に外部端子となるめっき層が形成され、前記外部端子となるめっき層表面は、他のめっき層に比べて前記金属板面からの高さが高くなっている半導体装置用基板を用いて、前記外部端子となるめっき層表面が露出する樹脂層を形成し、前記金属板を除去して、形成されためっき層が前記樹脂層により保持された配線部材を作製し、作製した前記配線部材に半導体素子を搭載する工程を含むことを特徴としている。 In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention includes forming a plating layer serving as an internal terminal on a metal plate, and forming a plating layer partially serving as an external terminal on the plating layer. The surface of the plating layer serving as the external terminal is exposed to the surface of the plating layer serving as the external terminal using a substrate for a semiconductor device having a height higher than that of the other plating layer from the metal plate surface. Forming a resin layer, removing the metal plate, producing a wiring member in which the formed plating layer is held by the resin layer, and mounting a semiconductor element on the produced wiring member. It is a feature.
また、本発明による半導体装置の製造方法は、金属板上に内部端子となるめっき層が形成され、前記めっき層の上に部分的に外部端子となるめっき層が形成され、前記外部端子となるめっき層表面は、他のめっき層に比べて前記金属板面からの高さが、高くなっている半導体装置用基板に、前記外部端子となるめっき層表面が露出する樹脂層を形成し、前記金属板を除去して、形成されためっき層が前記樹脂層により保持された配線部材を作製し、作製した前記配線部材の前記金属板側であった前記内部端子となるめっき層の面側に半導体素子を搭載する工程を含むことを特徴としている。 Further, in the method for manufacturing a semiconductor device according to the present invention, a plating layer to be an internal terminal is formed on a metal plate, and a plating layer to be an external terminal is partially formed on the plating layer to become the external terminal. The plating layer surface is formed with a resin layer in which the plating layer surface serving as the external terminal is exposed on the substrate for a semiconductor device, the height from the metal plate surface of which is higher than other plating layers, The metal plate is removed, a wiring member in which the formed plating layer is held by the resin layer is manufactured, and on the surface side of the plating layer serving as the internal terminal that is the metal plate side of the manufactured wiring member It includes a step of mounting a semiconductor element.
また、本発明による半導体装置の製造方法は、金属板上に内部端子となるめっき層が形成され、前記めっき層の上に部分的に外部端子となるめっき層が形成され、前記外部端子となるめっき層表面は、他のめっき層に比べて前記金属板面からの高さが、高くなっている半導体装置用基板に、前記外部端子となるめっき層表面が露出する樹脂層を形成し、前記金属板を除去して、形成されためっき層が前記樹脂層により保持された配線部材を作製し、作製した前記配線部材の前記金属板側であった前記内部端子となるめっき層の面側に半導体素子を搭載して該半導体素子の電極と前記内部端子との導通を取り、半導体素子搭載部分を樹脂封止する工程を含むことを特徴としている。 Further, in the method for manufacturing a semiconductor device according to the present invention, a plating layer to be an internal terminal is formed on a metal plate, and a plating layer to be an external terminal is partially formed on the plating layer to become the external terminal. The plating layer surface is formed with a resin layer in which the plating layer surface serving as the external terminal is exposed on the substrate for a semiconductor device, the height from the metal plate surface of which is higher than other plating layers, The metal plate is removed, a wiring member in which the formed plating layer is held by the resin layer is manufactured, and on the surface side of the plating layer serving as the internal terminal that is the metal plate side of the manufactured wiring member The semiconductor device includes a step of mounting a semiconductor element, establishing conduction between the electrode of the semiconductor element and the internal terminal, and sealing the semiconductor element mounting portion with a resin.
また、本発明の半導体装置の製造方法においては、前記内部端子となるめっき層と前記外部端子となるめっき層の間に、別の金属によるめっき層が形成されているのが好ましい。 In the method for manufacturing a semiconductor device of the present invention, it is preferable that a plating layer made of another metal is formed between the plating layer to be the internal terminal and the plating layer to be the external terminal.
本発明によれば、半導体素子を搭載する内部端子面および半導体素子と電気的接続をする内部端子部の高さを均一な基板であり、半導体装置製造時の外部端子部のみが露出する開口部を形成する工程が省略できることから、工程数を削減して生産性を向上させることができる樹脂封止型半導体装置を製造可能な方法が得られる。 According to the present invention, the height of the internal terminal surface on which the semiconductor element is mounted and the internal terminal portion that is electrically connected to the semiconductor element is a uniform substrate, and the opening that exposes only the external terminal portion when the semiconductor device is manufactured Therefore, a method capable of manufacturing a resin-encapsulated semiconductor device capable of reducing the number of steps and improving productivity can be obtained.
実施形態の説明に先立ち、本発明の作用効果について説明する。
本発明の半導体装置の製造方法に用いる半導体装置用基板は、金属板を除去した後に半導体素子を搭載する配線部材となる半導体装置用基板であり、例えば、金属板上における所定部位に金属板側から内部端子となる第１の貴金属めっき層が形成され、第１の貴金属めっき層の上に第１の貴金属めっき層と同一形状で金属めっき層が形成され、更に金属めっき層の上に部分的に第２の金属めっき層が形成され、第２の金属めっき層と同一形状で外部端子となる第２の貴金属めっき層が形成されており、第２の貴金属めっき層表面の金属板面からの高さが、金属めっき層表面の金属板面からの高さに比べて高くなっている。
この半導体装置用基板は、内部端子部及び配線部とは厚みの異なる外部端子部を予め設けられているために、半導体装置の製造工程において内部端子及び配線部を樹脂で封止し、外部端子のみを露出させることが容易にできる。このため、この半導体装置用基板を用いると、従来の半導体装置用基板とは異なり半導体装置の製造過程で外部部材との接続面に開口部を形成する工程が不必要となり、その分、半導体装置の製造時の工程数が減少し生産性が向上する。
Prior to the description of the embodiment, the function and effect of the present invention will be described.
The substrate for a semiconductor device used in the method for manufacturing a semiconductor device of the present invention is a substrate for a semiconductor device that becomes a wiring member on which a semiconductor element is mounted after the metal plate is removed. A first noble metal plating layer serving as an internal terminal is formed, a metal plating layer having the same shape as the first noble metal plating layer is formed on the first noble metal plating layer, and further partially on the metal plating layer A second metal plating layer is formed, and a second noble metal plating layer that is the same shape as the second metal plating layer and serves as an external terminal is formed from the metal plate surface of the surface of the second noble metal plating layer. The height is higher than the height of the metal plating layer surface from the metal plate surface.
Since this semiconductor device substrate is provided with an external terminal portion having a thickness different from that of the internal terminal portion and the wiring portion in advance, the internal terminal and the wiring portion are sealed with resin in the manufacturing process of the semiconductor device. It can be easily exposed only. For this reason, when this semiconductor device substrate is used, unlike the conventional semiconductor device substrate, a step of forming an opening in the connection surface with the external member is not required in the manufacturing process of the semiconductor device. The number of processes at the time of manufacturing is reduced and productivity is improved.
この点について、詳述する。
本件出願人は、試行錯誤の末、半導体装置を製造する際に用いる半導体装置用基板における内部端子と外部端子の電気的な接続面を、従来の半導体装置用基板とは逆にすることを着想した。
This point will be described in detail.
The applicant of the present application has come up with the idea that, after trial and error, the electrical connection surfaces of the internal terminals and external terminals in the semiconductor device substrate used when manufacturing the semiconductor device are reversed from those of the conventional semiconductor device substrate. did.
即ち、従来の半導体装置用基板では、半導体装置を製造する際には、外部端子面は金属板側の面、内部端子面は金属板とは反対側の面を露出させた状態で用いるように構成されている。
これに対し、本発明に使用する半導体装置用基板では、半導体装置を製造する際には、外部端子面は金属板とは反対側の面、内部端子面は金属板側の面を露出させた状態で用いるように形成され、内部端子部及び配線部を構成するめっき層よりも外部端子部を構成するめっき層を金属板から高くなるように構成されている。
That is, in the conventional semiconductor device substrate, when manufacturing a semiconductor device, the external terminal surface is used with the metal plate side surface exposed, and the internal terminal surface is used with the surface opposite to the metal plate exposed. It is configured.
On the other hand, in the semiconductor device substrate used in the present invention, when manufacturing the semiconductor device, the external terminal surface is the surface opposite to the metal plate, and the internal terminal surface is exposed to the metal plate side surface. The plating layer that is formed so as to be used in a state and that constitutes the external terminal portion is higher than the plating layer that constitutes the internal terminal portion and the wiring portion.
例えば、本発明の半導体装置の製造方法に使用する半導体装置用基板における端子が設けられている側を樹脂で封止し、樹脂封止後に金属板をエッチングによる溶解等により除去すると、金属板除去後には、金属板を除去した側の内部端子となる第１の貴金属めっき層の面が金属板の表面に倣って段差のない（高低差１μｍ以下の）状態で露出することになる。この金属板は、リードフレーム等に使用される入手可能な一般的な圧延材である。
ここで、従来の半導体装置用基板を用いた半導体装置と同様に、第１の貴金属めっき層上に半導体素子を搭載するが、第１の貴金属めっき層の面が段差のない状態で露出しているので、接続する面は全体がフラットであるため、半導体素子が傾くことも無く、複数の内部端子部も均一な高さであるので半導体素子の電極とも接続が安定する。
そして、外部端子部は金属板側とは反対側の面を露出させる必要があるが、金属板上における、内部端子部、外部端子部及び配線部となる部位に貴金属めっき、金属めっきを施した後、従来の半導体装置用基板とは異なり、更に、外部端子となる部位のみに、さらに金属めっき及び貴金属めっきを積み増して施すことで、内部端子部、配線部とは高低差のある外部端子を形成させた半導体装置用基板を用いることで外部端子部の面を露出させた樹脂層を容易に形成できると共に、外部端子部の面を露出させる工程を省略することができる。
For example, if the side of the substrate for a semiconductor device used in the method for manufacturing a semiconductor device of the present invention is sealed with resin, and the metal plate is removed by dissolution or the like after the resin sealing, the metal plate is removed. Later, the surface of the first noble metal plating layer serving as the internal terminal on the side from which the metal plate has been removed is exposed in a state where there is no step (the height difference is 1 μm or less) following the surface of the metal plate. This metal plate is an available general rolled material used for lead frames and the like.
Here, as in a semiconductor device using a conventional substrate for a semiconductor device, a semiconductor element is mounted on the first noble metal plating layer, but the surface of the first noble metal plating layer is exposed without a step. Therefore, since the entire surface to be connected is flat, the semiconductor element does not tilt, and the plurality of internal terminal portions have a uniform height, so that the connection with the electrodes of the semiconductor element is stable.
And although the external terminal part needs to expose the surface opposite to the metal plate side, noble metal plating and metal plating were applied to the parts to be the internal terminal part, external terminal part and wiring part on the metal plate. Later, unlike the conventional semiconductor device substrate, further, by applying additional metal plating and precious metal plating only to the portion to be the external terminal, the external terminal having a height difference from the internal terminal portion and the wiring portion is provided. By using the formed semiconductor device substrate, the resin layer exposing the surface of the external terminal portion can be easily formed, and the step of exposing the surface of the external terminal portion can be omitted.
以下、本発明の実施の形態について説明する。
本実施形態の半導体装置の製造方法は、金属板上に内部端子となるめっき層が形成され、その上に同一形状で異なる金属のめっき層が形成され、更にその上に部分的にめっき層が形成され、部分的に形成されためっき層の上に同一形状で外部端子となるめっき層が形成され、外部端子となるめっき層表面が、他のめっき層に比べて金属板面からの高さが高くなっている半導体装置用基板を準備する。
次にこの半導体装置用基板を用いて、半導体装置用基板の金属板上で内部端子部、配線部、外部端子部に対応するめっき層が突出した側に、外部端子部の表面が露出するようにして、その他の部位を樹脂で封止する。
次いで、半導体装置用基板の金属板を除去して、金属板と接していた面側にめっき層の面が樹脂面から面一に露出した配線部材を得る。
次いで、金属板を除去したことで現れためっき層側に半導体素子を搭載し、半導体素子の電極を、樹脂面から面一に露出しためっき層の内部端子部と接続させる。
次いで、半導体素子を搭載した面側を樹脂で封止する。
このような工程により、金属板の表面に倣って段差のない状態の面に半導体素子を搭載することができ、既に外部接続部が樹脂から露出した部材であることから、外部接続部を露出させる従来の加工工程を省略することができる。
Embodiments of the present invention will be described below.
In the method of manufacturing a semiconductor device according to the present embodiment, a plating layer serving as an internal terminal is formed on a metal plate, a plating layer of a different metal having the same shape is formed thereon, and a plating layer is partially formed thereon. A plated layer that is the same shape and serves as an external terminal is formed on the formed and partially formed plated layer, and the surface of the plated layer that serves as the external terminal is higher than the other plated layer from the metal plate surface. A substrate for a semiconductor device having a high height is prepared.
Next, using this semiconductor device substrate, the surface of the external terminal portion is exposed on the side where the plating layer corresponding to the internal terminal portion, wiring portion, and external terminal portion protrudes on the metal plate of the semiconductor device substrate. Then, other parts are sealed with resin.
Next, the metal plate of the substrate for a semiconductor device is removed to obtain a wiring member in which the surface of the plating layer is exposed flush with the resin surface on the surface side in contact with the metal plate.
Next, the semiconductor element is mounted on the plating layer side that appears when the metal plate is removed, and the electrodes of the semiconductor element are connected to the internal terminal portions of the plating layer exposed flush with the resin surface.
Next, the surface side on which the semiconductor element is mounted is sealed with resin.
By such a process, the semiconductor element can be mounted on a surface having no step following the surface of the metal plate, and since the external connection portion is already a member exposed from the resin, the external connection portion is exposed. Conventional processing steps can be omitted.
実施例
次に、本発明の実施例について、説明する。
図１は本発明の一実施例にかかる半導体装置の製造方法の工程を示した図で、(a)、 (a’)は本実施例の半導体装置の製造に使用する半導体装置用基板の構成を示す説明図、(b)、 (b’)は(a)、 (a’)に示す半導体装置用基板に、外部端子部の面が露出するよう樹脂で封止した状態を示す説明図、(c)は(b)に示す半導体装置用基板から金属板を除去し、配線部材とした状態を示す説明図、(d)は(c)に示す配線部材の内部端子となるめっき層側に半導体素子を搭載し、半導体素子の電極と配線部材の内部端子部を接続し、半導体素子を搭載した側を樹脂封止した状態を示す説明図である。
EXAMPLES Next, examples of the present invention will be described.
FIG. 1 is a diagram showing the steps of a method for manufacturing a semiconductor device according to one embodiment of the present invention. (A) and (a ′) are configurations of a semiconductor device substrate used for manufacturing the semiconductor device of this embodiment. (B), (b ') is an explanatory diagram showing a state of sealing with a resin so that the surface of the external terminal portion is exposed on the semiconductor device substrate shown in (a), (a'), (c) is an explanatory view showing a state in which the metal plate is removed from the substrate for a semiconductor device shown in (b) to form a wiring member, and (d) is on the side of the plating layer serving as an internal terminal of the wiring member shown in (c). It is explanatory drawing which shows the state which mounted the semiconductor element, connected the electrode of the semiconductor element, and the internal terminal part of the wiring member, and resin-sealed the side which mounted the semiconductor element.
図１(a)に示すように、本実施例の半導体装置の製造に用いるために準備する半導体装置用基板は、金属板１０上における所定部位に内部端子となる第１の貴金属めっき層１１が形成され、第１の貴金属めっき層１１の上に第１の貴金属めっき層１１と同一形状で金属めっき層１２が形成され、更に金属めっき層１２の上に部分的に第２の金属めっき層１３が形成され、第２の金属めっき層１３の上に第２の金属めっき層１３と同一形状で外部端子となる第２の貴金属めっき層１４が形成されている。そして、外部端子となる第２の貴金属めっき層１４の表面は、他のめっき層に比べて金属板１０表面からの高さが、高くなっている。
金属板１０は、例えば、銅板で構成されている。
第１の貴金属めっき層１１は、例えば、金属板１０側から順に形成された、Ａｕめっき層とＰｄめっき層とで構成されている。
金属めっき層１２、第２の金属めっき層１３は、例えば、Ｎｉめっき層で構成されている。
第２の貴金属めっき層１４は、例えば、金属板１０側から順に形成された、Ｐｄめっき層とＡｕめっき層とで構成されている。
そして、第２の貴金属めっき層１４の表面（即ち、Ａｕめっき層の表面）の金属板１０の面からの高さを約４０μｍ、金属めっき層１２の表面の金属板１０の面からの高さを約６μｍとした半導体装置用基板を本実施例の半導体装置の製造に用いた。
なお、本実施例の変形例として、図１(a’)に示すように、金属めっき層１２の上に第２の金属めっき層１３が形成されず、金属めっき層１２の上に部分的に外部端子となる第２の貴金属めっき層１４が形成された半導体装置用基板を半導体装置の製造に用いてもよい。
As shown in FIG. 1A, the substrate for a semiconductor device prepared for use in manufacturing the semiconductor device of this embodiment has a first noble
The
The first noble
The
The second noble
The height of the surface of the second noble metal plating layer 14 (ie, the surface of the Au plating layer) from the surface of the
As a modification of the present embodiment, as shown in FIG. 1 (a ′), the second
本実施例の半導体装置の製造に際しては、まず、図１(a)に示した半導体装置用基板を用いて図１(b)に示すように半導体装置用基板の金属板上で内部端子部１、配線部２、外部端子部３に対応するめっき層が突出した側に、外部端子となる第２の貴金属めっき層１４の表面が露出するようにして、その他の部位を樹脂２０で封止する。なお、変形例として図１(a’)に示した半導体装置用基板を用いた場合における、半導体装置用基板の金属板上で内部端子部１、配線部２、外部端子部３に対応するめっき層が突出した側に、外部端子となる第２の貴金属めっき層１４の表面が露出するようにして、その他の部位を樹脂２０で封止した状態を図１(b’)に示す。図１(a’)に示した半導体装置用基板を用いた場合は、樹脂封止の際には、端子パターンのめっきによる端子の高さの不均一さにより外部端子面に樹脂が回りこむことがある。その場合には、封止した樹脂の表面を研磨して外部端子面を露出させる。なお、以下の説明では、便宜上、図１(b)に示した半導体装置用基板を用いるものとする。
次いで、半導体装置用基板の金属板１０に対してエッチングを施し、金属板１０を溶解等により除去する。これにより、金属板１０と接していた面側に内部端子部１、配線部２、外部端子部３の面が樹脂面から面一に露出した配線部材３０が得られる。図１(c)は、このときの状態を示している。
In manufacturing the semiconductor device of this embodiment, first, the internal
Next, the
次いで、図１(c)に示した配線部材３０の下側を上側にひっくり返し、図１(d)に示すように、金属板１０を除去したことで現れた内部端子面側に半導体素子４０を搭載し、半導体素子４０の電極を、樹脂２０の面から面一に露出した内部端子と接続させる。この場合、フリップチップ方式では、半導体素子４０の電極と内部端子とを接続させ、ワイヤー方式では、半導体素子４０の電極と内部端子とをワイヤーで連結する。なお、配線部材３０として露出した内部端子の表面が樹脂２０の面と面一となるため、搭載する半導体素子４０が傾くこと無く安定した状態で搭載できる。なお、ここでは、便宜上、半導体素子４０を固定するダイボンディングに関しては説明を省略する。
次いで、半導体素子４０を搭載した面側を樹脂４１で封止する。これにより、半導体装置が完成する。なお、複数の半導体装置を一括で封止する場合は、切断加工を行って個々の半導体装置が得られることになる。
この時既に半導体装置の裏面側には外部接続端子が樹脂２０から露出した状態に形成されていることから、従来の半導体装置の製造方法におけるような樹脂で覆われた外部接続部を露出させる加工は不要となる。
Next, the lower side of the
Next, the surface side on which the
At this time, since the external connection terminals are already formed on the back surface side of the semiconductor device so as to be exposed from the
なお、本発明の半導体装置の製造方法に使用する半導体装置用基板は、例えば、次のようにして製造できる。
まず、金属板として、リードフレーム材としても使用されている板厚０．１５ｍｍの銅材を用意する。
次に金属板の両面に、厚さ２５μｍのドライフィルムレジストをラミネートし、次に、表面側に所定の位置にめっきを形成するためのパターンＡが形成されたガラスマスクを用いて表面側のドライフィルムレジストに露光・現像を行い、めっきを形成する部分が開口されたレジストマスクを形成する。裏面側のドライフィルムレジストに対しては、金属板の裏面全体を覆うレジストマスクを形成する。この露光・現像は従来工法と同様である。
次のめっき工程では、形成したレジストマスクから露出している金属板に一般的なめっき前処理を行なった後、順に第１の貴金属めっき層としてＡｕを０．００３μｍ以上、Ｐｄを０．０１μｍ以上、金属めっき層としてＮｉを６μｍ以上となるようにめっきを施す。
次に、両面のレジストマスクを剥離し、両面に再び同じドライフィルムレジストをラミネートする。このとき、形成する第２の金属めっき層の厚さに応じてレジストの厚さを選定する必要があるが、第２の金属めっき層を１５〜４０μｍとなるよう形成するため表面側のみ厚さが５０μｍのレジストを用い、裏面側は厚さが２５μｍレジストを用いる。
そして、先に形成しためっき層の一部であって、外部端子となる部分に重ねてめっきを形成するためのパターンＢが形成されたガラスマスクを用いて露光・現像を行ってレジストマスクを形成する。裏面側は、前回と同様に全体を覆うレジストマスクを形成する。
次に、形成したレジストマスクから露出している金属めっき層であるＮｉめっき面に順に第２の金属めっき層としてＮｉを４０μｍ以上、第２の貴金属めっき層としてＰｄを０．０１μｍ以上、Ａｕを０．００３μｍ以上となるようにめっきを施した後、両面のレジストマスクを除去して半導体装置用基板を作製することができる。
In addition, the board | substrate for semiconductor devices used for the manufacturing method of the semiconductor device of this invention can be manufactured as follows, for example.
First, a copper material having a thickness of 0.15 mm, which is also used as a lead frame material, is prepared as a metal plate.
Next, a dry film resist having a thickness of 25 μm is laminated on both surfaces of the metal plate, and then the surface side is dried using a glass mask in which a pattern A for forming plating at a predetermined position is formed on the surface side. The film resist is exposed to light and developed to form a resist mask in which a portion for forming plating is opened. For the dry film resist on the back side, a resist mask that covers the entire back side of the metal plate is formed. This exposure / development is the same as in the conventional method.
In the next plating step, after performing general plating pretreatment on the metal plate exposed from the formed resist mask, Au is successively 0.003 μm or more and Pd is 0.01 μm or more as the first noble metal plating layer in order. Then, plating is performed so that Ni is 6 μm or more as a metal plating layer.
Next, the resist masks on both sides are peeled off, and the same dry film resist is laminated again on both sides. At this time, it is necessary to select the thickness of the resist according to the thickness of the second metal plating layer to be formed. However, since the second metal plating layer is formed so as to have a thickness of 15 to 40 μm, the thickness is only on the surface side. A resist having a thickness of 50 μm is used, and a resist having a thickness of 25 μm is used on the back side.
Then, a resist mask is formed by performing exposure and development using a glass mask in which a pattern B for forming a plating layer is formed on a part of the plating layer previously formed and overlapped with a portion to be an external terminal. To do. On the back side, a resist mask that covers the entire surface is formed as in the previous case.
Next, on the Ni plating surface that is the metal plating layer exposed from the formed resist mask, Ni is 40 μm or more as the second metal plating layer, Pd is 0.01 μm or more and Au is used as the second noble metal plating layer. After plating to 0.003 μm or more, the resist mask on both sides can be removed to produce a semiconductor device substrate.
比較例
次に、比較例として従来の半導体装置の製造方法について説明する。
従来の半導体装置用基板は、本発明に使用する半導体装置用基板とは逆に金属板上に外部端子となるめっき層が形成され、同一形状でめっき層が重ねられ、上層に内部端子となるめっき層が形成されている。これらめっき層は、搭載する半導体素子の電極数に応じて複数個（本）のめっき層としてほぼ同じ高さに形成されている。
この半導体装置等基板の内部端子の上に半導体素子を搭載し、半導体素子の電極と内部端子との接続を行う。
しかし、めっき加工により厚さとして３０μｍ、４０μｍ等の高さを複数個形成すると、めっき生産時のばらつきとして５〜８μｍ程度の高低差が生じるため、従来の半導体装置用基板は、金属板から内部端子上面までの高さに高低差が生じていることになる。
そのため、半導半導体素子を搭載した際に、半導体素子に傾きが生じたり、半導体素子の電極と内部端子との接続において導通不良が発生する場合があった。
Comparative Example Next, a conventional method for manufacturing a semiconductor device will be described as a comparative example.
In contrast to the semiconductor device substrate used in the present invention, the conventional semiconductor device substrate has a plating layer to be an external terminal formed on a metal plate, the plating layers are stacked in the same shape, and the internal layer is to be an upper layer. A plating layer is formed. These plating layers are formed at substantially the same height as a plurality of (main) plating layers according to the number of electrodes of the semiconductor element to be mounted.
A semiconductor element is mounted on the internal terminal of the substrate such as a semiconductor device, and the electrode of the semiconductor element is connected to the internal terminal.
However, when a plurality of thicknesses of 30 μm, 40 μm, etc. are formed by plating, a difference in height of about 5 to 8 μm occurs as a variation during plating production. This means that there is a height difference in the height to the upper surface of the terminal.
For this reason, when a semiconductor semiconductor element is mounted, the semiconductor element may be inclined or a conduction failure may occur in the connection between the electrode of the semiconductor element and the internal terminal.
次に、半導体素子を搭載した側を樹脂封止し、半導体装置用基板の金属板のみを除去する。
金属板を除去したことで、樹脂の裏面側には金属板と接していた外部端子となるめっき層の面が現れることになる。
そして、現れた外部端子面の一部を外部と接続するための外部端子部として使用するために、樹脂の裏面側全面を樹脂で覆い、外部端子部のみが露出するよう覆った樹脂の一部を開口する加工を行って、外部端子部を露出させて半導体装置が完成する。多数個の半導体装置を一括して封止するタイプでは、切断加工を行って個々の半導体装置が完成する。
Next, the side on which the semiconductor element is mounted is resin-sealed, and only the metal plate of the semiconductor device substrate is removed.
By removing the metal plate, the surface of the plating layer serving as the external terminal in contact with the metal plate appears on the back surface side of the resin.
Then, in order to use a part of the external terminal surface that appears as an external terminal part for connecting to the outside, a part of the resin that covers the entire back surface side of the resin with the resin so that only the external terminal part is exposed The semiconductor device is completed by exposing the external terminal portion by performing a process of opening. In the type in which a large number of semiconductor devices are sealed together, a cutting process is performed to complete each semiconductor device.
本発明の半導体装置の製造方法は、表面実装型の封止樹脂型半導体装置を組み立てることが必要とされる分野に有用である。 The method for manufacturing a semiconductor device according to the present invention is useful in a field where it is necessary to assemble a surface-mount type sealing resin type semiconductor device.
１ 内部端子部
２ 配線部
３ 外部端子部
１０ 金属板
１１ 内部端子となるめっき層（第１の貴金属めっき層）
１２ 金属めっき層
１３ 第２の金属めっき層
１４ 外部端子となるめっき層（第２の貴金属めっき層）
２０ 樹脂
３０ 配線部材
４０ 半導体素子
４１ 樹脂
DESCRIPTION OF
12
20
Claims (4)
前記外部端子となるめっき層表面が露出する樹脂層を形成し、
前記金属板を除去して、形成されためっき層が前記樹脂層により保持された配線部材を作製し、
作製した前記配線部材に半導体素子を搭載する工程を含むことを特徴とする半導体装置の製造方法。 A plating layer serving as an internal terminal is formed on the metal plate, a plating layer serving as an external terminal is partially formed on the plating layer, and the plating layer surface serving as the external terminal is compared with other plating layers. Using a semiconductor device substrate having a height from the metal plate surface,
Forming a resin layer exposing the plating layer surface to be the external terminal;
The metal plate is removed to produce a wiring member in which the formed plating layer is held by the resin layer,
The manufacturing method of the semiconductor device characterized by including the process of mounting a semiconductor element in the produced said wiring member.
前記外部端子となるめっき層表面が露出する樹脂層を形成し、
前記金属板を除去して、形成されためっき層が前記樹脂層により保持された配線部材を作製し、
作製した前記配線部材の前記金属板側であった前記内部端子となるめっき層の面側に半導体素子を搭載する工程を含むことを特徴とする半導体装置の製造方法。 A plating layer serving as an internal terminal is formed on the metal plate, a plating layer serving as an external terminal is partially formed on the plating layer, and the plating layer surface serving as the external terminal is compared with other plating layers. In the substrate for a semiconductor device in which the height from the metal plate surface is high,
Forming a resin layer exposing the plating layer surface to be the external terminal;
The metal plate is removed to produce a wiring member in which the formed plating layer is held by the resin layer,
A method of manufacturing a semiconductor device, comprising a step of mounting a semiconductor element on a surface side of a plating layer serving as the internal terminal, which is on the metal plate side of the produced wiring member.
前記外部端子となるめっき層表面が露出する樹脂層を形成し、
前記金属板を除去して、形成されためっき層が前記樹脂層により保持された配線部材を作製し、
作製した前記配線部材の前記金属板側であった前記内部端子となるめっき層の面側に半導体素子を搭載して該半導体素子の電極と前記内部端子との導通を取り、
半導体素子搭載部分を樹脂封止する工程を含むことを特徴とする半導体装置の製造方法。 A plating layer serving as an internal terminal is formed on the metal plate, a plating layer serving as an external terminal is partially formed on the plating layer, and the plating layer surface serving as the external terminal is compared with other plating layers. In the substrate for a semiconductor device in which the height from the metal plate surface is high,
Forming a resin layer exposing the plating layer surface to be the external terminal;
The metal plate is removed to produce a wiring member in which the formed plating layer is held by the resin layer,
A semiconductor element is mounted on the surface side of the plating layer to be the internal terminal that was the metal plate side of the wiring member thus manufactured, and conduction between the electrode of the semiconductor element and the internal terminal is taken.
A method of manufacturing a semiconductor device comprising a step of resin-sealing a semiconductor element mounting portion.
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| TW104143751A TWI677944B (en) | 2014-12-25 | 2015-12-25 | Semiconductor device substrate, semiconductor device wiring member and manufacturing method thereof, and manufacturing method of semiconductor device using semiconductor device substrate |
| US15/539,481 US10276422B2 (en) | 2014-12-25 | 2015-12-25 | Semiconductor device substrate, semiconductor device wiring member and method for manufacturing them, and method for manufacturing semiconductor device using semiconductor device substrate |
| CN201580071178.8A CN107112289B (en) | 2014-12-25 | 2015-12-25 | Substrate for semiconductor device, wiring member for semiconductor device, method for manufacturing the same, and method for manufacturing semiconductor device using substrate for semiconductor device |
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