JP2016118399A - Testing apparatus - Google Patents

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JP2016118399A
JP2016118399A JP2014256270A JP2014256270A JP2016118399A JP 2016118399 A JP2016118399 A JP 2016118399A JP 2014256270 A JP2014256270 A JP 2014256270A JP 2014256270 A JP2014256270 A JP 2014256270A JP 2016118399 A JP2016118399 A JP 2016118399A
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semiconductor
abnormality
power
detection unit
igbt
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昭 大和田
Akira Owada
昭 大和田
智行 磯崎
Tomoyuki Isozaki
智行 磯崎
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Shibasoku Co Ltd
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Shibasoku Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To provide a testing apparatus capable of further promptly interrupting the supply of power to a measurement target in response to the occurrence of an abnormality, as compared with before.SOLUTION: A testing apparatus 1 for testing a semiconductor 2 includes: a driving signal output unit 5 that supplies a driving signal to a gate of the semiconductor 2; a power supply 4 that supplies a driving power (V1) to the semiconductor 2; a switch circuit 7 that interrupts the supply of the driving power (V1) to the semiconductor 2; and an abnormality detection unit 6 that detects an abnormality of the semiconductor 2 and drives the switch circuit 7. The abnormality detection unit 6 detects an abnormality of the semiconductor 2 on the basis of a gate voltage Vg of the semiconductor 2.SELECTED DRAWING: Figure 1

Description

本発明は、例えば大出力モータ等の駆動に供する高電圧、大電流の絶縁ゲート型バイポーラトランジスタ(IGBT)、パワーMOSFET等を試験する試験装置に関する。   The present invention relates to a test apparatus for testing, for example, a high voltage, large current insulated gate bipolar transistor (IGBT), a power MOSFET, etc. used for driving a large output motor or the like.

従来、半導体製造工程では、出荷検査等において、試験装置により各種の試験を実行している。このような試験に関して、高電圧、大電流のIGBTについては、JEC−2407−2007等に測定方法が規定されている。   Conventionally, in a semiconductor manufacturing process, various tests are executed by a test apparatus in shipping inspection or the like. Regarding such a test, a measuring method is defined in JEC-2407-2007 etc. for high voltage and large current IGBTs.

このような試験装置では、従来、試験対象の駆動電流により、試験対象の異常を検出して電源を遮断し(例えば特許文献1)、これにより試験装置を保護している。   In such a test apparatus, conventionally, an abnormality of the test object is detected by the drive current of the test object and the power supply is shut off (for example, Patent Document 1), thereby protecting the test apparatus.

しかしながら従来の試験装置における電源遮断方法では、異常の発生から電源を遮断して駆動電流が低下を開始するまでに時間を要し、その結果、測定対象、測定治具等が損傷する問題があった。これにより従来に比して一段を迅速に、試験対象への電源の供給を遮断できることが望まれる。   However, with the conventional power shut-off method in a test apparatus, it takes time to shut down the power after the occurrence of an abnormality and the drive current starts to decrease. As a result, there is a problem that the measurement target, the measurement jig, etc. are damaged. It was. Accordingly, it is desired that the supply of power to the test object can be cut off more quickly than in the past.

特開2012−127813号公報JP 2012-127813 A

本発明は以上の点を考慮してなされたもので、異常の発生により従来に比して一段と迅速に測定対象への電源の供給を遮断することができる試験装置を提案しようとするものである。   The present invention has been made in consideration of the above points, and intends to propose a test apparatus that can cut off the supply of power to a measurement object more quickly than before due to the occurrence of an abnormality. .

係る課題を解決するため、請求項1の発明においては、
半導体を試験する試験装置において、
前記半導体のゲートに駆動用信号を供給する駆動信号出力部と、
前記半導体に駆動用電源を供給する電源と、
前記半導体への前記駆動用電源の供給を遮断するスイッチ回路と、
前記半導体の異常を検出して前記スイッチ回路を駆動する異常検出部とを備え、
前記異常検出部は、
前記半導体のゲート電圧に基づいて、前記半導体の異常を検出する
試験装置。
In order to solve the problem, in the invention of claim 1,
In test equipment for testing semiconductors,
A drive signal output unit for supplying a drive signal to the gate of the semiconductor;
A power supply for supplying driving power to the semiconductor;
A switch circuit that cuts off the supply of the driving power to the semiconductor;
An abnormality detection unit for detecting an abnormality of the semiconductor and driving the switch circuit;
The abnormality detection unit
A test apparatus for detecting an abnormality of the semiconductor based on a gate voltage of the semiconductor.

半導体では、異常の発生により駆動電流、及び駆動電圧が急激に変化し、この変化の影響でゲート電圧に異常電圧が発生する。またこのゲート電圧の異常にあっては、駆動電流による異常検出より短時間で検出できる場合もある。これにより請求項1の構成によれば、このような場合について、従来に比して早い時点で異常を検出することができ、従来に比して迅速に測定対象への電源の供給を遮断することができる。   In a semiconductor, the drive current and the drive voltage change suddenly due to the occurrence of an abnormality, and an abnormal voltage is generated in the gate voltage due to the effect of this change. In addition, the abnormality of the gate voltage may be detected in a shorter time than the abnormality detection by the drive current. Thus, according to the configuration of the first aspect, in such a case, an abnormality can be detected at an earlier point in time than in the past, and the supply of power to the measurement target can be shut off more quickly than in the past. be able to.

請求項2の発明は、請求項1の構成において、
前記異常検出部は、
前記半導体のゲート電圧を判定基準値により判定することにより、前記半導体のゲート電圧に基づいて、前記半導体の異常を検出する。
The invention of claim 2 is the configuration of claim 1,
The abnormality detection unit
By determining the gate voltage of the semiconductor based on a determination reference value, an abnormality of the semiconductor is detected based on the gate voltage of the semiconductor.

請求項2の構成によれば、より具体的構成により、従来に比して早い時点で異常を検出することができる。   According to the configuration of the second aspect, the abnormality can be detected at an earlier point in time than the conventional configuration with a more specific configuration.

請求項3の発明は、請求項1又は請求項2の構成において、
前記異常検出部は、
さらに前記半導体の駆動電流に基づいて、前記半導体の異常を検出する。
The invention of claim 3 is the structure of claim 1 or claim 2,
The abnormality detection unit
Further, an abnormality of the semiconductor is detected based on the driving current of the semiconductor.

請求項3の構成によれば、ゲート電圧に異常の現象が迅速に現れない場合でも、異常による駆動電流の著しい増大を防止して試験装置を保護することができる。   According to the configuration of the third aspect, even when the abnormal phenomenon does not appear rapidly in the gate voltage, the test apparatus can be protected by preventing a significant increase in the drive current due to the abnormality.

本発明によれば、異常の発生により従来に比して一段と迅速に測定対象への電源の供給を遮断することができる。   According to the present invention, it is possible to cut off the supply of power to the measurement object more quickly than before due to the occurrence of an abnormality.

本発明の第1実施形態に係る試験装置を示す図である。1 is a diagram illustrating a test apparatus according to a first embodiment of the present invention. 図1の試験装置において、動作の説明に供する信号波形図である。FIG. 2 is a signal waveform diagram for explaining operations in the test apparatus of FIG. 1.

以下、本発明の実施形態について詳述する。   Hereinafter, embodiments of the present invention will be described in detail.

〔第1実施形態〕
図1は、本発明の第1実施形態に係る試験装置を示す図である。この試験装置1は、測定治具を介してIGBTモジュールに接続され、このIGBTモジュールを構成するIGBT2を試験する。なおIGBTモジュールは、複数のIGBT2を収納したモジュールであり、各IGBT2には並列に保護ダイオード3が設けられている。
[First Embodiment]
FIG. 1 is a diagram showing a test apparatus according to the first embodiment of the present invention. The test apparatus 1 is connected to the IGBT module via a measurement jig, and tests the IGBT 2 constituting the IGBT module. The IGBT module is a module in which a plurality of IGBTs 2 are housed, and a protective diode 3 is provided in parallel with each IGBT 2.

このためこの試験装置1では、試験対象であるIGBT2に駆動用電源を供給する電源4、異常検出ユニット6の制御により電源4からIGBT2への駆動用電源の供給を遮断するスイッチ回路7、IGBT2のゲートに試験用の駆動信号を供給する駆動信号出力部であるゲートドライブユニット(Gate−DR Unit)5、駆動信号により変化するIGBT2の各端子電圧等を計測する計測回路、計測回路の計測結果を集計して判定するコントローラ等が設けられる。これによりこの試験装置1では、種々の試験項目により試験対象であるIGBT2を試験できるように構成される。   For this reason, in this test apparatus 1, the power supply 4 that supplies the drive power to the IGBT 2 to be tested, the switch circuit 7 that shuts off the drive power supply from the power supply 4 to the IGBT 2 under the control of the abnormality detection unit 6, and the IGBT 2 Gate drive unit (Gate-DR Unit) 5, which is a drive signal output unit that supplies a test drive signal to the gate, a measurement circuit that measures each terminal voltage of the IGBT 2 that changes according to the drive signal, and a measurement result of the measurement circuit is aggregated A controller or the like is provided. As a result, the test apparatus 1 is configured to be able to test the IGBT 2 that is the test target according to various test items.

この試験装置1において、異常検出ユニット6は、IGBT2のゲート電圧に基づいて、試験対象であるIGBT2の異常を検出し、スイッチ回路7の制御によりIGBT2への駆動用電源の供給を遮断する。これにより試験装置1では、異常の発生により従来に比して一段と迅速に測定対象への電源の供給を遮断する。より具体的に、異常検出ユニット6は、ゲート電圧Vgを判定基準値により判定し、その結果得られる判定結果S1によりスイッチ回路7を駆動して駆動用電源を遮断する。   In the test apparatus 1, the abnormality detection unit 6 detects an abnormality of the IGBT 2 that is the test target based on the gate voltage of the IGBT 2, and shuts off the drive power supply to the IGBT 2 under the control of the switch circuit 7. As a result, the test apparatus 1 shuts off the supply of power to the measurement object more quickly than before due to the occurrence of an abnormality. More specifically, the abnormality detection unit 6 determines the gate voltage Vg based on the determination reference value, drives the switch circuit 7 based on the determination result S1 obtained as a result, and shuts off the driving power supply.

すなわち図2に示すように、ゲート信号によりゲート電圧Vg(図2(B))を立ち上げてIGBT2を駆動する場合、IGBT2の端子間電圧(ドレインソース間電圧であり駆動電圧である)V1(図2(A))及び駆動電流I1(図2(E))は、ゲート電圧Vgに応じて変化することになる。なおIGBT2の端子間電圧V1の変動量は、電源4の出力抵抗及びスイッチ回路7の内部抵抗に依存することになる。   That is, as shown in FIG. 2, when the IGBT 2 is driven by raising the gate voltage Vg (FIG. 2B) by the gate signal, the voltage between the terminals of the IGBT 2 (the drain-source voltage and the drive voltage) V1 ( 2A) and the drive current I1 (FIG. 2E) change according to the gate voltage Vg. Note that the amount of fluctuation of the inter-terminal voltage V1 of the IGBT 2 depends on the output resistance of the power supply 4 and the internal resistance of the switch circuit 7.

このようにしてIGBT2を駆動して、例えば時点t1でIGBT2に異常が発生すると、IGBT2は、駆動電流I1が急激に増大すると共に、端子間電圧V1が急激に変化することになる。なお異常後の端子間電圧V1は、電源4の特性によって、種々の変化を呈することになる。   When the IGBT 2 is driven in this way and, for example, an abnormality occurs in the IGBT 2 at the time t1, the drive current I1 of the IGBT 2 rapidly increases and the inter-terminal voltage V1 rapidly changes. The inter-terminal voltage V <b> 1 after abnormality exhibits various changes depending on the characteristics of the power supply 4.

従来の試験装置では、この駆動電流I1を判定基準値TH1により判定して試験対象の異常を検出して電源の供給を停止制御するものの、この場合、異常の発生から異常を検出するまでに要する時間に、異常の検出から電源の供給を停止するまでの遅延時間(制御信号によりスイッチ回路7が機能するまでの時間である)τを加算した時間だけ、異常の発生から電源の供給を停止するまでの間、時間を要することになる。なおこの図2においては、この従来の試験装置による電源遮断の挙動を破線により示す。   In the conventional test apparatus, the drive current I1 is determined based on the determination reference value TH1 to detect the abnormality of the test target and stop the supply of power, but in this case, it is necessary to detect the abnormality from the occurrence of the abnormality. The supply of power is stopped from the occurrence of an abnormality for a time obtained by adding a delay time (the time until the switch circuit 7 functions by a control signal) τ from the detection of an abnormality to the stop of the supply of power. Will take time. In FIG. 2, the power-off behavior of this conventional test apparatus is indicated by a broken line.

種々に検討した結果によれば、IGBT2においては、異常の発生により駆動電流、及び駆動電圧が急激に変化し、この変化の影響でゲート電圧に異常電圧が発生することが判った。またこのゲート電圧の異常にあっては、駆動電流による異常検出より短時間で検出できる場合があることが判った。このような場合については、駆動電流に代えて、ゲート電圧を判定基準値により判定し、その結果得られる判定信号S1によりスイッチ回路7を制御して駆動用電源を遮断するようにして(図2(C)及び(D))、従来に比して格段的に迅速に、異常の発生により電源の供給を遮断できる。   As a result of various studies, it has been found that in the IGBT 2, the drive current and the drive voltage change suddenly due to the occurrence of an abnormality, and an abnormal voltage is generated in the gate voltage due to the influence of this change. Further, it has been found that the abnormality of the gate voltage can be detected in a shorter time than the abnormality detection by the drive current. In such a case, instead of the drive current, the gate voltage is determined based on the determination reference value, and the switch circuit 7 is controlled by the determination signal S1 obtained as a result to cut off the drive power supply (FIG. 2). (C) and (D)), it is possible to cut off the supply of power due to the occurrence of abnormality much more rapidly than in the past.

すなわちこの場合、異常の検出から電源を遮断するまでの時間τについては、駆動電流I1に基づいて電源を遮断する場合と同一の時間を要するものの、異常を検出するまでの時間を短くすることができることにより、従来に比して迅速に電源を遮断することができる。   That is, in this case, the time τ from the detection of the abnormality until the power is shut off requires the same time as that when the power is shut off based on the drive current I1, but the time until the abnormality is detected may be shortened. As a result, the power can be shut off more quickly than in the past.

しかしながらIGBT2においては、全てで、このように駆動電流より早い時点でゲート電圧に異常の現象が現れるものではなく、駆動電流により異常検出した方が、迅速かつ確実に異常の発生に対応できる場合もある。   However, in the IGBT 2, in all cases, an abnormal phenomenon does not appear in the gate voltage at a time earlier than the drive current, and there is a case where the abnormality detection by the drive current can cope with the occurrence of the abnormality quickly and reliably. is there.

そこでここの実施形態では、電流電圧変換抵抗8が駆動電流経路に設けられ、この電流電圧変換抵抗8の端子間電圧により、異常検出ユニット6でIGBT2の駆動電流を検出する。異常検出ユニット6は、この端子間電圧を所定の判定基準値で判定することにより、駆動電流の立ち上がりを検出してIGBT2の異常を検出する。またこの判定結果によってもスイッチ回路7を制御して駆動電源の供給を遮断する。これらによりこの実施形態では、種々半導体素子の試験に適切に対応できるように構成される。   Therefore, in this embodiment, the current-voltage conversion resistor 8 is provided in the drive current path, and the drive current of the IGBT 2 is detected by the abnormality detection unit 6 based on the voltage between the terminals of the current-voltage conversion resistor 8. The abnormality detection unit 6 detects the rise of the drive current and detects the abnormality of the IGBT 2 by determining the voltage between the terminals with a predetermined determination reference value. The switch circuit 7 is also controlled based on the determination result to interrupt the supply of drive power. Thus, the present embodiment is configured so as to be able to appropriately cope with various semiconductor element tests.

〔他の実施形態〕
以上、本発明の実施に好適な具体的な構成を詳述したが、本発明は、本発明の趣旨を逸脱しない範囲で、上述の実施形態の構成を種々に変更することができる。
[Other Embodiments]
As mentioned above, although the specific structure suitable for implementation of this invention was explained in full detail, this invention can change the structure of the above-mentioned embodiment variously in the range which does not deviate from the meaning of this invention.

すなわち上述の実施形態では、IGBTを試験する場合について述べたが、本発明はこれに限らず、パワーMOSFET等を試験する場合にも広く適用することができる。   That is, in the above-described embodiment, the case of testing the IGBT has been described. However, the present invention is not limited to this, and can be widely applied to the testing of power MOSFETs and the like.

また上述の実施形態では、電流電圧変換抵抗を使用して駆動電流を検出する場合について述べたが、本発明はこれに限らず、カレントプローブ等により検出するようにしてもよい。   In the above-described embodiment, the case where the drive current is detected using the current-voltage conversion resistor has been described. However, the present invention is not limited to this, and may be detected by a current probe or the like.

1 試験装置
2 IGBT
3 ダイオード
4 電源
5 ゲートドライブユニット
6 異常検出ユニット
7 スイッチ回路
8 電流電圧変換抵抗
1 Test equipment 2 IGBT
3 Diode 4 Power supply 5 Gate drive unit 6 Abnormality detection unit 7 Switch circuit 8 Current-voltage conversion resistance

Claims (3)

半導体を試験する試験装置において、
前記半導体のゲートに駆動用信号を供給する駆動信号出力部と、
前記半導体に駆動用電源を供給する電源と、
前記半導体への前記駆動用電源の供給を遮断するスイッチ回路と、
前記半導体の異常を検出して前記スイッチ回路を駆動する異常検出部とを備え、
前記異常検出部は、
前記半導体のゲート電圧に基づいて、前記半導体の異常を検出する
試験装置。
In test equipment for testing semiconductors,
A drive signal output unit for supplying a drive signal to the gate of the semiconductor;
A power supply for supplying driving power to the semiconductor;
A switch circuit that cuts off the supply of the driving power to the semiconductor;
An abnormality detection unit for detecting an abnormality of the semiconductor and driving the switch circuit;
The abnormality detection unit
A test apparatus for detecting an abnormality of the semiconductor based on a gate voltage of the semiconductor.
前記異常検出部は、
前記半導体のゲート電圧を判定基準値により判定することにより、前記半導体のゲート電圧に基づいて、前記半導体の異常を検出する
請求項1に記載の試験装置。
The abnormality detection unit
The test apparatus according to claim 1, wherein an abnormality of the semiconductor is detected based on a gate voltage of the semiconductor by determining the gate voltage of the semiconductor based on a determination reference value.
前記異常検出部は、
さらに前記半導体の駆動電流に基づいて、前記半導体の異常を検出する
請求項1又は請求項2に記載の試験装置。
The abnormality detection unit
The test apparatus according to claim 1, further comprising detecting an abnormality of the semiconductor based on a driving current of the semiconductor.
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