JP2016066028A - Liquid crystal display device and drive method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device that can achieve low power consumption, and a drive method of the liquid crystal display device, and to provide a liquid crystal display device excellent in display quality and a drive method of the liquid crystal display device.SOLUTION: The liquid crystal display device includes a scanning line, a signal line, a pixel having a pixel electrode, a thin film transistor, and a drive unit. When the drive unit holds a written state in the pixel electrode with a second image signal Vsig2L after writing a first image signal Vsig1H in the pixel electrode, the drive unit carries out operation of the first writing, a first stop, the second writing, and a second stop. In the first writing, the drive unit sequentially writes second image signals Vsig2L, Vsig2H in the pixel electrode in a period of three or more frames. In the first stop, the drive unit stops driving of the scanning line and the signal line. In the second writing, the drive unit writes the second image signal Vsig2L in a period of one frame. After the second writing, the drive unit stops driving of the scanning line and the signal line.SELECTED DRAWING: Figure 7

Description

  Embodiments described herein relate generally to a liquid crystal display device and a driving method of the liquid crystal display device.

  In general, a liquid crystal display device includes an array substrate, a counter substrate, a liquid crystal layer sandwiched between the two substrates, and a color filter formed on one of the array substrate and the counter substrate. A gap between the array substrate and the counter substrate is held constant by a spacer. As a display method of the liquid crystal display device, various methods such as a TN (Twisted Nematic) method are used.

  The array substrate and the counter substrate each have an alignment film in contact with the liquid crystal layer. Both alignment films are rubbed. Thereby, both alignment films can perform initial alignment of liquid crystal molecules.

International Publication No. 2013/035594 Pamphlet

  Embodiments of the present invention provide a liquid crystal display device capable of reducing power consumption and a method for driving the liquid crystal display device. Alternatively, the embodiment of the present invention provides a liquid crystal display device excellent in display quality and a driving method of the liquid crystal display device.

A liquid crystal display device according to an embodiment
A scanning line, a signal line, a pixel having a pixel electrode, a thin film transistor that is electrically connected to the scanning line, the signal line, and the pixel electrode to form the pixel, and is electrically connected to the scanning line and the signal line A driving unit that drives the scanning lines and signal lines and writes image signals to the pixel electrodes,
When the driving unit holds a state where a second image signal different from the first image signal is written to the pixel electrode after the first image signal is written to the pixel electrode,
First writing for continuously writing the second image signal to the pixel electrode for three frames or more;
A first pause after driving the scanning lines and signal lines in a period longer than the period of the first writing after the first writing;
A second writing for writing the second image signal for one frame to the pixel electrode after the first pause;
A second pause in which driving of the scanning lines and signal lines is paused after the second writing in a period longer than the period of the second writing;
Is configured to do.

In addition, a method for driving a liquid crystal display device according to an embodiment includes:
In a driving method of a liquid crystal display device comprising: a scan line; a signal line; a pixel having a pixel electrode; and a thin film transistor electrically connected to the scan line, the signal line, and the pixel electrode to form the pixel.
Driving the scanning lines and signal lines to write image signals to the pixel electrodes;
After writing the first image signal to the pixel electrode, when maintaining the state where the second image signal different from the first image signal is written to the pixel electrode,
In the first writing, the second image signal is continuously written to the pixel electrode for 3 frames or more,
In the first pause after the first writing, the driving of the scanning lines and the signal lines is paused for a period longer than the period of the first writing,
In the second writing after the first pause, the second image signal is written to the pixel electrode for one frame,
In the second pause after the second writing, the driving of the scanning lines and the signal lines is paused for a period longer than the second writing period.

FIG. 1 is a schematic configuration diagram illustrating a liquid crystal display device according to an embodiment. FIG. 2 is a schematic cross-sectional view showing a peripheral portion of the liquid crystal display panel shown in FIG. FIG. 3 is a plan view showing a schematic configuration of the array substrate shown in FIGS. 1 and 2. FIG. 4 is a circuit diagram schematically showing the unit pixel shown in FIG. FIG. 5 is an equivalent circuit showing the unit pixel. FIG. 6 is a cross-sectional view showing a part of the liquid crystal display panel, and is a view showing four pixels. FIG. 7 shows (1) an image signal for driving the first signal line and (2) an image signal for driving the second signal line when the first image display and the second image display are performed by the liquid crystal display device. 3 is a timing chart showing a control signal for driving a scanning line, (4) a first counter voltage for driving a first lead line, and (5) a second counter voltage for driving a second lead line. FIG. 8 is an enlarged plan view showing the outside of the display area of the array substrate of the modification of the liquid crystal display device according to the embodiment, and is a diagram showing a switching circuit. FIG. 9 is a diagram showing a modified example of the driving method of the liquid crystal display device shown in FIG. 7. (1) First signal when the first image display and the second image display are performed by the liquid crystal display device. An image signal for driving a line; (2) an image signal for driving a second signal line; (3) a control signal for driving a scanning line; (4) a first counter voltage for driving a first lead; It is a timing chart which shows the modification of the 2nd counter voltage which drives 2 lead wires.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. It should be noted that the disclosure is merely an example, and those skilled in the art can easily conceive of appropriate modifications while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, the drawings may be schematically represented with respect to the width, thickness, shape, and the like of each part in comparison with actual aspects for the sake of clarity of explanation, but are merely examples, and the interpretation of the present invention is not limited. It is not limited. In addition, in the present specification and each drawing, elements similar to those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description may be omitted as appropriate.

Hereinafter, a liquid crystal display device and a driving method of the liquid crystal display device according to an embodiment will be described in detail with reference to the drawings. First, the configuration of the liquid crystal display device will be described.
As shown in FIGS. 1 and 2, the liquid crystal display device includes a liquid crystal display panel 10. In the present embodiment, the liquid crystal display panel 10 employs a TN (Twisted Nematic) method. The liquid crystal display panel 10 includes an array substrate 1, a counter substrate 2 disposed opposite to the array substrate with a predetermined gap, and a liquid crystal layer 3 sandwiched between the two substrates. In addition, the liquid crystal display device includes a drive circuit 90 (signal line drive circuit) as an image signal output unit, a control unit 100, and a connection unit 110. The drive circuit 90 outputs an image signal for displaying a still image and an image signal (video signal) for displaying a moving image. As the connection part 110, FPC (flexible printed circuit) or TCP (tape carrier package) can be utilized. The liquid crystal display panel 10 has a display area AA. The display area AA is surrounded by a non-display area.

  As shown in FIGS. 1 to 5, the array substrate 1 includes, for example, a glass substrate 4a as a transparent insulating substrate. In the display area AA, a plurality of unit pixels UPX arranged in a matrix are formed on the glass substrate 4a. M unit pixels UPX are arranged in the first direction d1, and n unit pixels UPX are arranged in the second direction d2 orthogonal to the first direction d1.

  Each unit pixel UPX includes a plurality of pixels PX. Here, each unit pixel UPX includes first to fourth pixels PXa to PXd. The second pixel PXb is located adjacent to the first pixel PXa in the second direction d2. The third pixel PXc is located adjacent to the first pixel PXa in the first direction d1. The fourth pixel PXd is located adjacent to the second pixel PXb in the first direction d1 and adjacent to the third pixel PXc in the second direction d2.

  Here, when attention is focused on the unit of the pixel PX instead of the unit of the unit pixel UPX, 2 × m pixels PX are arranged in the first direction d1 and 2 × n are arranged in the second direction d2. In the odd rows, the first pixels PXa and the third pixels PXc are alternately arranged in the first direction d1. In the even-numbered rows, the second pixels PXb and the fourth pixels PXd are alternately arranged in the first direction d1. In the odd-numbered columns, the first pixels PXa and the second pixels PXb are alternately arranged in the second direction d2. In the even columns, the third pixels PXc and the fourth pixels PXd are alternately arranged in the second direction d2.

  The unit pixel UPX can be rephrased as a picture element. Alternatively, the unit pixel UPX can be rephrased as a pixel, and in this case, the pixel PX can be rephrased as a sub-pixel.

  Outside the display area AA, a drive circuit 9 and an outer lead bonding pad group (hereinafter referred to as OLB pad group) PG are formed above the glass substrate 4a. In the present embodiment, the drive circuit 9 is used as a scanning line drive circuit and an auxiliary capacitance line drive circuit. Note that the scan line driver circuit and the auxiliary capacitor line driver circuit may be provided separately from each other. For example, referring to FIG. 3, a scanning line driving circuit may be provided in the left area of the non-display area, and an auxiliary capacitance line driving circuit may be provided in the right area.

In the display area AA, above the glass substrate 4a, a plurality (2 × m) of signal lines 17, a plurality (2 × n) of scanning lines 15 and a plurality (2 × n) of auxiliary capacitors are provided. Line 20 is arranged.
The signal line 17 is connected to a drive circuit 90 (signal line drive circuit). The signal lines 17 extend in the second direction d2 and are spaced from each other in the first direction d1. Each signal line 17 is electrically connected to a plurality of pixels PX in one column.

The scanning line 15 is connected to the driving circuit 9 (scanning line driving circuit). The scanning lines 15 extend in the first direction d1 and are spaced from each other in the second direction d2. Each scanning line 15 is electrically connected to a plurality of pixels PX in one row.
The auxiliary capacitance line 20 is connected to the drive circuit 9 (auxiliary capacitance line drive circuit). The storage capacitor lines 20 extend in the first direction d1 and are spaced from each other in the second direction d2. Each auxiliary capacitance line 20 is electrically connected to a plurality of pixels PX in one row.

Next, one unit pixel UPX will be described.
As shown in FIGS. 3 to 5, the first to fourth pixels PXa to PXd are pixels configured to display images of different colors. In this embodiment, the first to fourth pixels PXa to PXd are pixels configured to display red (R), green (G), blue (B), and white (W) images. The unit pixel UPX is configured by so-called RGBW square pixels (pixels in which four square pixels of RGBW are arranged in a square).

  The first pixel PXa includes a first pixel electrode 22a, a first switching element 12a, and an auxiliary capacitance element 25, and is configured to display a red (R) image. In this embodiment, the first switching element 12a is formed of a thin film transistor (TFT). The first switching element 12a is electrically connected to the first electrode electrically connected to the scanning line 15, the second electrode electrically connected to the signal line 17 (17a), and the first pixel electrode 22a. A third electrode. A liquid crystal capacitor is formed between the first pixel electrode 22a and the first counter electrode 42a. Each first counter electrode 42a is connected to the first lead line L1, and is connected to the drive circuit 90 (lead line drive circuit) via the first lead line L1 and the like.

  Here, in the first switching element 12a, the first electrode functions as a gate electrode, one of the second and third electrodes functions as a source electrode, and the other of the second and third electrodes functions as a drain electrode. . The functions of the first to third electrodes are the same in the second to fourth switching elements 12b to 12d described later.

  The auxiliary capacitance element 25 is electrically connected to the first pixel electrode 22a. In this embodiment, the auxiliary capacitance element 25 is formed between the first pixel electrode 22 a and the auxiliary capacitance line 20. One electrode of the auxiliary capacitance element 25 is formed of the first pixel electrode 22a or an electrode connected to the first pixel electrode 22a. The other electrode of the auxiliary capacitance element 25 is formed of a part of the corresponding auxiliary capacitance line 20 or an electrode connected to the auxiliary capacitance line 20. The auxiliary capacitance line 20 is driven by a drive circuit 9 (auxiliary capacitance line drive circuit). In addition, when it is not necessary to drive the auxiliary capacitance line 20, the auxiliary capacitance line driving circuit is not particularly required, and each auxiliary capacitance line 20 may be connected to some constant potential power source.

  The second pixel PXb includes a second pixel electrode 22b, a second switching element 12b, and an auxiliary capacitance element 25, and is configured to display a blue (B) image. In this embodiment, the second switching element 12b is formed of a TFT. The second switching element 12b is electrically connected to the first electrode electrically connected to the scanning line 15, the second electrode electrically connected to the signal line 17 (17a), and the second pixel electrode 22b. A third electrode. The second pixel PXb is connected to the same first signal line 17a together with the first pixel PXa. A liquid crystal capacitor is formed between the second pixel electrode 22b and the first counter electrode 42a.

  The third pixel PXc includes a third pixel electrode 22c, a third switching element 12c, and an auxiliary capacitance element 25, and is configured to display a green (G) image. In this embodiment, the third switching element 12c is formed of a TFT. The third switching element 12c is electrically connected to the first electrode electrically connected to the scanning line 15, the second electrode electrically connected to the signal line 17 (17b), and the third pixel electrode 22c. A third electrode. The third pixel PXc is connected to the same scanning line 15 together with the first pixel PXa. A liquid crystal capacitor is formed between the third pixel electrode 22c and the second counter electrode 42b. Each second counter electrode 42b is connected to the second lead wire L2, and is connected to the drive circuit 90 (lead wire drive circuit) via the second lead wire L2.

  The fourth pixel PXd includes a fourth pixel electrode 22d, a fourth switching element 12d, and an auxiliary capacitance element 25, and is configured to display a white (W) image. In this embodiment, the fourth switching element 12d is formed of a TFT. The fourth switching element 12d is electrically connected to the first electrode electrically connected to the scanning line 15, the second electrode electrically connected to the signal line 17 (17b), and the fourth pixel electrode 22d. A third electrode. The fourth pixel PXd is connected to the same scanning line 15 together with the second pixel PXb, and is connected to the same second signal line 17b together with the third pixel PXc. A liquid crystal capacitor is formed between the fourth pixel electrode 22d and the second counter electrode 42b.

  As described above, in the present embodiment, two signal lines 17, two scanning lines 15, and two auxiliary capacitance lines 20 are connected to each unit pixel UPX. However, paying attention to the signal lines and the scanning lines, each of the unit pixels UPX may be connected with four signal lines 17 and one scanning line 15. In this case, the first to fourth pixels PXa to PXd of the unit pixel UPX are electrically connected to the same scanning line 15. The first to fourth pixels PXa to PXd of the unit pixel UPX are electrically connected to different signal lines 17.

Next, the cross-sectional structure of the liquid crystal display panel 10 will be described.
As shown in FIGS. 4 to 6, an undercoat film (insulating film) 11 is formed on the glass substrate 4a. A plurality of switching elements 12 (12a to 12d) are formed above the undercoat film 11. Specifically, the semiconductor layer 13 is formed on the undercoat film 11.

The semiconductor layer 13 is formed of a semiconductor such as amorphous silicon, polysilicon, an organic semiconductor, or an oxide semiconductor. In the present embodiment, the semiconductor layer 13 is an oxide semiconductor layer formed of an oxide semiconductor. As such an oxide semiconductor, an oxide containing at least one of indium, gallium, and zinc is preferably used. Examples of body surface examples of oxide semiconductors include, for example, indium gallium zinc oxide (IGZO), indium gallium oxide (IGO), indium zinc oxide (IZO), zinc tin oxide (ZnSnO), and zinc oxide (ZnO). And transparent amorphous oxide semiconductor (TAOS).
Such a semiconductor layer 13 made of an oxide semiconductor can realize higher mobility than a semiconductor layer made of amorphous silicon. In addition, the semiconductor layer 13 made of such an oxide semiconductor can be uniformly formed over a large area at a low temperature as compared with a semiconductor layer made of polysilicon, and the manufacturing cost can be reduced. it can.

  A gate insulating film 14 is formed on the undercoat film 11 and the semiconductor layer 13. A plurality of scanning lines 15 are formed on the gate insulating film 14. The scanning line 15 has a plurality of first electrodes (gate electrodes) 15 a facing the first region (channel region) of the semiconductor layer 13. A first interlayer insulating film 16 is formed on the gate insulating film 14 and the scanning line 15 (first electrode 15a).

  On the first interlayer insulating film 16, a plurality of signal lines 17, a plurality of second electrodes 18a, and a plurality of third electrodes 18b are formed. The signal line 17, the second electrode 18a, and the third electrode 18b are formed simultaneously using the same material. The signal line 17 is formed integrally with the second electrode 18a. The second electrode 18 a is in contact with the second region of the semiconductor layer 13 through a contact hole formed in the gate insulating film 14 and the first interlayer insulating film 16. The third electrode 18 b is in contact with the third region of the semiconductor layer 13 through another contact hole formed in the gate insulating film 14 and the first interlayer insulating film 16. Note that one of the second and third regions functions as a source region, and the other of the second and third regions functions as a drain region. As described above, the switching element 12 is formed.

  A second interlayer insulating film 19 is formed on the first interlayer insulating film 16, the signal line 17, the second electrode 18a, and the third electrode 18b. An insulating film 21 is formed on the second interlayer insulating film 19. The insulating film 21 can also function as a planarization film. Since the insulating film 21 functions as a planarizing film, unevenness on the surface of the array substrate 1 can be reduced.

  On the insulating film 21, a plurality of pixel electrodes 22 (22a to 22d) are formed. In the present embodiment, the pixel electrode 22 is formed of a light reflecting conductive layer, a transparent conductive layer, or a laminate thereof. The light reflecting conductive layer can be formed using a metal material such as aluminum (aluminum: Al). The transparent conductive layer can be formed by using a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide, or (indium zinc oxide: IZO).

  In this embodiment, the pixel electrode 22 is a light-reflective pixel electrode formed of a laminated body of a light-reflective conductive layer and a transparent conductive layer. The liquid crystal display panel 10 is a light reflection type liquid crystal display panel. The pixel electrode 22 has light reflectivity, and can reflect light incident from the display surface (outer surface of the counter substrate 2) side to the display surface side.

  For example, the transparent conductive layer is located on the uppermost layer of the pixel electrode 22. The size of the transparent conductive layer is the same as the size of the light reflective conductive layer, and the transparent conductive layer may be formed to completely overlap the light reflective conductive layer. In this case, the light-reflecting conductive layer and the transparent conductive layer can be simultaneously formed by patterning the laminated light-reflecting conductive film and the transparent conductive film in one photolithography process.

  The liquid crystal display panel 10 may be a light transmissive liquid crystal display panel. In this case, the pixel electrode 22 is a light transmissive pixel electrode formed only of a transparent conductive layer. The pixel electrode 22 is light transmissive and can transmit light incident from the array substrate 1 side to the counter substrate 2 side.

A columnar spacer 5 (FIG. 2) is formed on the insulating film 21 and the pixel electrode 22. An alignment film 23 is provided on the insulating film 21, the pixel electrode 22, and the columnar spacer 5. The alignment film 23 is in contact with the liquid crystal layer 3. In this embodiment, the alignment film 23 is a horizontal alignment film and is subjected to an alignment process such as rubbing. Thereby, the alignment film 23 can initially align the liquid crystal molecules of the liquid crystal layer 3.
As described above, the array substrate 1 is formed.

  As shown in FIG. 6, on the other hand, the counter substrate 2 includes, for example, a glass substrate 4b as a transparent insulating substrate. A color filter 30 is provided on the glass substrate 4b. The color filter 30 includes a black matrix 31 and a plurality of colored layers (or non-colored layers) 32. The black matrix 31 is formed in a lattice shape so as to partition the plurality of pixels PX.

  In this embodiment, the color filter 30 includes a red colored layer 32 (32R) that forms the first pixel PXa, a blue colored layer 32 that forms the second pixel PXb, and a green colored layer that forms the third pixel PXc. 32 (32G) and a transparent uncolored layer 32 forming the fourth pixel PXd. The color filter 30 can be formed without the non-colored layer 32.

  In this embodiment, an overcoat film 41 is provided on the color filter 30. The overcoat film 41 has a function of reducing unevenness on the surface of the counter substrate 2. The overcoat film 41 may be provided as necessary. On the overcoat film 41, a counter electrode (common electrode) 42 and an alignment film 43 are sequentially provided.

In this embodiment, the counter electrode 42 is formed using a transparent conductive material such as ITO or IZO. The counter electrode 42 has a plurality of first counter electrodes 42a and a plurality of second counter electrodes 42b. The first counter electrode 42a and the second counter electrode 42b are each formed in a strip shape, extend in the second direction d2, and are alternately arranged in the first direction d1 with an interval. Each first counter electrode 42a is opposed to the pixel electrodes 22 of all the pixels PX in any one of the odd columns. Each of the second counter electrodes 42b is opposed to the pixel electrodes 22 of all the pixels PX in any one of the even columns.
For this reason, the first counter electrode 42a and the second counter electrode 42b each contribute to the formation of the plurality of pixels PX. The first counter electrode 42a and the second counter electrode 42b are common electrodes shared by the plurality of pixels PX.

In the present embodiment, the liquid crystal display device uses the column inversion driving method and halves the voltage for driving the signal line 17, so that the counter electrode 42 includes the strip-shaped first counter electrode 42 a and the second counter electrode 42 b. Have. The liquid crystal layer 3 can be AC driven by changing the potentials of the first counter electrode 42a and the second counter electrode 42b in units of columns and frames.
Therefore, when an image signal is given to the pixel electrode 22 within an arbitrary Nth one frame period when displaying a moving image, the potential of the pixel electrode 22 of the odd-numbered pixel PX is equal to the potential of the first counter electrode 42a. And the potential of the pixel electrode 22 of the even-numbered pixels PX is equal to or lower than the potential of the second counter electrode 42b. When an image signal is applied to the pixel electrode 22 within the N + 1th frame period, the potential of the pixel electrode 22 of the odd-numbered pixel PX becomes equal to or lower than the potential of the first counter electrode 42a. The potential of the pixel electrode 22 of the pixel PX in the column is equal to or higher than the potential of the second counter electrode 42b.
That is, in the Nth one frame period, the pixel electrode 22 is a positive electrode and the first counter electrode 42a is a negative electrode in the odd-numbered column, and the pixel electrode 22 is the negative electrode and the first electrode in the even-numbered column. 2 The counter electrode 42b becomes a positive electrode. Within the (N + 1) th one frame period, the pixel electrode 22 is a negative electrode and the first counter electrode 42a is a positive electrode in the odd columns, and the pixel electrode 22 is the positive electrode and the second counter electrode in the even columns. The electrode 42b becomes a negative electrode.

  The counter electrode 42 may be a single electrode facing all the pixel electrodes 22. In this case, column inversion driving can be performed by fixing the potential of the counter electrode 42 and adjusting the voltage for driving the signal line 17. Further, the liquid crystal display device is not limited to the column inversion driving method, and may use another driving method such as a frame inversion driving method.

The alignment film 43 is in contact with the liquid crystal layer 3. The alignment film 43 is a horizontal alignment film, and is subjected to an alignment process such as rubbing. Thereby, the alignment film 43 can initially align the liquid crystal molecules of the liquid crystal layer 3.
As described above, the counter substrate 2 is formed.

As shown in FIG. 2, a predetermined gap between the array substrate 1 and the counter substrate 2 is held by a columnar spacer 5. The array substrate 1 and the counter substrate 2 are joined together by a sealing material 6 disposed at the peripheral edge of both the substrates. The liquid crystal layer 3 is formed in a space surrounded by the array substrate 1, the counter substrate 2, and the sealing material 6. In the present embodiment, the liquid crystal layer 3 is formed of a positive liquid crystal material.
A liquid crystal display device is formed as described above.

Next, a driving method of the liquid crystal display device configured as described above will be described.
The drive unit (drive circuit 9, drive circuit 90, etc.) drives the scanning line 15, the auxiliary capacitance line 20, and the signal line 17 and writes an image signal to the pixel electrode 22. When the liquid crystal display device displays a moving image or a still image, the driving unit drives the scanning line 15 and the signal line 17 every frame. However, when the liquid crystal display device displays a still image, the drive unit can also drive the scanning lines 15 and the signal lines 17 every several frames (intermittent driving).

  In the present embodiment, when the display of the first image is switched to the display of the second image, the display of the second image is maintained, and the second image is displayed as a still image, the drive unit and the scanning line 15 and The signal line 17 and the like are driven. Here, attention is paid to a specific one pixel PX. The driving unit writes the first image signal to the pixel electrode 22 of the pixel PX and then holds the state where the second image signal different from the first image signal is written to the pixel electrode 22 as follows. The scanning line 15 and the signal line 17 are driven.

  First, the driving unit drives the scanning lines 15, the signal lines 17, and the lead lines (L 1, L 2), and performs first writing for continuously writing the second image signal to the pixel electrode 22 for three frames or more. After the first writing, the driving unit performs a first pause in which the driving of the scanning lines 15 and the signal lines 17 is paused in a period longer than the period of the first writing. During the first pause, the drive unit maintains the drive state of the lead wires (L1, L2). After the first pause, the driving unit drives the scanning line 15, the signal line 17, and the lead lines (L 1, L 2), and performs the second writing to write the second image signal for one frame to the pixel electrode 22. After the second writing, the driving unit performs a second pause in which the driving of the scanning lines 15 and the signal lines 17 is paused for a period longer than the second writing period.

  Next, an example of a driving method of the liquid crystal display device will be described. Here, a case will be described in which the display of the first image is switched to the display of the second image, the display of the second image is maintained, and the second image is displayed as a still image. Further, the description will be made by paying attention to the first pixel PXa and the third pixel PXc shown in FIGS.

  As shown in FIGS. 7 and 3 to 5, first, the liquid crystal display device displays the first image in the first image display period Pd <b> 1. In this embodiment, the first image display period Pd1 is a still image display period. However, the present invention is not limited to this, and the first image display period Pd1 may be a moving image display period. Note that the storage capacitor line 20 is fixed at a constant potential in both the first image display period Pd1 and the second image display period Pd2.

The last one second of the first image display period Pd1 is divided into a writing period Pw1 and a pause period Pb1.
The writing period Pw1 is one frame period (1/60 second). In the write period Pw1, the drive unit performs a write operation at a frame rate of 60 Hz. In the writing operation, the drive circuit 9 gives the control signal SG to the scanning line 15, the drive circuit 90 gives the first image signal Vsig1 to the first signal line 17a, and the third image signal Vsig3 to the second signal line 17b. The first counter voltage VcomL is applied to the first lead wire L1, and the second counter voltage VcomH is applied to the second lead wire L2.

  Here, the first counter voltage VcomL is a low level voltage, and the second counter voltage VcomH is a higher level voltage than the first counter voltage VcomL. The first image signal Vsig1 is a high-level first image signal Vsig1H, and the potential of the first image signal Vsig1H is set equal to or higher than the potential of the first counter voltage VcomL. The third image signal Vsig3 is a low-level third image signal Vsig3L, and the potential of the third image signal Vsig3L is set equal to or lower than the potential of the second counter voltage VcomH.

  As a result, the first counter voltage VcomL is applied to the first counter electrode 42a via the first lead wire L1, and the second counter voltage VcomH is applied to the second counter electrode 42b via the second lead wire L2. Further, the first switching element 12a and the third switching element 12c are set to the ON state by the control signal SG, so that the first image is transmitted to the first pixel electrode 22a via the first signal line 17a and the first switching element 12a. The signal Vsig1H is written, and the third image signal Vsig3L is written to the third pixel electrode 22c via the second signal line 17b and the third switching element 12c.

  The pause period Pb1 following the write period Pw1 is a 59 frame period (59/60 seconds). During the pause period Pb1, the drive circuit 90 pauses the driving of the first signal line 17a and the second signal line 17b, and the drive circuit 9 pauses the drive of the scanning line 15. In the rest period Pb1, the first counter electrode 42a is maintained in the state where the first counter voltage VcomL is applied, and the second counter electrode 42b is maintained in the state where the second counter voltage VcomH is applied. By providing the pause period Pb1 as described above, it is possible to contribute to a reduction in power consumption of the liquid crystal display device.

  Subsequently, in the second image display period Pd2, the liquid crystal display device displays a second image different from the first image. In this embodiment, the second image display period Pd2 is a still image display period.

  The second image display period Pd2 is divided into a first writing period Pw2a, a first pause period Pb2a, a second writing period Pw2b, and a second pause period Pb2b. The sum of the first write period Pw2a and the first pause period Pb2a is 1 second, and the sum of the second write period Pw2b and the second pause period Pb2b is 1 second.

  The first writing period Pw2a is 3 frame periods (3/60 seconds). In the first writing period Pw2a, the driving unit performs the first writing operation at a frame rate of 60 Hz. In the first address operation, in the first one frame period of the first address period Pw2a, the drive circuit 9 supplies the control signal SG to the scanning line 15, and the drive circuit 90 applies a low-level second image to the first signal line 17a. A signal Vsig2L is applied, a high-level fourth image signal Vsig4H is applied to the second signal line 17b, a second counter voltage VcomH is applied to the first lead line L1, and a first counter voltage VcomL is applied to the second lead line L2.

  In the second one frame period of the first writing period Pw2a, the drive circuit 9 gives the control signal SG to the scanning line 15, and the drive circuit 90 gives the second image signal Vsig2H at the high level to the first signal line 17a. The low-level fourth image signal Vsig4L is applied to the second signal line 17b, the first counter voltage VcomL is applied to the first lead line L1, and the second counter voltage VcomH is applied to the second lead line L2.

  In the third (last) one frame period of the first writing period Pw2a, the drive circuit 9 supplies the control signal SG to the scanning line 15, and the drive circuit 90 applies the low-level second image signal Vsig2L to the first signal line 17a. , The high-level fourth image signal Vsig4H is applied to the second signal line 17b, the second counter voltage VcomH is applied to the first lead line L1, and the first counter voltage VcomL is applied to the second lead line L2.

  Here, the potentials of the high-level second image signal Vsig2H and the fourth image signal Vsig4H are set equal to or higher than the potential of the first counter voltage VcomL, and the low-level second image signal Vsig2L and the fourth image signal Vsig4L The potential is set equal to or lower than the potential of the second counter voltage VcomH.

  This inverts the relationship between the potential of the first pixel electrode 22a and the potential of the first counter electrode 42a for each frame in the first writing period Pw2a, and similarly, the potential of the third pixel electrode 22c and the second counter electrode The relationship with the potential of 42b is inverted. Since an alternating voltage can be applied to the liquid crystal layer 3, deterioration of the liquid crystal material can be suppressed.

  During the first writing, the drive circuit 90 writes the second image signal Vsig2 to the first pixel electrode 22a for three frames continuously, and writes the fourth image signal Vsig4 to the third pixel electrode 22c for three frames continuously. It is crowded. Since the second image signal Vsig2 and the fourth image signal Vsig4 are continuously written for three frames or more, the change in the alignment state of the liquid crystal molecules can be stabilized, and the liquid crystal molecules remain in an incompletely aligned state. Can be avoided.

  The first pause period Pb2a following the first write period Pw2a is a 57 frame period (57/60 seconds). During the first pause period Pb2a, the drive circuit 90 pauses driving of the first signal line 17a and the second signal line 17b, and the drive circuit 9 pauses driving of the scanning line 15. In the first rest period Pb2a, the second counter voltage VcomH is applied to the first counter electrode 42a, and the first counter voltage VcomL is applied to the second counter electrode 42b. . By providing the first pause period Pb2a as described above, it is possible to contribute to lower power consumption of the liquid crystal display device.

  Further, as described above, since the second image signal Vsig2 and the fourth image signal Vsig4 are continuously written for an odd number of frames (three frames), the liquid crystal layer 3 is displayed in the pause period Pb1 (first image display period Pd1). The polarity of the applied voltage and the polarity of the voltage applied to the liquid crystal layer 3 in the first pause period Pb2a (second image display period Pd2) can be reversed. Thereby, it can contribute to suppression of deterioration of liquid crystal material.

  The second writing period Pw2b is one frame period (1/60 second). In the second writing period Pw2b, the driving unit performs the second writing operation at a frame rate of 60 Hz. In the second write operation, in the second write period Pw2b, the drive circuit 9 gives the control signal SG to the scanning line 15, the drive circuit 90 gives the low-level second image signal Vsig2L to the first signal line 17a, and the second write period Pw2b. The high-level fourth image signal Vsig4H is given to the two signal lines 17b. In the second write period Pw2b, the second counter voltage VcomH is applied to the first counter electrode 42a, and the first counter voltage VcomL is applied to the second counter electrode 42b. .

  Here, the potential of the second image signal Vsig2L written to the first pixel electrode 22a in the last frame of the first writing period Pw2a and the second image signal written to the first pixel electrode 22a in the second writing period Pw2b. The potential of Vsig2L is the same. Similarly, the potential of the fourth image signal Vsig4H written to the third pixel electrode 22c in the last frame of the first writing period Pw2a and the fourth image signal written to the third pixel electrode 22c in the second writing period Pw2b. The potential of Vsig4H is the same.

  Further, the absolute value of the difference between the potential of the first pixel electrode 22a and the potential of the first counter electrode 42a is the same in the first address period Pw2a and the second address period Pw2b. Similarly, the absolute value of the difference between the potential of the third pixel electrode 22c and the potential of the second counter electrode 42b is the same in the first address period Pw2a and the second address period Pw2b.

  The second pause period Pb2b following the second write period Pw2b is a 59 frame period (59/60 seconds). During the second pause period Pb2b, the drive circuit 90 pauses the driving of the first signal line 17a and the second signal line 17b, and the drive circuit 9 pauses the drive of the scanning line 15. Note that, also in the second pause period Pb2b, the second counter voltage VcomH is applied to the first counter electrode 42a, and the first counter voltage VcomL is applied to the second counter electrode 42b. . By providing the second pause period Pb2b as described above, it is possible to contribute to a reduction in power consumption of the liquid crystal display device.

  In addition, as described above, after the first writing is performed continuously for 3 frames or more (3 frames), the operation shifts to intermittent 1 Hz driving. For this reason, the state in which the change in the alignment state of the liquid crystal molecules is stable can be maintained.

  After the second pause (after the second pause period Pb2b has elapsed), the driving unit alternately repeats the second writing performed in the second writing period Pw2b and the second pause performed in the second pause period Pb2b, The state where the second image signal Vsig2L is written to the first pixel electrode 22a and the fourth image signal Vsig4H is written to the third pixel electrode 22c may be maintained. Thereby, the time of the second image display period Pd2 can be adjusted, it can contribute to the reduction in power consumption, and the display of the second image excellent in display quality can be maintained.

  According to the liquid crystal display device and the driving method of the liquid crystal display device according to the embodiment configured as described above, the liquid crystal display device includes the scanning line 15, the signal line 17, and the pixel Px having the pixel electrode 22. The switching element 12 and a drive unit (drive circuits 9 and 90) are provided. The driving unit is electrically connected to the scanning line 15 and the signal line 17, and is configured to drive the scanning line 15 and the signal line 17 and write an image signal to the pixel electrode 22.

  The drive unit writes the first image signal to an arbitrary pixel electrode 22 and then holds the first image signal when the second image signal different from the first image signal is written to the pixel electrode 22. The first pause, the second writing, and the second pause are configured. In the first writing, the second image signal is continuously written into the pixel electrode 22 for three frames. In the first pause after the first writing, the driving of the scanning line 15 and the signal line 17 is paused for a period longer than the period of the first writing. In the second writing after the first pause, the second image signal is written into the pixel electrode 22 for one frame. In the second pause after the second writing, the driving of the scanning line 15 and the signal line 17 is paused in a period longer than the second writing period.

  As described above, after the first writing is continuously performed for three frames or more (for three frames), the driving is shifted to intermittent driving and the second image (still image) is displayed. Since the liquid crystal molecules can be stably aligned, a liquid crystal display device with excellent display quality can be obtained. In addition, since it is possible to provide a pause period in which the driving of the scanning lines 15 and the signal lines 17 is paused, the power consumption of the liquid crystal display device can be reduced.

  From the above, a liquid crystal display device and a driving method of the liquid crystal display device that can reduce power consumption can be obtained. Alternatively, a liquid crystal display device having excellent display quality and a driving method of the liquid crystal display device can be obtained.

Next, a modification of the liquid crystal display device according to the above embodiment will be described.
As shown in FIG. 8, the liquid crystal display device may further include a switching circuit 50. Also in this case, the same effect as the above-described embodiment can be obtained.

  The switching circuit 50 includes a plurality of switching element groups 55, and each switching element group 55 includes a plurality of switching elements ASW. In this embodiment, each switching element group 55 has two switching elements ASW. The switching circuit 50 is a 1/2 multiplexer circuit. The switching element ASW is, for example, a TFT, and can be formed in the same manner as the switching element 12.

  The switching circuit 50 is connected to a plurality of signal lines 17 (17a, 17b). The switching circuit 50 is connected to the drive circuit 90 via the connection wiring 57. Here, the number of connection wirings 57 is ½ of the number of signal lines 17.

  The switching element (analog switch) ASW is switched on / off by the control signals SW1 and SW2 so that the two signal lines 17 per output (connection wiring 57) of the drive circuit 90 are time-division driven. These control signals SW1 and SW2 are given from the control unit 100 to the switching element ASW via the OLB pad group pG (FIG. 3) and the plurality of control wirings 58, respectively.

  According to the above modification, the signal line 17 is time-division driven. For this reason, the number of image signals generated by the drive circuit 90 and the control unit 100 to drive the signal line 17 can be halved. As a result, as in the above-described embodiment, an increase in power consumption of the external source IC (the drive circuit 90 and the control unit 100) can be suppressed.

  Although the embodiment of the present invention has been described, the above embodiment is presented as an example, and is not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  For example, in the above-described embodiment, the second image signal (the second image signal Vsig2 or the fourth image signal Vsig4) is continuously written to the pixel electrode 22 for three frames in the first writing period Pw2a. However, the present invention is not limited to this, and it is sufficient that the second image signal is continuously written to the pixel electrode 22 for three frames or more in the first writing period Pw2a. Thereby, the state in which the alignment of the liquid crystal molecules is stable can be obtained.

  In the above-described embodiment, when writing the second image signal (second image signal Vsig2 or fourth image signal Vsig4) to the pixel electrode 22, writing is performed at a frame rate of 60 Hz. However, the present invention is not limited to this, and writing may be performed at a frame rate having a frequency smaller than 60 Hz, or writing may be performed at a frame rate having a frequency larger than 60 Hz. For example, when the amount of leakage current generated in the semiconductor layer 13 due to the material that forms the semiconductor layer 13 increases, the second image signal may be written at a frame rate with a frequency smaller than 60 Hz, such as 30 Hz. However, it is necessary to pay attention to the fact that the frequency lower than 60 Hz shortens the pause period and adversely affects the reduction of power consumption.

  The drive unit continuously writes the second image signal (second image signal Vsig2 or fourth image signal Vsig4) for three or more odd frames to the pixel electrode 22 during the first writing performed in the first writing period Pw2a. But you can. Also in this case, since the polarity of the voltage applied to the liquid crystal layer 3 can be reversed, it can contribute to suppression of deterioration of the liquid crystal material. However, it should be noted that the larger the number of frames to be written, the shorter the pause period, which adversely affects the reduction in power consumption.

In the embodiment described above, the potential of the second image signal (second image signal Vsig2 or fourth image signal Vsig4) written to the pixel electrode 22 in the last frame of the first writing period Pw2a and the second writing period Pw2b The potential of the second image signal written to the pixel electrode 22 was the same. However, the present invention is not limited to this, and the potential of the second image signal written to the pixel electrode 22 in the last frame of the first writing period Pw2a and the second writing to the pixel electrode 22 in the second writing period Pw2b. The potential of the two image signals may be different. For example, one may be a high-level second image signal and the other may be a low-level second image signal. In this case, the counter electrode 42 (42a, 42b) is driven in reverse in association with the second image signal.
Even when the second writing is repeatedly performed, the potential of the second image signal written to the pixel electrode 22 may be different each time the second writing is performed. For example, the writing of the high-level second image signal and the writing of the low-level second image signal may be performed alternately. Also in this case, the counter electrode 42 (42a, 42b) is driven to be inverted in association with the second image signal.
From the above, for example, as shown in FIG. 9, the second image display may be performed by a liquid crystal display device.

In the above-described embodiment, the example in which the same voltage is written to the signal line in the first frame and the third frame in the first writing period Pw2a has been described, but the number of gradations in the first frame is reduced. Also good. This is because the first frame is in an incomplete display state anyway, and it is only necessary to write an accurate voltage in the third frame.
For example, even if the display device has 256 gradations, the first frame is written with about 8 gradations, and the third frame is written with 256 gradations. In this way, the power consumption for writing the first frame can be reduced somewhat. Specifically, it is advantageous that the power consumption for driving the communication bus wiring when the digital signal is sent from the host side to the liquid crystal module has a small number of gradations.

The shape of the pixel electrode 22 (22a, 22b, 22c, 22d) is not limited to a square, can be variously modified, and may be a rectangle. The pixel electrode 22 may have a shape other than a rectangular shape. Even in these cases, the same effects as those of the above-described embodiment can be obtained.
The unit pixel UPX is not limited to an RGBW square pixel, and can be variously modified. For example, the unit pixel UPX includes RGBW vertical stripe pixels (pixels in which four rectangular pixels (pixel electrodes) of RGBW are arranged in a stripe pattern). It may be.
The unit pixel UPX may be configured by so-called RGB vertical stripe pixels (pixels in which three rectangular pixels (pixel electrodes) of RGB, which are three general primary colors) are arranged in a stripe shape). The unit pixel UPX may further include Y (yellow) pixels, or pixels of four or more colors including both W pixels and Y pixels.

In the embodiment described above, the liquid crystal display panel 10 employs a TN (Twisted Nematic) method. However, the present invention is not limited to this, and the liquid crystal display panel may adopt a display method other than the TN method. For example, the liquid crystal display panel may employ an IPS (In-Plane Switching) system that uses a lateral electric field substantially parallel to the main surface of the substrate, such as an FFS (Fringe Field Switching) system. The liquid crystal display panel may be formed without the auxiliary capacitance element 25.
Further, the liquid crystal display device is not limited to the light reflection type liquid crystal display device, and can be variously modified and may be a light transmission type liquid crystal display device.
The above-described embodiments are not limited to the above-described liquid crystal display device and its driving method, and can be applied to various liquid crystal display devices and their driving methods.

  DESCRIPTION OF SYMBOLS 1 ... Array substrate, 2 ... Opposite substrate, 3 ... Liquid crystal layer, 9, 90 ... Drive circuit, 10 ... Liquid crystal display panel, 12, 12a, 12b, 12c, 12d ... Switching element, 13 ... Semiconductor layer, 15 ... Scanning line , 17, 17a, 17b ... signal lines, 22, 22a, 22b, 22c, 22d ... pixel electrodes, 25 ... auxiliary capacitance elements, 42, 42a, 42b ... counter electrodes, PX, PXa, PXb, PXc, PXd ... pixels, L1, L2 ... lead wire, Pd1 ... first image display period, Pd2 ... second image display period, Pw2a ... first writing period, Pb2a ... first rest period, Pw2b ... second writing period, Pb2b ... second rest period , Vsig1, Vsig1H ... first image signal, Vsig2, Vsig2H, Vsig2L ... second image signal, Vsig3, Vsig3L ... third image signal, Vsig4, V ig4H, Vsig4L ... fourth image signal, VcomL ... first opposing voltage, VcomH ... second opposing voltage.

Claims (12)

A scanning line, a signal line, a pixel having a pixel electrode, a thin film transistor that is electrically connected to the scanning line, the signal line, and the pixel electrode to form the pixel, and is electrically connected to the scanning line and the signal line A driving unit that drives the scanning lines and signal lines and writes image signals to the pixel electrodes,
When the driving unit holds a state where a second image signal different from the first image signal is written to the pixel electrode after the first image signal is written to the pixel electrode,
First writing for continuously writing the second image signal to the pixel electrode for three frames or more;
A first pause after driving the scanning lines and signal lines in a period longer than the period of the first writing after the first writing;
A second writing for writing the second image signal for one frame to the pixel electrode after the first pause;
A second pause in which driving of the scanning lines and signal lines is paused after the second writing in a period longer than the period of the second writing;
A liquid crystal display device configured to perform.   2. The drive unit according to claim 1, wherein after the second pause, the second writing and the second pause are alternately repeated to hold the state where the second image signal is written. The liquid crystal display device described.   2. The liquid crystal display device according to claim 1, wherein the driving unit writes the second image signal for three frames continuously in the pixel electrode during the first writing. 3. The drive unit is
Writing the second image signal to the pixel electrode at a frame rate of 60 Hz;
The first writing is performed for 3 frame periods,
Performing the first pause for a period of 57 frames;
Performing the second writing for one frame period;
The second pause is performed for 59 frame periods;
The liquid crystal display device according to claim 3, configured as described above. A counter electrode for forming the pixel;
During the first writing, one of the potential of the second image signal written to the pixel electrode in the odd frame and the potential of the second image signal written to the pixel electrode in the even frame. The potential is equal to or higher than the potential of the counter electrode, the other potential is equal to or lower than the potential of the counter electrode, and the absolute value of the difference between the potential of the pixel electrode and the potential of the counter electrode is the first value. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is the same between the first writing and the second writing.   A potential of the second image signal written to the pixel electrode in the last frame at the time of the first writing; a potential of the second image signal written to the pixel electrode at the time of the second writing; The liquid crystal display device according to claim 5, wherein the two are the same.   7. The liquid crystal display device according to claim 5, wherein the driving unit sequentially writes the second image signal for three or more odd frames to the pixel electrode during the first writing. 8.   The liquid crystal display device according to claim 1, further comprising an auxiliary capacitance element electrically connected to the pixel electrode.   The liquid crystal display device according to claim 1, wherein the pixel is a light reflection type pixel.   The liquid crystal display device according to claim 9, wherein the pixel electrode is a light reflection type electrode.   The liquid crystal display device according to claim 1, wherein a twisted nematic system is employed. In a driving method of a liquid crystal display device comprising: a scan line; a signal line; a pixel having a pixel electrode; and a thin film transistor electrically connected to the scan line, the signal line, and the pixel electrode to form the pixel.
Driving the scanning lines and signal lines to write image signals to the pixel electrodes;
After writing the first image signal to the pixel electrode, when maintaining the state where the second image signal different from the first image signal is written to the pixel electrode,
In the first writing, the second image signal is continuously written to the pixel electrode for 3 frames or more,
In the first pause after the first writing, the driving of the scanning lines and the signal lines is paused for a period longer than the period of the first writing,
In the second writing after the first pause, the second image signal is written to the pixel electrode for one frame,
In the second pause after the second writing, the driving of the scanning lines and the signal lines is paused in a period longer than the period of the second writing.
A driving method of a liquid crystal display device.

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