JP2016045304A - Display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a display device that curbs reflection light in holding capacitor wiring among pixel electrodes.SOLUTION: A display device is provided that has: a pixel electrode; and a plurality of pixels including the pixel electrode and an opposing holding capacitor electrode via an insulative film, in which the holding capacitor electrode has an aperture part provided among adjacent pixel electrodes. The display device may further have: a bank layer to be arranged among the plurality of pixels; an OLED light emitting layer to be arranged on the pixel electrode and bank layer; a negative pole to be arranged on the OLED light emitting layer; an encapsulation film to be arranged on the negative pole; and a filler to be arranged on the encapsulation film. Further, the aperture part may: be broader than an interval between the adjacent pixel electrodes; have a first aperture to be arranged between the laterally adjacent pixels; and have a second aperture to be arranged between the vertically adjacent pixels. Furthermore, the holding capacitor electrode may have a third aperture through which a contact hole electrically connecting the pixel electrode and the pixel circuit passes, and the first aperture and the second aperture may not be formed in an area around the third aperture.SELECTED DRAWING: Figure 6

Description

  The present invention relates to a display device, and more particularly to a technique in the structure and arrangement of a pixel circuit.

  In recent years, there is an increasing demand for high definition and low power consumption in light emitting display devices for mobile use. Examples of mobile display devices include liquid crystal display devices (LCDs), display devices that use self-luminous elements (OLEDs) such as organic EL display devices, and electronic paper. It has been adopted.

  Among them, the development of organic EL display devices is being promoted for the purpose of reducing the thickness of the display panel, increasing the brightness, and increasing the speed. The organic EL display device is a display device having pixels composed of OLEDs, has a high reaction speed because there is no mechanical operation, and each pixel itself emits light, enabling high luminance display, Since a backlight light source and a polarizing plate are not required, the thickness can be reduced, which is expected as a next-generation display device.

  A holding (auxiliary) capacitor electrode made of metal is arranged on the lower layer of the pixel electrode that acts as an anode of the OLED element through an insulating film to form a holding capacitor, and the holding capacitor electrode of the adjacent pixel is connected to the holding capacitor wiring For example, there is Patent Document 1 as a display device connected in the above. FIG. 11 is a cross-sectional view of a display device according to the prior art, and shows the structure of the display device in which the above-described storage capacitor electrode is arranged. Here, a part of the light 92 emitted in an oblique direction from the OLED element is reflected by the interface of the layers having different refractive indexes, then reflected again by the storage capacitor wiring between the pixel electrodes, and proceeds to the adjacent pixel. Since the light 95 traveling to the adjacent pixel is superimposed on the light that should be originally displayed on the adjacent pixel, light leakage or unnecessary color mixing occurs and affects display characteristics.

JP 2009-109515 A

  An object of the present invention is to provide a display device in which reflected light from a storage capacitor wiring between pixel electrodes is suppressed.

  A display device according to an embodiment of the present invention includes a plurality of pixels including a pixel electrode and a storage capacitor electrode facing the pixel electrode through an insulating film, and the storage capacitor electrode has an opening between adjacent pixel electrodes. A portion is provided.

  In addition, a bank layer disposed between a plurality of pixels, an OLED light emitting layer disposed on the pixel electrode and the bank layer, a cathode disposed on the OLED light emitting layer, and a seal disposed on the cathode The film may further include a film and a filler disposed on the sealing film.

  Further, the opening may be wider than the interval between adjacent pixel electrodes.

  The opening may have a first opening arranged between pixels adjacent to the left and right.

  Further, the opening may have a second opening that is disposed between vertically adjacent pixels.

  The opening may include a first opening disposed between pixels adjacent to the left and right and a second opening disposed between pixels adjacent vertically.

  The storage capacitor electrode has a third opening through which a contact hole for electrically connecting the pixel electrode and the pixel circuit passes, and the first opening and the second opening are not formed near the third opening. It may be a feature.

  Further, the plurality of pixels may be arranged in a delta arrangement, and the opening may be formed in an L shape.

It is a figure which shows the perspective view of the display apparatus in one Embodiment of this invention. It is a figure which shows the top view of the display apparatus in one Embodiment of this invention. It is a figure which shows the pixel circuit of the display apparatus in one Embodiment of this invention. It is a figure which shows the top view of the pixel circuit of the display apparatus in 1st Embodiment of this invention. It is a figure which shows the top view of the pixel circuit of the display apparatus in 1st Embodiment of this invention. It is a figure which shows sectional drawing of the pixel circuit of the display apparatus in 1st Embodiment of this invention. It is a figure which shows the top view of the pixel circuit of the display apparatus in 2nd Embodiment of this invention. It is a figure which shows the top view of the pixel circuit of the display apparatus in 2nd Embodiment of this invention. It is a figure which shows the top view of the pixel circuit of the display apparatus in 5th Embodiment of this invention. It is a figure which shows the top view of the pixel circuit of the display apparatus in 5th Embodiment of this invention. It is a figure which shows sectional drawing of the display apparatus in a prior art.

  Embodiments of the present invention will be described below with reference to the drawings. It should be noted that the disclosure is merely an example, and those skilled in the art can easily conceive of appropriate modifications while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, the drawings may be schematically represented with respect to the width, thickness, shape, and the like of each part in comparison with actual aspects for the sake of clarity of explanation, but are merely examples, and the interpretation of the present invention is not limited. It is not limited. In addition, in the present specification and each drawing, elements similar to those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description may be omitted as appropriate.

<Embodiment 1>
The configuration of the display device according to the first embodiment will be described with reference to FIGS.

[Outline of display device]
First, the outline of the display device according to the embodiment will be described with reference to FIGS. FIG. 1 is a diagram showing a perspective view of a display device according to Embodiment 1 of the present invention. Moreover, FIG. 2 is a figure which shows the top view of the display apparatus in Embodiment 1 of this invention.

  As shown in FIGS. 1 and 2, the display device in Embodiment 1 includes a substrate 200 having a display region 210 in which a light emitting element is provided in each of a plurality of pixels, and pixel electrodes 40 are arranged in a matrix. It includes a counter substrate 300 facing the driver IC, a driver IC 400 provided in a region where the counter substrate 300 is exposed, and an FPC (Flexible Printed Circuits) 500. The substrate 200 is divided into a display area 210 and a peripheral area 220 located around the display area 210. In the substrate 200, the pixel electrodes 40 are arranged in a matrix in the display region 210, and the pixel circuits described in the embodiment are arranged in each of the plurality of pixel electrodes 40. The FPC 500 includes a terminal portion 600 that is connected to a controller circuit that controls the drive circuit.

  Referring to FIG. 2, in the display area 210, scanning signal lines 61 are arranged in the horizontal direction, and video signal lines 62 and drive power supply lines 63 are arranged in a matrix in the vertical direction. The pixel electrode 40 corresponds to a region surrounded by the scanning signal line 61, the video signal line 62, and the drive power supply line 63. In FIG. 2, the pixel electrode 40 and the region surrounded by the scanning signal line 61, the video signal line 62, and the drive power supply line 63 are illustrated without overlapping for explanation, but the pixel region and these lines overlap on a plane. May be arranged.

[Pixel circuit diagram]
Next, the pixel circuit of the embodiment will be described with reference to FIG.

  As shown in FIG. 3, the pixel circuit 12 according to the first embodiment includes a control TFT 71, a drive TFT 72, and a storage capacitor 73. For example, when an n-type semiconductor is used for the control TFT 71 and the drive TFT 72, the gate of the control TFT 71 is connected to the scanning signal line 61, the source is connected to the video signal line 62, the drain is one end of the storage capacitor 73, and the gate of the drive TFT 72. Connected to. The source of the drive TFT 72 is connected to the drive power supply line 63, and the drain is connected to the pixel electrode 40. The pixel electrode 40 is connected to the other end of the storage capacitor 73, the anode of the OLED element 74, and one end of the storage capacitor 36. The other end of the storage capacitor 36 is a storage capacitor electrode 30. The storage capacitor electrodes 30 corresponding to the adjacent pixels are connected to each other by a storage capacitor wiring 35. Although not shown in FIG. 3, the storage capacitor electrodes 30 in the vertical direction are also connected by the storage capacitor wiring 35.

  When a predetermined voltage is applied to the gate of the control TFT 71, the control TFT 71 gives a potential corresponding to the video signal line 62 to the storage capacitor 73. A potential of the gate of the driving TFT 72 is held by the storage capacitor 73, and a current corresponding to the charge of the storage capacitor 73 is supplied from the drive power supply line 63 to the anode of the OLED element 74. The cathode of the OLED element 74 is connected to the ground electrode or the negative potential cathode 18.

[Pixel configuration]
Next, the structure of the storage capacitor electrode according to the first embodiment will be described with reference to FIGS.

  FIG. 4 is a plan view of the storage capacitor electrode 30 and the storage capacitor wiring 35 according to the first embodiment, and is an enlarged view of a portion in which the storage capacitor electrodes 30 are arranged in three rows and four rows. The storage capacitor electrode 30 is formed in a rectangular shape, and a first opening 31 is formed in the upper right portion. A pixel electrode 40 (not shown) having a shape corresponding to the shape of the storage capacitor electrode 30 is stacked via a capacitor insulating film 15 (not shown) to form a storage capacitor 36 (not shown).

  A second opening 32 is formed in a vertically long rectangular shape between the storage capacitor electrodes 30 adjacent to the left and right, and a third opening 33 is formed in a horizontally long rectangular shape between the storage capacitor electrodes 30 adjacent in the vertical direction. Is done. The vertical length of the second opening 32 and the horizontal length of the third opening 33 are formed shorter than the side length of the corresponding storage capacitor electrode 30. Looking at the four storage capacitor electrodes 30 arranged in 2 × 2, the lower right vertex of the storage capacitor electrode 30 arranged at the upper left, the lower left vertex of the storage capacitor electrode 30 arranged at the upper right, and the lower right It can be seen that the upper left vertex of the storage capacitor electrode 30 and the upper right vertex of the storage capacitor electrode 30 arranged at the lower left are connected via the storage capacitor wiring 35, respectively.

  FIG. 5 is a plan view of the pixel circuit of the display device according to the first embodiment, and shows a positional relationship between the storage capacitor electrode 30 and the storage capacitor wiring 35, the pixel electrode 40, and the like.

  The pixel electrode 40 is formed and arranged in a rectangular shape so as to correspond to the shape of the storage capacitor electrode 30. Here, referring also to FIG. 4, it can be seen that the pixel electrode 40 is formed slightly larger than the storage capacitor electrode 30. From another viewpoint, the horizontal width of the second opening 32 having a vertically long rectangular shape is formed wider than the interval between the pixel electrodes 40 adjacent to the left and right. Similarly, the vertical width of the third opening 33 having a horizontally long rectangular shape is formed wider than the interval between the pixel electrodes 40 adjacent in the vertical direction.

  A region surrounded by a broken line 31 ′ at the upper right of the pixel electrode 40 is a region where the first opening 31 is disposed. The light emitting portion 41 is formed in an L shape in a portion excluding the region where the first opening 31 is formed. The light emitting section 41 is a region where the bank layer 16 (not shown) is not disposed between the pixel electrode 40 and the OLED light emitting layer 17 (not shown), and the OLED light emitting layer 17 (not shown) is actually used. This means the area that emits light.

  FIG. 6 is a cross-sectional view taken along the line A-A ′ of FIG. 4 in the pixel circuit of the display device according to the first embodiment.

  A pixel circuit 12 is disposed on the lower substrate 11, and an interlayer insulating film 13 is disposed on the lower substrate 11 and the pixel circuit 12. Here, the lower substrate 11 may be formed of glass, resin, or the like, and the interlayer insulating film 13 may be formed by laminating a plurality of layers formed of an inorganic material such as silicon nitride or silicon oxide on the lower side. The video signal line 62 and the drive power supply line 63 (both not shown) are appropriately arranged. Further, a planarization layer made of an organic material such as acrylic or polyimide may be formed above the interlayer insulating film 13.

  A storage capacitor electrode 30 is disposed on the interlayer insulating film 13. Referring to FIG. 6, there are three portions where the storage capacitor electrode 30 is not disposed, which are the first opening 31, the second opening 32, and the third opening 33 from the left in the drawing. A contact hole 14 for electrically connecting the pixel electrode 40 and the pixel circuit 12 is formed in the first opening 31. That is, the first opening 31 is an opening formed so that the storage capacitor electrode 30 does not contact the contact hole 14.

  A capacitor insulating film 15 is formed on the storage capacitor electrode 30 and the interlayer insulating film 13, and the pixel electrode 40 is disposed on the capacitor insulating film 15. A contact hole 14 for electrically connecting the pixel electrode 40 and the pixel circuit 12 is formed in the capacitive insulating film 15 above the first opening 31. The storage capacitor electrode 30 faces the pixel electrode 40 with the capacitor insulating film 15 interposed therebetween, and forms a storage capacitor 36. As described above, since the storage capacitor electrode 30 is disposed corresponding to the shape of the pixel electrode 40, the area where the pixel electrode 40 is not disposed and the position where the second opening 32 and the third opening 33 are formed substantially coincide. To do. Referring to FIG. 6, when comparing the width of the region where the pixel electrode 40 is not disposed and the corresponding widths of the second opening 32 and the third opening 33, the width of the second opening 32 and the third opening 33 is greater. It can be seen that is widely formed.

  A bank layer 16 for partitioning pixels is formed in a region where the pixel electrode 40 corresponding to the third opening 33 is not disposed. The bank layer 16 is also formed in a region where the pixel electrode 40 corresponding to the second opening 32 is not disposed and a region where the contact hole 14 is disposed. The bank layer 16 is made of a transparent insulating organic material such as acrylic or polyimide. An OLED light emitting layer 17, a cathode 18, and a sealing film 19 are sequentially stacked on the bank layer 16 and the pixel electrode 40, and a filler 20 is formed on the sealing film 19. The OLED light emitting layer 17, the cathode 18, and the sealing film 19 stacked on the bank layer 16 are rounded along the shape of the bank layer 16. Color filters 21, 22, and 23 are disposed on the filler 20. A black matrix 24 is formed on the bank layer 16. An upper substrate 25 is formed on the color filters 21, 22, 23 and the black matrix 24.

  When a predetermined voltage is applied between the pixel electrode 40 and the cathode 18, the OLED light emitting layer 17 between the pixel electrode 40 and the cathode 18 emits light, and light emitted from the OLED light emitting layer 17 extends in all directions. The light 91 emitted upward from the OLED light emitting layer 17 passes through the cathode 18, the sealing film 19, and the filler 20, passes through the color filter 22, and is emitted as light of a desired color. On the other hand, the light 92 emitted from the OLED light emitting layer 17 in an oblique direction reaches a point P that is an interface between the sealing film 19 and the filler 20. The refractive index of the sealing film 19 and the filler 20 is generally different, and the interface between the sealing film 19 and the filler 20 in the vicinity of the bank layer 16 is rounded along the shape of the bank layer 16, so that OLED emission Reflection and refraction of light occur depending on the angle of light emitted from the layer 17 and the angle of the interface. FIG. 6 shows that light 93 refracted in the same direction as the light 92 and light 94 reflected at the point P toward the bank layer 16 are generated.

  Since the light 93 enters the black matrix 24 and is attenuated, it does not pass through the color filter 21 of the adjacent pixel and is not emitted to the outside. Unlike the first embodiment, when the storage capacitor wiring 35 is formed in the portion where the third opening 33 is formed, the light 94 is reflected at the virtual point Q. The light 95 ′ is light that is assumed to be reflected at the virtual point Q. When the light 95 ′ is not incident on the pixel electrode 40 and the black matrix 24, the light 95 ′ is emitted to the outside through the color filter 21 that is an adjacent pixel.

  In the first embodiment, the storage capacitor electrode 30 (the storage capacitor wiring 35) is not disposed in a portion corresponding to between adjacent pixels, and the third opening 33 is formed. By forming the third opening 33, the light 94 reflected at the point P is emitted in the direction in which the bank layer 16 is disposed. The light 94 passes through the third opening 33 and travels toward the lower substrate 11. The light 94 traveling toward the lower substrate 11 reaches the pixel circuit 12 or the substrate holding the lower substrate 11 and is absorbed or diffused. Thus, in the first embodiment, by forming the third opening 33 below the bank layer 16, reflection of light reaching the third opening 33 can be prevented. As a result, it is possible to prevent light leakage and unnecessary color mixing to pixels adjacent in the vertical direction, and to improve the display characteristics of the display device.

  The contents described above are the same for the second opening 32, and it is possible to prevent light leakage and unnecessary color mixing to the pixels adjacent to the left and right, and to improve the display characteristics of the display device.

  Here, the relationship between the width of the second opening 32 and the third opening 33 and the interval between the adjacent pixel electrodes 40 will be described. From the viewpoint of eliminating reflection when the storage capacitor electrode 30 (storage capacitor wiring 35) is present between the pixel electrodes 40, the widths of the second opening 32 and the third opening 33 are approximately the same as the interval between the adjacent pixel electrodes 40. It is preferable that It is more preferable that the widths of the second opening 32 and the third opening 33 are wider than the interval between the adjacent pixel electrodes 40.

(Modification)
The second opening 32 and the third opening 33 do not have to be completely opened, and even if a part of the second opening 32 and the third opening 33 is not opened, the reflection at the storage capacitor electrode 30 (retention capacitor wiring 35) is prevented. One of the purposes can be realized. For example, from the viewpoint of reducing the resistance of the storage capacitor wiring 35 as much as possible, a plurality of minute lines connecting the adjacent storage capacitor electrodes 30 may be formed in the second opening 32 or the third opening 33.

<Embodiment 2>
Next, the configuration of the display device according to the second embodiment will be described with reference to FIGS. Note that the second embodiment and the first embodiment are common to portions that are not particularly mentioned.

  FIG. 7 is a plan view of the storage capacitor electrode 30 and the storage capacitor wiring 35 in the second embodiment. The second embodiment is characterized in that the second opening 32 and the third opening 33 are not formed near the first opening 31.

  FIG. 8 is a plan view of the pixel circuit of the display device according to the second embodiment, and shows the positional relationship between the storage capacitor electrode 30, the storage capacitor wiring 35, the pixel electrode 40, and the like. Between the pixel electrode 40a and the pixel electrode 40b that are vertically adjacent to each other, the third opening 33 is not formed in the vicinity of the region where the first opening 31 of the pixel electrode 40b is formed. Is formed. Further, between the pixel electrode 40b and the pixel electrode 40c adjacent to the left and right, the second opening 32 is not formed in the vicinity of the region where the first opening 31 of the pixel electrode 40b is formed. 35 is formed.

  As shown in FIGS. 7 and 8, the first opening 31 exists near the apex of the rectangular pixel electrode 40, and the light emitting unit 41 forms an L shape. In the vicinity where the first opening 31 exists between the light emitting part 41a and the light emitting part 41b, the distance between the light emitting part 41a and the light emitting part 41b is relatively wide, so that the light is reflected at the interface between the sealing film 19 and the filler 20. Even if the reflected light reaches the layer where the storage capacitor electrode 30 and the storage capacitor wiring 35 are formed and is reflected, it is highly likely to enter the black matrix 24 (not shown) and is transmitted through the color filter of the adjacent pixel. Therefore, it is unlikely to be emitted to the outside. Further, a contact hole 14 (not shown) exists in the first opening 31 and functions as an obstacle for light reflected at the interface between the sealing film 19 and the filler 20. Therefore, even if the second opening 32 and the third opening 33 are not formed in the vicinity of the first opening 31, it is possible to suppress the reflection of the storage capacitor electrode 30 (the storage capacitor wiring 35). By not forming the second opening 32 and the third opening 33 in the vicinity of the first opening 31, the resistivity of the storage capacitor wiring 35 can be lowered.

<Embodiment 3>
In the first and second embodiments, two types of openings are provided: a second opening 32 formed between pixels adjacent to the left and right, and a third opening 33 formed between pixels adjacent to the top and bottom. However, the embodiment of the present invention is not limited to this. As an example, when adjacent pixels emit light of the same color, the influence of color mixing or the like is relatively small. Therefore, it is possible not to provide an opening in the storage capacitor electrode 30 between pixels emitting the same color. . Therefore, when pixels of the same color are adjacent to each other in the upper and lower directions, no opening is provided between the pixels adjacent to the upper and lower sides, and when pixels of the same color are adjacent to the left and right, an opening is provided between the pixels adjacent to the left and right. Is not provided.

  In the case where the pixel has a rectangular shape, it is possible not to provide an opening in the storage capacitor electrode 30 in the short side portion of the pixel having a relatively small influence of color mixing. For example, when the pixel is formed in a vertically long rectangle, no opening is provided between the vertically adjacent pixels.

<Embodiment 4>
In the first to third embodiments, it is assumed that the shape of each pixel is the same. Unlike these configurations, for example, when the emission color of the display device has three colors of red (R), green (G), and blue (G), only the pixel that emits green light is reduced. Pixels having different sizes may be arranged. Even in such a case, an opening may be provided in the storage capacitor electrode 30 (the storage capacitor wiring 35) in a portion corresponding to between the vertically adjacent pixels and between the horizontally adjacent pixels.

<Embodiment 5>
Finally, the structure of the storage capacitor electrode according to the fifth embodiment will be described with reference to FIGS. 9 and 10.

  FIG. 9 is a plan view of the storage capacitor electrode 30 and the storage capacitor wiring 35 in the fifth embodiment. Referring to FIG. 9, the pixel electrodes 40 are arranged in three horizontal rows. The pixel electrodes 40 arranged in the middle column are arranged so as to be shifted from the positions of the pixel electrodes 40 in the upper and lower columns by about half the width of the pixel electrode 40 (delta arrangement). The pixel electrode 40 has a substantially square shape, and the first opening 31 is formed in the upper right portion. And between the pixel electrodes 40 adjacent to the left and right, from the portion excluding the vicinity of the first opening 31 to the portion of the pixel electrode 40 adjacent to the upper and lower sides where the first opening 31 does not exist, an L shape (L shape) 4th opening 34 is formed in the form rotated 90 degrees to the left.

  FIG. 10 is a plan view of the pixel circuit of the display device according to the fifth embodiment, and shows the positional relationship between the storage capacitor electrode 30, the storage capacitor wiring 35, the pixel electrode 40, and the like.

  The pixel electrode 40e is surrounded by the pixel electrodes 40f, 40g, 40h, 40i, 40j, and 40k. A fourth opening 34a is formed between the upper left side of the pixel electrode 40e and the lower right side of the pixel electrode 40f. A fourth opening 34b is formed between the lower right side of the pixel electrode 40e and the lower left side of the pixel electrode 40h, and between the lower right side of the pixel electrode 40e and the upper left side of the pixel electrode 40i. A fourth opening 34c is formed between the lower left side of the pixel electrode 40e and the lower right side of the pixel electrode 40k.

  On the other hand, the upper right side of the pixel electrode 40e and the lower left side of the pixel electrode 40g, the upper right side of the pixel electrode 40e and the upper left side of the pixel electrode 40h, the lower left side of the pixel electrode 40e, the upper right side of the pixel electrode 40j, and the pixel electrode 40e Between the upper left side and the upper right side of the pixel electrode 40k, no opening is formed in the storage capacitor electrode 30, and the storage capacitor wiring 35 is disposed. However, as described in the second embodiment, since the portion where the above-described opening is not formed is in the vicinity of the first opening 31, the influence of light reflection on the storage capacitor wiring 35 is small. Accordingly, the shape and arrangement of the fourth opening 34 shown in FIGS. 9 and 10 can prevent the light leakage to the adjacent pixels and unnecessary color mixture while forming the storage capacitor wiring 35 and improve the display characteristics of the display device. Is possible.

  In the scope of the idea of the present invention, those skilled in the art can conceive various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. For example, those in which the person skilled in the art appropriately added, deleted, or changed the design of the above-described embodiments, or those in which the process was added, omitted, or changed the conditions are also included in the gist of the present invention. As long as it is provided, it is included in the scope of the present invention.

11: Lower substrate 12: Pixel circuit 13: Interlayer insulating film 14: Contact hole 15: Capacitor insulating film 16: Bank layer 17: OLED light emitting layer 18: Cathode 19: Sealing film 20: Fillers 21, 22, 23: Color Filter 24: Black matrix 25: Upper substrate 30: Retention capacitance electrode 31: First opening 32: Second opening 33: Third openings 34, 34a, 34b, 34c: Fourth opening 35: Retention capacitance wiring 36: Retention capacitance 40 40a, 40b, 40c, 40e, 40f, 40g, 40h, 40i, 40j, 40k: pixel electrodes 41, 41a, 41b: light emitting unit 61: scanning signal line 62: video signal line 63: drive power supply line 71: control TFT
72: Drive TFT
73: Storage capacitor 74: OLED elements 91, 92, 93, 94, 95, 95 ′: Light 200: Substrate 210: Display region 220: Peripheral region 300: Counter substrate 400: Driver IC
500: FPC
600: Terminal part

Claims (8)

A plurality of pixels including a pixel electrode and a storage capacitor electrode opposed to the pixel electrode via an insulating film;
The display device, wherein the storage capacitor electrode is provided with an opening between the adjacent pixel electrodes. A bank layer disposed between the plurality of pixels;
An OLED light emitting layer disposed on the pixel electrode and the bank layer;
A cathode disposed on the OLED light-emitting layer;
A sealing film disposed on the cathode;
The display device according to claim 1, further comprising: a filler disposed on the sealing film.   The display device according to claim 2, wherein the opening is wider than an interval between the adjacent pixel electrodes.   The display device according to claim 2, wherein the opening has a first opening disposed between the pixels adjacent to the left and right.   The display device according to claim 2, wherein the opening includes a second opening disposed between the pixels adjacent in the vertical direction. The display according to claim 2, wherein the opening includes a first opening disposed between the pixels adjacent to the left and right, and a second opening disposed between the pixels adjacent to the top and bottom. apparatus. The storage capacitor electrode has a third opening through which a contact hole electrically connecting the pixel electrode and the pixel circuit passes;
The display device according to claim 6, wherein the first opening and the second opening are not formed near the third opening. The plurality of pixels are arranged in a delta arrangement,
The display device according to claim 2, wherein the opening is formed in an L shape.

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