JP2016039169A - Method for guaranteeing resistivity of single crystal substrate - Google Patents

Method for guaranteeing resistivity of single crystal substrate Download PDF

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JP2016039169A
JP2016039169A JP2014159582A JP2014159582A JP2016039169A JP 2016039169 A JP2016039169 A JP 2016039169A JP 2014159582 A JP2014159582 A JP 2014159582A JP 2014159582 A JP2014159582 A JP 2014159582A JP 2016039169 A JP2016039169 A JP 2016039169A
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resistivity
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鈴木 聡
Satoshi Suzuki
聡 鈴木
義博 児玉
Yoshihiro Kodama
義博 児玉
慶一 中澤
Keiichi Nakazawa
慶一 中澤
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Shin Etsu Handotai Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To provide a method for guaranteeing resistivity of a single crystal substrate which efficiently guarantees with higher accuracy than conventional one that resistivity of a single crystal substrate is within a predetermined range.SOLUTION: A method for guaranteeing resistivity of a single crystal substrate obtained from single crystal produced on one production condition includes: a step b of acquiring resistivity distribution in a radial direction; a step d of determining a position at which frequency of appearance of the maximum value of resistivity and the minimum value of resistivity becomes the largest; a step e of determining a measurement point of guaranteeing resistivity of a single crystal substrate; and a step h of guaranteeing that the resistivity of the single crystal substrate obtained from single crystal produced on the same production condition as the production condition is within a predetermined range.EFFECT: The guaranteeing method is suitable for guaranteeing resistivity of a silicon substrate with a diameter of 150 mm or more that has been produced by a FZ (floating zone) method in which in-plane resistivity distribution is larger than a CZ (Czochralski) method.SELECTED DRAWING: Figure 1

Description

本発明は、単結晶基板の抵抗率保証方法に関する。   The present invention relates to a resistivity guarantee method for a single crystal substrate.

単結晶基板としては、例えば、半導体素子製造材料として使用されるシリコン単結晶基板(以下シリコン基板という)が挙げられる。これはCZ法(チョクラルスキー法)やFZ法(フローティングゾーン法または浮遊帯溶融法)等の方法を用いて製造されるシリコン単結晶から切り出されるものである。   Examples of the single crystal substrate include a silicon single crystal substrate (hereinafter referred to as a silicon substrate) used as a semiconductor element manufacturing material. This is cut out from a silicon single crystal manufactured using a method such as CZ method (Czochralski method) or FZ method (floating zone method or floating zone melting method).

シリコン基板から製造される素子、例えば電力制御に用いるパワー半導体では、オン抵抗は小さい方が損失は小さくなるが、素子の破壊を防ぐためにある程度の耐圧も必要であり、抵抗率がある一定以上/以下であれば十分というわけではない。シリコン基板から半導体素子を製造する際には、シリコン基板の抵抗率を所定の範囲内にすることが求められており、且つ半導体素子設計においては安全を考慮してマージンを持たせるため、年々シリコン基板に求められる抵抗率範囲(抵抗率規格幅、ある狙い抵抗率値に対して±○○%、という数値で表すことが多い)は縮小されてきている。   In an element manufactured from a silicon substrate, for example, a power semiconductor used for power control, the smaller the on-resistance, the smaller the loss. However, a certain level of breakdown voltage is required to prevent the element from being destroyed, and the resistivity is above a certain level / The following is not enough. When manufacturing a semiconductor element from a silicon substrate, it is required that the resistivity of the silicon substrate be within a predetermined range, and in designing the semiconductor element, a margin is given in consideration of safety. The resistivity range required for a substrate (resistivity standard width, which is often expressed as a numerical value ±±% with respect to a target resistivity value) has been reduced.

このような事情から、シリコン基板の抵抗率が所定の範囲内であることを保証する必要がある。   For these reasons, it is necessary to ensure that the resistivity of the silicon substrate is within a predetermined range.

シリコン基板の抵抗率測定には、四探針法などの方法を用いる。四探針法は、半導体シリコン基板の抵抗率測定方法として最も一般的に使用されている方法であり、ASTM(American Society for Testing and Materials)により標準化されている(ASTM F84−99)。図6は、四探針法の一例を示す模式図である。四探針法は、図6に示すように、シリコン単結晶基板5の被測定面4上に探針となる4本の電極を立て、定電流電源1から測定電流通電電極3を介して一定電流を流し、その状態で測定用電極2間の電位差を測定し、該電位差及び測定用電極間距離から抵抗率を算出する方法である。測定電流通電電極3と測定用電極2とを分離することにより、電極接触抵抗の影響を排除することができる。   For measuring the resistivity of the silicon substrate, a method such as a four-probe method is used. The four-point probe method is the most commonly used method for measuring the resistivity of a semiconductor silicon substrate, and is standardized by ASTM (American Society for Testing and Materials) (ASTM F84-99). FIG. 6 is a schematic diagram showing an example of the four-point probe method. In the four-probe method, as shown in FIG. 6, four electrodes serving as probes are set up on the surface to be measured 4 of the silicon single crystal substrate 5, and the constant current power source 1 passes through the measurement current conducting electrode 3 to make a constant. In this method, a current is passed, the potential difference between the measurement electrodes 2 is measured in this state, and the resistivity is calculated from the potential difference and the distance between the measurement electrodes. By separating the measurement current conducting electrode 3 and the measurement electrode 2, it is possible to eliminate the influence of electrode contact resistance.

従来、製造したシリコン単結晶インゴットの抵抗率評価の方法として、インゴットを所定の長さのブロックに切断した後、各ブロックの両端の部分を評価する方法がある。例えば、シリコン単結晶インゴットをブロックに切断する際、もしくは切断後に、インゴットの各切断位置=各ブロックの両端から抵抗率測定用のシリコン基板サンプルを採取し、そのシリコン基板サンプルの抵抗率を評価することによってブロックの合否判定を行う。この時に、シリコン単結晶ブロックに対し単結晶成長軸方向に沿った抵抗率も測定し、ブロック両端の抵抗率測定結果と合わせてその結果にも合否判定を行うことでブロック内部の抵抗率を保証することができる。CZシリコン単結晶の場合には、酸素ドナーの影響により、単結晶ブロックの状態で結晶成長軸方向に沿った抵抗率を適正に測定することが困難であるが、偏析係数等から計算によって各ブロック内部の抵抗率はかなり正確に予測することができるため、ブロック両端の抵抗率がわかればブロック内部の抵抗率を保証することができる。   Conventionally, as a method of evaluating the resistivity of a manufactured silicon single crystal ingot, there is a method of evaluating portions at both ends of each block after the ingot is cut into blocks having a predetermined length. For example, when a silicon single crystal ingot is cut into blocks, or after cutting, each cutting position of the ingot = a silicon substrate sample for resistivity measurement is taken from both ends of each block, and the resistivity of the silicon substrate sample is evaluated Thus, the pass / fail judgment of the block is performed. At this time, the resistivity along the single crystal growth axis direction of the silicon single crystal block is also measured, and the resistivity inside the block is guaranteed by making a pass / fail judgment along with the result of the resistivity measurement at both ends of the block. can do. In the case of a CZ silicon single crystal, it is difficult to properly measure the resistivity along the crystal growth axis direction in the single crystal block state due to the influence of oxygen donors. Since the internal resistivity can be predicted fairly accurately, if the resistivity at both ends of the block is known, the resistivity inside the block can be guaranteed.

シリコン単結晶ブロック成長軸方向での抵抗率測定値が、要求されている範囲内ではあるがその範囲の上限もしくは下限に極めて近い値であった場合には、単結晶断面内の抵抗率が均等ではなく分布を持っていると、要求される抵抗率範囲を超える部分が単結晶断面内で発生する可能性がある。このため、成長軸方向抵抗率測定値に対しては、要求される抵抗率範囲から更に内寄せして幅を狭めた抵抗率範囲を規格とし、該抵抗率規格に当てはめて合否判定を行うこともできる。   If the measured resistivity value in the direction of the silicon single crystal block growth axis is within the required range but extremely close to the upper limit or lower limit of the range, the resistivity within the single crystal cross section is equal. However, if it has a distribution, a portion exceeding the required resistivity range may occur in the single crystal cross section. For this reason, for the measured resistivity value in the growth axis direction, the resistivity range that is further inward from the required resistivity range and narrowed is used as a standard, and pass / fail judgment is performed by applying the standard to the resistivity standard. You can also.

前記の様な方法により、取得したシリコン単結晶の抵抗率が要求される範囲内であることを保証することができる。すなわち、シリコン単結晶から採取され、半導体素子の材料として使用するシリコン基板は全て要求される抵抗率範囲内であることを保証することができる。   By such a method, it can be ensured that the resistivity of the obtained silicon single crystal is within the required range. That is, it can be ensured that all silicon substrates taken from a silicon single crystal and used as a material for a semiconductor element are within the required resistivity range.

更に、半導体素子の材料として使用する単結晶基板が全て要求される抵抗率範囲内であることを保証するより確実な方法として、シリコン単結晶から切り出した全ての単結晶基板の断面内抵抗率測定を行い、合否判定する方法を採ることができる(全数測定・保証法とも呼ぶ)。この方法はシリコン単結晶ブロック両端面の抵抗率測定を行い保証する方法よりも生産性が劣るものではあるが、近年の半導体素子製造材料となる単結晶基板に対しての、抵抗率規格幅をより小さいものとするという要求に確実に対応するためには、全数測定・保証法が有効である。   Furthermore, as a more reliable method to ensure that all single crystal substrates used as semiconductor element materials are within the required resistivity range, cross-sectional resistivity measurements of all single crystal substrates cut from silicon single crystals are performed. And a pass / fail judgment method can be adopted (also called the 100% measurement / guarantee method). This method is inferior in productivity to the method of measuring and guaranteeing the resistivity of both end faces of the silicon single crystal block, but the resistivity standard width for a single crystal substrate which is a recent semiconductor element manufacturing material is reduced. The 100% measurement and guarantee method is effective to meet the demand for a smaller size.

シリコン基板を切り出すシリコン単結晶が、成長につれて、或いは結晶成長中に、結晶断面内の抵抗率分布形状が不規則に変化する様なシリコン単結晶の場合には、全数測定・保証法が特に有効である。この方法の適用により、単結晶基板から半導体素子を製造する際の生産性・歩留の向上、また、より高品質の半導体素子の製造が可能となる。   When the silicon single crystal from which the silicon substrate is cut out is a silicon single crystal whose resistivity distribution shape in the crystal cross-section changes irregularly during or during growth, the 100% measurement / guarantee method is particularly effective. It is. Application of this method makes it possible to improve productivity and yield when manufacturing semiconductor elements from a single crystal substrate, and to manufacture higher quality semiconductor elements.

通常、シリコン基板はシリコン単結晶を、単結晶成長軸方向と交わる断面方向に切断して製造する。単結晶ブロックの両端面からシリコン基板サンプルを採取して抵抗率を測定する方法でも、全数測定・保証法でも、シリコン基板表面の所定の位置の抵抗率を測定する。この時、所定の位置は、シリコン基板の特性やユーザーの要求に基づいて決定し、例えばシリコン基板の中心、外周付近、或いは中心と外周の中央(r/2位置)等とする。
測定した抵抗率値が全て要求される抵抗率範囲内に収まるものであれば合格と判定される。シリコン基板を製品とする際には合格品のみで、不合格品は取り除き出荷しない。
Usually, a silicon substrate is manufactured by cutting a silicon single crystal in a cross-sectional direction intersecting with a single crystal growth axis direction. The resistivity at a predetermined position on the surface of the silicon substrate is measured by either the method of measuring the resistivity by collecting silicon substrate samples from both end faces of the single crystal block, or the 100% measurement / guarantee method. At this time, the predetermined position is determined based on the characteristics of the silicon substrate and the user's request.
If all measured resistivity values fall within the required resistivity range, it is determined to be acceptable. When a silicon substrate is used as a product, only acceptable products are removed and rejected products are not removed and shipped.

特許文献1では、ウェーハ表面の面内における抵抗率のばらつきを評価することが開示されている。しかしながら、具体的に面内をどのように測定するのかについては開示されていない。   Japanese Patent Application Laid-Open No. H10-228561 discloses evaluating the variation in resistivity within the wafer surface. However, it is not disclosed how to measure in-plane specifically.

特許第5321460号公報Japanese Patent No. 531460

近年は、単結晶基板の抵抗率規格幅の縮小の他にも、単結晶基板に含有する不純物量を極めて少量とする、或いは一定の値にコントロールする、など、抵抗率以外の品質についても新たな要求が出てきている。   In recent years, in addition to the reduction of the resistivity standard width of single crystal substrates, quality other than resistivity has also been newly introduced, such as making the amount of impurities contained in single crystal substrates extremely small or controlling to a constant value. Requests are coming out.

抵抗率規格幅縮小と同時に様々な要求品質を満たすために、単結晶製造条件を調整・変更することがある。この際に、他の品質には全く変化なしで、ある一つの品質項目だけを所定の値、或いは所定の狭い範囲にコントロールすることは困難であり、通常は程度の差はあるが目的の品質項目以外にも影響を及ぼしてしまう場合が多い。   In order to satisfy various required qualities at the same time as reducing the resistivity standard width, the single crystal manufacturing conditions may be adjusted or changed. At this time, it is difficult to control only one certain quality item to a predetermined value or a predetermined narrow range without changing other quality at all. In many cases, it affects other than the items.

すなわち、単結晶基板に要求される各々の品質は満たしており、更に抵抗率規格の要求も満たすことができているものの、結晶断面内の抵抗率分布形状が単結晶製造条件調整前と比べて変化する場合がある。   That is, each quality required for the single crystal substrate is satisfied, and further, the requirements of the resistivity standard can be satisfied, but the resistivity distribution shape in the crystal cross section is compared with that before adjusting the single crystal manufacturing conditions. May change.

前記のような抵抗率分布形状変化が発生した時に、シリコン基板の面内の抵抗率測定点を変更することなく抵抗率測定、保証を行った場合、単結晶基板面内のどこかで、要求される抵抗率規格から外れる部分が発生する恐れがある。   When the resistivity distribution shape change as described above occurs, if the resistivity measurement and guarantee are performed without changing the resistivity measurement point in the surface of the silicon substrate, it is requested somewhere in the surface of the single crystal substrate. There is a possibility that a part deviating from the resistivity standard is generated.

例えば、全シリコン基板かつ基板面内全域の抵抗率測定を実施して合否判定を行えば、半導体素子材料として使用されるシリコン基板の全てが求められる抵抗率範囲内であることが保証できるが、その様な方法を採用すると抵抗率測定にかかる時間が膨大となり、大量生産する商業製品としては現実的ではない。   For example, if the pass / fail judgment is performed by measuring the resistivity of the entire silicon substrate and the entire substrate surface, it can be guaranteed that all of the silicon substrates used as semiconductor element materials are within the required resistivity range. If such a method is adopted, the time required for the resistivity measurement becomes enormous, which is not practical as a commercial product mass-produced.

本発明は、上記問題点に鑑みてなされたものであって、効率よく単結晶基板の抵抗率が所定の範囲内であることを従来より高い確度で保証することができる単結晶基板の抵抗率保証方法を提供することを目的とする。   The present invention has been made in view of the above problems, and the resistivity of a single crystal substrate that can efficiently guarantee that the resistivity of the single crystal substrate is within a predetermined range with higher accuracy than in the past. The purpose is to provide a guarantee method.

上記目的を達成するために、本発明では、一つの製造条件で製造された単結晶から得られた単結晶基板の抵抗率を保証する方法であって、
前記製造条件で単結晶を製造し、該単結晶から得られた複数の単結晶基板について径方向に所定の間隔で抵抗率を測定し、径方向抵抗率分布を取得する工程と、
前記単結晶基板各々について抵抗率最大値、抵抗率最小値の現れる位置を求め、前記抵抗率を測定した全単結晶基板について前記抵抗率最大値及び前記抵抗率最小値の出現頻度が最大となる位置を求める工程と、
少なくとも前記抵抗率最大値の出現頻度が最大となる位置及び前記抵抗率最小値の出現頻度が最大となる位置を含むように前記単結晶基板の抵抗率を保証する測定点を決める工程と、
前記抵抗率を保証する測定点で、前記製造条件と同一の製造条件で製造された単結晶から得られた単結晶基板の抵抗率を測定し、該単結晶基板の抵抗率が所定の範囲内であることを保証する工程と
を有することを特徴とする単結晶基板の抵抗率保証方法を提供する。
In order to achieve the above object, the present invention is a method for guaranteeing the resistivity of a single crystal substrate obtained from a single crystal manufactured under one manufacturing condition,
Producing a single crystal under the production conditions, measuring resistivity at a predetermined interval in a radial direction for a plurality of single crystal substrates obtained from the single crystal, and obtaining a radial resistivity distribution;
The position where the maximum value of resistivity and the minimum value of resistivity appear is determined for each single crystal substrate, and the frequency of appearance of the maximum value of resistivity and the minimum value of resistivity is maximized for all single crystal substrates where the resistivity is measured. A process for determining a position;
Determining a measurement point for guaranteeing the resistivity of the single crystal substrate so as to include at least a position where the appearance frequency of the maximum resistivity value is maximized and a position where the appearance frequency of the minimum resistivity value is maximized;
The resistivity of the single crystal substrate obtained from a single crystal manufactured under the same manufacturing conditions as the manufacturing conditions is measured at a measurement point that guarantees the resistivity, and the resistivity of the single crystal substrate is within a predetermined range. And a method for guaranteeing the resistivity of the single crystal substrate.

このように定めた面内位置(抵抗率を保証する測定点)で抵抗率測定を行えば、各単結晶基板の抵抗率が面内全域で、所定の範囲内、例えば、要求される抵抗率規格に収まることを短時間で従来より高い確度で保証できる。   If the resistivity measurement is performed at the in-plane position (measurement point that guarantees the resistivity) thus determined, the resistivity of each single crystal substrate is within a predetermined range, for example, the required resistivity, throughout the surface. It can be guaranteed within a short time with higher accuracy than before.

また、前記径方向抵抗率分布を取得する工程における単結晶と、前記保証する工程における単結晶を、同一の単結晶又は異なる単結晶、あるいはこれらの両方とすることができる。   The single crystal in the step of obtaining the radial resistivity distribution and the single crystal in the guaranteeing step can be the same single crystal, different single crystals, or both.

本発明では、抵抗率を保証する測定点を決定するための単結晶と抵抗率を保証する単結晶を同一のものとすることもできるし、異なるものとすることもでき、両方とすることもできる。   In the present invention, the single crystal for determining the measurement point for guaranteeing the resistivity and the single crystal for guaranteeing the resistivity can be the same, different, or both. it can.

また、前記径方向抵抗率分布を取得する工程において、前記製造条件で複数の単結晶を製造し、該複数の単結晶から得られた複数の単結晶基板について径方向に所定の間隔で抵抗率を測定し、径方向抵抗率分布を取得することが好ましい。   Further, in the step of obtaining the radial resistivity distribution, a plurality of single crystals are manufactured under the manufacturing conditions, and a plurality of single crystal substrates obtained from the plurality of single crystals are resistivity at predetermined intervals in the radial direction. Is preferably measured to obtain a radial resistivity distribution.

このように同一の製造条件で製造された複数の単結晶から得られた複数の単結晶基板の抵抗率を測定することによって、径方向抵抗率分布の信頼性をより向上させることができる。   Thus, by measuring the resistivity of the plurality of single crystal substrates obtained from the plurality of single crystals manufactured under the same manufacturing conditions, the reliability of the radial resistivity distribution can be further improved.

また、前記径方向抵抗率分布を取得する工程において、前記抵抗率を測定する所定の間隔を5mm以下の間隔とすることが好ましい。   In the step of obtaining the radial resistivity distribution, the predetermined interval for measuring the resistivity is preferably set to an interval of 5 mm or less.

このような間隔で抵抗率を測定することによって、径方向の抵抗率変動が大きい場合であっても、正確な径方向抵抗率分布を取得することができる。   By measuring the resistivity at such intervals, an accurate radial resistivity distribution can be acquired even when the radial resistivity variation is large.

また、前記保証する工程において、前記単結晶基板の全数について抵抗率を測定し、該測定値が要求される抵抗率規格を満たす場合を合格品、満たさない場合を不合格品と判定することで、前記合格品の抵抗率が前記抵抗率規格を満たすことを保証することが好ましい。   Further, in the guaranteeing step, the resistivity is measured for the total number of the single crystal substrates, and the case where the measured value satisfies the required resistivity standard is determined as a pass product, and the case where the measurement value is not satisfied is determined as a reject product. It is preferable to ensure that the resistivity of the acceptable product satisfies the resistivity standard.

このように取得した単結晶基板全数の抵抗率を測定し、要求される抵抗率規格に対して合否判定を行うことで、特に各単結晶基板が抵抗率分布を有していても、その分布が同じであれば、各単結晶基板(合格品)の抵抗率が面内全域で、求められる範囲内(抵抗率規格)に収まることを従来より高い確度で保証できる。   By measuring the resistivity of the total number of single crystal substrates obtained in this way and making a pass / fail judgment for the required resistivity standard, even if each single crystal substrate has a resistivity distribution, the distribution Are the same, it can be ensured that the resistivity of each single crystal substrate (accepted product) is within the required range (resistivity standard) over the entire surface.

また、前記測定点を決める工程の後かつ前記保証する工程の前に、前記単結晶基板について、前記抵抗率を保証する測定点で測定した抵抗率の最大値と、前記径方向抵抗率分布における抵抗率の最大値との差Δρmax、及び前記抵抗率を保証する測定点で測定した抵抗率の最小値と、前記径方向抵抗率分布における抵抗率の最小値との差Δρminを求め、要求される抵抗率規格から前記Δρmax及び前記Δρminにより決定される内寄せ幅を差し引いた内部判定規格を設定する工程を行い、
前記保証する工程において、前記単結晶基板の抵抗率の測定値が、前記内部判定規格を満たす場合を合格品、満たさない場合を不合格品と判定することで、前記合格品の抵抗率が前記抵抗率規格を満たすことを保証することが好ましい。
Further, after the step of determining the measurement point and before the step of guaranteeing, the maximum value of the resistivity measured at the measurement point for guaranteeing the resistivity and the radial resistivity distribution for the single crystal substrate. The difference Δρmax from the maximum value of the resistivity and the difference Δρmin between the minimum value of the resistivity measured at the measurement point that guarantees the resistivity and the minimum value of the resistivity in the radial resistivity distribution are obtained and requested. Performing a step of setting an internal determination standard obtained by subtracting the infeed width determined by the Δρmax and Δρmin from the resistivity standard,
In the step of guaranteeing, when the measured value of the resistivity of the single crystal substrate satisfies the internal determination standard, it is determined as a pass product, and when it does not satisfy, the pass rate is determined as a reject product. It is preferable to ensure that the resistivity specification is met.

同一製造条件で製造した単結晶から製造した単結晶基板でも、各々の単結晶基板の抵抗率分布がある程度の範囲内で変化する場合がある。この場合、上記のように内部判定規格を設け、この内部判定規格に対して合否判定を行うことで、各単結晶基板(合格品)の抵抗率が面内全域で、要求される抵抗率規格を満たすことを従来より更に高い確度で保証できる。   Even in a single crystal substrate manufactured from a single crystal manufactured under the same manufacturing conditions, the resistivity distribution of each single crystal substrate may vary within a certain range. In this case, by setting the internal determination standard as described above, and performing the pass / fail determination for this internal determination standard, the resistivity standard of each single crystal substrate (accepted product) is required across the entire surface. It can be guaranteed with higher accuracy than before.

また、前記単結晶基板を、FZ法で作製された直径150mm以上のシリコン基板とすることができる。   Further, the single crystal substrate can be a silicon substrate having a diameter of 150 mm or more manufactured by FZ method.

本発明であれば、一般にCZ法にくらべ抵抗率の面内バラツキが大きい直径150mm以上、特には直径200mm以上のFZ法で作製されたシリコン基板の抵抗率を保証することができる。   According to the present invention, it is possible to guarantee the resistivity of a silicon substrate manufactured by the FZ method having a diameter of 150 mm or more, particularly 200 mm or more, in which the in-plane variation of resistivity is generally larger than that of the CZ method.

本発明の単結晶基板の抵抗率保証方法であれば、製造条件に応じて抵抗率を保証する測定点を決定することによって、単結晶基板の抵抗率が所定の範囲内であることを従来より高い確度で保証することができる。また、基板面内全域の抵抗率を測定する方法と比べて、単結晶基板の抵抗率測定にかかる時間を減らすことができる。これにより、単結晶基板を製造する際の生産性を向上させることができ、出荷製品に、要求される抵抗率規格を満たさないものが混入するのを効率よく防ぐことができる。   With the resistivity guarantee method for a single crystal substrate according to the present invention, it is conventionally determined that the resistivity of the single crystal substrate is within a predetermined range by determining a measurement point for guaranteeing the resistivity according to manufacturing conditions. Can be guaranteed with high accuracy. In addition, the time required for measuring the resistivity of the single crystal substrate can be reduced as compared with the method of measuring the resistivity in the entire area of the substrate. Thereby, productivity at the time of manufacturing a single crystal substrate can be improved, and it is possible to efficiently prevent a product that does not satisfy a required resistivity standard from being mixed into a shipped product.

本発明の単結晶基板の抵抗率保証方法の一例を示すフロー図である。It is a flowchart which shows an example of the resistivity guarantee method of the single crystal substrate of this invention. 1つのシリコン単結晶から採取されるシリコン基板の基板面内位置と平均抵抗率値からの偏差との関係を示す図である。It is a figure which shows the relationship between the position in the substrate surface of the silicon substrate extract | collected from one silicon single crystal, and the deviation from an average resistivity value. 抵抗率を保証する測定点で測定した抵抗率の最大値及び最小値と、径方向抵抗率分布における抵抗率の最大値及び最小値との関係を示す図である。It is a figure which shows the relationship between the maximum value and minimum value of the resistivity measured at the measurement point which guarantees resistivity, and the maximum value and minimum value of the resistivity in radial direction resistivity distribution. 抵抗率最大値及び最小値の出現位置とその割合との関係を示す図である。It is a figure which shows the relationship between the appearance position of resistivity maximum value and minimum value, and its ratio. Δρmax及びΔρminの値とその割合との関係を示す図である。It is a figure which shows the relationship between the value of (DELTA) (rho) max and (DELTA) (rho) min, and its ratio. 四探針法の一例を示す模式図である。It is a schematic diagram which shows an example of the four-point probe method.

以下、本発明をより詳細に説明する。   Hereinafter, the present invention will be described in more detail.

上記のように、効率よく単結晶基板の抵抗率が所定の範囲内であることを従来より高い確度で保証することができる単結晶基板の抵抗率保証方法が求められている。   As described above, there is a need for a single crystal substrate resistivity guarantee method capable of efficiently guaranteeing that the resistivity of the single crystal substrate is within a predetermined range with higher accuracy than before.

本発明者らは、上記目的を達成するために鋭意検討を行った結果、製造条件に応じて抵抗率を保証する測定点を決定する単結晶基板の抵抗率保証方法が、上記課題を解決できることを見出し、本発明を完成させた。   As a result of intensive studies to achieve the above object, the inventors of the present invention can solve the above problems by a resistivity guarantee method for a single crystal substrate that determines a measurement point that guarantees resistivity according to manufacturing conditions. The present invention was completed.

以下、本発明の実施の形態について図面を参照して具体的に説明するが、本発明はこれらに限定されるものではない。なお、以下、単結晶基板がシリコン基板である場合を中心に説明するが、単結晶基板はこれに限定されない。   Hereinafter, embodiments of the present invention will be specifically described with reference to the drawings, but the present invention is not limited thereto. Hereinafter, the case where the single crystal substrate is a silicon substrate will be mainly described, but the single crystal substrate is not limited thereto.

図1は、本発明の単結晶基板の抵抗率保証方法の一例を示すフロー図である。   FIG. 1 is a flowchart showing an example of a resistivity guarantee method for a single crystal substrate according to the present invention.

まず、単結晶の製造条件を決定する(図1(a))。本発明では、一つの製造条件で製造された単結晶から得られた単結晶基板の抵抗率を保証することができる。例えば、FZ法における製造条件としては、ドーパント供給量、結晶回転数等を挙げることができる。本発明では、これらの製造条件が同一である単結晶から得られた単結晶基板の抵抗率を保証することができる。   First, the manufacturing conditions of a single crystal are determined (FIG. 1 (a)). In the present invention, the resistivity of a single crystal substrate obtained from a single crystal manufactured under one manufacturing condition can be guaranteed. For example, the production conditions in the FZ method can include a dopant supply amount, a crystal rotation number, and the like. In the present invention, the resistivity of a single crystal substrate obtained from a single crystal having the same manufacturing conditions can be guaranteed.

次に、図1の(a)で決定した製造条件で単結晶を製造し、この単結晶から得られた複数の単結晶基板について径方向に所定の間隔で抵抗率を測定し、径方向抵抗率分布を取得する(図1(b))。抵抗率を測定する方法は特に限定されないが、例えば、上述した図6に示す四探針法を挙げることができる。   Next, a single crystal is manufactured under the manufacturing conditions determined in FIG. 1A, and the resistivity is measured at predetermined intervals in the radial direction for a plurality of single crystal substrates obtained from the single crystal. A rate distribution is acquired (FIG. 1B). Although the method for measuring the resistivity is not particularly limited, for example, the four-probe method shown in FIG.

本発明では、径方向抵抗率分布を取得する工程(図1(b))において抵抗率を測定する単結晶と、後述する保証する工程(図1(h))において抵抗率を測定して保証する単結晶を、同一の単結晶又は異なる単結晶、あるいはこれらの両方とすることができる。   In the present invention, the single crystal for measuring the resistivity in the step of acquiring the radial resistivity distribution (FIG. 1 (b)) and the resistivity measured in the guarantee step (FIG. 1 (h)) to be described later are guaranteed. The single crystals to be made can be the same single crystal or different single crystals, or both.

例えば、1つの単結晶から得られた複数の単結晶基板を用いて抵抗率を保証する測定点を決定し、この測定点で、同一の単結晶から得られた単結晶基板の抵抗率を測定し、保証することができる。また、1つの単結晶から得られた複数の単結晶基板を用いて抵抗率を保証する測定点を決定し、この測定点で、同一の製造条件で製造された別の単結晶から得られた単結晶基板の抵抗率を測定し、保証することもできる。   For example, a measurement point that guarantees resistivity is determined using a plurality of single crystal substrates obtained from one single crystal, and the resistivity of a single crystal substrate obtained from the same single crystal is measured at this measurement point. And can be guaranteed. In addition, a measurement point for guaranteeing resistivity is determined using a plurality of single crystal substrates obtained from one single crystal, and the measurement point is obtained from another single crystal manufactured under the same manufacturing conditions. It is also possible to measure and guarantee the resistivity of the single crystal substrate.

すなわち、本発明では、1本以上の単結晶から得られた基板を用いて抵抗率を保証する測定点を決定し、1本以上の単結晶から得られた基板の抵抗率を保証することができ、この際、抵抗率を保証する測定点を決定するための単結晶と抵抗率を保証する単結晶を同一のものとすることもできるし、異なるものとすることもできるし、これらの両方とすることもできる。   That is, in the present invention, it is possible to determine a measurement point for guaranteeing the resistivity using a substrate obtained from one or more single crystals and to guarantee the resistivity of the substrate obtained from one or more single crystals. In this case, the single crystal for determining the measurement point for guaranteeing the resistivity and the single crystal for guaranteeing the resistivity can be the same or different, or both of them. It can also be.

本発明では、上記の単結晶基板として、FZ法で作製された直径150mm以上のシリコン基板を用いることができる。   In the present invention, a silicon substrate having a diameter of 150 mm or more manufactured by the FZ method can be used as the single crystal substrate.

シリコン基板は、半導体素子製造材料として汎用されている。半導体素子材料として求められる抵抗率規格幅は縮小傾向にあり、その要求に見合う品質を持つシリコン基板の製造及び抵抗率保証はより難しくなっている。そこで直径150mm以上、より好ましくは直径200mm以上のシリコン基板の抵抗率保証において本発明の方法を適用すれば、各々のシリコン基板の抵抗率が要求される範囲内に収まっていることを従来より高い確度で保証でき、有効である。特に本発明は、面内抵抗率分布が一般にCZ法より大きいFZ法で作製された直径150mm以上のシリコン基板の抵抗率を保証するのに好適である。   Silicon substrates are widely used as semiconductor element manufacturing materials. The resistivity standard range required as a semiconductor element material is decreasing, and it is more difficult to manufacture a silicon substrate having a quality that meets the requirements and to guarantee the resistivity. Therefore, if the method of the present invention is applied to guarantee the resistivity of a silicon substrate having a diameter of 150 mm or more, more preferably 200 mm or more, the resistivity of each silicon substrate is within the required range. It can be guaranteed with accuracy and is effective. In particular, the present invention is suitable for assuring the resistivity of a silicon substrate having a diameter of 150 mm or more manufactured by the FZ method whose in-plane resistivity distribution is generally larger than the CZ method.

シリコン単結晶から製造されるシリコン基板の抵抗率保証を行うためには、シリコン単結晶の断面内の抵抗率分布を知る必要がある。この抵抗率分布の確認のため、所定の製造条件(図1の(a)で決定した製造条件)で製造したシリコン単結晶を切断し、多数のシリコン基板を製造する。各々のシリコン基板の断面内抵抗率を径方向に細かい間隔で測定し、シリコン基板の面内抵抗率分布を取得する。なお、抵抗率分布を確認するために用いる単結晶基板の枚数は、2枚以上であればよく、例えば、2〜1000枚の範囲内とすることができる。   In order to guarantee the resistivity of a silicon substrate manufactured from a silicon single crystal, it is necessary to know the resistivity distribution in the cross section of the silicon single crystal. In order to confirm the resistivity distribution, a silicon single crystal manufactured under a predetermined manufacturing condition (the manufacturing condition determined in FIG. 1A) is cut to manufacture a large number of silicon substrates. The in-plane resistivity of each silicon substrate is measured at fine intervals in the radial direction to obtain the in-plane resistivity distribution of the silicon substrate. Note that the number of single crystal substrates used for confirming the resistivity distribution may be two or more, for example, in the range of 2 to 1000.

シリコン単結晶の成長境界面は一様な平面ではなく、成長軸方向に対して凸形状や凹形状などになっているものである。このため、シリコン単結晶の成長軸方向と実質垂直方向で切断して製造するシリコン基板の表面は、全面が同時に凝固したものではなく、ある時間範囲で凝固した部分の集合体とみなせる。よって単結晶成長中の経時的な変化、変動が存在すると抵抗率変動が生ずる可能性があり、抵抗率分布を確認する際にはシリコン基板中心を含む直径方向を一直線に細かい間隔で測定するのが望ましい。この抵抗率を測定する間隔は、好ましくは5mm以下、より好ましくは3mm以下である。抵抗率を測定する間隔が5mm以下であれば、径方向の抵抗率変動が大きい場合であっても、正確な径方向抵抗率分布を取得することができる。   The growth boundary surface of the silicon single crystal is not a uniform plane but has a convex shape or a concave shape with respect to the growth axis direction. For this reason, the surface of the silicon substrate manufactured by cutting in a direction substantially perpendicular to the growth axis direction of the silicon single crystal can be regarded as an aggregate of solidified portions within a certain time range, not the entire surface solidified at the same time. Therefore, resistivity fluctuations may occur if there are changes or fluctuations over time during single crystal growth, and when confirming the resistivity distribution, the diameter direction including the center of the silicon substrate should be measured in a straight line at fine intervals. Is desirable. The interval for measuring the resistivity is preferably 5 mm or less, more preferably 3 mm or less. If the interval at which the resistivity is measured is 5 mm or less, an accurate radial resistivity distribution can be obtained even when the radial resistivity variation is large.

通常、CZ法やFZ法などでシリコン単結晶を製造する際には結晶を回転させながら成長させるため、取得されるシリコン単結晶は円柱形状となり、これを切断して円形のシリコン基板を製造する。通常、結晶回転中心は結晶中心であるため、シリコン単結晶及びシリコン基板の抵抗率分布は中心軸に対し対称形状となる。従って、シリコン基板の中心から外周に至る半径範囲を一か所測定するだけでも抵抗率分布形状がわかるものであるが、事前の抵抗率分布確認の際には、前記の様に軸対称形状であることも再確認するために、各々のシリコン基板の直径範囲を測定し、更には1枚のシリコン基板につき少なくとも2方向を測定して抵抗率分布を取得するのが望ましい。   Usually, when a silicon single crystal is produced by the CZ method or the FZ method, the crystal is grown while rotating, so that the obtained silicon single crystal has a cylindrical shape, and this is cut to produce a circular silicon substrate. . Usually, since the crystal rotation center is the crystal center, the resistivity distributions of the silicon single crystal and the silicon substrate are symmetrical with respect to the central axis. Therefore, the resistivity distribution shape can be found by measuring only one radius range from the center of the silicon substrate to the outer periphery. However, when confirming the resistivity distribution in advance, the shape of the axisymmetric shape as described above is used. In order to confirm again, it is desirable to measure the diameter range of each silicon substrate, and further measure the resistivity distribution by measuring at least two directions per silicon substrate.

図2は、1つのシリコン単結晶から採取されるシリコン基板の基板面内位置と平均抵抗率値からの偏差との関係を示す図である。上記のようにシリコン単結晶1本から取得できる多数枚のシリコン基板の抵抗率分布を確認した時に、各シリコン基板個別では抵抗率分布が異なる場合があるが、1つのシリコン単結晶から採取されるシリコン基板の抵抗率分布をまとめた場合、例えば図2に示すようにある程度の変動範囲に収まるものである。この抵抗率分布を、任意の所定製造条件により得られるシリコン単結晶の抵抗率分布とみなすことができる。   FIG. 2 is a diagram showing the relationship between the position in the substrate surface of a silicon substrate taken from one silicon single crystal and the deviation from the average resistivity value. As described above, when the resistivity distribution of a large number of silicon substrates that can be obtained from one silicon single crystal is confirmed, the resistivity distribution may be different for each silicon substrate, but it is collected from one silicon single crystal. When the resistivity distribution of the silicon substrate is summarized, for example, as shown in FIG. 2, it falls within a certain range of fluctuation. This resistivity distribution can be regarded as a resistivity distribution of a silicon single crystal obtained by an arbitrary predetermined manufacturing condition.

径方向抵抗率分布を取得する工程(図1(b))では、同一の製造条件で複数の単結晶を製造することが好ましい。この場合、これら複数の単結晶から得られた複数の単結晶基板について径方向に所定の間隔で抵抗率を測定し、径方向抵抗率分布を取得することができる。すなわち、2つ以上の単結晶を製造し、各単結晶から単結晶基板を取得し、得られた複数の単結晶基板から径方向抵抗率分布を取得することができる。これにより、それぞれの単結晶で抵抗率分布に差が無いことを確認することができる。また、何らかの理由で、同一の条件で製造した単結晶間で径方向抵抗率分布にバラツキが生じる場合であっても、複数の単結晶の抵抗率を測定することによって、分布の修正等を行うことができ、分布の信頼性をより向上させることができる。   In the step of obtaining the radial resistivity distribution (FIG. 1B), it is preferable to manufacture a plurality of single crystals under the same manufacturing conditions. In this case, it is possible to obtain a radial resistivity distribution by measuring the resistivity at a predetermined interval in the radial direction for a plurality of single crystal substrates obtained from the plurality of single crystals. That is, two or more single crystals can be manufactured, a single crystal substrate can be obtained from each single crystal, and a radial resistivity distribution can be obtained from the obtained single crystal substrates. Thereby, it can be confirmed that there is no difference in resistivity distribution between the single crystals. Even if the radial resistivity distribution varies between single crystals manufactured under the same conditions for some reason, the distribution is corrected by measuring the resistivity of a plurality of single crystals. And the reliability of distribution can be further improved.

次に、単結晶基板各々について抵抗率最大値、抵抗率最小値の現れる位置を求める(図1(c))。更に、抵抗率を測定した全単結晶基板について抵抗率最大値及び抵抗率最小値の出現頻度が最大となる位置を求める(図1(d))。   Next, the position where the maximum resistivity value and the minimum resistivity value appear is obtained for each single crystal substrate (FIG. 1C). Furthermore, the position where the appearance frequency of the maximum resistivity value and the minimum resistivity value is maximized is obtained for all single crystal substrates whose resistivity is measured (FIG. 1D).

図1の(c)では、前記の様に得られた抵抗率分布について、各々のシリコン基板の抵抗率の最大値及び最小値を確認し、更に前記抵抗率最大値及び最小値が各シリコン基板のどの位置(中心からの距離)に出現しているかを求める。図1の(d)では、抵抗率確認を行った全シリコン基板について、抵抗率最大値及び最小値の出現位置を集計し、これらの抵抗率最大値及び最小値の出現頻度が高いシリコン基板の面内位置を確認する。   In FIG. 1C, the maximum value and the minimum value of the resistivity of each silicon substrate are confirmed for the resistivity distribution obtained as described above, and the maximum value and the minimum value of the resistivity are further determined for each silicon substrate. Which position (distance from the center) appears in In FIG. 1 (d), the appearance positions of the maximum and minimum resistivity values are tabulated for all the silicon substrates on which the resistivity confirmation has been performed, and the silicon substrates having the highest appearance frequencies of these resistivity maximum and minimum values are tabulated. Check the in-plane position.

次に、このようにして得られた情報から、少なくとも抵抗率最大値の出現頻度が最大となる位置及び抵抗率最小値の出現頻度が最大となる位置を含むように単結晶基板の抵抗率を保証する測定点を決める(図1(e))。   Next, from the information thus obtained, the resistivity of the single crystal substrate is determined so as to include at least a position where the appearance frequency of the maximum resistivity value is maximum and a position where the appearance frequency of the minimum resistivity value is maximum. The measurement point to be guaranteed is determined (FIG. 1 (e)).

まず、抵抗率最大値及び最小値の出現頻度が最大となる面内位置を抵抗率測定点とする。このように図1の(e)で決定する面内抵抗率の測定点数は、少なくとも2点以上とする必要があるが、抵抗率最大値及び最小値の出現頻度が面内最大でないとしても比較的大きくなる点を、更に追加するのが望ましい。   First, an in-plane position where the frequency of appearance of the maximum value and the minimum value is maximized is set as a resistivity measurement point. As described above, the number of in-plane resistivity measurement points determined in (e) of FIG. 1 needs to be at least two or more. However, even if the frequency of appearance of the maximum and minimum values of the resistivity is not the maximum in-plane, the comparison is made. It is desirable to add more points that become larger.

この時、前述したようにシリコン単結晶及びシリコン単結晶から製造されるシリコン基板の抵抗率分布は軸対称形状となるため、測定点は任意の方向で、シリコン基板中心から外周までの半径範囲内で決定すると良い。すなわち、シリコン基板中心、中心から○○mm、・・・、の様に数点を選択し、抵抗率測定・保証点として決定する。抵抗率保証のために実際にシリコン基板の抵抗率を測定する際には、測定位置毎に測定方向を変えても構わないが、測定作業の利便性からある一つの方向と決めて測定するのが好ましい。   At this time, as described above, the resistivity distribution of the silicon single crystal and the silicon substrate manufactured from the silicon single crystal has an axisymmetric shape, so the measurement point is in an arbitrary direction and within a radius range from the center of the silicon substrate to the outer periphery. It is good to decide in That is, several points are selected, such as the center of the silicon substrate and ◯ mm from the center, and so on, and determined as the resistivity measurement / guarantee points. When actually measuring the resistivity of a silicon substrate to guarantee resistivity, the measurement direction may be changed for each measurement position, but it is determined as one direction for the convenience of measurement work. Is preferred.

次に、抵抗率を保証する測定点で、図1の(a)で決定した製造条件と同一の製造条件で製造された単結晶から得られた単結晶基板の抵抗率を測定し、この単結晶基板の抵抗率が所定の範囲内であることを保証する(図1(h))。   Next, the resistivity of a single crystal substrate obtained from a single crystal manufactured under the same manufacturing conditions as those determined in FIG. 1A is measured at a measurement point that guarantees the resistivity. It is ensured that the resistivity of the crystal substrate is within a predetermined range (FIG. 1 (h)).

本発明であれば、製造条件に応じて抵抗率を保証する測定点を決定することによって、基板面内全域の抵抗率測定を実施しなくとも、ある単結晶基板の抵抗率が所定の範囲内であることを短時間で従来より高い確度で保証することができる。なお、上述のように、図1の(h)で測定・保証される単結晶は、図1の(b)で抵抗率が測定された単結晶と、同一でも異なっていてもよい。   According to the present invention, by determining the measurement point that guarantees the resistivity according to the manufacturing conditions, the resistivity of a single crystal substrate is within a predetermined range without performing the resistivity measurement over the entire area of the substrate surface. It can be ensured with higher accuracy than before in a short time. As described above, the single crystal measured and guaranteed in (h) of FIG. 1 may be the same as or different from the single crystal whose resistivity is measured in (b) of FIG.

また、本発明では、単結晶基板が要求される抵抗率規格を満たすか否かを判定(合否判定)することができる。具体的には、保証する工程(図1(h))において、単結晶基板の全数について抵抗率を測定し、この測定値が要求される抵抗率規格を満たす場合を合格品、満たさない場合を不合格品と判定することで、合格品の抵抗率が要求される抵抗率規格を満たすことを保証することができる。   In the present invention, it can be determined (pass / fail determination) whether or not the single crystal substrate satisfies the required resistivity standard. Specifically, in the guarantee process (FIG. 1 (h)), the resistivity is measured for all the single crystal substrates, and the case where the measured value satisfies the required resistivity standard is the acceptable product, the case where it is not satisfied. By determining as a rejected product, it can be guaranteed that the resistivity of the accepted product satisfies the required resistivity standard.

特に各シリコン基板の抵抗率分布が同じであれば、取得したシリコン基板全数について、前記の通り決定した面内位置での抵抗率測定を行い、求められる抵抗率規格に対して合否判定することで、各合格品シリコン基板の抵抗率が求められる抵抗率範囲内に収まっていることを従来より高い確度で保証することができる。   In particular, if the resistivity distribution of each silicon substrate is the same, the resistivity measurement is performed at the in-plane position determined as described above for all the obtained silicon substrates, and pass / fail judgment is performed with respect to the required resistivity standard. It can be ensured with higher accuracy than before that the resistivity of each acceptable silicon substrate is within the required resistivity range.

同一製造条件で製造した単結晶から製造した単結晶基板でも、各々の単結晶基板の抵抗率分布がある程度の範囲内で変化する場合は、シリコン基板が求められる抵抗率範囲内に収まることを保証するために、更なる要素を加えて合否判定を行うことが好ましい。   Even if a single crystal substrate is manufactured from a single crystal manufactured under the same manufacturing conditions, if the resistivity distribution of each single crystal substrate changes within a certain range, the silicon substrate is guaranteed to be within the required resistivity range. In order to do so, it is preferable to make a pass / fail judgment by adding further elements.

例えば、求められる抵抗率規格幅からある基準に沿って内寄せした規格幅(内部判定規格)を設け、新たに設定した規格幅で合否判定を行うことができる。特にFZ法で作製されたシリコン基板は、ウェーハ毎の抵抗率分布形状にバラツキが生じる場合があるため、このように合否判定を行うことが好ましい。   For example, it is possible to provide a standard width (internal determination standard) that is aligned along a certain standard from the required resistivity standard width, and to perform pass / fail determination using a newly set standard width. In particular, since the silicon substrate manufactured by the FZ method may vary in the resistivity distribution shape for each wafer, it is preferable to perform the pass / fail determination in this way.

図3は、抵抗率を保証する測定点で測定した抵抗率の最大値及び最小値と、径方向抵抗率分布における抵抗率の最大値及び最小値との関係を示す図である。内寄せ幅は、図3に示すような方法で決定する。すなわち、前記の通り、所定の製造条件(図1の(a)で決定した製造条件)で製造した単結晶の抵抗率分布調査の段階で取得したシリコン基板について、各々のシリコン基板の面内抵抗率分布から面内抵抗率最大値及び最小値を求める。また、各々のシリコン基板から抵抗率保証時の測定点として定めた位置における抵抗率測定値の中で、抵抗率最大値及び最小値を求める。ここで、測定点を決める工程(図1(e))の後かつ保証する工程(図1(h))の前に、抵抗率保証測定点の中での抵抗率最大値と径方向抵抗率分布における抵抗率最大値との差(Δρmaxとする)、及び抵抗率保証測定点の中での抵抗率最小値と径方向抵抗率分布における抵抗率最小値との差(Δρminとする)を求める(図1(f))。抵抗率保証測定点の抵抗率測定値は、同時に面内抵抗率分布の中の抵抗率測定値に含まれるものであるから、抵抗率保証測定点と面内分布の抵抗率最大値もしくは最小値同士が一致している場合、ΔρmaxもしくはΔρminはゼロになる。   FIG. 3 is a diagram showing the relationship between the maximum and minimum values of resistivity measured at a measurement point that guarantees the resistivity and the maximum and minimum values of resistivity in the radial resistivity distribution. The inward width is determined by a method as shown in FIG. That is, as described above, the in-plane resistance of each silicon substrate with respect to the silicon substrate obtained at the stage of the resistivity distribution investigation of the single crystal manufactured under the predetermined manufacturing conditions (the manufacturing conditions determined in FIG. 1A). The maximum and minimum in-plane resistivity values are obtained from the rate distribution. Moreover, the resistivity maximum value and the minimum value are obtained from the resistivity measurement values at the positions determined as the measurement points at the time of guaranteeing the resistivity from each silicon substrate. Here, after the step of determining the measurement point (FIG. 1 (e)) and before the step of guaranteeing (FIG. 1 (h)), the resistivity maximum value and the radial resistivity in the resistivity-guaranteed measurement point. The difference between the resistivity maximum value in the distribution (referred to as Δρmax) and the difference between the minimum resistivity value in the resistivity-guaranteed measurement point and the minimum resistivity value in the radial resistivity distribution (referred to as Δρmin) are obtained. (FIG. 1 (f)). Since the resistivity measurement value at the resistivity guaranteed measurement point is included in the resistivity measurement value in the in-plane resistivity distribution at the same time, the resistivity maximum value or the minimum value of the resistivity guaranteed measurement point and the in-plane distribution is also included. If they match, Δρmax or Δρmin becomes zero.

次に、各々のシリコン基板について前記の手順で求めたΔρmax及びΔρminを集計し、集計データから、抵抗率内寄せ幅(内寄せ幅)を決定する。集計データの中のΔρmax及びΔρminの最大値を採用してもよいし、片側工程能力指数(Cpk)を求め、それに基づき決めてもよい。   Next, Δρmax and Δρmin obtained by the above procedure for each silicon substrate are totalized, and the resistivity inflow width (inner width) is determined from the total data. The maximum values of Δρmax and Δρmin in the total data may be adopted, or a one-side process capability index (Cpk) may be obtained and determined based on it.

求められる抵抗率規格幅から前記の算出した抵抗率内寄せ幅の分だけ差し引いて、内寄せした値を内部判定規格として設定する(図1(g))。然る後に、保証する工程(図1(h))において、抵抗率保証を行うシリコン基板について、決定した各測定・保証点の抵抗率測定を行い、求められる正規の抵抗率規格ではなく、内部判定規格に基づいて抵抗率合否判定を行う。これにより、合格品の抵抗率が要求される抵抗率規格を満たすことを従来より更に高い確度で保証することができる。   By subtracting the calculated inset width of the resistivity from the calculated resistivity standard width, the inset value is set as the internal determination standard (FIG. 1 (g)). After that, in the process of guaranteeing (FIG. 1 (h)), the resistivity measurement of each determined measurement / guarantee point is performed on the silicon substrate for which the resistivity is guaranteed, Resistivity pass / fail determination is performed based on the determination standard. Thereby, it can be guaranteed with higher accuracy than before that the resistivity standards of the acceptable products satisfy the required resistivity standards.

このような合否判定方法であれば、仮に、予め定めた測定位置(抵抗率を保証する測定点)に単結晶基板面内の抵抗率最大値もしくは最小値が現れなかったとしても、要求される抵抗率規格を満たさない単結晶基板を合格品と判定することはない。すなわち、このような合否判定方法で、内部判定規格幅を超える抵抗率測定値が出たシリコン基板を除外して合格品として残ったシリコン基板については、求められる正規の抵抗率規格幅を超えるような抵抗率が出現することはなく、各合格品シリコン基板の抵抗率が、求められる抵抗率範囲(抵抗率規格)に収まっていることを従来より更に高い確度で保証することができる。   Such a pass / fail determination method is required even if the resistivity maximum value or minimum value in the single crystal substrate surface does not appear at a predetermined measurement position (measurement point for guaranteeing resistivity). A single crystal substrate that does not satisfy the resistivity standard is not determined as an acceptable product. That is, with such a pass / fail determination method, a silicon substrate remaining as an acceptable product excluding a silicon substrate that has obtained a resistivity measurement value exceeding the internal determination standard width will exceed the required normal resistivity standard width. Therefore, it can be ensured with higher accuracy than before that the resistivity of each acceptable silicon substrate is within the required resistivity range (resistivity standard).

前記の様な方法を行う際に、測定・保証点を増やすほど抵抗率内寄せ幅は小さくできる。当然ながら内部判定規格幅は求められる正規の抵抗率規格幅よりも狭く、これに基づいて判定することで、実際の面内抵抗率分布では全面が求められる抵抗率規格内であるシリコン基板であっても、不合格と判定される可能性はあり、そのような事態は可能な限り防ぎたい。しかしながら、測定・保証点を増やすほどシリコン基板1枚当たりの測定時間が長くなり生産性が低下するので、抵抗率内寄せ幅と生産性のバランスを取りながら、測定点数を決めるとよい。   When performing the above-described method, the resistivity inset width can be reduced as the measurement / guarantee points are increased. Of course, the internal judgment standard width is narrower than the required normal resistivity standard width. By making a determination based on this, the silicon substrate that is within the resistivity standard required for the entire surface in the actual in-plane resistivity distribution is obtained. However, there is a possibility that it will be judged as a failure, and we want to prevent such a situation as much as possible. However, as the number of measurement / guarantee points is increased, the measurement time per silicon substrate becomes longer and the productivity is lowered. Therefore, the number of measurement points should be determined while balancing the resistivity inset width and the productivity.

また、面内抵抗率最大値及び最小値の出現頻度から、一旦決定した抵抗率測定・保証点を、抵抗率内寄せ幅を小さくできるように、測定点位置の変更、或いは測定点を増減することもできる。このような調整により、本来合格判定であるべきシリコン基板が不合格判定となる事態を減少することができるため有効である。ただし、測定点調整を行う場合でも、面内抵抗率最大値及び最小値の出現頻度が最大となる位置については測定点とすることを変えるべきではない。   Also, change the measurement point position or increase / decrease the measurement point so that the resistivity measurement / guaranteed point can be reduced from the appearance frequency of the in-plane resistivity maximum and minimum values. You can also. This adjustment is effective because the situation in which a silicon substrate that should originally be a pass determination can be a fail determination can be reduced. However, even when adjusting the measurement point, the position where the frequency of appearance of the maximum value and the minimum value of the in-plane resistivity is maximized should not be changed.

以下、実施例及び比較例を示して本発明をより具体的に説明するが、本発明はこの実施例に限定されるものではない。   EXAMPLES Hereinafter, although an Example and a comparative example are shown and this invention is demonstrated more concretely, this invention is not limited to this Example.

(実施例)
FZ法により事前に同一製造条件で、結晶直径205mmのシリコン単結晶を3本取得し、取得結晶全てからスライスして直径200mmのシリコン基板を取得し、取得全シリコン基板について、直径方向に2.5mm間隔で抵抗率測定を行い、径方向抵抗率分布を取得した。各々のシリコン基板について、得られた径方向抵抗率分布(各抵抗率測定値)から面内抵抗率最大値及び最小値、及び該抵抗率最大値及び最小値の面内出現位置を確認した。
(Example)
Three silicon single crystals having a crystal diameter of 205 mm are obtained in advance under the same manufacturing conditions by the FZ method, and a silicon substrate having a diameter of 200 mm is obtained by slicing from all of the obtained crystals. The resistivity was measured at intervals of 5 mm to obtain a radial resistivity distribution. For each silicon substrate, the in-plane resistivity maximum value and minimum value, and the in-plane appearance position of the resistivity maximum value and minimum value were confirmed from the obtained radial resistivity distribution (each measured resistivity value).

図4は、抵抗率最大値及び最小値の出現位置とその割合との関係を示す図である。図4のように抵抗率最大値及び最小値の出現位置を集計し、面内抵抗率最大値の発生頻度が最も高い位置(中心から85mm)、及び面内抵抗率最小値の発生頻度が最も高い位置(中心から95mm)を含む、シリコン基板中心から外周までの半径直線上の6点(中心、中心から5mm、10mm、20mm、85mm、95mm)を測定点として定めた。   FIG. 4 is a diagram showing the relationship between the positions where the resistivity maximum values and minimum values appear and their ratios. As shown in FIG. 4, the occurrence positions of the maximum resistivity value and the minimum value are tabulated, the position where the occurrence frequency of the in-plane resistivity maximum value is highest (85 mm from the center), and the occurrence frequency of the in-plane resistivity minimum value is the highest. Six points (5 mm, 10 mm, 20 mm, 85 mm, 95 mm from the center and the center) on the radial straight line from the center of the silicon substrate to the outer periphery including the high position (95 mm from the center) were determined as measurement points.

この時、取得全シリコン基板について、測定点抵抗率最大値と面内抵抗率最大値との差(Δρmax)、測定点抵抗率最小値と面内抵抗率最小値との差(Δρmin)を求めた結果、Δρmax及びΔρminは図5の様な分布となったため、規格上下限からの内寄せ幅を4%と定め、抵抗率規格幅±15%に対し、内部判定規格幅を±11%とした。なお、図5は、Δρmax及びΔρminの値とその割合との関係を示す図である。   At this time, with respect to all acquired silicon substrates, the difference between the maximum value of the measurement point resistivity and the in-plane resistivity maximum value (Δρmax) and the difference between the minimum value of the measurement point resistivity and the in-plane resistivity minimum value (Δρmin) are obtained. As a result, since Δρmax and Δρmin are distributed as shown in FIG. 5, the inward width from the upper and lower limits of the standard is set to 4%, and the internal determination standard width is ± 11% with respect to the resistivity standard width ± 15%. did. FIG. 5 is a diagram showing the relationship between the values of Δρmax and Δρmin and their ratios.

前記シリコン単結晶と同一製造条件で製造した単結晶インゴットから採取したシリコン基板200枚を上記測定点で合否判定した。最初に抵抗率規格(±15%)で合否判定した結果、不合格品が9枚発生し、191枚が合格となった。合格判定のシリコン基板191枚を直径方向に2.5mm間隔で抵抗率測定を行い、得られた各々のシリコン基板の抵抗率分布結果を抵抗率規格(±15%)で合否判定した場合、不合格品が3枚発生した。このような方法で抵抗率の合否判定を行い製品を出荷した場合、出荷したうちの1.6%が不良となるが、後述する比較例4.6%に比べて大幅に合格する確度が高くなった。次に、同じ200枚のシリコン基板を内部判定規格(±11%)で合否判定した結果、不合格品が16枚発生し、184枚が合格となった。合格判定のシリコン基板184枚を直径方向に2.5mm間隔で抵抗率測定を行い、得られた各々のシリコン基板の抵抗率分布結果を抵抗率規格(±15%)で合否判定した場合、不合格品は発生しなかった。   Pass / fail judgment was made at the above measurement points for 200 silicon substrates collected from a single crystal ingot manufactured under the same manufacturing conditions as the silicon single crystal. As a result of the first pass / fail judgment based on the resistivity standard (± 15%), 9 rejected products were generated and 191 passed. When the resistivity measurement is performed on 191 silicon substrates that have been accepted at intervals of 2.5 mm in the diameter direction, and the resistivity distribution result of each obtained silicon substrate is determined to pass or fail according to the resistivity standard (± 15%), Three acceptable products were generated. When the product is shipped after the pass / fail judgment of the resistivity is performed in this way, 1.6% of the shipment is defective, but the probability of passing significantly is higher than 4.6% of Comparative Example described later. became. Next, as a result of the pass / fail judgment of the same 200 silicon substrates according to the internal judgment standard (± 11%), 16 rejected products were generated and 184 passed. When the resistivity measurement is performed on the 184 silicon substrates that have been accepted at intervals of 2.5 mm in the diameter direction, and the resistivity distribution result of each obtained silicon substrate is determined to pass or fail based on the resistivity standard (± 15%), No acceptable product was generated.

(比較例)
実施例と同じ200枚のシリコン基板表面を直径方向に中心1点、r/2(中心から50mm)を2点、外周(中心から95mm)を2点の面内計5点、均等に抵抗率測定を行い合否判定した。判定基準は、抵抗率規格幅の狙い抵抗率値±15%をそのまま用いた。
(Comparative example)
The same 200 surfaces of the silicon substrate as in the example, 1 point in the diametrical direction, 2 points at r / 2 (50 mm from the center), 2 points at the outer periphery (95 mm from the center), and a total of 5 points in resistivity. Measurement was performed and pass / fail judgment was made. As a criterion, the target resistivity value ± 15% of the resistivity standard width was used as it was.

合否判定の結果、抵抗率規格範囲を超える不合格品が3枚発生し、197枚が合格となった。合格判定のシリコン基板197枚を直径方向に2.5mm間隔で抵抗率測定を行い、得られた各々のシリコン基板の抵抗率分布結果を抵抗率規格幅である狙い抵抗率値±15%で合否判定した場合、不合格品は更に9枚発生し、合格品は188枚であった。従って、比較例の判定方法でこのシリコン基板を製品として出荷した場合、抵抗率規格を超える部分を含んだシリコン基板が9枚出荷されることになる。(枚数換算で出荷したうちの4.6%が不良)   As a result of the pass / fail judgment, 3 rejected products exceeding the resistivity standard range were generated, and 197 passed. The resistivity measurement is performed at 2.5 mm intervals in the diameter direction on the 197 silicon substrates that have passed the determination, and the resistivity distribution result of each obtained silicon substrate is accepted or rejected with a target resistivity value of ± 15%. When judged, nine failed products were generated, and 188 passed products. Therefore, when this silicon substrate is shipped as a product by the determination method of the comparative example, nine silicon substrates including a portion exceeding the resistivity standard are shipped. (4.6% of shipments in terms of number of sheets are defective)

なお、本発明は、上記実施形態に限定されるものではない。上記実施形態は、例示であり、本発明の特許請求の範囲に記載された技術的思想と実質的に同一な構成を有し、同様な作用効果を奏するものは、いかなるものであっても本発明の技術的範囲に包含される。   The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

1…定電流電源、 2…測定用電極、 3…測定電流通電電極、
4…被測定面、 5…シリコン単結晶基板。
DESCRIPTION OF SYMBOLS 1 ... Constant current power supply, 2 ... Measuring electrode, 3 ... Measuring current carrying electrode,
4 ... surface to be measured, 5 ... silicon single crystal substrate.

Claims (7)

一つの製造条件で製造された単結晶から得られた単結晶基板の抵抗率を保証する方法であって、
前記製造条件で単結晶を製造し、該単結晶から得られた複数の単結晶基板について径方向に所定の間隔で抵抗率を測定し、径方向抵抗率分布を取得する工程と、
前記単結晶基板各々について抵抗率最大値、抵抗率最小値の現れる位置を求め、前記抵抗率を測定した全単結晶基板について前記抵抗率最大値及び前記抵抗率最小値の出現頻度が最大となる位置を求める工程と、
少なくとも前記抵抗率最大値の出現頻度が最大となる位置及び前記抵抗率最小値の出現頻度が最大となる位置を含むように前記単結晶基板の抵抗率を保証する測定点を決める工程と、
前記抵抗率を保証する測定点で、前記製造条件と同一の製造条件で製造された単結晶から得られた単結晶基板の抵抗率を測定し、該単結晶基板の抵抗率が所定の範囲内であることを保証する工程と
を有することを特徴とする単結晶基板の抵抗率保証方法。
A method for guaranteeing the resistivity of a single crystal substrate obtained from a single crystal manufactured under one manufacturing condition,
Producing a single crystal under the production conditions, measuring resistivity at a predetermined interval in a radial direction for a plurality of single crystal substrates obtained from the single crystal, and obtaining a radial resistivity distribution;
The position where the maximum value of resistivity and the minimum value of resistivity appear is determined for each single crystal substrate, and the frequency of appearance of the maximum value of resistivity and the minimum value of resistivity is maximized for all single crystal substrates where the resistivity is measured. A process for determining a position;
Determining a measurement point for guaranteeing the resistivity of the single crystal substrate so as to include at least a position where the appearance frequency of the maximum resistivity value is maximized and a position where the appearance frequency of the minimum resistivity value is maximized;
The resistivity of the single crystal substrate obtained from a single crystal manufactured under the same manufacturing conditions as the manufacturing conditions is measured at a measurement point that guarantees the resistivity, and the resistivity of the single crystal substrate is within a predetermined range. And a step of assuring that the single crystal substrate has a resistivity.
前記径方向抵抗率分布を取得する工程における単結晶と、前記保証する工程における単結晶を、同一の単結晶又は異なる単結晶、あるいはこれらの両方とすることを特徴とする請求項1に記載の単結晶基板の抵抗率保証方法。   The single crystal in the step of obtaining the radial resistivity distribution and the single crystal in the guarantee step are the same single crystal, different single crystals, or both. Resistivity guarantee method for single crystal substrates. 前記径方向抵抗率分布を取得する工程において、前記製造条件で複数の単結晶を製造し、該複数の単結晶から得られた複数の単結晶基板について径方向に所定の間隔で抵抗率を測定し、径方向抵抗率分布を取得することを特徴とする請求項1又は請求項2に記載の単結晶基板の抵抗率保証方法。   In the step of acquiring the radial resistivity distribution, a plurality of single crystals are manufactured under the manufacturing conditions, and a plurality of single crystal substrates obtained from the plurality of single crystals are measured at predetermined intervals in the radial direction. 3. The method for guaranteeing resistivity of a single crystal substrate according to claim 1, wherein a radial resistivity distribution is acquired. 前記径方向抵抗率分布を取得する工程において、前記抵抗率を測定する所定の間隔を5mm以下の間隔とすることを特徴とする請求項1から請求項3のいずれか1項に記載の単結晶基板の抵抗率保証方法。   4. The single crystal according to claim 1, wherein, in the step of obtaining the radial resistivity distribution, the predetermined interval for measuring the resistivity is set to an interval of 5 mm or less. 5. Substrate resistivity guarantee method. 前記保証する工程において、前記単結晶基板の全数について抵抗率を測定し、該測定値が要求される抵抗率規格を満たす場合を合格品、満たさない場合を不合格品と判定することで、前記合格品の抵抗率が前記抵抗率規格を満たすことを保証することを特徴とする請求項1から請求項4のいずれか1項に記載の単結晶基板の抵抗率保証方法。   In the guaranteeing step, the resistivity is measured for the total number of the single crystal substrates, and the case where the measured value satisfies the required resistivity standard is determined as a pass product, and the case where the measurement value is not satisfied is determined as a reject product, 5. The method for guaranteeing resistivity of a single crystal substrate according to claim 1, wherein the resistivity of an accepted product is guaranteed to satisfy the resistivity standard. 6. 前記測定点を決める工程の後かつ前記保証する工程の前に、前記単結晶基板について、前記抵抗率を保証する測定点で測定した抵抗率の最大値と、前記径方向抵抗率分布における抵抗率の最大値との差Δρmax、及び前記抵抗率を保証する測定点で測定した抵抗率の最小値と、前記径方向抵抗率分布における抵抗率の最小値との差Δρminを求め、要求される抵抗率規格から前記Δρmax及び前記Δρminにより決定される内寄せ幅を差し引いた内部判定規格を設定する工程を行い、
前記保証する工程において、前記単結晶基板の抵抗率の測定値が、前記内部判定規格を満たす場合を合格品、満たさない場合を不合格品と判定することで、前記合格品の抵抗率が前記抵抗率規格を満たすことを保証することを特徴とする請求項1から請求項4のいずれか1項に記載の単結晶基板の抵抗率保証方法。
After the step of determining the measurement point and before the step of guaranteeing, the maximum value of the resistivity measured at the measurement point for guaranteeing the resistivity and the resistivity in the radial resistivity distribution for the single crystal substrate. The required resistance is obtained by obtaining a difference Δρmax from the maximum value of Δ and the difference Δρmin between the minimum value of the resistivity measured at the measurement point that guarantees the resistivity and the minimum value of the resistivity in the radial resistivity distribution. Performing a step of setting an internal determination standard obtained by subtracting the infeed width determined by the Δρmax and Δρmin from the rate standard;
In the step of guaranteeing, when the measured value of the resistivity of the single crystal substrate satisfies the internal determination standard, it is determined as a pass product, and when it does not satisfy, the pass rate is determined as a reject product. The method for guaranteeing resistivity of a single crystal substrate according to any one of claims 1 to 4, wherein it is guaranteed that the resistivity standard is satisfied.
前記単結晶基板を、FZ法で作製された直径150mm以上のシリコン基板とすることを特徴とする請求項1から請求項6のいずれか1項に記載の単結晶基板の抵抗率保証方法。   The method for guaranteeing resistivity of a single crystal substrate according to any one of claims 1 to 6, wherein the single crystal substrate is a silicon substrate having a diameter of 150 mm or more manufactured by an FZ method.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005010243A (en) * 2003-06-17 2005-01-13 Iwasaki Electric Co Ltd Method for manufacturing light source unit
JP2010215431A (en) * 2009-03-13 2010-09-30 Shin Etsu Handotai Co Ltd Method for producing semiconductor single crystal

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005010243A (en) * 2003-06-17 2005-01-13 Iwasaki Electric Co Ltd Method for manufacturing light source unit
JP2010215431A (en) * 2009-03-13 2010-09-30 Shin Etsu Handotai Co Ltd Method for producing semiconductor single crystal

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