JP2016035949A - Nitride semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to form a super-lattice buffer layer having an optimal thickness depending on intended characteristics such as breakdown voltage and inhibition of leakage current to a substrate side.SOLUTION: A nitride semiconductor device manufacturing method comprises the step of determining a thickness dof a buffer layer by using E, I, ν determined in step S108 and by a layer thickness determination formula where Vis a voltage approved at the time of operation of a nitride semiconductor device to be manufactured, Iis a leakage current to an intended (required) substrate direction, and E, I, ν are constants dependent on a layered structure of a nitride semiconductor layer having a hetero structure by a channel layer and a barrier layer which constitute an element (transistor).SELECTED DRAWING: Figure 1

Description

  The present invention relates to a method for manufacturing a nitride semiconductor device having a heterostructure made of a nitride semiconductor.

  Nitride semiconductors such as GaN have characteristics such as high breakdown field strength, high thermal conductivity, and high electron saturation speed, and are excellent materials for high-frequency high-power devices. For example, a heterojunction structure having an AlGaN barrier layer formed on a sapphire substrate whose main surface is a C-plane via a GaN buffer layer whose main surface is a group III polar surface (C-plane) is Electrons are accumulated at a high concentration in the vicinity of the heterojunction interface to form a so-called two-dimensional electron gas (2DEG).

  This two-dimensional electron gas exhibits high electron mobility because it is formed in an undoped GaN layer that does not have conductive impurities that cause scattering. Therefore, by using a two-dimensional electron gas as a channel, it can be operated as a so-called high electron mobility transistor (HEMT). In the nitride-based HEMT, since the two-dimensional electron gas concentration generated by the polarization effect is very high, transistor operation at a high current density is possible, which is also advantageous for high power devices.

  In a transistor composed of a nitride semiconductor, including the example described above, an AlGaN layer is often used as a barrier layer. This is because it is relatively easy to form an AlGaN layer, and the sheet carrier concentration of the two-dimensional electron gas can be controlled by changing the Al composition and thickness of the AlGaN layer. This is because there is a possibility.

  By the way, in the transistor using the heterostructure of AlGaN and GaN, since the two-dimensional electron gas is used as the channel as described above, the current flows in the horizontal direction with respect to the substrate. The channel is generally formed in a region of several tens to several hundreds of nanometers immediately below the AlGaN barrier layer, and the source / drain electrodes and the gate electrode are generally formed on the same side of the substrate. The breakdown voltage of the transistor is determined by the electrode spacing between the source or the gate electrode and the drain. In particular, it is necessary to increase the distance between the gate and the drain where the electric field is concentrated in order to increase the breakdown voltage.

  By the way, the nitride semiconductor laminated structure constituting the nitride semiconductor device utilizing the AlGaN / GaN heterostructure is deposited on various substrates, but Si substrates are widely used from the viewpoint of cost. . This configuration is expected to be applied to the field of power electronics, which requires a particularly high withstand voltage operation, and each company is actively developing it (see Non-Patent Document 1).

  In the manufacture of an AlGaN / GaN transistor structure on a Si substrate for power electronics applications, a Si substrate having a low resistivity is used from the viewpoint of ground stability. As described above, a high voltage resistance is ensured by increasing the distance between the gate and drain electrodes. At this time, it is also possible to suppress the leakage current flowing from each electrode, particularly the source electrode and the drain electrode, to the Si substrate. It is necessary to secure the sex. In general, a method of suppressing the leakage current to the Si substrate and increasing the breakdown voltage is ensured by increasing the total deposited thickness of the nitride semiconductor layer.

  For example, in Non-Patent Document 1, a breakdown voltage of about 1,700 V is obtained with a total deposition thickness exceeding 5 μm. Suppressing the leakage current to the substrate is also necessary for suppressing the leakage current value in the off state, which is important in realizing good transistor characteristics, to a sufficiently low value.

As described above, power consumption during non-operation can be suppressed. For example, in the case of an element used as a 600V class withstand voltage element, it is required that the leak current value when applying 600V is 1 × 10 ⁻⁵ A / cm ² or less.

  As described above, a buffer having a superlattice structure in which two or more types of AlGaN layers (including AlN and GaN) having different compositions are repeatedly deposited in order to suppress a leakage current flowing to the substrate side with a high breakdown voltage. There is a technique using a layer (superlattice buffer layer) (see Non-Patent Document 2). The superlattice buffer layer increases the total deposited thickness of the nitride semiconductor formed on the substrate, thereby improving the breakdown voltage and suppressing the leakage current flowing to the substrate side.

Ikeda, N. et al., “Development of high-power GaN HFETs on Si substrates”, Furukawa Electric Times, 122, 22-28, 2008. Takashi Egawa, “Growth of GaN single crystal on Si substrate and device application”, Applied Physics, Vol. 81, No. 6, 485-488, 2012.

  By the way, in order to improve the breakdown voltage and to suppress the leakage current flowing to the substrate side, it is sufficient to form the superlattice buffer layer thicker. The process time is increased, and the material / manufacturing cost is increased.

  The present invention has been made to solve the above-described problems, and a superlattice buffer having an optimum thickness according to desired characteristics such as breakdown voltage and suppression of leakage current to the substrate side. The purpose is to allow a layer to be formed.

In the method for manufacturing a nitride semiconductor device according to the present invention, a plurality of layers each made of Al _x Ga _1-x N (0 ≦ x ≦ 1) and having different values of x are repeatedly deposited on a substrate. A first manufacturing process for forming a buffer layer having a superlattice structure, a second manufacturing process for forming a channel layer made of a nitride semiconductor on the buffer layer, and a barrier made of a nitride semiconductor in contact with the channel layer And a third manufacturing process for forming a layer. In the first manufacturing process, the buffer layer is formed to a thickness determined by the following layer thickness determination formula (A).

In the method for manufacturing a nitride semiconductor device, a plurality of layers each made of Al _x Ga _1-x N (0 ≦ x ≦ 1) each having a different value of x are repeatedly formed on a sample substrate made of the same material as the substrate. A first sample preparation step of forming a sample buffer layer having a superlattice structure by depositing and a second sample preparation step of forming a sample channel layer made of the same nitride semiconductor as the channel layer on the sample buffer layer And a third sample preparation step of forming a sample barrier layer made of the same nitride semiconductor as the barrier layer on the sample channel layer, and a leakage current between the sample buffer layer side and the sample barrier layer side A first characteristic measuring step for measuring characteristics, and a voltage V _{c at} which the leakage current starts to increase rapidly with respect to a voltage change in the leakage current characteristics, and the determined voltage V _c is divided by the thickness of the sample buffer layer The value And the first constant determining step of a second constant determining step of the leakage current value of the voltage V _c at the leakage current characteristics and I _L0, after the leakage current with respect to the voltage change in the leakage current characteristic rapidly increases And a third constant determining step in which the voltage increment corresponding to an increase of one digit in the leakage current characteristic is set to ν. In the first manufacturing process, the first constant determining step, the second constant determining step, and the third constant determining The buffer layer may be formed to a thickness determined by the layer thickness determination formula (A) using E, I _L0 , and ν determined in the process.

  In the nitride semiconductor device manufacturing method, in the second sample manufacturing step, the sample channel layer is formed with the main surface as the C plane, and in the third sample manufacturing step, the sample barrier layer is formed with the main surface as the C plane. In the second manufacturing process, the buffer layer is formed with the main surface as the C plane, and in the third manufacturing process, the channel layer is formed with the main surface as the C plane.

  As described above, according to the present invention, there is an excellent effect that a superlattice buffer layer having an optimum thickness can be formed according to desired characteristics such as a breakdown voltage and suppression of a leakage current to the substrate side. can get.

FIG. 1 is a flowchart for explaining a method of manufacturing a nitride semiconductor device according to an embodiment of the present invention. FIG. 2 is a configuration diagram showing a layer configuration of the nitride semiconductor device manufactured in the examination of the present invention. FIG. 3 is a configuration diagram showing the configuration of the nitride semiconductor device manufactured in the examination of the present invention. FIG. 4 is a characteristic diagram showing the results of measuring current / voltage characteristics for each of Sample A, Sample B, Sample C, and Sample D produced in the study of the present invention. FIG. 5 is a characteristic diagram showing that the voltage value V _L giving a certain leakage current value has a linear relationship with d _SLS in the voltage region II 402 shown in FIG. FIG. 6 is a characteristic diagram showing the results of evaluating the current / voltage characteristics in a nitride semiconductor device in which the superlattice buffer layer 204 has a thickness of 2.7 μm and the back barrier layer 205 has a thickness of 1.2 μm. . FIG. 7 is a characteristic diagram showing the results of evaluating the current / voltage characteristics in a nitride semiconductor device in which the superlattice buffer layer 204 has a thickness of 3.5 μm and 2.1 μm.

  Hereinafter, an embodiment of the present invention will be described with reference to FIG. FIG. 1 is a flowchart for explaining a method of manufacturing a nitride semiconductor device according to an embodiment of the present invention.

In this manufacturing method, first, in step S101, Al _x Ga _1-x N (0 ≦ x ≦ 1) is formed on a sample substrate made of the same material as the substrate used in the nitride semiconductor device to be manufactured. A plurality of layers each having a different value of x are repeatedly deposited to form a sample buffer layer having a superlattice structure (first sample preparation step). For example, a sample buffer layer in which AlGaN layers and AlN layers are alternately stacked on a Si substrate is formed. The material and layer structure of the sample buffer layer are the same as those of the nitride semiconductor device to be manufactured. Each layer to be stacked alternately may be set in a range of about 1 nm to 40 nm.

  Next, in step S102, a sample channel layer made of the same nitride semiconductor as the channel layer of the nitride semiconductor device to be manufactured is formed on the sample buffer layer (second sample preparation step). Next, a sample barrier layer made of the same nitride semiconductor as the barrier layer of the nitride semiconductor device to be manufactured is formed on and in contact with the sample channel layer (third sample preparation step). Here, each layer is epitaxially grown with the main surface as the C-plane. As a result, in the heterojunction structure of the sample channel layer and the sample barrier layer, electrons are accumulated in the vicinity of the junction interface due to the polarization effect to form a two-dimensional electron gas.

  Next, in step S104, a leakage current characteristic between the sample buffer layer side and the sample barrier layer side is measured (first characteristic measurement step). For example, an electrode is formed on each of the back side of the substrate and the sample channel layer, a voltage is applied between the two electrodes, and a change in current in a state where the applied voltage is changed is measured.

Next, in step S105, a voltage V _{c at} which the leakage current starts to increase rapidly with respect to a voltage change in the leakage current characteristics is determined, and a value obtained by dividing the determined voltage V _c by the layer thickness of the sample buffer layer is E. (First constant determination step). In step S106, the leakage current value of the voltage V _c in the leakage current characteristic is set to I _L0 (second constant determination step). Further, in step S107, the voltage increment corresponding to an increase of one digit in the current of the leakage current characteristic after the leakage current rapidly increases with respect to the voltage change in the leakage current characteristic is set to ν (third constant determination step). .

Next, in step S108, using the determined E, I _L0 , ν, the buffer layer thickness d _SLS is determined by the following layer thickness determination formula (1). In the layer thickness determination formula (1), V _L is a voltage approved at the time of operation of the nitride semiconductor device to be manufactured. Further, I _L is a leak current in a desired (required) substrate direction. E, I _L0 , and ν are constants depending on the laminated structure of the nitride semiconductor layer having a heterostructure including a channel layer and a barrier layer constituting the element (transistor).

Next, in step S109, a buffer having a superlattice structure is formed by repeatedly depositing a plurality of layers each made of Al _x Ga _1-x N (0 ≦ x ≦ 1) having different values of _x on the substrate. A layer is formed (first manufacturing process). At this time, the buffer layer is formed so as to have the thickness d _SLS determined in step S108. For example, a buffer layer in which AlGaN layers and AlN layers are alternately stacked on a Si substrate is formed to a determined thickness d _SLS .

  Next, in step S110, a channel layer made of a nitride semiconductor is formed on the buffer layer (second manufacturing process). Next, in step S111, a barrier layer made of a nitride semiconductor is formed in contact with the channel layer (third manufacturing process). Thereafter, patterning into a desired element shape may be performed, and necessary electrodes such as a gate electrode, a source electrode, and a drain electrode may be formed.

  Hereinafter, the background to the present invention will be described. In order to optimize the buffer layer with a superlattice structure according to desired characteristics (requests) such as breakdown voltage and suppression of leakage current to the substrate side, the minimum necessary layer according to the required specifications Thickness is important. The required breakdown voltage is a voltage value at which the insulation of the buffer region is completely lost by applying a voltage higher than that. In principle, the breakdown electric field strength of the nitride semiconductor It is given by the product of the total thickness of the nitride semiconductor layers.

As a result of careful investigation on the ratio of the buffer layer thickness to be formed in the buffer region, the inventors have found the following relationship. When it is desired to set the leakage current to I _L (A / cm ² ) at the applied voltage V _L (V) as a desired leakage current value, the layer thickness d _SLS (μm) of the buffer layer having a superlattice structure is the above layer thickness. It has been found that the decision formula (1) should be satisfied. By using the layer thickness determination formula (1), the minimum necessary thickness of the buffer layer having a superlattice structure can be determined from a desired leakage current value.

However, the range of the value of I _L is the lower limit is I _L0 , and the upper limit is 100 × I _L0 or 10 ^{(VL / ν)} × I _L0 , whichever is smaller. When the value of I _L exceeds 100 × I _L0 , the carrier multiplication effect such as an avalanche phenomenon described later becomes accelerated in an accelerated manner, and this is a region where the premise for applying the layer thickness determination formula (1) is not satisfied. As a premise, it is not practically appropriate to use such a high current value as the buffer leakage current specification. If 10 ^{(VL / ν)} × I _L0 is exceeded, the right side of the layer thickness determination formula (1) becomes a negative value, and a buffer layer having a superlattice structure that satisfies the layer thickness determination formula (1) can be realized. It becomes impossible. Further, in a region below the lower limit of the current range of I _L, becomes dominant hopping conduction below, the region assumes does not hold to apply also the layer thickness determination expression (1).

  This will be described in more detail below. First, the nitride semiconductor device used by the inventors for study will be described. This nitride semiconductor device is a transistor having an AlGaN / GaN heterojunction structure on a Si substrate.

First, manufacture of a transistor is described. As shown in FIG. 2, on a Si substrate 201, a nucleation layer 202 made of AlN, an AlGaN buffer layer 203 made of Al _w Ga _1-w N doped with carbon, a superlattice buffer layer 204, and carbon 5 × The well-known back barrier layer 205 made of 10 ¹⁸ cm ⁻³ doped Al _y Ga _1-y N, channel layer 206 made of undoped GaN, and barrier layer 207 made of undoped Al _z Ga _1-z N are well known. Epitaxial growth was performed by metalorganic vapor phase epitaxy. Each nitride semiconductor layer is formed in a state where the main surface is a C plane. The nucleation layer 202 was formed to a thickness of 0.1 μm, the AlGaN buffer layer 203 was formed to a thickness of 0.1 μm, the channel layer 206 was formed to a thickness of 0.5 μm, and the barrier layer 207 was formed to a thickness of 25 nm.

Further, the superlattice buffer layer 204, stacked and a layer of Al _x Ga _1-x N which is 5 × 10 ¹⁸ cm ^-3 doping atoms, and a layer of AlN was 5 × 10 ¹⁸ cm ^-3 doping atoms alternately Formed. The layer thickness of the superlattice buffer layer 204 is d _SLS μm. The back barrier layer 205 has a layer thickness d _BB μm. Note that the above layer configuration is the configuration used for the study, and the AlGaN buffer layer 203 and the back barrier layer 205 may not be provided.

  After depositing each nitride semiconductor layer as described above, as shown in FIG. 3, an electrode 208 for ohmic connection was formed on the barrier layer 207, and an element shape was formed. Here, a mask pattern having an opening is formed in a region where the electrode 208 is formed by known photolithography, an electrode material is deposited on the mask pattern, and then the mask pattern is lifted off to form the electrode 208. did. In addition, the barrier layer 207, the channel layer 206, and a portion of the back barrier layer 205 in the thickness direction were etched using the electrode 208 as a mask to obtain a predetermined mesa shape.

  In the measurement of leakage current characteristics (current / voltage characteristics), the nitride semiconductor device is placed in a state where the Si substrate 201 is in contact with the metal stage 211, and the voltage applied between the stage 211 and the electrode 208 is set. The current was measured while changing.

In this examination, four samples, Sample A, Sample B, Sample C, and Sample D, each having different d _SLS by the nitride semiconductor device having the above-described configuration were produced. Table 1 below shows the layer thickness d _SLS of the superlattice buffer layer 204 and the layer thickness d _BB of the back barrier layer 205 in each sample.

Here, Sample A, Sample B, and Sample C are the superlattice buffer in a state where the total thickness d _SLS of the superlattice buffer layer 204 and the total thickness d _BB of the back barrier layer 205 are 3.7 μm. The layer thickness d _{SLS of the} layer 204 was changed. Further, in sample D, d _SLS was set so that the ratio of d _SLS to d _BB was the same as sample B (2.7: 1.0).

  FIG. 4 shows the results of measuring current / voltage characteristics for each of Sample A, Sample B, Sample C, and Sample D. FIG. In FIG. 4, (a) shows the result of sample A, (b) shows the result of sample B, (c) shows the result of sample C, and (d) shows the result of sample D.

As shown in FIG. 4, in any sample, the leakage current value is as low as 10 ⁻⁸ A / cm ^{2 in the} vicinity of 300 to 500 V, and when the voltage exceeds a certain voltage V _C , The dependence changed and the leakage current increased rapidly with respect to the voltage (the rate of change increased). A voltage range indicating a low leakage current value is defined as a voltage region I401, and a voltage range in which the leakage current increases rapidly with respect to the voltage is defined as a voltage region II402. The rate of change is larger in the voltage region II402 than in the voltage region I401. The voltage at the intersection of a straight line approximating the voltage region I401 and a straight line approximating the voltage region II402 can be set to V _C.

The electric conduction in the voltage region I401 is governed by a so-called hopping conduction mechanism, and in the voltage region II402, it is presumed to be caused by a breakdown current caused by an avalanche phenomenon or the like. When these results are carefully analyzed, the leakage current value at V _C is approximately 1 × 10 ^-7 A / cm ² regardless of the sample, regardless of the total layer thickness of d _SLS and d _BB, the d _SLS It was found that there is a proportional relationship.

Furthermore, in the voltage region II402, it has been found that the voltage value V _L giving a certain leakage current value has a linear relationship with respect to d _SLS . These relationships are shown in FIG. The dependence of V _C on d _SLS is represented by a straight line passing through the origin, and the slope of this straight line is 150 V / μm. Further, d _SLS dependence of I _L are also given in the same inclination, and was found to be in the V _L is changed 100V relationship when I _L is changed by one digit. The above relationship can be expressed by the layer thickness determination formula (1). In this study, E = 150 (V / μm), ν = 100 (V), I _L0 = 1 × 10 ⁻⁷ (A / Cm ² ).

In study described above, E, [nu, and the value of I _L0 is derived from the current-voltage characteristics of the four samples, practically the current-voltage characteristics of one sample, E, [nu, and I _L0 values It is more efficient to be able to determine This determination method will be described below. First, E can be derived from the dependence of V _C on d _SLS, but as described above, V _C is proportional to d _SLS , so that V _C obtained simply by the current / voltage characteristics is d _SLS. Is obtained by dividing by.

Further, the value of I _L0 is obtained as a leakage current value at V _C. Further, ν is given as an increase in voltage required to increase the single digit leakage current from the voltage dependence of the leakage current in the voltage region II402. Thus, by examining the current / voltage characteristics of the nitride semiconductor multilayer structure having a certain structure with the configuration shown in FIG. 3, the values of E, ν, and I _L0 are determined, and the values of the determined constants are determined. Based on the above, it is possible to determine the thickness of the superlattice buffer layer 204 according to the required specifications using the layer thickness determination formula (1).

Next, for a nitride semiconductor device manufactured with the same configuration as described above in which the superlattice buffer layer 204 has a layer thickness of 2.7 μm and the back barrier layer 205 has a layer thickness of 1.2 μm, first, a layer thickness determination formula ( Determine E, ν and I _L0 in 1). The results of evaluating the current / voltage characteristics of this nitride semiconductor device are shown in FIG. From this current / voltage characteristic, the voltage V _c at which the leakage current starts to increase rapidly is about 430V. Further, from the leakage current value at 430 V, I _L0 is 1.4 × 10 ⁻⁸ A / cm ² . Further, from the value of V _{C and} the value of the layer thickness d _SLS (2.7 μm) of the superlattice buffer layer 204, it is estimated that E = V _C / d _SLS = 160 V / μm.

Next, in order to examine the relationship between I _L and V _L, examining the V _L that gives a current value of ^{1 × 10 -7 ~1 × 10 -5} A / cm 2, with respect to change of one digit I _L, As in the case of the above-described study, _VL is estimated to be ν = 100V because _VL has changed by 100V.

Based on the constants determined in this way, for example, a transistor with a barrier layer (AlGaN) / channel layer (GaN) on the Si substrate 201 that has a leakage current of 1 × 10 ⁻⁵ A / cm ₂ when 850 V is applied. design. Using the determined E, ν, and I _L0 and substituting V _L = 850 and I _L = 1 × 10 ⁻⁵ in the layer thickness determination formula (1), a value of d _SLS = 3.5 μm is obtained. Based on this value, a transistor (nitride semiconductor device) having a superlattice buffer layer 204 of 3.5 μm was manufactured, and the current / voltage characteristics of this transistor were evaluated. The evaluation results are shown in FIG. As shown in FIG. 7A, the leakage current density when 850 V was applied was approximately 8.5 × 10 ⁻⁶ A / cm ² .

In addition, a transistor by a barrier layer (AlGaN) / channel layer (GaN) on the Si substrate 201 is designed so that the leakage current when 600 V is applied is 1 × 10 ⁻⁵ A / cm ² . Using the determined E, ν, and I _L0 and substituting V _L = 600 and I _L = 1 × 10 ⁻⁵ in the layer thickness determination formula (1), a value of d _SLS = 2.1 μm is obtained. Based on this value, a transistor (nitride semiconductor device) having a superlattice buffer layer 204 of 2.1 μm was manufactured, and the current / voltage characteristics of this transistor were evaluated. The evaluation results are shown in FIG. As shown in FIG. 7B, the leakage current density when 600 V was applied was approximately 1 × 10 ⁻⁵ A / cm ² . In FIG. 7, (c) shows the characteristics of a transistor with d _SLS = 2.7 μm measured to determine each constant.

  From the above results, the layer thickness design method of the superlattice buffer layer based on the layer thickness determination formula (1) is reasonable, and by using the present invention, a nitride semiconductor device having a heterostructure of a channel layer and a barrier layer can be used. It can be seen that the superlattice buffer layer used can have an optimum thickness.

  By the way, when using a Si substrate as mentioned above, there also exists the problem shown next. Si substrates and nitride semiconductors have different physical properties such as lattice constants and thermal expansion coefficients. Due to this, when the nitride semiconductor layer constituting the nitride semiconductor device as described above is stacked on the Si substrate, warpage occurs in the manufacturing process, and the nitride semiconductor layer is cracked. There are disadvantages such as entering.

  The buffer layer is also used to avoid the occurrence of cracks as described above. In particular, the superlattice buffer layer is suitable for avoiding the occurrence of cracks. For example, as described in Non-Patent Document 2, by adopting a superlattice buffer, a nitride having a total deposition thickness exceeding 7 μm free of cracks. It is also possible to deposit a semiconductor layer on the Si substrate. However, even if a superlattice buffer layer is used, warping cannot be completely eliminated, and increasing the layer thickness of the superlattice buffer layer for suppressing leakage increases warpage. On the other hand, according to the present invention, by optimizing the layer thickness of the superlattice buffer layer, it is possible to suppress the occurrence of warpage while suppressing the leakage current.

  The present invention is not limited to the embodiment described above, and many modifications and combinations can be implemented by those having ordinary knowledge in the art within the technical idea of the present invention. It is obvious. For example, in the above description, an example using a Si substrate is shown, but the present invention is not limited to this. Among SiC substrates and GaN substrates that are usually used as a substrate for depositing a nitride semiconductor multilayer structure, conductivity is improved. It goes without saying that the method of the present invention can be applied even when a substrate having the same is used.

  In addition, when using a semi-insulating or insulating substrate that does not have conductivity, there is no leakage current from the nitride semiconductor multilayer structure to the substrate, but the lateral direction through the interface between the substrate and the nitride semiconductor layer. There is a buffer leak current that flows. The superlattice buffer structure is also effective for suppressing the buffer leakage current. From this viewpoint, the effect of the present invention is effective even for an insulating substrate such as a semi-insulating SiC substrate or a sapphire substrate. Furthermore, it goes without saying that the effects of the present invention are effective even for various oxide substrates such as gallium oxide substrates and zinc oxide substrates that have recently been used as substrates for nitride semiconductor deposition. Yes.

  201 ... Si substrate, 202 ... nucleation layer, 203 ... AlGaN buffer layer, 204 ... superlattice buffer layer, 205 ... back barrier layer, 206 ... channel layer, 207 ... barrier layer, 208 ... electrode, 211 ... electrode.

Claims (4)

A first manufacturing method in which a buffer layer having a superlattice structure is formed on a substrate by repeatedly depositing a plurality of layers each made of Al _x Ga _1-x N (0 ≦ x ≦ 1) each having a different value of x. Process,
A second manufacturing step of forming a channel layer made of a nitride semiconductor on the buffer layer;
And a third manufacturing step of forming a barrier layer made of a nitride semiconductor in contact with the channel layer,
In the first manufacturing process, the buffer layer is formed to a thickness determined by the following layer thickness determination formula (A). A method for manufacturing a nitride semiconductor device, comprising:

In the manufacturing method of the nitride semiconductor device according to claim 1,
A superlattice structure is obtained by repeatedly depositing a plurality of layers each having a different value of _x on Al _x Ga _1-x N (0 ≦ x ≦ 1) on a sample substrate made of the same material as the substrate. A first sample preparation step of forming the sample buffer layer,
Forming a sample channel layer made of the same nitride semiconductor as the channel layer on the sample buffer layer;
A third sample preparation step of forming a sample barrier layer made of the same nitride semiconductor as the barrier layer in contact with the sample channel layer;
A first characteristic measuring step of measuring a leakage current characteristic between the sample buffer layer side and the sample barrier layer side;
A voltage V _{c at} which the leakage current begins to increase rapidly with respect to a voltage change in the leakage current characteristic is determined, and a first constant is determined by E, which is a value obtained by dividing the determined voltage V _c by the layer thickness of the sample buffer layer. Process,
A second constant determining step in which the leakage current value of the voltage V _c in the leakage current characteristic is I _L0 ;
A third constant determining step, wherein ν is an increment of voltage corresponding to an increase of one digit in the current of the leak current characteristic after the leak current has rapidly increased with respect to a voltage change in the leak current characteristic,
In the first manufacturing process, the thickness is determined by the layer thickness determination formula (A) using E, I _L0 , and ν determined in the first constant determination process, the second constant determination process, and the third constant determination process. Forming the buffer layer in a thickness; In the manufacturing method of the nitride semiconductor device according to claim 2,
In the second sample preparation step, the sample channel layer is formed with a main surface as a C-plane,
In the third sample manufacturing step, the sample barrier layer is formed with a main surface as a C-plane. A method for manufacturing a nitride semiconductor device, comprising: In the manufacturing method of the nitride semiconductor device according to any one of claims 1 to 3,
In the second manufacturing step, the buffer layer is formed with a main surface as a C-plane,
In the third manufacturing step, the channel layer is formed with a main surface as a C plane. A method for manufacturing a nitride semiconductor device, comprising:

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