JP2015524649A - パワーレギュレータシステムにおける電流測定 - Google Patents
パワーレギュレータシステムにおける電流測定 Download PDFInfo
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- JP2015524649A JP2015524649A JP2015524310A JP2015524310A JP2015524649A JP 2015524649 A JP2015524649 A JP 2015524649A JP 2015524310 A JP2015524310 A JP 2015524310A JP 2015524310 A JP2015524310 A JP 2015524310A JP 2015524649 A JP2015524649 A JP 2015524649A
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- 238000005259 measurement Methods 0.000 title description 19
- 230000004044 response Effects 0.000 claims abstract description 15
- 238000001514 detection method Methods 0.000 claims abstract description 9
- 239000004020 conductor Substances 0.000 claims description 41
- 230000003071 parasitic effect Effects 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 20
- 239000003990 capacitor Substances 0.000 claims description 13
- 230000008878 coupling Effects 0.000 claims description 12
- 238000010168 coupling process Methods 0.000 claims description 12
- 238000005859 coupling reaction Methods 0.000 claims description 12
- 239000004065 semiconductor Substances 0.000 claims description 8
- 229910044991 metal oxide Inorganic materials 0.000 claims description 5
- 150000004706 metal oxides Chemical class 0.000 claims description 5
- 230000005669 field effect Effects 0.000 claims description 4
- 230000000694 effects Effects 0.000 claims 1
- 230000005684 electric field Effects 0.000 claims 1
- 230000004913 activation Effects 0.000 description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000000737 periodic effect Effects 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000009123 feedback regulation Effects 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
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- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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Abstract
Description
REFF=RDCR+(1−D)*RB 式1
ここで、RDCRは出力インダクタLOのDC抵抗であり、Dはハイサイドスイッチング信号N1のデューティーサイクルであり、RBはレジスタRBの抵抗である。
LO/REFF=RS*CS 式2
ここで、LOは出力インダクタLOのインダクタンスであり、RSは検知レジスタの抵抗であり、CSは検知キャパシタの静電容量である。LR時定数及びRC時定数のマッチングに応答して、検知キャパシタCSは、出力電流IOUTに対応する検知電圧VSNSをサンプリングし得る。そのため出力電流IOUTは、下記のように、検知電圧VSNSに基づいて測定され得る。
IOUT=VSNS/REFF 式3
Claims (20)
- パワーレギュレータシステムであって、
スイッチング信号を生成するように構成されるゲートドライバ回路、
ゲート端子で前記スイッチング信号を受信するように、及びゲートリターン端子で前記スイッチング信号に関連付けられる信号リターンを提供するように構成されるスイッチング回路パッケージであって、スイッチングノード端子でスイッチング電圧を生成するために前記スイッチング信号に応答して周期的にアクティブにされるスイッチを含む、前記スイッチング回路パッケージ、
前記スイッチングノード端子と別のノードとを相互接続するインダクタを含むフィルタ段であって、前記インダクタが、出力電圧を生成するために前記スイッチング電圧に応答して電流を導通するように構成される、前記フィルタ段、及び
前記ゲートリターン端子と前記別のノードとを相互接続し、前記電流の大きさを測定するように構成される、電流検知回路、
を含む、パワーレギュレータシステム。 - 請求項1に記載のパワーレギュレ―タシステムであって、前記スイッチング信号が、底部ゲート端子に供給されるローサイドスイッチング信号として構成され、前記ゲートリターン端子が、頂部ゲート端子に供給されるハイサイドスイッチング信号に関連付けられるハイサイドリターン信号を提供するための頂部ゲートリターン端子として構成される、パワーレギュレータシステム。
- 請求項2に記載のパワーレギュレ―タシステムであって、前記電流検知回路が、REFF=RDCR+(1−D)*RBとして表される実効抵抗REFFに基づいて前記電流の大きさを測定するように構成され、
ここで、RDCRが、前記インダクタのDC抵抗であり、
Dが、前記ハイサイドスイッチング信号のデューティーサイクルであり、
RBが、前記頂部ゲートリターン端子及び前記スイッチングノード端子を相互接続する導体の寄生抵抗である、
パワーレギュレータシステム。 - 請求項1に記載のパワーレギュレ―タシステムであって、前記ゲートリターン端子が、前記スイッチに対するケルビンゲート接続として構成される、パワーレギュレータシステム。
- 請求項1に記載のパワーレギュレ―タシステムであって、前記スイッチング回路パッケージが、ハイサイドスイッチに関連付けられるハイサイドダイと、ローサイドスイッチとして構成される前記スイッチに関連付けられるローサイドダイとを含み、前記ハイサイドダイ及び前記ローサイドダイが、前記スイッチングノード端子と一体の導体により相互接続され、前記導体が寄生抵抗を有する、パワーレギュレータシステム。
- 請求項5に記載のパワーレギュレ―タシステムであって、前記ゲートリターン端子が、ハイサイドリターン信号を提供するため頂部ゲートリターン端子として構成され、前記頂部ゲート端子が、前記導体を介して前記スイッチングノード端子に結合される前記ローサイドスイッチの第1の端子で前記ローサイドダイに結合される、パワーレギュレータシステム。
- 請求項6に記載のパワーレギュレ―タシステムであって、前記ローサイドスイッチの前記第1の端子が、前記ゲートリターン端子及び前記スイッチングノード端子を相互接続する前記導体を介して前記ハイサイドスイッチの第1の端子に電気的に結合される、パワーレギュレータシステム。
- 請求項7に記載のパワーレギュレ―タシステムであって、前記ローサイドスイッチの前記第1の端子が、前記ローサイドスイッチのドレインに対応し、前記ハイサイドスイッチの前記第1の端子が、前記ハイサイドスイッチのソースに対応する、パワーレギュレータシステム。
- 請求項1に記載のパワーレギュレ―タシステムであって、前記スイッチがローサイドスイッチとして構成され、前記スイッチング回路パッケージが、ハイサイドスイッチ及び前記ローサイドスイッチを含むエンクローズド(enclosed)回路パッケージとして構成され、前記ハイサイドスイッチ及び前記ローサイドスイッチが、垂直スタック金属酸化物半導体電界効果トランジスタ(MOSFET)として構成される、パワーレギュレータシステム。
- 請求項1に記載のパワーレギュレ―タシステムであって、前記ゲートリターン端子及び前記スイッチングノード端子が、前記ゲートリターン端子及び前記スイッチングノード端子を相互接続する導体を介して電気的に結合され、前記導体が寄生抵抗値を有する、パワーレギュレータシステム。
- 請求項10に記載のパワーレギュレ―タシステムであって、前記電流検知回路が、検知レジスタ及び検知キャパシタを含み、前記検知レジスタ及び前記検知キャパシタのRC時定数が、前記インダクタのインダクタンスと実効統合抵抗とを含むLR時定数と実質的にマッチングされ、前記実効統合抵抗が、前記出力インダクタのDC抵抗及び前記導体の前記寄生抵抗値を含む、パワーレギュレータシステム。
- 請求項1に記載のパワーレギュレ―タシステムを含む印刷回路基板(PCB)。
- スイッチングパワーレギュレータシステムのための方法であって、前記方法が、
ハイサイドスイッチング信号導体を、スイッチング回路パッケージの頂部ゲート端子及び頂部ゲートリターン端子に結合すること、
ローサイドスイッチング信号導体を前記スイッチング回路パッケージの底部ゲート端子に結合すること、
出力段を前記スイッチング回路パッケージのスイッチングノード端子に結合することであって、前記出力段が、前記スイッチングノード端子と、前記出力インダクタを介する出力電流に基づいて出力電圧が生成される出力ノードとを相互接続する出力インダクタを含むこと、及び
電流検知回路を、前記スイッチング回路パッケージの前記頂部ゲートリターン端子に及び前記出力ノードに結合することであって、前記電流検知回路が、前記出力電流の大きさを測定するように構成されること、
を含む、方法。 - 請求項13に記載の方法であって、前記電流検知回路が検知レジスタ及び検知キャパシタを含む、方法。
- 請求項14に記載の方法であって、前記検知レジスタ及び前記検知キャパシタのRC時定数を、前記出力インダクタのインダクタンスと実効統合抵抗とを含むLR時定数とマッチングすることを更に含み、前記実効統合抵抗が、前記出力インダクタのDC抵抗と、前記スイッチングノード端子及び前記頂部ゲートリターン端子を分離する前記導体の前記寄生抵抗値とを含む、方法。
- 請求項13に記載の方法であって、前記スイッチング回路パッケージが、ハイサイドスイッチ及びローサイドスイッチを含むエンクローズド回路パッケージとして構成され、前記ハイサイドスイッチ及び前記ローサイドスイッチが、垂直スタック金属酸化物半導体電界効果トランジスタ(MOSEFT)として構成される、方法。
- 請求項13に記載の方法であって、前記スイッチング回路パッケージが、前記スイッチングノード端子と一体である導体により相互接続される、ハイサイドダイ及びローサイドダイを含み、前記導体が寄生抵抗値を有する、方法。
- 印刷回路基板(PCB)であって、
ハイサイドスイッチング信号及びローサイドスイッチング信号を生成するように構成されるゲートドライバ回路、
スイッチング回路パッケージであって、底部ゲート端子で前記ローサイドスイッチング信号を受信するように、及び頂部ゲート端子で前記ハイサイドスイッチング信号を受信するように、及び頂部ゲートリターン端子で前記ハイサイドスイッチング信号に関連付けられるハイサイド信号リターンを提供するように構成され、前記スイッチング回路パッケージが、スイッチングノード端子でスイッチング電圧を生成するために、それぞれ、前記ハイサイドスイッチング信号及び前記ローサイドスイッチング信号に応答して交互にアクティベートされるハイサイドスイッチ及びローサイドスイッチを含み、前記頂部ゲートリターン端子が、寄生抵抗を有し且つ前記スイッチングノード端子と一体である導体に結合される、前記スイッチング回路パッケージ、
出力ノードで出力電圧を生成するために前記スイッチング電圧に応答して出力電流を導通するように構成される出力インダクタを含む出力段、及び
電流検知回路であって、前記頂部ゲートリターン端子と前記出力ノードとを相互接続し、前記出力インダクタのDC抵抗と前記寄生抵抗とを含む実効抵抗に基づいて前記出力電流の大きさを測定するように構成される、前記電流検知回路、
を含む、PCB。 - 請求項18に記載のPCBであって、前記スイッチング回路パッケージが、前記導体により相互接続されるハイサイドダイ及びローサイドダイを含む、PCB。
- 請求項18に記載のPCBであって、前記スイッチング回路パッケージがエンクローズド回路パッケージとして構成され、前記ハイサイドスイッチ及び前記ローサイドスイッチが、垂直スタック金属酸化物半導体電界効果トランジスタ(MOSEFT)として構成される、PCB。
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