JP2015505631A5 - - Google Patents

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Publication number
JP2015505631A5
JP2015505631A5 JP2014555583A JP2014555583A JP2015505631A5 JP 2015505631 A5 JP2015505631 A5 JP 2015505631A5 JP 2014555583 A JP2014555583 A JP 2014555583A JP 2014555583 A JP2014555583 A JP 2014555583A JP 2015505631 A5 JP2015505631 A5 JP 2015505631A5
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JP
Japan
Prior art keywords
data
cache memory
request
client
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2014555583A
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English (en)
Japanese (ja)
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JP2015505631A (ja
JP6022604B2 (ja
Filing date
Publication date
Priority claimed from US13/364,901 external-priority patent/US9274964B2/en
Application filed filed Critical
Publication of JP2015505631A publication Critical patent/JP2015505631A/ja
Publication of JP2015505631A5 publication Critical patent/JP2015505631A5/ja
Application granted granted Critical
Publication of JP6022604B2 publication Critical patent/JP6022604B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2014555583A 2012-02-02 2013-01-23 マルチバンクキャッシュメモリ Expired - Fee Related JP6022604B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/364,901 2012-02-02
US13/364,901 US9274964B2 (en) 2012-02-02 2012-02-02 Multi-bank cache memory
PCT/US2013/022759 WO2013116060A1 (en) 2012-02-02 2013-01-23 Multi-bank cache memory

Publications (3)

Publication Number Publication Date
JP2015505631A JP2015505631A (ja) 2015-02-23
JP2015505631A5 true JP2015505631A5 (OSRAM) 2016-06-16
JP6022604B2 JP6022604B2 (ja) 2016-11-09

Family

ID=47790485

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014555583A Expired - Fee Related JP6022604B2 (ja) 2012-02-02 2013-01-23 マルチバンクキャッシュメモリ

Country Status (6)

Country Link
US (1) US9274964B2 (OSRAM)
EP (1) EP2810172A1 (OSRAM)
JP (1) JP6022604B2 (OSRAM)
KR (1) KR101687883B1 (OSRAM)
CN (1) CN104094242B (OSRAM)
WO (1) WO2013116060A1 (OSRAM)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10394566B2 (en) * 2017-06-06 2019-08-27 International Business Machines Corporation Banked cache temporarily favoring selection of store requests from one of multiple store queues
KR20190037668A (ko) * 2017-09-29 2019-04-08 에스케이하이닉스 주식회사 메모리 시스템 및 그것의 동작 방법
US11853216B2 (en) * 2021-08-16 2023-12-26 Micron Technology, Inc. High bandwidth gather cache

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3967247A (en) 1974-11-11 1976-06-29 Sperry Rand Corporation Storage interface unit
JPH05210640A (ja) 1992-01-31 1993-08-20 Hitachi Ltd マルチプロセッサシステム
US6745293B2 (en) 2000-08-21 2004-06-01 Texas Instruments Incorporated Level 2 smartcache architecture supporting simultaneous multiprocessor accesses
US20030163643A1 (en) * 2002-02-22 2003-08-28 Riedlinger Reid James Bank conflict determination
JP2004046643A (ja) * 2002-07-12 2004-02-12 Sony Corp キャッシュ装置および記憶手段選択方法
US7203775B2 (en) * 2003-01-07 2007-04-10 Hewlett-Packard Development Company, L.P. System and method for avoiding deadlock
US7219185B2 (en) 2004-04-22 2007-05-15 International Business Machines Corporation Apparatus and method for selecting instructions for execution based on bank prediction of a multi-bank cache
US7571284B1 (en) * 2004-06-30 2009-08-04 Sun Microsystems, Inc. Out-of-order memory transactions in a fine-grain multithreaded/multi-core processor
ATE520086T1 (de) * 2005-06-30 2011-08-15 Imec Speicheranordnung für mehrprozessorsysteme
US8560795B2 (en) * 2005-06-30 2013-10-15 Imec Memory arrangement for multi-processor systems including a memory queue
US20080282034A1 (en) * 2005-09-19 2008-11-13 Via Technologies, Inc. Memory Subsystem having a Multipurpose Cache for a Stream Graphics Multiprocessor
US7600080B1 (en) 2006-09-22 2009-10-06 Intel Corporation Avoiding deadlocks in a multiprocessor system
US8099521B2 (en) 2006-10-26 2012-01-17 Interactic Holdings Inc. Network interface card for use in parallel computing systems
US8521982B2 (en) * 2009-04-15 2013-08-27 International Business Machines Corporation Load request scheduling in a cache hierarchy
US8661200B2 (en) * 2010-02-05 2014-02-25 Nokia Corporation Channel controller for multi-channel cache

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