JP2015225873A - Package for housing semiconductor element, and semiconductor device including the same - Google Patents

Package for housing semiconductor element, and semiconductor device including the same Download PDF

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JP2015225873A
JP2015225873A JP2014107830A JP2014107830A JP2015225873A JP 2015225873 A JP2015225873 A JP 2015225873A JP 2014107830 A JP2014107830 A JP 2014107830A JP 2014107830 A JP2014107830 A JP 2014107830A JP 2015225873 A JP2015225873 A JP 2015225873A
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semiconductor element
package
frame body
metal substrate
housing
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JP6272140B2 (en
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博司 柴山
Hiroshi Shibayama
博司 柴山
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Kyocera Corp
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Kyocera Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a package for housing a semiconductor element in which electric short circuit of a lead member and a substrate can be suppressed, and to provide a semiconductor device including the same.SOLUTION: A package 2 for housing a semiconductor element includes a metal substrate 21 having a mounting region R, on the upper surface of which a power semiconductor element is mounted, a frame 22 provided on the metal substrate 21 so as to surround the mounting region R, and a lead member 23 provided at a part of the frame 22 so as to penetrate the frame 22 from the outside, and having a flange 23a abutting against the outer side face of the frame 22. In the plan view, the flange 23a protrudes farther outward than the side face of the metal substrate 21.

Description

本発明は、特に、パワー半導体素子を搭載する半導体素子収納用パッケージ、およびこれにパワー半導体素子を搭載した半導体装置に関する。   The present invention particularly relates to a package for housing a semiconductor element in which a power semiconductor element is mounted, and a semiconductor device in which the power semiconductor element is mounted.

将来技術として、現在、パワー半導体素子の開発が行なわれている。そして、そのパワー半導体素子に適した半導体素子収納用パッケージの開発が進められている(例えば、下記特許文献1参照)。パワー半導体素子とは、電源を制御するのに用いる半導体素子のことである。パワー半導体素子は、交流を直流に変更したり、モータを駆動したり、バッテリーを充電したりするのに適している。   Currently, power semiconductor devices are being developed as future technologies. Development of a package for housing a semiconductor element suitable for the power semiconductor element is underway (see, for example, Patent Document 1 below). A power semiconductor element is a semiconductor element used for controlling a power supply. The power semiconductor element is suitable for changing alternating current to direct current, driving a motor, and charging a battery.

なお、パワー半導体素子収納用パッケージは、パワー半導体素子を実装する基板と、基板上に設けられた枠体と、枠体を貫通したリード部材とを備えている。   The power semiconductor element storage package includes a substrate on which the power semiconductor element is mounted, a frame provided on the substrate, and a lead member penetrating the frame.

国際公開第2012/098799号International Publication No. 2012/098799

パワー半導体素子には、大電流が流れる。そのため、リード部材に流れる電流量によっては、リード部材と基板とが電気的に短絡する虞が生じている。   A large current flows through the power semiconductor element. Therefore, depending on the amount of current flowing through the lead member, there is a possibility that the lead member and the substrate are electrically short-circuited.

本発明は、リード部材と基板とが電気的に短絡するのを抑制することが可能な半導体素子収納用パッケージ、およびこれを備えた半導体装置を提供することを目的とする。   An object of the present invention is to provide a package for housing a semiconductor element capable of suppressing an electrical short circuit between a lead member and a substrate, and a semiconductor device including the same.

本発明の一実施形態に係る半導体素子収納用パッケージは、上面にパワー半導体素子が実装される実装領域を有する金属基板と、前記金属基板上に設けられた、前記実装領域を取り囲む枠体と、前記枠体の一部に設けられた、前記枠体外から前記枠体を貫通し、前記枠体の外側面と当接する鍔部を有するリード部材とを備え、前記鍔部は、平面視して、前記金属基板の側面よりも前記枠体外に食み出していることを特徴とする。   A package for housing a semiconductor element according to an embodiment of the present invention includes a metal substrate having a mounting area on which a power semiconductor element is mounted on an upper surface, a frame provided on the metal substrate and surrounding the mounting area, A lead member provided in a part of the frame body and having a flange portion that penetrates the frame body from the outside of the frame body and abuts against an outer surface of the frame body, the flange portion in plan view The metal substrate protrudes outside the frame body from the side surface of the metal substrate.

本発明の一実施形態に係る半導体装置は、前記半導体素子収納用パッケージと、前記実装領域上に設けられた、前記枠体内に位置する前記リード部材の一部とワイヤを介して電気的に接続されたパワー半導体素子と、前記枠体上に前記パワー半導体素子を覆って設けられた蓋体と、を備えたことを特徴とする。   A semiconductor device according to an embodiment of the present invention is electrically connected to the package for housing a semiconductor element and a part of the lead member provided on the mounting region and located in the frame body via a wire. And a lid provided on the frame so as to cover the power semiconductor element.

本発明は、リード部材と基板とが電気的に短絡するのを抑制することが可能な半導体素子収納用パッケージ、およびこれを備えた半導体装置を提供することができる。   The present invention can provide a package for housing a semiconductor element capable of suppressing an electrical short circuit between a lead member and a substrate, and a semiconductor device including the same.

本発明の一実施形態に係る実装構造体であって、蓋体を取り外した状態を示している。It is the mounting structure which concerns on one Embodiment of this invention, Comprising: The state which removed the cover body is shown. 本発明の一実施形態に係る半導体素子収納用パッケージであって、一方向から見た外観斜視図である。1 is a package for housing a semiconductor element according to an embodiment of the present invention, and is an external perspective view seen from one direction. 本発明の一実施形態に係る半導体素子収納用パッケージであって、リード部材側から枠体側を見た外観斜視図である。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an external perspective view of a package for housing a semiconductor device according to an embodiment of the present invention, as seen from a lead member side to a frame body side. 図3に示した半導体素子収納用パッケージの分解斜視図である。FIG. 4 is an exploded perspective view of the semiconductor element storage package shown in FIG. 3. 半導体素子収納用パッケージの平面図である。It is a top view of the package for semiconductor element accommodation. 半導体素子収納用パッケージの側面図であって、リード部材を側方から見た状態を示している。It is a side view of the package for semiconductor element accommodation, Comprising: The state which looked at the lead member from the side is shown. 図5のA−Aに沿った半導体素子収納用パッケージの断面図である。FIG. 6 is a cross-sectional view of the package for housing a semiconductor element along AA in FIG. 5. 半導体素子収納用パッケージの側面図であって、リード部材を前方から見た状態を示している。It is a side view of the package for semiconductor element accommodation, Comprising: The state which looked at the lead member from the front is shown.

以下、本発明の一実施形態に係る半導体素子収納用パッケージおよび半導体装置について、図面を参照しながら説明する。   Hereinafter, a semiconductor element storage package and a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.

<半導体素子収納用パッケージおよび半導体装置の構成>
半導体装置1は、半導体素子収納用パッケージ2とパワー半導体素子3とを備えている。半導体装置1は、送電システム、電車、自動車、パワーコンディショナー、エアーコンディショナーまたはサーバー機等の電力変換効率を向上させる必要がある機器に用いられる。
<Configuration of semiconductor element storage package and semiconductor device>
The semiconductor device 1 includes a semiconductor element housing package 2 and a power semiconductor element 3. The semiconductor device 1 is used for equipment that needs to improve power conversion efficiency, such as a power transmission system, a train, an automobile, a power conditioner, an air conditioner, or a server machine.

パワー半導体素子3は、低抵抗、高温動作可能および高熱伝導率に特徴があり、電力損失を低減することで、発熱量を低減することができ、ひいては電力変換器の小型化を実現することができる。パワー半導体素子3は、例えば、電力損失を低減した送電システム、インバータ装置を小型化した車両、省エネルギーを実現した家電、ACアダプタを小型化したパソコン、高効率の電力変化可能なソーラーシステム等の用途に用いることができる。   The power semiconductor element 3 is characterized by low resistance, high-temperature operation, and high thermal conductivity, and by reducing power loss, it is possible to reduce the amount of heat generation, and thus to realize downsizing of the power converter. it can. The power semiconductor element 3 is used for, for example, a power transmission system with reduced power loss, a vehicle with a miniaturized inverter device, a household appliance with energy saving, a personal computer with a compact AC adapter, a solar system with highly efficient power change, etc. Can be used.

パワー半導体素子3は、シリコン等のSi系デバイス材料でなく、ガリウム・ナイトライド等のGaN系パワーデバイス材料、あるいはシリコン・カーバイド等のSiC系パワーデバイス材料から成る。パワー半導体素子3は、パワーデバイス材料を用いて、例えば、昇華法、溶液法(フラックス法)または高温CVD法等を用いて作製することができる。   The power semiconductor element 3 is not made of a Si-based device material such as silicon but a GaN-based power device material such as gallium nitride or a SiC-based power device material such as silicon carbide. The power semiconductor element 3 can be manufactured using a power device material, for example, using a sublimation method, a solution method (flux method), a high temperature CVD method, or the like.

本発明の一実施形態に係る半導体装置1は、半導体素子収納用パッケージ2と、半導体素子収納用パッケージ2の実装領域R上に設けられた、枠体22内に位置するリード部材23の一部とワイヤを介して電気的に接続されたパワー半導体素子3と、枠体22上にパワー半導体素子3を覆って設けられた蓋体4とを備えている。また、半導体素子収納用パッケージ2は、上面にパワー半導体素子3が実装される実装領域Rを有する金属基板21と、金属基板21上に設けられた、実装領域Rを取り囲む枠体22と、枠体22の一部に設けられた、枠体22外から枠体22を貫通し、枠体22の外側面と当接する鍔部23aを有するリード部材23とを備えている。鍔部23aは、金属基板21の側面よりも枠体22外に食み出している。   A semiconductor device 1 according to an embodiment of the present invention includes a semiconductor element storage package 2 and a part of a lead member 23 provided in a frame 22 provided on a mounting region R of the semiconductor element storage package 2. And a power semiconductor element 3 electrically connected via a wire, and a lid 4 provided on the frame 22 so as to cover the power semiconductor element 3. The semiconductor element storage package 2 includes a metal substrate 21 having a mounting region R on which an upper surface of the power semiconductor element 3 is mounted, a frame 22 provided on the metal substrate 21 and surrounding the mounting region R, and a frame. A lead member 23 provided in a part of the body 22 is provided with a flange portion 23 a that penetrates the frame body 22 from the outside of the frame body 22 and contacts the outer surface of the frame body 22. The flange 23 a protrudes out of the frame body 22 from the side surface of the metal substrate 21.

金属基板21は、平面視したとき、矩形状に形成された板状の部材である。金属基板21は、例えば、銅、鉄−ニッケル−コバルト合金、銅−モリブデン合金または銅−タングステン合金等の金属材料からなる。金属基板21は、パワー半導体素子3から生じる熱をすみやかに半導体装置1が実装される外部の実装基板に放熱する材料からなる。また、金属基板21は、グランドとして機能することができる。   The metal substrate 21 is a plate-like member formed in a rectangular shape when viewed in plan. The metal substrate 21 is made of a metal material such as copper, iron-nickel-cobalt alloy, copper-molybdenum alloy, or copper-tungsten alloy. The metal substrate 21 is made of a material that quickly dissipates heat generated from the power semiconductor element 3 to an external mounting substrate on which the semiconductor device 1 is mounted. The metal substrate 21 can function as a ground.

また、金属基板21の熱伝導率は、例えば、10W/m・K以上500W/m・K以下
に設定されている。また、金属基板21の熱膨張係数は、例えば、5ppm/℃以上20ppm/℃以下に設定されている。金属基板21が金属材料の場合は、例えば、インゴットを周知の圧延加工法、打ち抜き加工法またはエッチング加工法等の金属加工法を採用することによって、所定の形状となるように作製される。
Further, the thermal conductivity of the metal substrate 21 is set to, for example, 10 W / m · K or more and 500 W / m · K or less. The thermal expansion coefficient of the metal substrate 21 is set to, for example, 5 ppm / ° C. or more and 20 ppm / ° C. or less. When the metal substrate 21 is a metal material, for example, the ingot is manufactured to have a predetermined shape by adopting a metal processing method such as a well-known rolling method, punching method, or etching method.

また、金属基板21は、矩形状に形成されている。金属基板21は、例えば、一方の辺幅が、10mm以上30mm以下に、他方の辺幅が、20mm以上40mm以下に、厚みが、0.3mm以上3mm以下に設定されている。   The metal substrate 21 is formed in a rectangular shape. For example, one side width of the metal substrate 21 is set to 10 mm to 30 mm, the other side width is set to 20 mm to 40 mm, and the thickness is set to 0.3 mm to 3 mm.

また、金属基板21は、外表面に耐蝕性に優れ、かつ接合材との濡れ性が良い金属が被着している。具体的には、金属基板21は、メッキ形成方法によって、ニッケルメッキ層および金メッキ層を順次被着させておくのがよい。なお、ニッケルメッキ層のメッキ厚みは、例えば、0.5μm以上9μm以下である。また、金メッキ層のメッキ厚みは、例えば、0.5μm以上5μm以下である。これらの金属メッキ層は、金属基板21が酸化腐蝕するのを有効に抑制することができる。   Further, the metal substrate 21 is coated with a metal having excellent corrosion resistance and good wettability with the bonding material on the outer surface. Specifically, the metal substrate 21 is preferably deposited with a nickel plating layer and a gold plating layer sequentially by a plating method. Note that the plating thickness of the nickel plating layer is, for example, not less than 0.5 μm and not more than 9 μm. The plating thickness of the gold plating layer is, for example, not less than 0.5 μm and not more than 5 μm. These metal plating layers can effectively suppress the metal substrate 21 from being oxidized and corroded.

また、金属基板21は、金属基板21の上側主面にパワー半導体素子3が直接設けられてもよく、絶縁材料からなる絶縁基板を介して、パワー半導体素子3が設けられてもよい。なお、絶縁基板は、例えば、アルミナ質セラミックスまたは窒化アルミニウム質セラミックス等のセラミック材料からなる。   Moreover, the power semiconductor element 3 may be directly provided in the upper main surface of the metal substrate 21, and the power semiconductor element 3 may be provided through the insulating substrate which consists of an insulating material. The insulating substrate is made of a ceramic material such as alumina ceramic or aluminum nitride ceramic.

枠体22は、金属基板21上のパワー半導体素子3を封止するものである。枠体22は、金属基板21上に設けられている。枠体22は、金属基板21上の実装領域Rを取り囲んでいる。枠体22は、図5に示すように、平面視して4辺を有する四角形状であって、4辺のうち3辺が金属部材22aからなり、4辺のうち残りの1辺が絶縁部材22bからなる。なお、枠体22は、接合材を介して金属基板21上に設けられる。接合材は、例えば、銀−銅ロウ、銀ロウ等のロウ材である。   The frame body 22 seals the power semiconductor element 3 on the metal substrate 21. The frame body 22 is provided on the metal substrate 21. The frame 22 surrounds the mounting region R on the metal substrate 21. As shown in FIG. 5, the frame 22 has a quadrangular shape having four sides in plan view, and three of the four sides are made of the metal member 22 a and the remaining one of the four sides is an insulating member. 22b. The frame body 22 is provided on the metal substrate 21 via a bonding material. The bonding material is, for example, a brazing material such as silver-copper brazing or silver brazing.

金属部材22aは、三枚の板体が連続して繋がった、コの字形状である。金属部材22aは、一枚の金属板の2か所を折り曲げ加工することで、作製することができる。金属部材22aは、例えば、銅、ステンレス合金、鉄−ニッケル合金または鉄−ニッケル−コバルト合金等の金属材料からなる。金属部材22aは、平面視して、例えば、対向する2辺に挟まれる一方の辺幅が、10mm以上30mm以下に、他方の辺幅が、10mm以上30mm以下に、厚みが、0.5mm以上2mm以下に設定されている。また、金属部材22aは、上下方向の厚みが、2mm以上20mm以下に設定されている。また、金属部材22aの熱伝導率は、例えば、10W/m・K以上500W/m・K以下に設定されている。また、金属部材22aの熱膨張係数は、例えば、5ppm/℃以上20ppm/℃以下に設定されている。   The metal member 22a has a U-shape in which three plates are continuously connected. The metal member 22a can be manufactured by bending two places on one metal plate. The metal member 22a is made of, for example, a metal material such as copper, a stainless alloy, an iron-nickel alloy, or an iron-nickel-cobalt alloy. The metal member 22a has a side width of 10 mm to 30 mm, the other side width of 10 mm to 30 mm, and a thickness of 0.5 mm or more, for example, between two opposing sides in plan view. It is set to 2 mm or less. The metal member 22a has a thickness in the vertical direction set to 2 mm or more and 20 mm or less. The thermal conductivity of the metal member 22a is set to, for example, 10 W / m · K or more and 500 W / m · K or less. The thermal expansion coefficient of the metal member 22a is set to, for example, 5 ppm / ° C. or more and 20 ppm / ° C. or less.

絶縁部材22bは、リード部材23を固定する矩形状のものである。絶縁部材22bは、一枚の板体にリード部材23が貫通して設けられる孔が空いている。絶縁部材22bは、金属部材22aの開口した箇所を塞ぐように、金属基板21の上面および金属部材22aの端面にろう付けされている。絶縁部材22bは、セラミック材料を焼成することで、作製することができる。絶縁部材22bは、例えば、アルミナ質セラミックス、窒化アルミニウム質セラミックスまたはムライト質セラミックス等のセラミック材料からなる。絶縁部材22bは、平面視して、例えば、長手方向の一方の辺幅が、11mm以上34mm以下に、短手方向の他方の辺幅が、0.5mm以上2mm以下に設定されている。また、絶縁部材22bは、上下方向の厚みが、金属部材22aの上下方向の厚みと一致しており、2mm以上20mm以下に設定されている。また、絶縁部材22bの熱伝導率は、例えば、20W/m・K以上160W/m・K以下に設定されている。また、絶縁部材22b
の熱膨張係数は、例えば、2ppm/℃以上10ppm/℃以下に設定されている。
The insulating member 22 b has a rectangular shape that fixes the lead member 23. The insulating member 22b has a hole in which the lead member 23 is provided through a single plate. The insulating member 22b is brazed to the upper surface of the metal substrate 21 and the end surface of the metal member 22a so as to block the opening of the metal member 22a. The insulating member 22b can be produced by firing a ceramic material. The insulating member 22b is made of a ceramic material such as alumina ceramic, aluminum nitride ceramic, or mullite ceramic. In the insulating member 22b, for example, one side width in the longitudinal direction is set to 11 mm to 34 mm and the other side width in the short direction is set to 0.5 mm to 2 mm in plan view. In addition, the insulating member 22b has a vertical thickness that matches the vertical thickness of the metal member 22a, and is set to 2 mm or more and 20 mm or less. The thermal conductivity of the insulating member 22b is set to, for example, 20 W / m · K or more and 160 W / m · K or less. Insulating member 22b
The thermal expansion coefficient is set to, for example, 2 ppm / ° C. or more and 10 ppm / ° C. or less.

絶縁部材22bは、三つの貫通孔Hが設けられている。貫通孔Hは、リード部材23の一端を嵌め合わせるものである。貫通孔Hは、円状であって、直径が0.7mm以上4mm以下に、長さが絶縁部材22bの辺幅と一致するように、設定されている。三つの貫通孔Hは、貫通孔H同士の間隔が一定に離されている。間隔は、隣接するリード部材23同士が電気的に短絡しない、即ち、沿面放電が生じないように設定されている。   The insulating member 22b is provided with three through holes H. The through hole H is for fitting one end of the lead member 23 together. The through hole H is circular and has a diameter of 0.7 mm or more and 4 mm or less and a length that matches the side width of the insulating member 22b. The three through holes H are spaced apart from each other by a constant distance. The interval is set so that adjacent lead members 23 are not electrically short-circuited, that is, creeping discharge does not occur.

絶縁部材22bの外側面には、貫通孔Hの周囲にメタライズパターンpが形成されている。メタライズパターンpは、環状であって、リード部材23の鍔部23aをろう付けするのに下地となるものである。鍔部23aは、ろう材を介してメタライズパターンpに固定される。メタライズパターンpは、モリブデン、タングステン、マンガン等の下地金属層に、ニッケルメッキ層が設けられた金属材料からなる。なお、メタライズパターンpは、絶縁部材22bの外側面を側面視して、外径が1mm以上8mm以下に設定されている。   A metallized pattern p is formed around the through hole H on the outer surface of the insulating member 22b. The metallized pattern p is annular and serves as a base for brazing the flange 23a of the lead member 23. The flange 23a is fixed to the metallized pattern p through a brazing material. The metallized pattern p is made of a metal material in which a nickel plating layer is provided on a base metal layer such as molybdenum, tungsten, or manganese. The metallized pattern p is set to have an outer diameter of 1 mm or more and 8 mm or less when the outer surface of the insulating member 22b is viewed from the side.

金属基板21上には、絶縁基板が設けられてもよい。絶縁基板は、パワー半導体素子3が金属基板21と電気的に短絡しないように、パワー半導体素子3と金属基板21の間に介在させる部材、所謂、サブマウント部材である。絶縁基板は、パワー半導体素子3が設けられる大きさであって、枠体22内に収まる大きさに設定されている。なお、絶縁基板は、絶縁性の基板であって、例えば、酸化アルミニウム、窒化アルミニウムまたは窒化珪素等の無機材料、あるいはエポキシ樹脂、ポリイミド樹脂またはエチレン樹脂等の有機材料、あるいはアルミナまたはムライト等のセラミック材料、あるいはガラスセラミック材料等からなる。あるいは、これらの材料のうち複数の材料を混合した複合系材料からなる。   An insulating substrate may be provided on the metal substrate 21. The insulating substrate is a so-called submount member that is interposed between the power semiconductor element 3 and the metal substrate 21 so that the power semiconductor element 3 is not electrically short-circuited with the metal substrate 21. The insulating substrate is set to a size that allows the power semiconductor element 3 to be provided, and to fit within the frame body 22. The insulating substrate is an insulating substrate, for example, an inorganic material such as aluminum oxide, aluminum nitride, or silicon nitride, an organic material such as epoxy resin, polyimide resin, or ethylene resin, or ceramic such as alumina or mullite. It consists of material or glass ceramic material. Or it consists of a composite material which mixed several materials among these materials.

リード部材23は、電流を流す部材である。リード部材23は、長尺状であって、円柱部と、円柱部の外周箇所の一部に設けられた環状の鍔部23aからなる。円柱部と鍔部23aとは一体成型されている。リード部材23は、例えば、銅、鉄−ニッケル合金、鉄−ニッケル−コバルト合金等の金属材料からなる。これらの金属材料からなるインゴットを周知の圧延加工法、打ち抜き加工法またはエッチング加工法等の金属加工法を採用することによって、所定の形状となるように作製される。なお、リード部材23の熱伝導率は、例えば、10W/m・K以上400W/m・K以下に設定されている。また、リード部材23の熱膨張係数は、例えば、5ppm/℃以上20ppm/℃以下に設定されている。   The lead member 23 is a member that allows current to flow. The lead member 23 has a long shape, and includes a cylindrical portion and an annular flange portion 23a provided at a part of the outer peripheral portion of the cylindrical portion. The cylindrical portion and the flange portion 23a are integrally molded. The lead member 23 is made of a metal material such as copper, iron-nickel alloy, iron-nickel-cobalt alloy, for example. The ingot made of these metal materials is manufactured to have a predetermined shape by adopting a known metal working method such as a rolling method, a punching method or an etching method. The thermal conductivity of the lead member 23 is set to, for example, 10 W / m · K or more and 400 W / m · K or less. Further, the thermal expansion coefficient of the lead member 23 is set to, for example, 5 ppm / ° C. or more and 20 ppm / ° C. or less.

リード部材23の円柱部は、大電流についても流すことができるように、直径が0.5mm以上2mm以下であって、長さが10mm以上30mm以下に設定されている。また、リード部材23の鍔部23aは、直径が1mm以上8mm以下であって、厚みが0.1mm以上1mm以下に設定されている。また、リード部材23の円柱部の直径は、絶縁部材22bの貫通孔Hの直径に嵌る大きさに設定されている。鍔部23aの直径は、貫通孔Hの直径よりも大きく、鍔部23aの側面が絶縁部材22bの外側面に当接する大きさに設定されている。   The cylindrical portion of the lead member 23 has a diameter of 0.5 mm or more and 2 mm or less and a length of 10 mm or more and 30 mm or less so that a large current can flow. The flange 23a of the lead member 23 has a diameter of 1 mm or more and 8 mm or less and a thickness of 0.1 mm or more and 1 mm or less. In addition, the diameter of the cylindrical portion of the lead member 23 is set to a size that fits the diameter of the through hole H of the insulating member 22b. The diameter of the flange portion 23a is larger than the diameter of the through hole H, and is set to a size such that the side surface of the flange portion 23a abuts on the outer surface of the insulating member 22b.

絶縁部材22bにリード部材23を固定した状態で、枠体22の内側から突出しているリード部材23の一部は、ワイヤを介してパワー半導体素子3と電気的に接続される。つまり、実装領域R上に設けられた、パワー半導体素子3は、枠体22内に位置するリード部材23の一部とワイヤを介して電気的に接続されている。その結果、リード部材23は、パワー半導体素子3と電気的に接続されている。   In a state where the lead member 23 is fixed to the insulating member 22b, a part of the lead member 23 protruding from the inside of the frame body 22 is electrically connected to the power semiconductor element 3 through a wire. That is, the power semiconductor element 3 provided on the mounting region R is electrically connected to a part of the lead member 23 located in the frame body 22 via the wire. As a result, the lead member 23 is electrically connected to the power semiconductor element 3.

枠体22上には、ろう材等の接合材を介してシールリング6がろう付けされる。なお、
ろう材は、例えば、銀、銅、金、アルミニウムまたはマグネシウム等からなり、ニッケル、カドミウムまたは燐等の添加物を含有させてもよい。シールリング6は、平面視したとき、金属基板21上に設けた枠体22と重なる枠状部材である。シールリング6は、例えば、鉄、ニッケルまたはコバルト等の熱伝導性の優れた緩衝材料からなる。なお、シールリング6は、枠体22に対して固形の接合材を用いて接続される。枠体22上に接合材を配置し、この接合材上にシールリング6を重ねて、シールリング6に熱を加えることで、接合材が溶けて、シールリング6と枠体22とが接続される。さらに、溶融した接合材が冷やされて固化することで、シールリング6が接合材を介して枠体22に固定される。
The seal ring 6 is brazed onto the frame 22 via a bonding material such as a brazing material. In addition,
The brazing material is made of, for example, silver, copper, gold, aluminum, or magnesium, and may contain an additive such as nickel, cadmium, or phosphorus. The seal ring 6 is a frame-like member that overlaps the frame body 22 provided on the metal substrate 21 when viewed in plan. The seal ring 6 is made of a buffer material having excellent thermal conductivity such as iron, nickel, or cobalt. The seal ring 6 is connected to the frame body 22 using a solid bonding material. A bonding material is disposed on the frame body 22, the seal ring 6 is stacked on the bonding material, and heat is applied to the seal ring 6, so that the bonding material melts and the seal ring 6 and the frame body 22 are connected. The Furthermore, the melted bonding material is cooled and solidified, whereby the seal ring 6 is fixed to the frame body 22 via the bonding material.

また、シールリング6上には、蓋体4が設けられる。蓋体4は、金属基板21と枠体22とで囲まれる空間を封止する機能を備えている。蓋体4は、パワー半導体素子3を気密に封止するために、シールリング6上に設けられている。また、蓋体4は、例えば、鉄−ニッケル−コバルト合金または鉄−ニッケル合金等の金属材料からなる。蓋体4の熱膨張係数は、例えば、5ppm/℃以上20ppm/℃以下に設定されている。また、蓋体4は、例えば、一方の辺幅が、10mm以上30mm以下に、他方の辺幅が、10mm以上30mm以下に、厚みが、0.2mm以上1mm以下に設定されている。なお、蓋体4は、矩形状であって、例えばろう材を介してシールリング6上にろう付けされる。あるいは、蓋体4は、抵抗シーム溶接、レーザーシーム溶接や電子ビーム溶接などによってシールリング6に溶接される。   A lid 4 is provided on the seal ring 6. The lid body 4 has a function of sealing a space surrounded by the metal substrate 21 and the frame body 22. The lid 4 is provided on the seal ring 6 in order to hermetically seal the power semiconductor element 3. Moreover, the cover body 4 consists of metal materials, such as an iron-nickel-cobalt alloy or an iron-nickel alloy, for example. The thermal expansion coefficient of the lid body 4 is set to, for example, 5 ppm / ° C. or more and 20 ppm / ° C. or less. Further, the lid body 4 is set, for example, such that one side width is 10 mm or more and 30 mm or less, the other side width is 10 mm or more and 30 mm or less, and the thickness is 0.2 mm or more and 1 mm or less. The lid 4 has a rectangular shape and is brazed onto the seal ring 6 via a brazing material, for example. Alternatively, the lid 4 is welded to the seal ring 6 by resistance seam welding, laser seam welding, electron beam welding, or the like.

パワー半導体素子3は、金属基板21の実装領域Rに直接接着固定されてもよく、実装領域Rに位置する絶縁基板上に接着固定されてもよい。そして、パワー半導体素子3の上面に設けられている電極が、ボンディングワイヤ等を介してリード部材23に電気的に接続される。次に、枠体22上にシールリング6を介して蓋体4を接合し、金属基板21、枠体22および蓋体4の内部にパワー半導体素子3が気密に収納されて半導体装置1となる。すなわち、パワー半導体素子3を搭載した後、蓋体4で密封することにより半導体装置1となる。   The power semiconductor element 3 may be directly bonded and fixed to the mounting region R of the metal substrate 21 or may be bonded and fixed on an insulating substrate located in the mounting region R. Then, an electrode provided on the upper surface of the power semiconductor element 3 is electrically connected to the lead member 23 via a bonding wire or the like. Next, the lid body 4 is joined onto the frame body 22 via the seal ring 6, and the power semiconductor element 3 is hermetically housed inside the metal substrate 21, the frame body 22, and the lid body 4 to form the semiconductor device 1. . That is, after mounting the power semiconductor element 3, the semiconductor device 1 is formed by sealing with the lid 4.

本実施形態に係る半導体素子収納用パッケージ2は、鍔部23aが、平面視して、絶縁基板22bの直下に位置する金属基板21の側面よりも枠体22外に食み出していることで、鍔部23aと金属基板21の距離を長くすることができる。即ち、鍔部23aと金属基板21との沿面距離を長くすることができる。つまり、鍔部23aの直下に、金属基板21が存在しないため、リード部材23に大電流が流れても、絶縁破壊が生じにくく、リード部材23と金属基板21とが電気的に短絡しにくくすることができ、鍔部23aと金属基板21との間の絶縁性を良好に維持することができる。特に、パワー半導体素子3を用いる半導体素子収納用パッケージ2は、リード部材23に高周波の大電流を流すことがあり、リード部材23と金属基板21との間に放電現象が起こり、リード部材23と金属基板21とが導通してしまうことが起こり得る。リード部材23の中でも、外部の電子機器と接続される枠体22外の鍔部23aは、その他の部位に比べて金属基板21との距離が短くなるため、金属基板21と電気的に短絡してしまう虞が大きい。そこで、鍔部23aを金属基板21から離し、沿面距離を長くすることで、リード部材23と金属基板21とが電気的に短絡するのを抑制することができる。   In the package 2 for housing a semiconductor element according to the present embodiment, the flange portion 23a protrudes out of the frame body 22 from the side surface of the metal substrate 21 located immediately below the insulating substrate 22b in plan view. The distance between the flange 23a and the metal substrate 21 can be increased. That is, the creeping distance between the flange 23a and the metal substrate 21 can be increased. That is, since the metal substrate 21 does not exist immediately below the flange portion 23a, even if a large current flows through the lead member 23, dielectric breakdown hardly occurs, and the lead member 23 and the metal substrate 21 are not easily short-circuited. Therefore, it is possible to maintain good insulation between the flange 23a and the metal substrate 21. In particular, the package 2 for housing a semiconductor element using the power semiconductor element 3 may cause a high-frequency high current to flow through the lead member 23, and a discharge phenomenon occurs between the lead member 23 and the metal substrate 21. It may occur that the metal substrate 21 is electrically connected. Among the lead members 23, the flange portion 23 a outside the frame body 22 connected to an external electronic device is short-circuited with the metal substrate 21 because the distance from the metal substrate 21 is shorter than other portions. There is a great risk of it. Therefore, it is possible to prevent the lead member 23 and the metal substrate 21 from being electrically short-circuited by separating the flange portion 23a from the metal substrate 21 and increasing the creepage distance.

また、本実施形態では、鍔部23aを環状とすることで、絶縁部材22bとの接続状態を良好にしつつ、リード部材23に流れる電流が鍔部23aの特定箇所に集中するのを抑制することができる。つまり、仮に、鍔部23aに角が有る形とした場合は、その角に電流集中が起き、ひいては金属基板21との間の絶縁破壊を起こす虞が大きい。そこで、鍔部23aを環状とすることで、鍔部23aと金属基板21との間が電気的に短絡するのを抑制することができる。   Moreover, in this embodiment, it is suppressing that the electric current which flows into the lead member 23 concentrates on the specific location of the collar part 23a, making the connection part with the insulating member 22b favorable by making the collar part 23a annular. Can do. That is, if the flange portion 23a has a corner, current concentration occurs at the corner, and as a result, there is a high possibility of causing dielectric breakdown with the metal substrate 21. Then, it can suppress that the collar part 23a and the metal substrate 21 are electrically short-circuited by making the collar part 23a cyclic | annular.

また、本実施形態では、リード部材23と接続される、枠体22の一部である絶縁部材22bは、枠体22外側の側面が絶縁基板22bの直下に位置する金属基板21の側面よりも枠体22外に食み出している、即ち、金属基板21の側面が絶縁部材22bの外側面がよりも枠体22の内側方向に設けられることで、リード部材23の鍔部23aが、金属基板21から離れるようにすることができる。その結果、リード部材23の鍔部23aと金属基板21の側面との間の沿面距離を長くすることができ、両部材が電気的に短絡するのを抑制することができる。   In the present embodiment, the insulating member 22b, which is a part of the frame body 22 connected to the lead member 23, has a side surface on the outer side of the frame body 22 that is more than the side surface of the metal substrate 21 positioned directly below the insulating substrate 22b. The side surface of the metal substrate 21 protrudes out of the frame body 22, that is, the outer surface of the insulating member 22 b is provided closer to the inner side of the frame body 22, so that the flange portion 23 a of the lead member 23 is made of metal. It can be separated from the substrate 21. As a result, the creepage distance between the flange 23a of the lead member 23 and the side surface of the metal substrate 21 can be increased, and the two members can be prevented from being electrically short-circuited.

また、他の実施形態としては、絶縁部材22bは、上面視にて、両端部が絶縁部材22bに接合される金属部材22aの側壁部より、枠体22の外側方向に突出するように設けられてもよく、また、シールリング6は、上面視にて、外周面が鍔部23aが接合される絶縁部材22bの側面より枠体22の内側方向に設けられてもよい。その結果、リード部材23と金属部材22aおよびシールリング6との間の沿面距離を長くすることができ、リード部材23と金属部材22aおよびシールリング6とが電気的に短絡するのを抑制することができる。   As another embodiment, the insulating member 22b is provided so that both end portions protrude in the outer direction of the frame body 22 from the side wall portion of the metal member 22a joined to the insulating member 22b in a top view. Alternatively, the seal ring 6 may be provided in the inner direction of the frame body 22 from the side surface of the insulating member 22b to which the outer peripheral surface is joined to the flange portion 23a when viewed from above. As a result, the creepage distance between the lead member 23 and the metal member 22a and the seal ring 6 can be increased, and the lead member 23, the metal member 22a and the seal ring 6 are prevented from being electrically short-circuited. Can do.

また、本実施形態では、枠体22は、3辺が金属部材22aからなり、1辺が絶縁部材22bからなるとともに、リード部材23が絶縁部材22bに設けられていることで、パワー半導体素子3の周囲をリード部材23を設ける箇所以外は、金属材料で囲むことで、周囲の電界遮蔽効果を良好にすることができる。パワー半導体素子3に対して周囲から余分な電気信号が入力されにくくすることができ、パワー半導体素子3が誤作動を起こしたりすることを防止することができる。さらには、パワー半導体素子3の発する熱を外部に放熱しやすくすることができ、パワー半導体素子3の電気的特性が変化するのを抑制することができる。   In the present embodiment, the frame 22 has three sides made of the metal member 22a, one side made of the insulating member 22b, and the lead member 23 provided on the insulating member 22b. The surrounding electric field shielding effect can be improved by enclosing with a metal material except for the portion where the lead member 23 is provided. It is possible to make it difficult for extra power signals to be input from the surroundings to the power semiconductor element 3, and to prevent the power semiconductor element 3 from malfunctioning. Furthermore, the heat generated by the power semiconductor element 3 can be easily dissipated to the outside, and changes in the electrical characteristics of the power semiconductor element 3 can be suppressed.

さらに、本実施形態では、シールリング6が金属部材22a上から絶縁部材22b上にかけて連続して設けられていることで、蓋体4をシーム溶接等の接合法によって半導体素子収納用パッケージ2に接合する際に、金属部材22aと絶縁部材22bと蓋体4の熱膨張係数の差によってそれぞれの部位に応力が生じたとしても、シールリング6が変形することで緩和され、ぞれぞれの接合部や絶縁部材22bにクラックや剥がれ等が生じる虞を抑制することができるという作用効果を奏する。   Furthermore, in this embodiment, the seal ring 6 is continuously provided from the metal member 22a to the insulating member 22b, so that the lid 4 is joined to the semiconductor element housing package 2 by a joining method such as seam welding. In this case, even if stress is generated in each part due to the difference in thermal expansion coefficient among the metal member 22a, the insulating member 22b, and the lid body 4, the seal ring 6 is relieved by deformation, and each joint is bonded. There exists an effect that the possibility that a crack, peeling, etc. may arise in a section or insulating member 22b can be controlled.

本発明は上述の実施の形態に限定されるものではなく、本発明の要旨を逸脱しない範囲において種々の変更、改良等が可能である。   The present invention is not limited to the above-described embodiments, and various changes and improvements can be made without departing from the scope of the present invention.

<半導体素子収納用パッケージ、および半導体装置の製造方法>
ここで、半導体素子収納用パッケージ、およびこれを備えた半導体装置の製造方法を説明する。金属基板21や金属部材22a、シールリング6は、例えば、鉄−ニッケル−コバルト合金を型枠に鋳込んで作製したインゴットを周知の切削加工や打ち抜き加工等の金属加工法を用いて所定形状に作製される。
<Semiconductor Element Storage Package and Semiconductor Device Manufacturing Method>
Here, a semiconductor element storage package and a method for manufacturing a semiconductor device including the same will be described. The metal substrate 21, the metal member 22 a, and the seal ring 6 are formed into a predetermined shape by using a metal processing method such as a well-known cutting process or punching process, for example, from an ingot produced by casting an iron-nickel-cobalt alloy into a mold. Produced.

枠体22の絶縁部材22bは、例えば、酸化アルミニウム質焼結体からなる場合、酸化アルミニウム、酸化珪素、酸化マグネシウム、酸化カルシウム等の原料粉末に、有機バインダー、可塑剤、溶剤、分散剤等を混合添加してペースト状として、ドクターブレード法やカレンダーロール法等によってグリーンシートが形成される。   When the insulating member 22b of the frame body 22 is made of, for example, an aluminum oxide sintered body, an organic binder, a plasticizer, a solvent, a dispersant, etc. are added to raw material powders such as aluminum oxide, silicon oxide, magnesium oxide, and calcium oxide. A green sheet is formed by mixing and adding to form a paste by a doctor blade method, a calendar roll method, or the like.

そして、平板形状のグリーンシートは、金型を用いた打ち抜きを施すことによって貫通孔Hが所定形状にされる。また、絶縁部材22bは、金属基板21との接合部、金属部材22aとの接合部、シールリング6との接合部およびリード部材23の鍔部23aとの接合部に該当する位置に、モリブデン、マンガン等を含むメタライズパターンpが形成され
ている。そして、約1600℃の温度で焼成し、所定形状に切断することにより、枠体22の絶縁部材22bが作製される。なお、メタライズパターンpは、焼成されることによって形成されたモリブデン−マンガン合金の表面に、ニッケルから成るメッキ層が設けられる。
The flat green sheet is punched with a mold so that the through hole H is shaped into a predetermined shape. Further, the insulating member 22b is formed at a position corresponding to a joint portion with the metal substrate 21, a joint portion with the metal member 22a, a joint portion with the seal ring 6, and a joint portion with the flange portion 23a of the lead member 23. A metallized pattern p containing manganese or the like is formed. And the insulating member 22b of the frame 22 is produced by baking at the temperature of about 1600 degreeC and cut | disconnecting in a predetermined shape. The metallized pattern p is provided with a nickel plating layer on the surface of a molybdenum-manganese alloy formed by firing.

次に、リード部材23は、例えば、鉄−ニッケル−コバルト合金を型枠に鋳込んで作製したインゴットを周知の切削加工、打ち抜き加工、プレス加工等の金属加工法を用いて所定の形状に作製される。このとき、鍔部23aについても、リード部材23の円柱部と一体に形成される。そして、リード部材23は、絶縁部材22bの貫通孔Hに外側から挿し込まれ、絶縁部材22bの外側面に形成されたメタライズパターンpとリード部材23の鍔部23aの側面とが当接させて、両部材をろう材を介して接続する。   Next, for example, the lead member 23 is formed into a predetermined shape by using a known metal working method such as cutting, punching, or pressing an ingot produced by casting an iron-nickel-cobalt alloy into a mold. Is done. At this time, the flange portion 23 a is also formed integrally with the cylindrical portion of the lead member 23. The lead member 23 is inserted into the through hole H of the insulating member 22b from the outside, and the metallized pattern p formed on the outer surface of the insulating member 22b and the side surface of the flange portion 23a of the lead member 23 are brought into contact with each other. Both members are connected via a brazing material.

次に、金属基板21と、金属部材22aと、リード部材23が接続された絶縁部材22bと、シールリング6とをろう材等の接合材を介して固定する。具体的には、金属基板21は、上面に金属部材22aのコの字状の両端部の側面と絶縁基板22bの内側面とが当接するように配置されるとともに、枠体22の上面にシールリング6が配置され、ろう材を介してそれぞれ固定される。このとき、絶縁部材22bは、メタライズパターンpが設けられた外側面が絶縁部材22bの直下に位置する金属基板21の側面よりも外側に食み出すとともに、平面視して絶縁部材22bの端部は、隣接する金属部材22aの外側面より外側に突出するように金属基板21および金属部材22aに固定される。このようにして、半導体素子収納用パッケージ2を作製することができる。   Next, the metal substrate 21, the metal member 22a, the insulating member 22b to which the lead member 23 is connected, and the seal ring 6 are fixed through a bonding material such as a brazing material. Specifically, the metal substrate 21 is disposed so that the side surfaces of the U-shaped ends of the metal member 22a and the inner surface of the insulating substrate 22b abut on the upper surface, and the upper surface of the frame body 22 is sealed. Rings 6 are arranged and fixed through brazing materials. At this time, the insulating member 22b has an outer surface on which the metallized pattern p is provided protrudes outward from the side surface of the metal substrate 21 positioned immediately below the insulating member 22b, and the end portion of the insulating member 22b in a plan view. Are fixed to the metal substrate 21 and the metal member 22a so as to protrude outward from the outer surface of the adjacent metal member 22a. In this way, the semiconductor element storage package 2 can be manufactured.

また、絶縁基板は、枠体22の絶縁部材22bと同様に、グリーンシートが用いられる。そして、それらを焼成することによって所定形状の絶縁基板が作製される。そして、絶縁基板は、金属基板21の上側主面で枠体22に囲まれる実装領域Rに接合材を介して接合される。   In addition, a green sheet is used for the insulating substrate, similarly to the insulating member 22 b of the frame body 22. Then, an insulating substrate having a predetermined shape is produced by firing them. The insulating substrate is bonded to the mounting region R surrounded by the frame body 22 on the upper main surface of the metal substrate 21 via a bonding material.

ここで、半導体装置の製造方法について説明する。半導体装置は、半導体素子収納用パッケージ2に、パワー半導体素子3および蓋体4を備えている。蓋体4は、例えば、鉄−ニッケル−コバルト合金を型枠に鋳込んで作製したインゴットを周知の切削加工や打ち抜き加工等の金属加工法を用いて所定の形状に作製される。パワー半導体素子3は、絶縁基板に接着固定され、ボンディングワイヤ等を介してリード部材23に電気的に接続される。そして、蓋体4は、シールリング6を介して枠体22上にシーム溶接されて設けられる。すなわち、半導体装置1は、パワー半導体素子3が蓋体4によって気密に封止される。   Here, a method for manufacturing a semiconductor device will be described. The semiconductor device includes a power semiconductor element 3 and a lid 4 in a package 2 for housing a semiconductor element. The lid 4 is made into a predetermined shape using a known metal working method such as cutting or punching, for example, an ingot produced by casting an iron-nickel-cobalt alloy into a mold. The power semiconductor element 3 is bonded and fixed to an insulating substrate and is electrically connected to the lead member 23 via a bonding wire or the like. The lid body 4 is provided by seam welding on the frame body 22 via the seal ring 6. That is, in the semiconductor device 1, the power semiconductor element 3 is hermetically sealed by the lid 4.

1 半導体装置
2 半導体素子収納用パッケージ
21 金属基板
22 枠体
22a 金属部材
22b 絶縁部材
23 リード部材
23a 鍔部
3 パワー半導体素子
4 蓋体
6 シールリング
R 実装領域
H 貫通孔
p メタライズパターン
DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Package for semiconductor element 21 Metal substrate 22 Frame body 22a Metal member 22b Insulating member 23 Lead member 23a Eave part 3 Power semiconductor element 4 Cover body 6 Seal ring R Mounting area H Through hole p Metallized pattern

Claims (6)

上面にパワー半導体素子が実装される実装領域を有する金属基板と、
前記金属基板上に設けられた、前記実装領域を取り囲む枠体と、
前記枠体の一部に設けられた、前記枠体外から前記枠体を貫通し、前記枠体の外側面と当接する鍔部を有するリード部材とを備え、
前記鍔部は、平面視して、前記金属基板の側面よりも前記枠体外に食み出していることを特徴とする半導体素子収納用パッケージ。
A metal substrate having a mounting region on which the power semiconductor element is mounted;
A frame provided on the metal substrate and surrounding the mounting area;
A lead member provided in a part of the frame body, having a flange that penetrates the frame body from outside the frame body and contacts an outer surface of the frame body;
The package for housing a semiconductor element, wherein the flange portion protrudes out of the frame body from a side surface of the metal substrate in a plan view.
請求項1に記載の半導体素子収納用パッケージであって、
前記鍔部は、環状であることを特徴とする半導体素子収納用パッケージ。
The package for housing a semiconductor device according to claim 1,
A package for housing a semiconductor element, wherein the flange is annular.
請求項1または請求項2に記載の半導体素子収納用パッケージであって、
前記リード部材と接続される、前記枠体の一部は、前記金属基板の側面よりも前記枠体外に食み出していることを特徴とする半導体素子収納用パッケージ。
A package for housing a semiconductor device according to claim 1 or 2,
A package for housing a semiconductor element, wherein a part of the frame body connected to the lead member protrudes outside the frame body from a side surface of the metal substrate.
請求項1に記載の半導体素子収納用パッケージであって、
前記枠体は、平面視して4辺を有する四角形状であって、前記4辺のうち3辺が金属部材からなり、前記4辺のうち残りの1辺が絶縁部材からなり、前記リード部材が前記絶縁部材に設けられていることを特徴とする半導体素子収納用パッケージ。
The package for housing a semiconductor device according to claim 1,
The frame has a quadrangular shape having four sides in plan view, three of the four sides are made of a metal member, and the other one of the four sides is made of an insulating member, and the lead member Is provided on the insulating member.
請求項4に記載の半導体素子収納用パッケージであって、
前記枠体上には、前記枠体の上部に沿ってシールリングが設けられており、前記シールリングが前記金属部材上から前記絶縁部材上にかけて連続して設けられていることを特徴とする半導体素子収納用パッケージ。
A package for housing a semiconductor element according to claim 4,
A seal ring is provided on the frame body along an upper portion of the frame body, and the seal ring is provided continuously from the metal member to the insulating member. Package for element storage.
請求項1ないし請求項5のいずれかに記載の半導体素子収納用パッケージと、
前記実装領域上に設けられた、前記枠体内に位置する前記リード部材の一部とワイヤを介して電気的に接続されたパワー半導体素子と、
前記枠体上に前記パワー半導体素子を覆って設けられた蓋体と、
を備えたことを特徴とする半導体装置。
A package for housing a semiconductor element according to any one of claims 1 to 5,
A power semiconductor element provided on the mounting region and electrically connected to a part of the lead member located in the frame body via a wire;
A lid provided on the frame to cover the power semiconductor element;
A semiconductor device comprising:
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