JP2015217081A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid giving a disadvantage to players even if a MAX bet operation is performed in a state where the number of tokens stored in a credit system is less than a prescribed maximum betting number.SOLUTION: The game machine includes bet operation invalid means for making an operation of a player invalid when, in a state between flags, a total number of the number of inputted game medium tokens detected by input operation detection means and the number of stored game medium tokens stored by game medium storage means is less than a prescribed token numbers, and an operation of the player is detected by bet detection means.

Description

  The present invention relates to a gaming machine.

  Conventionally, a game called pachi-slot, comprising a plurality of reels each having a plurality of symbols provided on the surface, a start switch, a stop switch, a stepping motor provided for each reel, and a control unit. The machine is known. The start switch detects that the start lever has been operated by the player (hereinafter also referred to as “start operation”) after a game medium such as a medal or coin has been inserted into the gaming machine, and the rotation of all reels is detected. Outputs a signal requesting start. The stop switch detects that a stop button provided for each reel has been pressed by the player (hereinafter also referred to as “stop operation”), and outputs a signal requesting the rotation of the corresponding reel to stop. To do. The stepping motor transmits the driving force to the corresponding reel. Further, the control unit controls the operation of the stepping motor based on the signals output from the start switch and the stop switch, and performs the rotation operation and stop operation of each reel.

  In such a gaming machine, when a start operation is detected, lottery processing using random numbers (hereinafter referred to as “internal lottery processing”) is performed on the program, and the result of the lottery (hereinafter referred to as “internal winning combination”). And the rotation of the reel is stopped based on the timing of the stop operation. Then, when the rotation of all the reels is stopped and the symbol combination related to the winning is displayed, a privilege corresponding to the symbol combination is given to the player. As an example of a privilege granted to a player, a replay (hereinafter also referred to as “replay”) in which an internal lottery process is performed again without paying out game media (medals, etc.) or consuming the game media. An operation of a bonus game in which a game medium payout opportunity increases can be cited.

  In the gaming machine having the above-described configuration, the lottery table referred to in accordance with the number of medals inserted for each game (hereinafter referred to as “the number to be multiplied”) is different in recent years, and the lottery table desired by the player is switched depending on the number of the number A gaming machine having a possible function has been proposed (see, for example, Patent Document 1). In such a gaming machine, by changing the number of medals, the lottery probability of the internal winning combination changes, so that it is possible to diversify the gaming nature and provide a more interesting gaming machine. .

JP 2006-230776 A

  By the way, a gaming machine called “pachislot” is provided with a MAX bet operation function that allows a player to insert a plurality of medals in one operation when inserting medals stored in the pachislot as credits. It has been. In this case, when a MAX bet operation is performed once by the player, a predetermined maximum number of medals are inserted from the medals stored in the credit.

  However, even if the number of medals less than a predetermined maximum number of medals is used, in the gaming machine of Patent Document 1 that can be played, if the number of medals stored in the credit is less than the predetermined maximum number of medals, the player When the MAX bet operation is performed, medals with less than a predetermined maximum number are inserted. In this case, a game using an undesired lottery table is started. Therefore, in the configuration of the gaming machine disclosed in Patent Document 1, the player needs to always grasp the number of stored medals.

Also, in current pachislot machines, the lottery table is usually set so that the greater the number of medals, the higher the probability of winning a small role or special game internally.
Therefore, if the MAX bet operation is performed in a state where the number of medals stored in the credit is less than the predetermined maximum number, the game is started with the number of medals multiplied by the player, which is not intended by the player. There may be disadvantages.

  The present invention has been made to solve the above problems, and an object of the present invention is to perform a MAX bet operation in a state where the number of medals stored in a credit is less than a predetermined maximum number. Another object of the present invention is to provide a gaming machine having a function that does not give a disadvantage to the player.

  In order to solve the above problems, the present invention provides a gaming machine having the following configuration.

A loading operation detecting means (for example, a medal sensor described later) for detecting a gaming medium loading operation;
Game medium storage means (for example, a credit function described later) for storing the excess game media;
Whether or not a predetermined maximum number (for example, two or three) of the game media has been inserted into the unit game from the game media stored in the game media storage means by one operation of the player Bet detection means (for example, a BET switch 77 described later) for detecting
Start operation detection means (for example, a start switch 79 described later) for detecting a start operation by the player after the insertion of the game medium is detected by at least one of the insertion operation detection means and the bet detection means;
Internal winning combination determining means (for example, internal lottery processing described later) for determining an internal winning combination with a predetermined probability based on detection of the start operation by the start operation detecting means;
Based on the detection of the start operation by the start operation detecting means, the variable display means (for example, three reels 3L, 3C, 3R and three reels to be described later) are displayed. Stepping motor)
A stop operation detecting means (for example, a stop switch substrate 80 described later) for detecting a stop operation by the player;
Stop control means (for example, reel stop control process described later) for stopping the change display of the symbol based on the determination result of the internal winning combination determining means and detection of the stop operation by the stop operation detecting means;
Controls the operation of a game performed in an inter-flag state (for example, a 2 MB flag state described later) in which a special internal winning combination (for example, “2 MB” described later) determined by the internal winning combination determining means is carried over. An inter-flag game control means (for example, a main control circuit 91 described later);
In the inter-flag state, the total number of inserted game media detected by the input operation detecting means and the stored number of game media stored by the game medium storing means is less than a predetermined number, and When the player's operation is detected by the bet detecting means, a bet operation invalidating means for invalidating the player's operation (for example, a MAXBET inserting process described later),
A gaming machine comprising

In the gaming machine of the present invention, the special internal winning combination is an internal winning combination for winning and winning in a unit game in which the number of inserted game media is less than the predetermined number (for example, two). And, when the special internal winning combination is determined by the internal winning combination determining means, the probability that the internal winning combination relating to replay is determined by the internal winning combination determining means Replay time state control means (for example, S86 in the internal lottery process described later) for performing control to shift to a higher replay time state than the replay time state before being determined;
An informing means for informing information giving an advantageous state for the player,
In the high replay time state, the game in the flag state is performed by playing the game with the number of the game media inserted in the predetermined number (for example, 3),
The notification means may notify instruction information for setting the number of inserted game media for each unit game to the predetermined number in the inter-flag state.

  As described above, in the gaming machine according to the present invention, in the inter-flag state, the total number of game media inserted by the insertion operation detecting means and the number of game media stored by the game medium storage means When the number is less than the predetermined number (predetermined maximum number to be multiplied), a bet operation invalidating unit that invalidates the operation of the player (MAX bet operation) detected by the bet detection unit is provided. Therefore, according to the gaming machine of the present invention, even if the MAX bet operation is performed in a state where the number of medals stored in the credit is less than the predetermined maximum number, the player is not disadvantaged. Can be.

It is a figure for demonstrating the function flow of the game machine in one Embodiment of this invention. It is a perspective view which shows the external appearance structure of the game machine in one Embodiment of this invention. It is a figure which shows the internal structure of the game machine in one Embodiment of this invention. It is a figure which shows the internal structure of the game machine in one Embodiment of this invention. It is a block diagram which shows the whole circuit structure with which the game machine of one Embodiment of this invention is provided. It is a block diagram which shows the internal structure of the main control circuit in one Embodiment of this invention. It is a block diagram which shows the internal structure of the sub control circuit in one Embodiment of this invention. It is a transition flow figure of RT game state of the gaming machine in one embodiment of the present invention. It is a figure which shows an example of the symbol arrangement | positioning table in one Embodiment of this invention. It is a figure which shows an example of the symbol combination table (the 1) in one Embodiment of this invention. It is a figure which shows an example of the symbol combination table (the 2) in one Embodiment of this invention. It is a figure which shows an example of the symbol combination table (the 3) in one Embodiment of this invention. It is a figure which shows an example of the general (RT0) game state internal lottery table (3 sheets hanging) in one Embodiment of this invention. It is a figure which shows an example between the 2MB flag (RT1) gaming state internal lottery tables (three pieces hanging) in one Embodiment of this invention. It is a figure which shows an example of the internal lottery table for 3MB flag (RT2) gaming state (3 sheets hanging) in one Embodiment of this invention. It is a figure which shows an example of the general (RT0) gaming state internal lottery table (two pieces) in one Embodiment of this invention. It is a figure which shows an example between the 2MB flag (RT1) game state internal lottery tables (2 sheets hanging) in one Embodiment of this invention. It is a figure which shows an example of the internal lottery table for 2 MB flag (RT2) gaming state (2 sheets) in one Embodiment of this invention. It is a figure which shows an example of the internal lottery table for 2MB gaming states in one Embodiment of this invention. It is a figure which shows an example of the internal lottery table for 3MB gaming states in one Embodiment of this invention. It is a figure which shows an example of the symbol combination determination table (the 1) in one Embodiment of this invention. It is a figure which shows an example of the symbol combination determination table (the 2) in one Embodiment of this invention. It is a figure which shows an example of the symbol combination determination table (the 3) in one Embodiment of this invention. It is a figure which shows an example of the internal winning combination storing area in one Embodiment of this invention. It is a figure which shows an example of the display combination storage area in one Embodiment of this invention. It is a figure which shows an example of the carryover combination storage area in one Embodiment of this invention. It is a figure which shows an example of the game state flag storage area in one Embodiment of this invention. It is a figure which shows an example of the operation stop button storage area | region in one Embodiment of this invention. It is a figure which shows an example of the pressing order storage area | region in one Embodiment of this invention. It is a figure which shows an example of the symbol code storage area in one Embodiment of this invention. 10 is a correspondence table between abbreviations of internal winning combinations used in the control of the sub CPU and abbreviations of internal winning combinations used in the control of the main CPU. It is a figure which shows an example of the race runner MAP lottery table in one Embodiment of this invention. It is a figure which shows an example of the race information MAP data table in one Embodiment of this invention. It is a figure which shows an example of the victory object person lottery table in one Embodiment of this invention. It is a figure which shows an example of the race winning ratio MAP lottery table in one Embodiment of this invention. It is a figure which shows an example of the race winning ratio MAP data table in one Embodiment of this invention. It is a figure which shows an example of the race winning ratio MAP data table (percent display) in one Embodiment of this invention. It is a figure which shows an example of the race result lottery table in one Embodiment of this invention. It is a figure which shows an example of the after-AT race victory expectation degree data selection lottery table in one Embodiment of this invention. It is a figure which shows an example of the pseudo BB lottery (general medium) table in one Embodiment of this invention. It is a figure which shows an example of the pseudo BB lottery (during AT / AT preparation / during race) table in one Embodiment of this invention. It is a figure which shows an example of the pseudo BB precursor lottery table in one Embodiment of this invention. It is a figure which shows an example of the period shortening lottery table (the 1) in one Embodiment of this invention. It is a figure which shows an example of the period shortening lottery table (the 2) in one Embodiment of this invention. It is a figure which shows an example of the pseudo BB period shortening lottery table in one Embodiment of this invention. It is a figure which shows an example of the direct addition lottery table in one Embodiment of this invention. It is a figure which shows an example of the AT start game number lottery (at the time of Kappa victory) table (the 1) in one Embodiment of this invention. It is a figure which shows an example of the AT start game number lottery (at the time of Kappa victory) table (the 2) in one Embodiment of this invention. It is a figure which shows an example of the AT start game number lottery (at the time of Kappa victory) table (the 3) in one Embodiment of this invention. It is a figure which shows an example of the AT start game number lottery (at the time of Kappa victory) table (the 4) in one Embodiment of this invention. It is a figure which shows an example of the kappa sushi MAP data table in one Embodiment of this invention. It is a figure which shows an example of the kappa game number acquisition lottery table in one Embodiment of this invention. It is a figure which shows an example of the kappa sushi data conversion generation | occurrence | production lottery table in one Embodiment of this invention. It is a figure which shows an example of the kappa sushi data conversion lottery (1st dish) table in one Embodiment of this invention. It is a figure which shows an example of the kappa sushi data conversion lottery (2nd plate) table in one Embodiment of this invention. It is a figure which shows an example of the kappa sushi data conversion lottery (3rd plate) table in one Embodiment of this invention. It is a figure which shows an example of the kappa sushi data conversion lottery (4th plate) table in one Embodiment of this invention. It is a figure which shows an example of the kappa sushi data conversion lottery (5th plate) table in one Embodiment of this invention. It is a main flowchart which shows the process example of the main control circuit of the game machine in one Embodiment of this invention. It is a flowchart which shows the example of the power-on process in one Embodiment of this invention. It is a flowchart which shows the example of the medal acceptance / start check process in one Embodiment of this invention. It is a flowchart which shows the example of the MAXBET insertion process in one Embodiment of this invention. It is a flowchart which shows the example of the internal lottery process in one Embodiment of this invention. It is a flowchart which shows the example of the reel stop initial setting process in one Embodiment of this invention. It is a flowchart which shows the example of the attraction | saving priority order storage process in one Embodiment of this invention. It is a flowchart which shows the example of the drawing priority order table selection process in one Embodiment of this invention. It is a flowchart which shows the example of the symbol code storage process in one Embodiment of this invention. It is a flowchart which shows the example of the reel stop control process in one Embodiment of this invention. It is a flowchart which shows the example of the priority drawing-in control process in one Embodiment of this invention. It is a flowchart which shows the example of the bonus completion | finish check process in one Embodiment of this invention. It is a flowchart which shows the example of the bonus operation | movement check process in one Embodiment of this invention. It is a flowchart which shows the example of the interruption process by control of main CPU in one Embodiment of this invention. It is a flowchart which shows the example of the power-on process performed by the sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the lamp | ramp control task performed by sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the sound control task performed by sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the mother task performed by sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the main task performed by the sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the main board | substrate communication task performed by sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the animation task performed by sub CPU in one Embodiment of this invention. It is a flowchart which shows the example of the command analysis process in one Embodiment of this invention. It is a flowchart which shows the example of the production content determination process in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of initialization command reception in one Embodiment of this invention. It is a flowchart which shows the example of the race information lottery process in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of the start command reception in one Embodiment of this invention. It is a flowchart which shows the example of the variable setting process in one Embodiment of this invention. It is a flowchart which shows the example of the general_variable setting process in one Embodiment of this invention. It is a flowchart which shows the example of _variable setting process in BB in one Embodiment of this invention. It is a flowchart which shows the example of AT preparation_variable setting process in one Embodiment of this invention. It is a flowchart which shows the example of the general end time_variable setting process in one Embodiment of this invention. It is a flowchart which shows the example of the BB end time_variable setting process in one Embodiment of this invention. It is a flowchart which shows the example of the race end time_variable setting process in one Embodiment of this invention. It is a flowchart which shows the example of the appearance state update process in one Embodiment of this invention. It is a flowchart which shows the example of the Bns state setting process in one Embodiment of this invention. It is a flowchart which shows the example of BB winning time_Bns state setting processing in one Embodiment of this invention. It is a flowchart which shows the example of BB flag_Bns state setting processing in one Embodiment of this invention. It is a flowchart which shows the example of BB operation waiting_Bns state setting processing in one Embodiment of this invention. It is a flowchart which shows the example of _Bns state setting process in BB in one Embodiment of this invention. It is a flowchart which shows the example of _Bns state setting process in JAC in one Embodiment of this invention. It is a flowchart which shows the example of _Bns state setting process in ChaBB in one Embodiment of this invention. It is a flowchart which shows the example of _Bns state setting process in ChaJAC in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of the general_game start in the one Embodiment of this invention (the 1). It is a flowchart which shows the example of the process (the 2) at the time of the general_game start in one Embodiment of this invention. It is a flowchart which shows the example of the pseudo BB lottery process in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of the general BB_game start in one Embodiment of this invention. It is a flowchart which shows the example of BB entry determination processing (at the time of game start) in one Embodiment of this invention. It is a flowchart which shows the example of the BBJAC transfer determination process (at the time of a game start) in one Embodiment of this invention. It is a flowchart which shows the example of the BB counter management process in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of a race_game start in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of AT preparation_game start in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of Kappa victory_game start in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of AT_game start in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of BB_game start in AT in one Embodiment of this invention. It is a flowchart which shows the example of the game state setting process in one Embodiment of this invention. It is a flowchart which shows the example of the general_game state setting process in one Embodiment of this invention. It is a flowchart which shows the example of general BB_game state setting process in one Embodiment of this invention. It is a flowchart which shows the example of the racing_game state setting process in one Embodiment of this invention. It is a flowchart which shows the example of AT preparation_game state setting process in one Embodiment of this invention. It is a flowchart which shows the example of BB_game state setting process during AT in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of winning operation command reception in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of general BB_winning in one Embodiment of this invention. It is a flowchart which shows the example of BB entry determination processing (at the time of winning a prize) in one Embodiment of this invention. It is a flowchart which shows the example of the BBJAC transfer determination process (at the time of winning a prize) in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of a race_winning in one Embodiment of this invention. It is a flowchart which shows the example of the process at the time of BB_winning in AT in one Embodiment of this invention. It is a figure which shows an example of the lottery table at the time of a race_losing in the modification 1. FIG. It is a flowchart which shows the example of the process at the time of a race_game start in the modification 1. It is a figure which shows an example of the lottery table at the time of a race_losing in the modification 2. FIG.

  Hereinafter, a pachislot machine will be exemplified as a gaming machine showing an embodiment of the present invention, and the configuration and operation thereof will be described with reference to the drawings. In this embodiment, a pachislot machine having an AT function will be described.

<Function flow>
First, the functional flow of the pachislot will be described with reference to FIG. In the pachislot machine of this embodiment, medals are used as game media for playing games. In addition to medals, for example, coins, game balls, game point data, tokens, or the like can be applied as game media.

  When a player inserts a medal into the pachislot and operates the start lever, one value (hereinafter referred to as a random value) is extracted from random numbers in a predetermined numerical range (for example, 0 to 65535).

  The internal lottery means performs lottery based on the extracted random number value and determines an internal winning combination. This internal lottery means is one of various processing means (processing functions) provided in a main control circuit described later. By determining the internal winning combination, a combination of symbols that permits display along an after-mentioned effective line (winning determination line) is determined. Note that the types of symbol combinations include those related to “winning” in which benefits such as payout of medals, replay (replay) operation, bonus operation, etc. are given to the player, and other so-called “losing” Such a thing is provided.

  Further, when the start lever is operated, a plurality of reels are rotated. Thereafter, when the player presses the stop button corresponding to the predetermined reel, the reel stop control means performs control to stop the rotation of the corresponding reel based on the internal winning combination and the timing when the stop button is pressed. Do. This reel stop control means is one of various processing means (processing functions) provided in a main control circuit described later.

  In the pachislot, basically, a control for stopping the rotation of the corresponding reel is performed within a specified time (190 msec or 75 msec) from when the stop button is pressed. In the present embodiment, the number of symbols that move with the rotation of the reel within the specified time is referred to as “the number of sliding symbols”. In this embodiment, when the specified period is 190 msec, the maximum number of sliding pieces (maximum number of sliding pieces) is set to 4 symbols, and when the specified period is 75 msec, the maximum sliding piece Set the number to one symbol.

  The reel stop control means, when the internal winning combination permitting the symbol combination display related to the winning is determined, normally, the symbol combination is placed on the active line within a specified time of 190 msec (four symbols). The rotation of the reel is stopped so as to display as much as possible. Further, the reel stop control means is, for example, 1 at the time of operation of “MB” (middle bonus) that continuously activates the challenge bonus (hereinafter referred to as “CB”) and “CB”, which are the second type special feature. For one or more reels, the rotation of the reels is stopped so that the combination of symbols is displayed as much as possible along the winning determination line within a specified time of 75 msec (for one symbol). Furthermore, the reel stop control means uses various specified times corresponding to the gaming state to stop the rotation of the reels so that combinations of symbols that are not permitted to be displayed by the internal winning combination are not displayed along the active line. Let

  Thus, when the rotation of the plurality of reels is all stopped, the winning determination means determines whether or not the combination of symbols displayed along the active line relates to winning. This winning determination means is also one of various processing means (processing functions) provided in the main control circuit described later. Then, when it is determined by the winning determination means that the displayed symbol combination is related to winning a prize, a reward such as a medal payout is given to the player. In the pachislot, a series of flows as described above is performed as one game (unit game).

  Also, in the pachislot, in the above-described series of gaming operations, video display performed by a display device such as a liquid crystal display device, light output performed by various lamps, sound output performed by a speaker, or a combination thereof is performed. Various effects are performed using it.

  Specifically, when the start lever is operated, an effect random number value (hereinafter referred to as an effect random number value) is extracted in addition to the random number value used to determine the internal winning combination described above. When the effect random number is extracted, the effect content determination means determines the effect to be executed this time from lots of effects related to the internal winning combination. This effect content determination means is one of various processing means (processing functions) provided in a sub-control circuit described later.

  Next, when the content of the effect is determined by the effect content determination means, the effect execution means responds in conjunction with each opportunity such as when the rotation of the reel starts, when the rotation of each reel stops, or when the presence or absence of a prize is determined. Execute. In this way, in the pachislot, for example, by executing the production contents associated with the internal winning combination, there is an opportunity to know or predict the determined internal winning combination (in other words, the combination of symbols to be aimed at) It is provided to the player and the player's interest can be improved.

<Pachislot structure>
Next, the structure of the pachislot machine according to the present embodiment will be described with reference to FIGS.

[Appearance structure]
FIG. 2 is a perspective view showing the external structure of the pachi-slot 1.

  As shown in FIG. 2, the pachi-slot 1 includes an exterior body 2. The exterior body 2 includes a cabinet 2a that houses a reel, a circuit board, and the like, and a front door 2b that is attached to the cabinet 2a so as to be openable and closable. Handles 7 are provided on both side surfaces of the cabinet 2a (only one handle 7 is shown in FIG. 2). The handle 7 is a recess that can be put by a carrier when the pachislot 1 is carried.

  Inside the cabinet 2a, three reels 3L, 3C, 3R (variable display means) are provided side by side. Hereinafter, the reels 3L, 3C, and 3R are also referred to as a left reel 3L, a middle reel 3C, and a right reel 3R, respectively. Each reel 3L, 3C, 3R has a reel body formed in a cylindrical shape and a translucent sheet material mounted on the peripheral surface of the reel body. A plurality of (for example, 20) symbols are drawn on the surface of the sheet material at predetermined intervals along the circumferential direction.

  An upper panel unit 10 and a liquid crystal display device 11 (notification means) are provided above the center of the front door 2b. The upper panel unit 10 is provided in the upper end region of the front door 2b, and the liquid crystal display device 11 is disposed below the upper panel unit 10. The upper panel unit 10 has a light source, and performs an effect by light emitted from the light source. In addition, the liquid crystal display device 11 performs an effect by displaying an image.

  A pedestal 12 is provided in the center of the front door 2b. The pedestal portion 12 is provided with a frame member 13 and various devices to be operated by the player.

  The frame member 13 includes a symbol display area 4, an information display window 14, and a stop button attachment portion 15. As shown in FIG. 2, the symbol display area 4 and the information display window 14 are provided in the opening portion of the frame member 13, and the stop button attachment portion 15 is provided in the lower portion of the opening portion of the frame member 13.

  The symbol display area 4 is an area that overlaps the three reels 3L, 3C, and 3R when viewed from the front (player side) and is disposed on the front side (player side) from the three reels 3L, 3C, and 3R. The symbol display area 4 functions as a display window, and has a configuration in which three reels 3L, 3C, 3R arranged behind (cabinet 2a side) can be seen through. Therefore, in the following, the symbol display area 4 is referred to as a reel display window 4.

  When the rotation of the three reels 3L, 3C, 3R provided behind the reel display window 4 is stopped, the reel display window 4 is continuously arranged among a plurality of symbols provided on the peripheral surface of each reel. Two symbols are displayed in the frame. That is, when the rotation of the three reels 3L, 3C, 3R is stopped, one symbol (three in total) is placed in each of the upper, middle, and lower regions for each reel within the frame of the reel display window 4. ) Is displayed. In the present embodiment, a pseudo line (center line) connecting the middle stage area of the left reel 3L, the middle stage area of the middle reel 3C, and the middle stage area of the right reel 3R within the frame of the reel display window 4, It is defined as an effective line for determining whether or not a prize is won.

  The information display window 14 is provided continuously below the reel display window 4 and is arranged so that the surface direction of the information display surface faces upward. The information display window 14 and the reel display window 4 are covered with a transparent window cover 16. The window cover 16 is disposed on the inner surface side of the frame member 13, and has a configuration that cannot be removed from the front surface side of the front door 2b.

  Further, the frame member 13 has a sheet placement portion 17 that faces the information display surface of the information display window 14 with the window cover 16 interposed therebetween. And between the sheet | seat mounting part 17 and the window cover 16, the sheet | seat member (information sheet) in which the information regarding a game was described is arrange | positioned. Therefore, the information sheet is covered with the window cover 16 having a smooth surface without irregularities or gaps, and the window cover 16 serves as an attachment portion of the information sheet.

  As described above, in the pachislot machine 1 of the present embodiment, the window cover 16 cannot be removed from the front side of the front door 2b, and has a smooth surface free from irregularities and gaps. It is possible to prevent an illegal act of accessing the inside of the pachislot 1 via the. The replacement of the information sheet will be described later with reference to FIG.

  In the present embodiment, as described above, the example in which the information display window 14 is formed continuously with the reel display window 4 in the opening of the frame member 13 has been described, but the present invention is not limited to this. The information display window 14 may not be formed continuously with the reel display window 4. That is, the opening of the reel display window 4 and the opening of the information display window 14 may be arranged side by side in the vertical direction.

  The stop button mounting portion 15 is configured by a flat plate member having a substantially trapezoidal surface shape. And the stop button attaching part 15 is provided below the information display window 14, and is provided so that a substantially trapezoidal surface may face the front (player side). The substantially trapezoidal surface of the stop button mounting portion 15 is provided with three through holes through which the three stop buttons 19L, 19C, and 19R pass side by side.

  The three stop buttons 19L, 19C, 19R are provided corresponding to each of the three reels 3L, 3C, 3R, and each stop button is provided to stop the rotation of the corresponding reel. These stop buttons 19L, 19C, and 19R are one of various devices that are operated by the player. Hereinafter, the stop buttons 19L, 19C, and 19R are also referred to as a left stop button 19L, a middle stop button 19C, and a right stop button 19R, respectively.

  In addition to the stop button, the pedestal unit 12 is provided with a medal slot 20, a MAX bet button 21, a 1-bet button 22, and a start lever 23 as various devices to be operated by the player.

  The medal slot 20 is provided for receiving a medal dropped from the outside on the pachislot 1 by the player. The medals accepted from the medal slot 20 are used for one game with the preset number (for example, three) as the upper limit, and the amount exceeding the preset number is deposited in the pachislot 1. Can do. That is, the pachi-slot 1 has a so-called credit function (game medium storage means).

  The MAX bet button 21 and the 1 bet button 22 are provided in order to determine the number used for one game from medals deposited inside the pachislot 1. The start lever 23 is provided to start rotation of all reels (3L, 3C, 3R).

  Further, as viewed from the front, a 7-segment display 24 including a 7-segment LED (Light Emitting Diode) is provided on the left side of the reel display window 4 of the front door 2b. The 7-segment display 24 displays information such as the number of medals to be paid out to the player as a privilege (hereinafter referred to as the number of payouts), the number of medals deposited inside the pachislot 1 (hereinafter referred to as the number of credits), and the like. Digital display. Further, a selection button 25 (chance button) is provided on the right side of the reel display window 4 of the front door 2b. The selection button 25 is a button that is pressed by the player when a selection operation such as game play is required. For example, in the AT start game number determination game at the time of “Women A” winning, which will be described later, this is pressed when the player selects one of two types of AT start game number determination modes (modes). The selection button 25 is connected to a sub-control board 72 described later, and the sub-control board 72 performs detection of pressing of the selection button 25 and control of a selection operation based thereon.

  Side panel units 26L and 26R are provided on both sides of the base 12 of the front door 2b. Each side panel unit has a light source and performs an effect by light emitted from the light source. A settlement button 27 is provided below the left side panel unit 26L. The checkout button 27 is provided to draw out (discharge) medals deposited inside the pachislot machine 1 to the outside.

  A waist panel unit 31 is provided below the pedestal 12 of the front door 2b. The waist panel unit 31 includes a decorative panel on which an arbitrary image is drawn, and a light source that emits light for illuminating the decorative panel from the back side.

  Below the waist panel unit 31, a medal payout port 32, speaker holes 33L and 33R, and a medal tray unit 34 are provided. The medal payout port 32 guides medals discharged by driving a hopper device 51 (medal payout device) described later to the outside. The medal tray unit 34 stores medals discharged from the medal payout opening 32. The speaker holes 33L and 33R are provided to output sound such as sound effects and music corresponding to the contents of the performance.

[Internal structure]
Next, the internal structure of the pachislot machine 1 will be described with reference to FIGS. 3 and 4 are diagrams showing the internal structure of the pachi-slot 1. FIG. 3 is a diagram illustrating a state in which the front door 2b is opened and the middle door 41 provided on the back side of the front door 2b is closed with respect to the front door 2b. FIG. 4 is a diagram showing a state in which the front door 2b is opened and the middle door 41 is opened with respect to the front door 2b.

  The cabinet 2a is a box-shaped member, and has a top plate, a bottom plate, left and right side plates, and a back plate. On the upper side inside the cabinet 2a, for example, a cabinet-side speaker 42 for outputting sound effects is provided.

  A cabinet-side relay board 44 is disposed on one side of the cabinet-side speaker 42 (left side in FIGS. 3 and 4). The cabinet side relay board 44 includes a main control board 71 (see FIG. 5 described later) attached to the middle door 41 (see FIGS. 3 and 4), a hopper device 51, and a medal auxiliary storage switch 75 (described later). 5) and a medal payout count switch (not shown).

  An amplifier board 45 that controls the output of sound from the cabinet-side speaker 42 is disposed in the center of the cabinet 2a. Although not shown in FIGS. 3 and 4, when the interior of the cabinet 2a is viewed from the front (player side), the other side of the amplifier board 45 (right side in FIGS. A concentrated terminal board 47 (see FIG. 5 described later) is disposed. The external concentration terminal board 47 is provided for outputting signals such as a medal insertion signal, a medal payout signal, and a security signal to the outside of the pachislot machine 1.

  A hopper device 51 (medal paying device), a medal auxiliary storage 52, and a power supply device 53 are disposed in the lower part inside the cabinet 2a.

  The hopper device 51 is attached to a substantially central portion of the bottom plate of the cabinet 2a. The hopper device 51 can accommodate a large amount of medals and has a structure capable of discharging them one by one. The hopper device 51 pays out medals when the number of stored medals exceeds 50, for example, or when the settlement button 27 is pressed and the medals are settled. The medals paid out by the hopper device 51 are discharged from the medal payout port 32 (see FIG. 2).

  The medal auxiliary storage 52 stores medals overflowing from the hopper device 51. The medal auxiliary storage 52 is arranged on the right side of the hopper device 51 when the inside of the cabinet 2a is viewed from the front.

  The power supply device 53 includes a power switch 53a and a power supply board 53b (see FIG. 5 described later). The power supply device 53 is disposed on the left side of the hopper device 51 when the inside of the cabinet 2a is viewed from the front. The power supply device 53 converts the power of the AC voltage 100V into the power of the DC voltage necessary for each part, and supplies the converted power to each part.

  As shown in FIGS. 3 and 4, the middle door 41 is disposed at a substantially central portion on the back surface of the front door 2b, and is attached to the front door 2b so that the reel display window 4 (see FIG. 4) can be opened and closed from the back side. It has been.

  As shown in FIGS. 3 and 4, the middle door 41 is attached with a main control board case 55 in which a main control board 71 described later (see FIG. 5 described later) is housed and three reels 3L, 3C, 3R. It has been. Although not shown, a stepping motor (variation display means) is connected to each of the three reels 3L, 3C, 3R via gears having a predetermined reduction ratio.

  In this embodiment, when the middle door 41 is opened with respect to the front door 2b, as shown in FIG. 4, the back surface of the window cover 16 and the sheet placing portion 17 are exposed on the back surface of the front door 2b. As described above, between the back surface of the window cover 16 and the sheet placement portion 17, an information sheet on which information related to the game is described is arranged. The information sheet is inserted into a gap formed between the back surface of the window cover 16 and the sheet placement portion 17 in a state where the middle door 41 is opened and the back surface of the window cover 16 and the sheet placement portion 17 are exposed. The When exchanging information sheets, the information sheet is exchanged after the middle door 41 is opened.

  Although not shown in FIGS. 3 and 4, the main control board case 55 is provided with a setting key switch 56 (see FIG. 5 described later). The setting key type switch 56 is used when changing the setting of the pachislot 1 or confirming the setting of the pachislot 1. In the present embodiment, the main control board unit is configured by the main control board case 55 and the main control board 71 accommodated in the main control board case 55.

  The main control board 71 accommodated in the main control board case 55 has a main control circuit 91 (see FIG. 6 described later) described later. The main control circuit 91 is a circuit that controls the main flow of the game in the pachislot 1 such as determination of the internal winning combination, rotation and stop of the reels 3L, 3C, 3R, and determination of the presence or absence of winning. A specific configuration of the main control circuit 91 will be described in detail later with reference to the drawings.

  On the upper part of the middle door 41 of the front door 2b, a sub-control board case 57 in which a sub-control board 72 (see FIG. 5 described later) to be described later is accommodated is disposed. The sub control board 72 housed in the sub control board case 57 has a sub control circuit 101 (see FIG. 7 described later). The sub-control circuit 101 is a circuit that controls the execution of effects by displaying images. A specific configuration of the sub control circuit 101 will be described in detail later with reference to the drawings.

  Although not shown in FIGS. 3 and 4, a later-described sub-relay board 61 (see FIG. 5 described later) is disposed on the right side of the sub-control board case 57 when the front door 2 b is viewed from the back side. The sub relay board 61 is a board that relays connection wiring between the sub control board 72 and the main control board 71. The sub relay board 61 is a relay board that electrically connects the sub control board 72 and a board provided around the sub control board 72. In addition, as a board | substrate arrange | positioned around the sub control board 72, the below-mentioned LED board 62A, 62B etc. are mentioned.

  Although not shown in FIGS. 3 and 4, the LED boards 62 </ b> A and 62 </ b> B are provided above the sub control board case 57 when viewed from the back side of the front door 2 b. The LED boards 62A and 62B cause a later-described LED (Light Emitting Diode) 85 (see FIG. 5 to be described later) to emit light according to an effect executed by the control of the sub-control circuit 101 (see FIG. 7 to be described later). Display the blinking pattern. Note that the pachi-slot 1 of this embodiment includes a plurality of LED substrates in addition to the LED substrates 62A and 62B.

  Although not shown in FIGS. 3 and 4, a 24h door opening / closing monitoring unit 63 described later is disposed below the sub-relay board 61 (see FIG. 5 described later). The 24h door opening / closing monitoring unit 63 stores opening / closing history information of the middle door 41. The 24h door open / close monitoring unit 63 outputs a signal for displaying an error by the liquid crystal display device 11 to the sub control board 72 (sub control circuit 101) when the middle door 41 is opened.

  Below the middle door 41, lower speakers 65L and 65R are disposed as shown in FIGS. The lower speakers 65L and 65R are arranged at positions facing the speaker holes 33L and 33R (see FIG. 2) on the back surface of the front door 2b, respectively.

  In addition, a selector 66 and a door opening / closing monitoring switch 67 described later (see FIG. 5 described later) are disposed above the lower speaker 65L of the front door 2b. The selector 66 is a device for selecting whether or not the medal material and shape are appropriate, and guides an appropriate medal inserted into the medal insertion slot 20 to the hopper device 51. Although not shown, a medal sensor (insertion operation detecting means) for detecting that an appropriate medal has passed is provided on the path through which the medal passes in the selector 66.

  Although not shown in FIGS. 3 and 4, the door open / close monitoring switch 67 is disposed on the left side of the selector 66 when the front door 2 b is viewed from the back side. The door opening / closing monitoring switch 67 outputs a security signal for notifying the opening / closing of the front door 2b to the outside of the pachi-slot 1.

  In addition, a door relay terminal plate 68 is provided in a region below the reel display window 4 and opened and closed by the middle door 41 as shown in FIG. The door relay terminal board 68 is a board that relays connection wiring between the main control board 71 in the main control board case 55 and various buttons and switches, the sub control board 72, the selector 66, and the game operation display board 81. Yes (see FIG. 5 below). Examples of the various buttons and switches include a MAX bet button 21, a 1 bet button 22, a settlement button 27, a door open / close monitoring switch 67, a BET switch 77 described later, a start switch 79, and the like.

<Control system for pachislot>
Next, a control system provided in the pachislo 1 will be described with reference to FIG. FIG. 5 is a circuit block diagram showing the configuration of the control system of the pachi-slot 1.

  The pachi-slot 1 includes a main control board 71 provided on the middle door 41 and a sub-control board 72 provided on the front door 2b. The pachi-slot 1 includes a reel relay terminal board 74, a setting key switch 56, a cabinet-side relay board 44, and a power supply 53 connected to the main control board 71. Further, the pachi-slot 1 includes an external concentrated terminal plate 47 connected to the main control board 71 via the cabinet-side relay board 44, a hopper device 51, and a medal auxiliary storage switch 75. In addition, since the structure of the external concentration terminal board 47 and the hopper apparatus 51 was mentioned above, those description is abbreviate | omitted here.

  The reel relay terminal plate 74 is disposed inside the reel body of each reel 3L, 3C, 3R. The reel relay terminal board 74 is electrically connected to stepping motors (not shown) of the reels 3L, 3C, 3R, and relays signals output from the main control board 71 to the stepping motors.

  The medal auxiliary storage switch 75 is provided in the medal auxiliary storage 52 and detects whether or not the medal auxiliary storage 52 is full of medals.

  The power supply device 53 includes a power supply board 53b connected to the main control board 71 and a power switch 53a connected to the power supply board 53b. The power switch 53a is pressed when supplying the necessary power to the pachi-slot 1.

  Further, the pachislot machine 1 includes a door relay terminal plate 68, a selector 66, a door open / close monitoring switch 67, and a BET switch 77 (bet detecting means) connected to the main control board 71 via the door relay terminal plate 68. A settlement switch 78, a start switch 79, a stop switch substrate 80, a game operation display substrate 81, and a sub-relay substrate 61. Since the selector 66, the door opening / closing monitoring switch 67, and the sub relay board 61 have been described above, the description thereof is omitted here.

  The BET switch 77 detects that the MAX bet button 21 or the 1 bet button 22 has been pressed by the player. The settlement switch 78 detects that the settlement button 27 has been pressed by the player. The start switch 79 (start operation detecting means) detects that the start lever 23 has been operated by the player (start operation).

  The stop switch board 80 (stop operation detecting means) includes a circuit for stopping the rotating reel and a circuit for displaying the stopable reel by an LED or the like. The stop switch board 80 is provided with a stop switch. The stop switch detects that each stop button 19L, 19C, 19R has been pressed by the player (stop operation).

  The game operation display board 81 is connected to the 7-segment display 24, and is inserted when the insertion of medals is accepted, when the three reels 3L, 3C, and 3R are rotatable, and when replaying is performed. This is a substrate for displaying the number of medals on the 7-segment display 24. The game operation display board 81 is connected to an LED 82, and the LED 82 lights a mark for displaying the start of a game, a mark for performing a re-game, and the like based on a signal input from the game operation display board 81, for example.

  The sub control board 72 is connected to the main control board 71 via the door relay terminal board 68 and the sub relay board 61. The pachislot machine 1 also includes a sound I / O board 84, LED boards 62A and 62B, and a 24h door open / close monitoring unit 63 connected to the sub control board 72 via the sub relay board 61. Since the LED boards 62A and 62B and the 24h door opening / closing monitoring unit 63 have been described above, description thereof will be omitted here.

  The sound I / O board 84 outputs sound to a speaker group including lower speakers 65L and 65R and various speakers (not shown).

  The pachi-slot 1 also includes a ROM cartridge substrate 86 and a liquid crystal relay substrate 87 connected to the sub control substrate 72. The ROM cartridge substrate 86 and the liquid crystal relay substrate 87 are housed in the sub control board case 57 together with the sub control board 72.

  The ROM cartridge substrate 86 is a substrate for managing production image (video), sound, light (LED group 85) and communication data. The liquid crystal relay substrate 87 is a substrate that relays connection wiring between the sub control substrate 72 and the liquid crystal display device 11.

<Main control circuit>
Next, the configuration of the main control circuit 91 mounted on the main control board 71 will be described with reference to FIG. FIG. 6 is a block diagram illustrating a configuration example of the main control circuit 91 of the pachi-slot 1.

  The main control circuit 91 is mainly composed of a microcomputer 92 mounted on the main control board 71. The microcomputer 92 includes a main CPU 93, a main ROM 94, and a main RAM 95.

  The main ROM 94 stores a control program executed by the main CPU 93, a data table, data for transmitting various control commands (commands) to the sub control circuit 101, and the like. The main RAM 95 is provided with a storage area for storing various data such as an internal winning combination determined by execution of the control program.

  The main CPU 93 is connected to a clock pulse generation circuit 96, a frequency divider 97, a random number generator 98 and a sampling circuit 99. The clock pulse generation circuit 96 and the frequency divider 97 generate clock pulses. The main CPU 93 executes a control program based on the generated clock pulse. The random number generator 98 generates a random number in a predetermined range (for example, 0 to 65535). The sampling circuit 99 extracts one value from the generated random numbers.

  The main CPU 93 counts the number of times pulses are output to the stepping motor of each reel after detecting the reel index. Thus, the main CPU 93 manages the rotation angle of each reel (mainly, how many symbols the reel has rotated). The reel index is information indicating that the reel has made one revolution. The reel index includes, for example, an optical sensor having a light emitting unit and a light receiving unit, and a detection piece provided at a predetermined position of each reel and interposed between the light emitting unit and the light receiving unit by the rotation of each reel. It is detected by a reel position detector (not shown).

  Here, the management of the rotation angle of each reel will be specifically described. The number of pulses output to the stepping motor is counted by a pulse counter provided in the main RAM 95. Each time the output of a predetermined number of pulses necessary for the rotation of one symbol is counted by the pulse counter, the symbol counter provided in the main RAM 95 is incremented by one. A symbol counter is provided for each reel. The value of the symbol counter is cleared when a reel index is detected by a reel position detector (not shown).

  In other words, in the present embodiment, by managing the symbol counter, it is managed how many symbols have been rotated since the reel index was detected. Therefore, the position of each symbol on each reel is detected with reference to the position where the reel index is detected.

<Sub control circuit>
Next, the configuration of the sub control circuit 101 mounted on the sub control board 72 will be described with reference to FIG. FIG. 7 is a block diagram illustrating a configuration example of the sub control circuit 101 of the pachi-slot 1.

  The sub control circuit 101 is electrically connected to the main control circuit 91 and performs processing such as determination and execution of effect contents based on a command transmitted from the main control circuit 91. The sub-control circuit 101 basically includes a sub CPU 102, a sub RAM 103, a rendering processor 104, a drawing RAM 105, and a driver 106.

  The sub CPU 102 controls the output of video, sound, and light according to the control program stored in the ROM cartridge substrate 86 in accordance with the command transmitted from the main control circuit 91. The ROM cartridge substrate 86 basically includes a program storage area and a data storage area.

  A control program executed by the sub CPU 102 is stored in the program storage area. For example, the control program includes a main board communication task for controlling communication with the main control circuit 91 and an effect registration task for extracting and registering effect contents (effect data) by extracting effect random numbers. Various programs for executing are included. In addition, the control program includes a drawing control task for controlling the display of video by the liquid crystal display device 11 based on the determined content of the presentation, a lamp control task for controlling the output of light from the light source such as the LED group 85, and speakers 65L and 65R. Various programs for executing a voice control task or the like for controlling the output of sound according to the above are also included.

  The data storage area includes a storage area for storing various data tables, a storage area for storing effect data constituting each effect content, and a storage area for storing animation data related to creation of video. Further, the data storage area includes a storage area for storing sound data related to BGM and sound effects, a storage area for storing lamp data related to a light on / off pattern, and the like.

  The sub-RAM 103 is provided with a storage area for registering the determined contents and effects data, and a storage area for storing various data such as an internal winning combination transmitted from the main control circuit 91.

  The sub CPU 102, the rendering processor 104, the drawing RAM (including the frame buffer) 105, and the driver 106 create a video according to the animation data designated by the content of the presentation, and display the created video on the liquid crystal display device 11.

  Further, the sub CPU 102 causes a speaker group such as speakers 65L and 65R to output a sound such as BGM according to the sound data specified by the contents of the effect. Further, the sub CPU 102 controls lighting and extinguishing of the LED group 85 in accordance with the lamp data designated by the contents of the effect.

<RT game state transition flow>
Next, with reference to FIG. 8, various RT gaming states controlled by the main control circuit 91 (main CPU 93) of the pachislot 1 of the present embodiment and the transition flow thereof will be described.

  In the present embodiment, three types of RT0 gaming state to RT2 gaming state are provided as RT gaming states, which are different from each other in the type of internal winning combination related to replay and the winning probability thereof. Note that the RT0 gaming state is a gaming state in which the winning probability of the internal winning combination related to replay is low, and both the RT1 gaming state and the RT2 gaming state have a high probability of winning the internal winning combination related to replay. Is a gaming state.

  The RT0 game state is an RT game state set in the initial state, and the number of inserted medals (multiplier) for each unit game is 2 (first number) or 3 (second number). State. Note that, in the RT0 gaming state, information indicating that the player is instructed to multiply the number of medals by 2 is notified (the suggestion of two medals is performed).

  Then, in the RT0 gaming state, when a middle bonus (special internal winning combination) having a name “2MB”, which will be described later (internal winning (established) only in a two-seat game), is won, as shown in FIG. 8, the RT gaming state Shifts from the RT0 gaming state to the RT1 gaming state. In addition, in the RT0 gaming state, when a middle bonus with a name “3MB” described later, which is won (established) only when playing three cards, is won, the RT gaming state is changed from the RT0 gaming state to the RT2 as shown in FIG. Transition to gaming state.

  In the RT1 gaming state, the number of inserted medals (multiplier) for each unit game is 2 or 3, but information indicating that the player is instructed to multiply the number of medals by 3 is notified. (Three hints are given), so three-games are mainly played. In this case, since the bonus of “2 MB” won when the RT gaming state shifts to the RT1 gaming state is a bonus that is awarded only when the number of medals is two, in the RT1 gaming state, the bonus of “2 MB” The game is played with the bonus carried over. Therefore, in the following, the RT1 gaming state is also referred to as “a state between 2 MB flags”. In a game between 2 MB flags, even if “losing” is won internally, “2 MB” is not won. Note that the main control circuit 91 controls the game operation in the state between the 2 MB flags. In other words, in the present embodiment, the main control circuit 91 also serves as means (inter-flag game control means) for controlling the game operation in the 2 MB flag state (inter-flag state).

  However, in the RT1 gaming state, when two games are played and a bonus of “2 MB” is won, the corresponding bonus game is activated. Note that in the “2 MB” bonus game, two-games are played, and when the number of medals paid out exceeds two, the “2 MB” bonus game ends. When the bonus game of “2 MB” is consumed, the RT gaming state shifts from the RT1 gaming state to the RT0 gaming state as shown in FIG.

  In the RT2 gaming state, the number of inserted medals (multiplier) per unit game is two or three, but since three hints are suggested, three-ply games are mainly performed.

  In the RT2 gaming state, a game of three cards is played, and when a bonus of “3 MB” is won, a corresponding bonus game is activated. Note that in the “3 MB” bonus game, two-games are played, and when the number of medals paid out exceeds 30, the “3 MB” bonus game ends. When the bonus game of “3 MB” is consumed, the RT gaming state shifts from the RT2 gaming state to the RT0 gaming state as shown in FIG. In the present embodiment, in the RT2 gaming state, it is also possible to play a game with the bonus of “3 MB” won when the RT gaming state is shifted to the RT2 gaming state. The RT2 gaming state is also referred to as “3MB flag inter-state”.

  In this embodiment, in the state between 2 MB flags (RT1 gaming state) or the state between 3 MB flags (RT2 gaming state), the total number of medals stored in the credit and the current number of inserted medals is three (predetermined) In the case where the player has pressed the MAX bet button 21, the bet operation (insertion operation) of medals cannot be performed. That is, in the state between 2 MB flags or the state between 3 MB flags, when the total number of medals stored in the credit and the current number of inserted medals is 2 or less, the player presses the MAX bet button 21. Even if the button is pressed, the operation is treated as invalid.

  In the state between the 2MB flags, when the total number of credits and inserted medals is 2, if the player's MAX bet operation is enabled, a two-game is performed and the carry-over is in progress. There is a possibility that "2MB" will win. In this case, since the RT gaming state shifts from the RT1 gaming state to the RT0 gaming state, the gaming state shifts to a gaming state that is disadvantageous to the player. However, as in the present embodiment, in the state between the 2 MB flags, when the total number of credits and inserted medals is 2 or less, the player's MAX bet operation is invalidated, thereby It is possible to prevent the gaming state from shifting to a disadvantageous gaming state against the intention.

  In the present embodiment, not only in the state between 2 MB flags and the state between 3 MB flags, but also in the general gaming state (RT0 gaming state), when the total number of credits and inserted medals is less than three The player's MAX betting operation may be invalidated.

<Configuration of data table stored in main ROM>
Next, the configuration of various data tables stored in the main ROM 94 will be described with reference to FIGS.

[Design arrangement table]
First, the symbol arrangement table will be described with reference to FIG. The symbol arrangement table is data (hereinafter referred to as symbol code (in FIG. 9) that specifies the position of each symbol in the rotation direction of each of the left reel 3L, the middle reel 3C, and the right reel 3R and the type of symbol arranged at each position. )))).

  In the symbol arrangement table, when the reel index is detected, the position of the symbol located in the middle area of each reel within the frame of the reel display window 4 is defined as “0”. Then, in each reel, the symbol counter value “0” corresponds to the value of the symbol counter in the order of advance in the reel rotation direction (the direction from symbol position “19” in FIG. 9 toward symbol position “0”). “0” to “19” are assigned to the symbols as symbol positions.

  That is, by referring to the symbol counter values (“0” to “19”) and the symbol arrangement table, the symbols are displayed in the upper, middle, and lower regions of each reel within the frame of the reel display window 4. It is possible to specify the type of design. For example, when the value of the symbol counter corresponding to the left reel 3L is “7”, the symbol position “8” is set in each of the upper region, the middle region, and the lower region of the left reel 3L within the frame of the left display window 4L. The symbol “yellow BAR”, symbol “watermelon 1” at symbol position “7”, and symbol “orange” at symbol position “6” are displayed.

[Design combination table]
Next, the symbol combination table (Nos. 1 to 3) will be described with reference to FIGS. The symbol combination table is a symbol combination (combination and combination name) determined in advance according to the type of bonus (bonus, small role, replay), the content (storage area, data) and payout of the corresponding display symbol code. Define the correspondence with the number of sheets.

  In this embodiment, when the symbol combination displayed by the left reel 3L, the middle reel 3C, and the right reel 3R along the effective line (center line) matches the symbol combination specified in the symbol combination table, a prize is awarded. It is determined. When it is determined that the prize is won, the player is given a privilege such as medal payout, replay (replay) operation, and bonus operation. If the combination of symbols displayed along the active line does not match any of the symbol combinations defined in the symbol combination table, it is a so-called “lost”. In other words, in this embodiment, the symbol combination corresponding to “losing” is not defined in the symbol combination table, thereby defining the symbol combination “losing”. The present invention is not limited to this, and the symbol combination “losing” may be provided in the symbol combination table to directly define the symbol combination “losing”.

  Various data described in the display combination code column in the symbol combination table is data for identifying a symbol combination displayed along the active line. “Data” in the display combination code column is represented by 1-byte data, and a unique symbol combination (content of display combination) is assigned to each bit in the data.

  Further, the “storage area” data in the display combination code column is data for designating a later-described symbol code storage area (see FIG. 30 described later) in which the corresponding symbol combination data is stored. In this embodiment, 15 symbol code storage areas are provided. In the present embodiment, display combinations having the same bit pattern (1-byte data pattern) and having different contents are managed as different display combinations depending on the “storage area”.

  The numerical value described in the payout number column in the symbol combination table represents the number of medals to be paid out to the player. In a symbol combination to which a value of 1 or more is assigned as the “payout number” data, medals of the same number as that number are paid out. For example, in the present embodiment, when the display combination related to the combination name “CT Bell” is determined for the number of inserted three medals, the symbol combination related to “CT Bell” is stopped and displayed on the active line. ), 10 medals are paid out.

  In the present embodiment, for example, when the display combination related to the combination name “CT Lip” is determined (when the symbol combination related to “CT Lip” is stopped and displayed on the active line), the replay is activated. To do. Furthermore, in this embodiment, for example, when the display combination related to the combination name “3MB” or “2MB” (when the symbol combination related to “3MB” or “2MB” is stopped and displayed on the active line) is determined. MB (middle bonus) is activated.

  As shown in FIG. 10, in this embodiment, “0” is defined in the “3 sheets” column of “3 MB”, but no number is defined in the “2 sheets” field. . In addition, “0” is defined in the “2 sheets” column of “2 MB”, but numbers are not defined in the “3 sheets” column. That is, in the present embodiment, the symbol combination (display combination) of “3 MB” is valid (winning) only when 3 cards are applied, and is invalid (lost) when 2 cards are applied. In addition, the symbol combination (display combination) of “2 MB” is valid (winning) only when 2 cards are applied, and is invalid (lost) when 3 cards are applied.

[Internal lottery table]
Next, the internal lottery table will be described with reference to FIGS. In the present embodiment, an internal lottery table is provided separately for each of the RT0 gaming state (general gaming state), the RT1 gaming state (state between 2 MB flags), the RT2 gaming state (state between 3 MB flags), and the MB gaming state. Furthermore, in each of the RT0 gaming state (general gaming state), the RT1 gaming state (between 2 MB flags) and the RT2 gaming state (between 3 MB flags), the number of medals multiplied (2 or 3) A lottery table is provided.

  Each internal lottery table includes a winning number (internal winning combination), a lottery value (winning probability) when each winning number is determined, and a data pointer (small role / The correspondence relationship between the data pointer for replay and the data pointer for bonus) is defined. For convenience of explanation, the abbreviation of the internal winning combination is also described in the internal lottery table referred to when the medal multiplication number is 3 shown in FIGS. In addition, in the internal lottery table referred to when the number of medals multiplied by 2 and the internal lottery table referred to during the MB gaming state shown in FIGS. Description of the name and data pointer is omitted.

  In addition, the lottery value is defined for each setting (settings 1 to 6) for adjusting the expected value of internal winnings such as bonuses and small roles set in advance. This setting is changed using, for example, a reset switch (not shown) and a setting key switch (not shown).

  In the internal lottery process according to the present embodiment, first, a random number value (external random value) extracted from a predetermined numerical range (for example, 0 to 65535) is determined according to each winning number. Subtract sequentially. Next, it is determined (internal lottery) whether the result of the subtraction has become negative (whether a so-called “digit” has occurred). If the result of subtraction becomes negative (a “digit” occurs) at a predetermined winning number, the winning number (internal winning combination) is won.

  Therefore, in the internal lottery process of the present embodiment, the greater the number specified as the lottery value, the higher the probability that the assigned data pointer is determined. The winning probability of each winning number can be expressed by “the lottery value specified for each winning number / the number of all random numbers that may be extracted (random denominator: 65536)”.

(1) General (RT0) gaming state internal lottery table (3 hangs)
FIG. 13 is a diagram showing a configuration of a general (RT0) gaming state internal lottery table (three pieces). This general (RT0) gaming state internal lottery table (three) is referred to when the number of medals for a unit game is three in the general gaming state (RT0 gaming state). The internal (RT0) gaming state internal lottery table (3 cards) defines the relationship between winning numbers “1” to “58” (various internal winning combinations), corresponding lottery values (winning probabilities) and data pointers. To do.

  For example, in the general gaming state (RT0 gaming state), when setting 1 of the general (RT0) gaming state internal lottery table (3 cards) is referenced, the winning number “2” (internal winning combination “2MB”) is won. The probability of being “0” is “0”. On the other hand, in the general gaming state (RT0 gaming state), when reference is made to setting 1 in the general (RT0) gaming state internal lottery table (3 cards), the winning number “3” (internal winning combination “3MB”) is won. The probability of performing is “17200/65536 (1 / 3.8)”. In this case, “0” is acquired as the small role / replay data pointer, and “2” is acquired as the bonus data pointer. That is, in the present embodiment, when a game with three cards is played in the general gaming state (RT0 gaming state), only “3 MB” is won as a bonus.

  Also, for example, in the general gaming state (RT0 gaming state), when referring to the setting 1 of the general (RT0) gaming state internal lottery table (3 cards), the winning number “4” (internal winning combination “normal lip 1”) The probability of winning “)” is “374/65536 (1 / 175.2)”. In this case, “1” is acquired as the small role / replay data pointer, and “0” is acquired as the bonus data pointer.

(2) Between 2 MB flags (RT1) Game state internal lottery table (3 hangs)
FIG. 14 is a diagram illustrating a configuration of an internal lottery table (3 sheets) for a 2 MB flag (RT1) gaming state. This internal lottery table for 2 MB flags (RT1) gaming state (3 cards) is referred to when the number of medals for a unit game is 3 in the 2 MB flag status (RT1 gaming status). Between the 2 MB flags (RT1) gaming state internal lottery table (3), the relationship between the winning numbers "1" to "58" (various internal winning combinations), the corresponding lottery value (winning probability) and data pointer Is specified.

  For example, in the state between 2 MB flags (RT1 gaming state), when the setting 1 of the internal lottery table for 2 MB flags (RT1) gaming state (3 cards) is referred to, the winning number “2” (internal winning combination “2 MB”) ) Or the winning number “3” (internal winning combination “3MB”) is “0”. That is, in the present embodiment, when a game with three cards is performed in the state between 2 MB flags (RT1 game state), the bonuses of “2 MB” and “3 MB” are not won.

  Also, for example, in the state between 2 MB flags (RT1 gaming state), when referring to setting 1 of the internal lottery table for 2 MB flags (RT1) gaming state (3 cards), the winning number “4” (internal winning combination “ The probability that “normal lip 1”) wins is “2048/65536 (1/32)”. In this case, “1” is acquired as the small role / replay data pointer, and “0” is acquired as the bonus data pointer.

  Note that the winning probabilities of the winning numbers “4” to “16” in the general (RT0) gaming state internal lottery table (three pieces) shown in FIG. 13 and the 2 MB flag (RT1) gaming state internal shown in FIG. As is apparent from comparison with those in the lottery table (3 sheets), the winning probability of the replay combination in the state between 2 MB flags (RT1 gaming state) is higher than that in the general gaming state (RT0 gaming state).

(3) Between 3MB flags (RT2) Game state internal lottery table (3 hangs)
FIG. 15 is a diagram showing a configuration of an internal lottery table for 3 MB flags (RT2) gaming state (3 sheets). The internal lottery table for 3 MB flags (RT2) gaming state (3 cards) is referred to when the number of medals to be multiplied per unit game is 3 in the 3 MB flag status (RT2 gaming state). Between 3 MB flags (RT2) game state internal lottery table (3), the relationship between winning numbers “1” to “58” (various internal winning combinations), corresponding lottery value (winning probability) and data pointer Is specified.

  For example, in the state between 3 MB flags (RT2 gaming state), when setting 1 in the internal lottery table for 3 MB flags (RT2) gaming state (3 cards) is referred to, the winning number “2” (internal winning combination “2 MB”) ) Or the winning number “3” (internal winning combination “3MB”) is “0”. In other words, in the present embodiment, when a game with three cards is performed in the 3MB flag state (RT2 game state), the bonuses of “2MB” and “3MB” are not won.

  Also, for example, in the state between 3 MB flags (RT2 gaming state), when referring to the setting 1 of the internal lottery table for 3 MB flags (RT2) gaming state (3 cards), the winning number “4” (internal winning combination “ The probability that “normal lip 1”) will win is “500/65536 (1/131)”. In this case, “1” is acquired as the small role / replay data pointer, and “0” is acquired as the bonus data pointer.

  The winning probability of winning numbers “4” to “16” in the general (RT0) gaming state internal lottery table (three) shown in FIG. 13 and the 3 MB flag (RT2) gaming state internal shown in FIG. As is clear from comparison with those in the lottery table (3 cards), the winning probability of the replay combination in the 3MB flag state (RT2 gaming state) is higher than that in the general gaming state (RT0 gaming state). Further, the winning probabilities of the winning numbers “4” to “16” in the internal lottery table for 2 MB flags (RT1) gaming state (3 cards) shown in FIG. 14 and the gaming state between 3 MB flags (RT2) shown in FIG. As is clear from comparison with those in the internal lottery table (three), the winning probability of the replay combination in the 3MB flag state (RT2 gaming state) is lower than that of the 2MB flag state (RT1 gaming state). Become.

(4) General (RT0) game state internal lottery table (2 hangs)
FIG. 16 is a diagram showing a configuration of a general (RT0) gaming state internal lottery table (two pieces). This general (RT0) gaming state internal lottery table (2 sheets) is referred to when the number of medals for a unit game is 2 in the general gaming state (RT0 gaming state). The general (RT0) gaming state internal lottery table (two) determines the relationship between the winning numbers “1” to “5” (various internal winning combinations) and the corresponding lottery value (winning probability). Note that the internal winning combination of the name “two bells” in FIG. 16 corresponds to all small combinations.

  For example, in the general gaming state (RT0 gaming state), when reference is made to setting 1 in the general (RT0) gaming state internal lottery table (2 sheets), the winning number “2” (internal winning combination “2MB”) is won. The probability of performing is “26000/65536 (1 / 2.52)”. On the other hand, in the general gaming state (RT0 gaming state), when reference is made to setting 1 of the general (RT0) gaming state internal lottery table (2 sheets), the winning number “3” (internal winning combination “3MB”) is won. The probability of being “0” is “0”. In other words, in the present embodiment, when two games are played in the general gaming state (RT0 gaming state), only “2 MB” is won as a bonus.

  Also, for example, in the general gaming state (RT0 gaming state), when referring to setting 1 of the general (RT0) gaming state internal lottery table (2 sheets), the winning number “4” (internal winning combination “normal lip 1”) The probability of winning “)” is “8978/65536 (1 / 7.3)”.

(5) Between 2 MB flags (RT1) Internal lottery table for gaming state (2 cards)
FIG. 17 is a diagram showing a configuration of an internal lottery table for 2 state (RT1) gaming state (two pieces). The internal lottery table for 2 MB flag (RT1) gaming state (2 sheets) is referred to when the number of medals to be multiplied per unit game is 2 in the 2 MB flag state (RT1 gaming state). The 2 MB flag (RT1) gaming state internal lottery table (2 cards) defines the relationship between the winning numbers “1” to “5” (various internal winning combinations) and the corresponding lottery value (winning probability). . For example, the name “2MB + 2 bells” in FIG. 17 corresponds to the case where the internal winning combination of the name “2 bells” (all small roles) wins while “2MB” is carried over.

  For example, in the state between 2 MB flags (RT1 gaming state), when setting 1 of the internal lottery table for 2 MB flags (RT1) gaming state (2 cards) is referred to, the winning number “2” (internal winning combination “2 MB”) ) Or the winning number “3” (internal winning combination “3MB”) is “0”. That is, in the present embodiment, when two games are played in the state between 2 MB flags (RT1 game state), the bonuses of “2 MB” and “3 MB” are not won.

  Also, for example, in the state between 2 MB flags (RT1 gaming state), when referring to the setting 1 of the internal lottery table for 2 MB flags (RT1) gaming state (2 cards), the winning number “4” (internal winning combination “ The probability of winning 2MB + normal lip 1)) is “32978/65536 (1 / 1.99)”.

  Note that the winning probability of the winning number “4” in the general (RT0) gaming state internal lottery table (two cards) shown in FIG. 16 and the 2 MB flag (RT1) gaming state internal lottery table (2) shown in FIG. As is clear from the comparison with that of 2 sheets, the winning probability of the replay role in the state between 2 MB flags (RT1 gaming state) is higher than that of the general gaming state (RT0 gaming state) even in the game of 2 sheets. Become.

(6) Between 3MB flags (RT2) Internal lottery table for gaming state (2 cards)
FIG. 18 is a diagram showing a configuration of an internal lottery table (2 sheets) for the 3 MB flag (RT2) gaming state. The internal lottery table for 3MB flag (RT2) gaming state (2 sheets) is referred to when the number of medals to be multiplied per unit game is 2 in the 3MB flag state (RT2 gaming state). The 3 MB flag (RT2) gaming state internal lottery table (2) is used to define the relationship between the winning numbers “1” to “5” (various internal winning combinations) and the corresponding lottery value (winning probability). . For example, the name “3MB + 2 bells” in FIG. 18 corresponds to the case where the internal winning combination of the name “2 bells” (all small roles) is won while “3 MB” is carried over.

  For example, in the state between 3 MB flags (RT2 gaming state), when setting 1 of the internal lottery table for 2 MB flag (RT2) gaming state (2 cards) is referred to, the winning number “2” (internal winning combination “2 MB”) ) Or the winning number “3” (internal winning combination “3MB”) is “0”. In other words, in the present embodiment, when two games are played in the 3 MB flag state (RT2 gaming state), the bonuses of “2 MB” and “3 MB” are not won.

  Also, for example, in the state between 3 MB flags (RT2 gaming state), when referring to the setting 1 of the internal lottery table for 2 MB flag (RT2) gaming state (2 cards), the winning number “4” (internal winning combination “ The probability of winning 3MB + normal lip 1 ”) is“ 8980/65536 (1 / 7.3) ”.

  Note that the winning probability of the winning number “4” in the general (RT0) gaming state internal lottery table (two) shown in FIG. 16 and the 3 MB flag (RT2) gaming state internal lottery table (2) shown in FIG. As is clear from the comparison with that of 2 sheets, the winning probability of the replay role in the 3 MB flag state (RT2 gaming state) is higher than that of the general gaming state (RT0 gaming state) even in the case of 2 sheets of gaming. Become. Also, the winning probability of the winning number “4” in the 2 MB flag (RT1) gaming state internal lottery table (two cards) shown in FIG. 17 and the 3 MB flag (RT2) gaming state internal lottery table shown in FIG. As is clear from the comparison with that of (2 cards), even in the game of 2 cards, the winning probability of the replay role in the 3 MB flag state (RT2 game state) is the same as that of the 2 MB flag state (RT1 game state). It will be lower.

(7) 2MB gaming state internal lottery table FIG. 19 is a diagram showing a configuration of a 2MB gaming state internal lottery table. The internal lottery table for 2 MB gaming state is referred to when the middle bonus “2 MB” is activated (when the gaming state is the 2 MB gaming state). The internal lottery table for 2 MB gaming state defines the relationship between the winning numbers “1” and “2” and the corresponding lottery values (winning probabilities).

  In the present embodiment, as shown in FIG. 19, when the gaming state is the 2MB gaming state, an internal winning combination with the name “CB combination” is always won. The internal winning combination with the name “CB combination” corresponds to all small combinations.

(8) 3MB gaming state internal lottery table FIG. 20 is a diagram showing a configuration of a 3MB gaming state internal lottery table. The internal lottery table for 3MB gaming state is referred to when the middle bonus “3MB” is activated (when the gaming state is the 3MB gaming state). The internal lottery table for 3MB gaming state defines the relationship between the winning numbers “1” and “2” and the corresponding lottery value (winning probability).

  In the present embodiment, as shown in FIG. 20, when the gaming state is the 3MB gaming state, an internal winning combination with the name “CB combination” is always won.

[Design combination determination table]
Next, the symbol combination determination table will be described with reference to FIGS. The symbol combination determination table defines a correspondence relationship between the internal winning combination and symbol combinations (combinations) that can be displayed on the effective line (center line). In other words, when the internal winning combination is determined, the type of symbol combination that can be displayed on the active line, that is, the type of display combination that can be won, is uniquely determined. The black circles in each symbol combination determination table indicate symbol combinations (combinations) that can be displayed on the effective line (center line) in the winning internal winning combination.

  For example, when the internal winning combination is “normal lip 1”, the names “CT lip”, “CU lip”, “bell lip 1” to “bell lip 8”, “BTBAR1” to “BTBAR6”, “CTSVN1”, The symbol combination of “CTSVN2”, “CDSVN2” and “CDSVN3” can be stopped and displayed. Further, for example, when the internal winning combination is “213 bell 1”, the symbol combination “CT bell” and “control combination 1” to “control combination 10” can be stopped and displayed. Further, for example, when the internal winning combination is the combination of the name “CB combination”, the symbol combinations of all the small combinations can be stopped and displayed.

  In the symbol combination determination table, the case where the “internal winning combination” is “lost” is not defined, but this is the case for all symbols defined by the symbol combination table shown in FIGS. Indicates that combination display is not allowed.

<Configuration of storage area provided in main RAM>
Next, the configuration of various storage areas provided in the main RAM 95 will be described with reference to FIGS. Although not described here (not shown), the main RAM 95 is also provided with storage areas for various control data, various flags, various counters and the like used for various reel effects (various game locks).

[Internal winning combination storage area]
First, the configuration of the internal winning combination storing area will be described with reference to FIG. In this embodiment, the internal winning combination storing area is composed of internal winning combination storing areas 0 to 7 each represented by 1-byte data.

  In each of the internal winning combination storing areas 0 to 7, when “1” is stored in a predetermined bit, it indicates that the internal winning combination corresponding to the predetermined bit has been internally won. In the internal winning combination storage area shown in FIG. 24, the storage areas corresponding to the internal winning combinations of the names “two bells” and “CB combination” are not defined, but when these internal winning combinations are won “1” is stored in the storage area (bit) of all internal winning combinations related to the small combinations.

[Display combination storage area]
Next, the configuration of the display combination storage area will be described with reference to FIG. In the present embodiment, the display combination storage area includes display combination storage areas 0 to 7 each represented by 1-byte data.

  In each of the display combination storing areas 0 to 7, when “1” is stored in a predetermined bit, it indicates that various symbol combinations of the internal winning combination corresponding to the predetermined bit are displayed on the active line. .

[Coverage storage area]
Next, the configuration of the carryover combination storage area will be described with reference to FIG. In the present embodiment, the carryover combination storage area is composed of a 1-byte data storage area.

  As a result of the internal lottery, when either “2 MB” or “3 MB” is determined as the internal winning combination, the internal winning combination is stored in the carryover combination storage area as the carryover combination. The carryover combination stored in the carryover combination storage area is held without being cleared until the corresponding symbol combination is displayed on the active line. Further, while the carryover combination is stored in the carryover combination storage area, the carryover combination is stored in the internal winning combination storage area in addition to the internal winning combination determined by the internal lottery.

[Game state flag storage area]
Next, the configuration of the game state flag storage area will be described with reference to FIG. The gaming state flag storage area is composed of a 1-byte data storage area. In the present embodiment, as shown in FIG. 27, a unique bonus type or RT type is assigned to each bit in the gaming state flag storage area.

  When “1” is stored in a predetermined bit in the game state flag storage area, it indicates that the bonus game or RT corresponding to the predetermined bit is being operated. For example, when “1” is stored in bit 0 of the gaming state flag storage area, it indicates that the middle bonus “2 MB” is activated and the gaming state is the 2 MB gaming state.

[Operation stop button storage area]
Next, the configuration of the operation stop button storage area will be described with reference to FIG. The operation stop button storage area is composed of a 1-byte data storage area and stores an operation stop button flag consisting of 1 byte. In the operation stop button flag, the operation state of the stop button is assigned to each bit.

  For example, if the left stop button 19L is a stop button that has been pressed this time, that is, an operation stop button, “1” is stored in bit 0 of the operation stop button storage area. Also, for example, if the left stop button 19L is a stop button that has not yet been pressed, that is, an effective stop button, “1” is stored in bit 4. Based on the data stored in the operation stop button storage area, the main CPU 93 identifies the stop button that has been pressed this time and the stop button that has not yet been pressed.

[Push order storage area]
Next, the configuration of the pressing order storage area will be described with reference to FIG. The pressing order storage area is composed of a 1-byte data storage area and stores a pressing order flag consisting of 1 byte.

  In the pressing order flag, the type of stop button pressing order is assigned to each bit. For example, when the pressing order of the stop button is “left middle right”, “1” is stored in bit 0 of the pressing order storage area.

[Design code storage area]
Next, the configuration of the symbol code storage area will be described with reference to FIG. In the present embodiment, the symbol code storage area is composed of symbol code storage areas 0 to 14 each represented by 1-byte data.

  In the symbol code storage area, “1” is stored in the bit corresponding to the display combination (design combination) that can be stopped on the active line. After all the reels are stopped, the symbol codes corresponding to the display combination are stored in the symbol code storage areas 0 to 14.

<Various sub game states>
Next, in the pachi-slot 1 of the present embodiment, various sub game states related to effects controlled by the sub control circuit 101 (sub CPU 102) in the state between 2 MB flags (RT1 game state) will be described.

  In the present embodiment, as the sub gaming state in the state between the 2 MB flags, there are mainly states called “non-AT state”, “AT ready state”, “AT state”, and “pseudo BB (Big Bonus) state”. It is done. The game in the “pseudo BB state” is performed as an interrupt process when winning a pseudo BB lottery performed in the “non-AT state”, “AT ready state”, and “AT state”.

  Further, in this embodiment, although detailed description is omitted, as a sub gaming state in the state between the 2 MB flags, a state called “W chance state” that can be shifted from the “AT state”, “AT state” or “ A state referred to as an “addition challenge state” that can be shifted from the “pseudo BB state” is also provided. Hereinafter, the contents of each sub game state will be specifically described.

  As will be described below, the pachi-slot 1 of the present embodiment, in various sub-gaming states during the 2MB flag state, will receive a predetermined benefit (non-AT state cycle reduction or number of AT games added when “losing” is won. ). And this privilege provision function is controlled by the sub-control circuit 101. In other words, in the present embodiment, the sub control circuit 101 also serves as a means (privilege determination means) for determining whether or not to give a predetermined privilege when “losing” is won.

[Non-AT state]
The non-AT state includes a “normal state” and a “transition effect state” to the AT state. In the non-AT state, basically, the game in the normal state and the transition effect state is periodically repeated with a predetermined number of unit games (190 games in the present embodiment).

  Specifically, in a one-cycle game in a non-AT state, first, a normal game (hereinafter referred to as “normal game”) in which the number of games in one set is 180 games (first unit game number) is played. Is called. Next, after the normal game is digested, a game in a transition effect state (hereinafter referred to as “transition effect game”) is performed over a period of ten games.

  Then, AT lottery is performed at the start of the transition effect game, and if the lottery result is AT winning, an effect corresponding to the AT winning is performed during the transition effect game period, and then the sub gaming state is the AT ready state. Migrate to On the other hand, if the result of the AT lottery is AT non-winning, an effect corresponding to AT non-winning is performed during the transition effect game period, and then the next set of normal games (non-AT state games in the next cycle) is performed. Be started.

  As described above, when the AT lottery result in the transition effect game is non-winning, the normal game and the transition effect game are periodically repeated with a predetermined number of games (190 games). In this periodic game digestion process, basically, after normal game digestion (after 180 game digestion), a chance to shift to the AT state is always given. That is, in the non-AT state, a chance to shift to the AT state periodically is given. Hereinafter, the contents of the normal game and the transition effect game will be described in more detail.

(1) Normal game In normal game, based on the internal winning combination for each game (for each unit game), a winning / non-winning lottery (hereinafter referred to as “pseudo BB game”) (hereinafter referred to as “pseudo BB game”). Is called “pseudo BB lottery”.

  In the normal game, when the pseudo BB lottery is won, the pseudo BB game is started as an interrupt process. During the pseudo BB game, the number of games in the normal game is not counted (subtracted). When the pseudo BB game is consumed, the sub game state returns to the normal state. At this time, the normal game is resumed from the state before the start of the pseudo BB game.

  In a normal game, “losing” or a specific internal winning combination (in this embodiment, “normal lip”, “weak choi”, “strong choi”, or “rare role”) is won internally once. In this case, or in the case of continuous winning, a subtraction lottery of the number of remaining games of the current game of the current set, that is, a shortened lottery of the game period in the non-AT state of the current cycle (hereinafter referred to as “cycle shortened lottery”) is performed. Therefore, if the period shortening lottery is won in the normal game, the period until the transition effect game is started is shortened in the non-AT game period of the current cycle. That is, there is a possibility that the period until the game in the AT state starts will be shorter.

  In the present embodiment, when the number of remaining games in the current set of normal games is a predetermined number of games (predetermined number of unit games: 10 games in the present embodiment), in the case of winning a cycle shortened lottery In this case, the number of shortened games won is subtracted from the number of remaining games of the current set of normal games. In this case, if the subtraction result is less than the predetermined number of games (10 games) (the subtraction result may be a negative value), the absolute value of the number of games of the subtraction result is an excess shortened game in the current set. Stocked as a number (number of surplus unit games). On the other hand, in the case of a normal game in a period in which the number of remaining games of the current game in the current set is less than a predetermined number of games (10 games), when the number of shortened games is won, As stock.

  For example, when the predetermined number of games is 10, the remaining number of games in the current set of normal games is 30, and the number of shortened games won is 50, the subtraction result is −20 games. Therefore, the number of games stocked as the surplus number of shortened games is 20 games. At this time, the standard of the number of shortened games stocked as the surplus is set as the predetermined number of games (10 games), and corresponds to the difference between the predetermined number of games (10) and the subtraction result value (−20). The number of games to be played (30 games) may be the surplus number of shortened games. Also, for example, if the predetermined number of games is 10, the number of remaining games of the current set of normal games is 5, and the number of shortened games won is 50 games, The number of games to be stocked is 50 games.

  The excess number of shortened games stored is applied at the start of a game in the non-AT state of the next cycle, that is, at the start of the normal game of the next set, and at that time, the game period in the normal state (non-AT state) Is shortened. In this case, in the next period non-AT game period, the period until the transition effect game is started is shortened. That is, as a result of the cycle shortening lottery, when a surplus number of shortened games is generated, the period until the start of the game in the AT state may be shortened even in the next cycle. Further, for example, depending on the number of shortened games (number of stocked shortened games) obtained by the cycle shortening lottery, the transition effect game may be started from the beginning in the non-AT game period of the next cycle.

(2) Transition effect state In the transition effect game, the effect (notification) game indicating the result (winning / non-winning) of the AT lottery performed at the start of the game period is a specific number of games (third unit game number: book) In the embodiment, it is performed over 10 games). In the pachislot 1 of the present embodiment, in the transition effect game, an effect (race effect) in which a plurality of teammate characters and enemy characters race is performed as an effect indicating the result of the AT lottery. This race effect is performed mainly by displaying a race video on the liquid crystal display device 11. Here, the content of the race effect (transition effect to the AT state) performed in the transition effect game will be described more specifically.

  Specifically, first, a lottery (race result lottery) of whether or not a predetermined ally character set in advance as a race victory target (candidate) wins the race at the start of the race production (transition production game). Do. In this race result lottery, when a predetermined ally character wins the race, the player wins an AT. When the predetermined ally character wins a race, the player wins an AT.

  In addition, at the start of the race effect (transition effect game), a plurality of ally characters including a predetermined ally character set as a race victory target (candidate) person and an enemy character are used as race members, and the liquid crystal display device 11 is displayed. Then, during the game period of the race effect, when the AT wins, the liquid crystal display device 11 performs a video effect that the predetermined ally character wins the race, and when the AT is not wins, the video effect that the enemy character wins the race is displayed. This is performed by the liquid crystal display device 11.

  Therefore, if a predetermined teammate character wins as a result of the race effect performed in the transition effect game, the sub game state shifts from the transition effect state to the AT ready state, and if the enemy character wins, the next set ( The next game) normal game (non-AT game) is started. In this embodiment, the number of basic stay games in the AT state to be performed thereafter changes according to the type of the teammate character who won the race. This will be described in detail later.

  In the present embodiment, six types of “male A”, “male B”, “female A”, “kappa”, “tengu”, and “male A / male B” are provided as friend characters. Note that the information on the type of the teammate character who is the race winning target (candidate) in the transition production game and the content of the race production related to the race winning rate of the teammate character is in the non-AT state game of the current cycle. When the information regarding the content of the race effect is not set (when the race starter MAP described later is not set (initial state) or when the race information MAP data described later is “0”), It is determined by lottery at the start of a game in the AT state (at the start of the game period of the normal game). At this time, in this embodiment, not only information related to the content of the race effect of the current set (first race) but also information related to the content of the race effect up to the fourth set (fifth game) is determined.

  In the transition effect game, a pseudo BB lottery is performed based on each game and the internal winning combination. In the transition effect game, when the pseudo BB lottery is won, the pseudo BB game is started as an interrupt process, and when the pseudo BB game is consumed, the sub game state shifts to the AT preparation state.

  Furthermore, in the present embodiment, when a specific condition is satisfied in the game period (during the race effect period) in the transition effect state (when the pseudo BB state becomes “between BB flags” or “waiting for BB operation”: described later. 108), the number of AT games is added and lottery is performed. When the lottery is won, a predetermined number of additional AT games is acquired.

  The above-described operation control of the normal game and the transition effect game is executed by the sub-control circuit 101. That is, in the present embodiment, the sub control circuit 101 also serves as means for controlling the operations of the normal game and the transition effect game (normal game control means and transition effect game control means).

[AT ready state]
In the pachi-slot 1 of the present embodiment, when the sub game state shifts from the transition effect state to the AT state, the sub game state shifts to the AT state via the AT preparation state. In the AT preparation state, a game for determining the number of basic stay games in the AT state (hereinafter referred to as “AT start game number”) (hereinafter referred to as “AT start game number determination game”) is mainly performed. In the AT start game number determination game (notification game number determination game), a pseudo BB lottery is performed based on each game and the internal winning combination.

  In this embodiment, the number of AT start games (the number of basic unit games) is the type of teammate character (“Men A”, “Men B”, “Woman A”, “Kappa”) who has won the race effect of the transition effect game. “Tengu” or “Men A / M B”). Specifically, it is as follows.

(1) When “Men A” wins When “Men A” wins the race production, an AT start game based on the internal winning combination is triggered by the lever operation performed in the start game of the AT start game number determination game. The number of lotteries is performed, and a predetermined number of AT start games (50 games to 300 games) is determined.

  In this embodiment, the AT start game number may not be determined in the start game of the AT start game number determination game at the time of “Man A” victory. In this case, the AT start game number determination game is continued, When the lever of the next game is operated, the number of AT start games is determined again. At this time, the number of continuous AT start game number determination games (in this embodiment, once or twice) varies depending on the internal winning combination determined in the start game of the AT start game number determination game. In the AT start game number determination game at the time of “Man A” victory, a lottery table (not shown) of the AT start game number is appropriately set so that the number of AT start games to be acquired increases as the number of continuations increases. ing.

(2) At the time of “Man B” victory When “Man B” wins the race production, the number of AT start games will be determined by the lever operation performed in the start game of the AT start game number determination game. A predetermined number of AT start games (50 games to 300 games) is determined. In the game for determining the number of AT start games when "Man B" wins, the number of AT start games is determined in one game. It should be noted that the lottery value of the AT start game number used in the AT start game number determination lottery when “Man B” wins is the same regardless of the internal winning combination.

(3) When “Women A” Wins When “Women A” wins the race production, the number of AT start games is determined by the continuous betting operation of the MAX bet button 21. In the game for determining the number of AT start games when “woman A” wins in this embodiment, two types of AT start game number determination modes (decision modes) are prepared.

  Specifically, the first mode in which 50 AT start games are added by one MAX bet operation, and the second mode in which 5 AT start games are added by one MAX bet operation Is prepared. In both modes, a continuous lottery of the addition process of the AT start game number is performed for each MAX bet operation. The continuation probability is 50% in the first mode, and the continuation probability is 95% in the second mode. Become. The AT start game number determination mode (decision mode) is selected by the player at the start of the AT start game number determination game (AT ready game).

  In the game for determining the number of AT start games at the time of “woman A” victory, first, at the end of the next game after the liquid crystal display device 11 notifies the victory of “woman A” (after all reels stop), the AT start game Information indicating that the number determination mode (decision mode) is selected is displayed on the liquid crystal display device 11. Next, one of the first mode and the second mode is selected as the AT start game number determination mode by the player's operation on the selection button 25. Next, when the lever operation of the next game of the game in which the selection operation of the AT start game number determination mode is performed is performed, the AT start game number determination mode selected by the player (the first mode or the second mode). Mode) is confirmed (determined). Then, in the game in which the determination operation of the AT start game number determination mode is performed, after the reels are completely stopped, the AT start game number addition process is performed by the continuous bet operation of the MAX bet button 21. That is, the game for determining the number of AT start games when “woman A” wins is performed over two games after the liquid crystal display device 11 informs the victory of “woman A”.

  In the game for determining the number of AT start games at the time of “Women A” winning, a predetermined number of bets is set for each MAX bet operation until the result of continuous lottery of the AT start game number addition process performed for each MAX bet operation becomes non-winning. The number of AT games (50 games or 5 games) is added to the number of AT start games. It should be noted that the AT start game number is added only at the time of the MAX bet operation when the continuous lottery of the AT start game number addition process is won. Therefore, for example, in the AT start game number determination game at the time of “woman A” victory, the first mode is selected, and the result of the continuous lottery of the AT start game number addition process in the sixth MAX bet operation When is not won, the AT start game number is 250 games.

  When the first mode is selected, if the result of continuous lottery of the AT start game number addition process is non-winning in the first MAX bet operation, the AT start game number is 50 games. Set. That is, when the first mode is selected, the number of AT start games of 50 games is guaranteed. When the second mode is selected, the number of additional games for each MAX bet operation is small, so that a MAX bet operation for a predetermined number of times (for example, 10 games) is guaranteed.

(4) At the time of “Tengu” victory When “Tengu” wins the race production, as in the case of “Man B” victory, triggered by the lever operation performed at the start game of the AT start game number determination game, The number of AT start games is determined and a predetermined number of AT start games is determined. Also in this case, the number of AT start games is determined in one game.

  However, in the game for determining the number of AT start games when “Tengu” is won, the number of AT start games of 100 games or more is determined, unlike the case of “Man B” winning (the number of AT start games of 50 games or more is determined).

(5) At the time of “Kappa” victory When “Kappa” wins the race production, the video production of “Kappa” eating sushi (hereinafter referred to as “Kappa Sushi production”) in the AT start game number determination game Displayed by the liquid crystal display device 11 over a plurality of games. In this kappa sushi production, every time “Kappa” eats sushi, the number of AT start games is added, and the number of added games (additional unit game number) is added to the sushi (game information) eaten by “Kappa”. Will change accordingly.

  In this embodiment, the types of sushi that "kappa" eats are "squid", "egg", "kappaki", "salmon", "salmon", "tuna", "sea urchin" and "Ise shrimp". 8 types are prepared. And it is set so that the number of additional games increases as the sushi material becomes higher-class.

  Here, the content of the AT start game number determination game (Kappa Sushi production) at the time of “Kappa” victory will be described more specifically. First, when the AT start game number determination game is started, the appearance pattern of the sushi material from the first game to the tenth game (first plate to tenth plate) is determined by lottery, and the determined first plate The sushi material up to the 10th dish is sequentially displayed on the liquid crystal display device 11.

  After that, an effect of eating or not eating sushi from the sushi material in which “kappa” is sequentially displayed is displayed on the liquid crystal display device 11 for each game, and when the effect of “kappa” eating sushi material is executed, The number of added games is acquired. For example, as shown in the kappa game number acquisition lottery table of FIG. 52 described later, when “kappa” eats the sushi “squid”, 10 or 300 games are added to the AT start game number according to the lottery result. Get as. Also, for example, when “Kappa” eats the sushi story “Ise Shrimp”, 100, 150, 200 or 300 games are acquired as the number of added games depending on the lottery result. Then, the total number of added games corresponding to all the sushi items that “Kappa” has eaten before the AT start game number determination game is ended is set as the AT start game number.

  In the above Kappa sushi production, whether or not to eat sushi material with “Kappa” is determined based on the type of internal winning combination. Specifically, if the internal winning combination is “Group 1” (for example, “213 Bell 1” to “213 Bell 8”, etc.) described later, “Kappa” eats sushi, In the case of an internal winning role, “Kappa” does not eat sushi. In other words, in the period of the game for determining the number of AT start games when “Kappa” is won, the number of AT start games is added for each game in which the internal winning combination is “group 1 combination” described later.

  Further, in the present embodiment, the sushi material displayed on the liquid crystal display device 11 decreases every time “kappa” eats sushi material in the kappa sushi production. However, in the case where the sushi material to be delivered to the fifth game destination (sixth plate) is not displayed on the liquid crystal display device 11, that is, when the sushi material after the sixth game (sixth plate) has not been determined, At this time, the sushi material for the sixth game (sixth plate) and after is determined by lottery.

  In addition, the end timing of the AT start game number determination game at the time of “Kappa” victory is managed by the “Kappa end counter”, and the value of the Kappa end counter (end parameter) is less than “0” (predetermined condition). In this case, the game for determining the number of AT start games at the time of winning “Kappa” ends. In this embodiment, the initial value of the kappa end counter is set to “5”.

  The value of the Kappa end counter is decremented by “1” when “Kappa” eats a specific sushi material (sushi material with wasabi), specifically “squid”, “salmon” and “tuna” Is done. In other words, in the current game, the sushi data of “squid”, “salmon”, and “tuna” is set as the sushi material that “Kappa” eats, and the internal winning combination is “Group” described later. In the case of “1 role”, the number of added games corresponding to the sushi material is acquired, but the value of the kappa end counter is subtracted from “1”.

  In this embodiment, when “Kappa” eats a predetermined sushi material, specifically “Kappa Maki”, the value of the Kappa end counter is incremented by “1”. However, in this case, the number of added games is not acquired. That is, in the current game, if the sushi story data of “Kappa Maki” is set as the sushi story of “Kappa” and the internal winning role is “Group 1 role” described later, the addition is performed. Although the number of games cannot be obtained, the value of the Kappa end counter is incremented by “1”, and the AT start game number determination game period is extended.

  In this embodiment, in the game for determining the number of AT start games at the time of “Kappa” victory, the internal winning combination is a specific combination other than “Group 1 combination” described later (“losing”, “reach eye lip”, “weak”). (Che), “Strong Choi”, “Watermelon”, “Chance A”, “Chance B”, and “Decisive Role”) for 5 games from the next game (2nd to 6th dishes) A lottery (data conversion occurrence lottery) for determining whether or not to perform sushi material data conversion is performed (see FIG. 53 described later). And when winning the data conversion occurrence lottery of this sushi material, in this embodiment, the number of addition games associated with the sushi material after conversion is equal to or greater than the number of addition games associated with the sushi material before conversion. The sushi material data is converted so as to be a value (see FIGS. 54 to 58 described later).

  Furthermore, in the present embodiment, when the value of the Kappa end counter is less than “0” in the game for determining the number of AT start games at the time of “Kappa” victory, A lottery of the game for determining the number of AT start games at the time of “Kappa” victory is performed. Specifically, the rebirth lottery is performed by continuously pressing the MAX bet button 21 20 times. At this time, since the revival lottery is performed every time the MAX bet button 21 is pressed, the revival lottery is performed 20 times. When the winning lottery by continuously pressing the MAX bet button 21 is won, the AT start game number determination game at the time of “Kappa” victory is started again, and the number of AT start games can be further increased.

(6) When “Men A / M B” wins In the game for determining the number of AT start games when “Men A / M B” wins the race production, first, as the number of games to be added to the number of AT start games in the first game Ten games are won. Thereafter, the number of additional games that can be acquired for each game (every time) is increased by “10” by the 10th game. That is, in the first game, the second game, the third game,..., The ninth game, and the tenth game, the number of additional games that can be acquired is 10, 20, 30,. Furthermore, the number of additional games that can be acquired after the 11th game is 100 games per game.

  Therefore, for example, in the AT start game number determination game at the time of winning “MEN A / M B”, when the game is continued up to the tenth game, 550 games are acquired as the AT start game number. Further, when the game is continued after the 11th game, the number of AT start games is increased by 100 games for each game (the number of AT start games is 650 games, 750 games,...).

  In addition, the continuation probability for each game of the AT start game number determination game at the time of “Men A / M B” victory is 80%, and when this continuation lottery becomes non-winning, “MEN A / M B” wins The AT start game number determination game at that time ends.

  In the game for determining the number of AT start games when “Men A / M B” wins in this embodiment, continuation confirmation up to the second game is guaranteed. However, when the continuous lottery becomes non-winning in the second game, the number of AT start games is 30, but in this case, the number of AT start games is set to 50 games. That is, in the game for determining the number of AT start games when “Men A / M B” wins, acquisition of the number of AT start games of 50 games is guaranteed at a minimum.

  As described above, in this embodiment, the number of AT start games that can be acquired when “Tengu”, “Kappa”, or “Men A / M B” wins in the race effect of the transition effect game is “Men A”. , “Man B” or “woman A” is set to be more than that when winning. Therefore, more AT starts when “Tengu”, “Kappa” or “Men A / M B” are included in the running members displayed on the liquid crystal display device 11 at the start of the race production of the transition production game. The player can be expected to acquire the number of games.

  The operation control of the above-described various AT start game number determination games is executed by the sub-control circuit 101. That is, in the present embodiment, the sub-control circuit 101 also serves as means for controlling the operation of the AT start game number determination game (notification number determination game control means).

[AT state]
When the AT start game number is determined in the AT ready state game (AT start game number determination game) and the AT ready state game ends, the specific game number (second unit game number: AT start game number + additional AT game) A game in the AT state (hereinafter referred to as “AT game”) in which the order of pushing the small roles is notified for a number of times is started.

  In an AT game (notification game), a pseudo BB lottery is performed based on an internal winning combination every game, and when a pseudo BB lottery is won, the pseudo BB game is started as an interrupt process, and the pseudo BB game is digested. Then, the sub gaming state returns to the AT state. At this time, the number of AT games (the number of AT games) is not counted (subtracted) during the pseudo BB game interruption period.

  In addition, in AT games, lottery is added for the number of AT games based on each game, the type of internal winning combination and the winning history of internal winning combinations. Specifically, in this embodiment, in the AT game, when “losing”, “reach eye lip” or “rare role” is won once, or “losing” or “normal lip” is continuously won. In this case, lottery is performed by adding the number of AT games. When the number of AT games is won, the number of added AT games (0 to 300 games) corresponding to the winning result is added to the number of currently remaining AT games (number of remaining AT games).

  In addition, in AT games, a predetermined symbol combination (in this embodiment, “black BAR” − “black BAR” − “black BAR” or “black cherry” − “black BAR” − “black BAR”) is on the effective line. If the stop game is displayed, the sub gaming state shifts to the “W chance state”. Then, after the game in the “W chance state” is exhausted, the AT game is resumed. Note that the number of AT games is not counted (subtracted) during the game period of the “W chance state”.

  In the “W chance state”, a game in which an increase in the payout of medals can be expected. In the game of “W chance state”, the end condition is not the number of digest games, but is performed when a specific small role (“CT bell” in which 10 medals can be paid out) is won internally. It is defined by the number of times the stop button is pressed in order (hereinafter referred to as “bell navigation number”). In other words, in the “W chance state” game, the end condition is managed by the number of bell navigations, and when the number of bell navigations reaches a predetermined number, the “W chance state” game ends. In the present embodiment, the number of bell navigations in the “W chance state” game is set to five.

  Further, in AT games, when a specific symbol combination is stopped and displayed on a predetermined line (in this embodiment, “yellow BAR” − “yellow BAR” − on the center line (effective line) or on the cross-up) When “yellow BAR” is prepared), the sub game state shifts to “addition challenge state”. Then, after the game in the “add-on challenge state” is digested, the AT game is resumed.

  In a game in the “add-on challenge state”, a pseudo BB game is won and stocked with a high probability over a predetermined number of games. Further, the number of AT games is not counted (subtracted) during the play period in the “add-on challenge state”.

  When the AT game ends, the sub game state always shifts to the transition effect state, and the transition effect game (race effect) described above is performed. In this case, the information on the type of the teammate character who will be the race victory target (candidate) in the race production of the transition production game and the content of the race production related to the race win rate of the teammate character is obtained at the start of the game in the AT state before the migration. Determined by lottery.

  The above-described operation control of the AT game is executed by the sub control circuit 101. That is, in the present embodiment, the sub-control circuit 101 also serves as means for controlling the operation of the AT game (assist time game control means).

[Pseudo BB state]
In the pseudo BB game (special game), a specific replay role (“Normal Lip 1” to “Normal Lip 8”) is won and the stop button is pressed in correspondence with the replay role. In the case of the predetermined pushing order (when the pushing order is correct), a game called “JACGAME” (specific game) that can be expected to increase the medal payout is executed.

  In the game of “JACGAME”, the stop condition is not a number of digest games, but a stop button that is performed when a specific small role (in this embodiment, “CT bell” capable of paying out 10 medals) is won internally. It is defined by the number of times of push order navigation (number of bell navigations). That is, in the “JACGAME” game, the end condition is managed by the number of times of the bell navigation, and when the number of times of the bell navigation reaches a specific number, the game of “JACGAME” ends. In the present embodiment, the specific number of times of the bell navigation in “JACGAME” is set to five.

  The game period in the pseudo BB state is divided into a period called “JACGAME guaranteed section” and a period called “JACIN challenge section” to be performed thereafter.

  The “JACGAME guaranteed section” is a game period (period is indefinite) in which the game always continues until the predetermined number (in this embodiment, two times) of “JACGAME” is consumed. In the “JACGAME guaranteed section”, when a specific replay combination (“normal lip 1” to “normal lip 8”) is won, the stop button associated with the winning replay combination is displayed. The pressing order is notified (navigated), and execution of “JACGAME” is guaranteed.

  Note that the game form of the “JACGAME guaranteed section” is the same regardless of the transition path from the sub game state to the pseudo BB state. That is, the game form of the “JACGAME guaranteed section” is the same whether the sub gaming state has transitioned from the non-AT state to the pseudo BB state or when the sub gaming state has transitioned from the AT state to the pseudo BB state. On the other hand, the game form of the “JACIN challenge section” varies depending on the transition path from the sub game state to the pseudo BB state.

  In the game of the “JACIN challenge section” when the sub game state transitions from the non-AT state to the pseudo BB state, a specific replay role (in the specific number of unit games: 10 games in the present embodiment) ( In a game in which “normal lip 1” to “normal lip 8” is won, a two-choice challenge effect in the order of pressing the stop button is performed. If the two-choice challenge effect is correctly answered, “JACGAME” is executed as an interrupt process (interrupt game).

  On the other hand, in the game in the “JACIN challenge section” when the sub game state transitions from the AT state to the pseudo BB state, a specific replay role (“normal replies” is played during a specific number of games (10 games in this embodiment). In a game where one of “1” to “normal lip 8” is won, the pressing order of the stop button associated with the winning replay role is always notified (navigated). That is, when the sub gaming state shifts from the AT state to the pseudo BB state, “JACGAME” is always executed as an interrupt process if a specific replay role is won in the “JACIN challenge section”. Therefore, in this case, more medals can be obtained compared to the case where the sub gaming state shifts from the non-AT state to the pseudo BB state.

  In addition, in the pseudo BB game when the sub gaming state transitions from the non-AT state to the pseudo BB state, the period of the game period in the non-AT state based on each game, the type of the internal winning combination and the winning history of the internal winning combination A shortened lottery is performed. Specifically, in the pseudo BB game when the sub gaming state has transitioned from the non-AT state to the pseudo BB state, when “losing”, “reach eye lip”, or “rare role” is won internally once, or When “losing” or “normal lip” is continuously won, a cycle shortening lottery is performed. Then, if winning the period shortening lottery, a predetermined number of shortened games (0 to 170 games) corresponding to the winning result is subtracted from the number of remaining games of the current set of normal games. That is, even in the pseudo BB state, there is a possibility that a privilege of shortening the game period of the non-AT state in the current cycle can be obtained.

  Furthermore, if the result of subtracting the number of shortened games from the current remaining number of games in the base game is less than “0” in the pseudo BB game, the number of games of the absolute value of the subtraction result is It is stocked as the number of surplus games in the current set. Then, the excess number of shortened games stored is applied at the start of the normal game of the next set, and at that time, the game period in the non-AT state (normal state) is shortened.

  On the other hand, in the pseudo BB game when the sub gaming state is changed from the AT state to the pseudo BB state, the number of AT games is added and lottery is performed based on each game, the type of the internal winning combination and the winning history of the internal winning combination. . Specifically, in the pseudo BB game when the sub game state transitions from the AT state to the pseudo BB state, when “losing”, “reach eye lip” or “rare role” is won internally once, or “ When “losing” or “normal lip” is continuously won, the number of AT games is added and lottery is performed. If the winning lottery is won, a predetermined additional AT game number (0 to 300 games) corresponding to the winning result is added to the current remaining AT game number. That is, even in the pseudo BB state, there is a possibility that a privilege of adding the number of AT games can be obtained.

  The above-described pseudo BB game and “JACGAME” operation control are executed by the sub-control circuit 101. In other words, in the present embodiment, the sub control circuit 101 also serves as means for controlling the operation of the pseudo BB game and “JACGAME” (special game control means and specific game control means).

<Configuration of data table stored on ROM cartridge substrate>
Next, the configuration of various data tables stored in the ROM cartridge substrate 86 will be described. The correspondence between the abbreviations of the internal winning combinations used in the various processes controlled by the sub CPU 102 and the various tables to be managed and the names and abbreviations of the internal winning combinations managed by the main CPU 93 described below is shown in FIG. It is as shown in the correspondence table.

[Race runner MAP lottery table]
First, the race starter MAP lottery table will be described with reference to FIG. FIG. 32 is a diagram showing a configuration of a race starter MAP lottery table. The race starter MAP lottery table is, for example, a race starter MAP in a race information lottery process (see FIG. 83, described later) performed at the start of a one-cycle game in a non-AT state (at the start of a normal game). Reference is made in lottery processing (S321) or the like.

  The race starter MAP lottery table defines the correspondence between the MAP number (“1” to “39”) of the race starter MAP and the lottery value. Note that the race starter MAP (race information MAP), as will be described later, is the race winning target of the race production from the current cycle to the fifth cycle (from the first race to the fifth race) of the game in the non-AT state ( Data ("1" to "10") for determining candidates are defined.

  In the race starter MAP lottery process using the race starter MAP lottery table, first, a random number value extracted from a predetermined numerical range (0 to 32767 and random number denominator = 32768 in this embodiment) The lottery value corresponding to each race starter MAP number defined in the starter MAP lottery table is sequentially subtracted. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). When the subtraction result becomes negative (“digit” occurs), the MAP number of the race starter MAP at that time is won. For example, in the race starter MAP lottery process, the probability of winning the MAP number “1” is 1974/32768.

[Race Information MAP Data Table]
Next, the race information MAP data table will be described with reference to FIG. FIG. 33 is a diagram showing a configuration of a race information MAP data table. The race information MAP data table is referred to, for example, in the data acquisition process (S323) of the “target table” in the race information lottery process (described later with reference to FIG. 83).

  In the race information MAP data table, from the current cycle to the fifth cycle for each MAP number of the race starter MAP (race information MAP) determined by the race starter MAP lottery process using the race starter MAP lottery table Data (“1” to “10”: hereinafter referred to as race information MAP data) for determining the race winners (from the first race to the fifth race) is defined. Note that the race information MAP data is data corresponding to the type of “target table” defined in the winning target person lottery table described later (see FIG. 34 described later). Specifically, the race information MAP data “1” to “10” respectively correspond to “target table A” to “target table J” defined in the winning target lottery table described later.

  In the data acquisition process of the “target table” using the race information MAP data table, for example, when the MAP number of the race starter MAP (race information MAP) is “7”, the first to fifth races As race information MAP data, “2” (target table B), “1” (target table A), “2” (target table B), “1” (target table A), “8” (target table H), respectively. ) Is acquired.

[Victory lottery table]
Next, with reference to FIG. 34, the winning person lottery table will be described. FIG. 34 is a diagram showing a configuration of a winning subject lottery table. The winning person lottery table is referred to, for example, in a winning person lottery process (S325) during a race information lottery process (described later with reference to FIG. 83).

  The winning person lottery table is for each type of the target table, the race winning persons (“Men A”, “Men B”, “Woman A”, “Kappa”, “Tengu”) And “male A / male B”) and their lottery values. In this embodiment, since the race effect of the transition effect game is performed even after the end of the AT game, the target table determined by the race information MAP data table as shown in FIG. In addition to A to J, a dedicated table “after AT” is also defined.

  In the winning subject lottery process using the winning subject lottery table, first, a random number value extracted from a predetermined numerical range (0 to 32767, random number denominator = 32768 in the present embodiment) The lottery value corresponding to each race victory target specified in the lottery table is sequentially subtracted. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). If the result of the subtraction becomes negative (“digit” occurs), the race winning person at that time wins.

  For example, when the target table A is referenced in the winning person lottery process (when the race information MAP data is “1”), the probability that “Kappa” is the race winning person is 328/32768. Become. However, for example, when the target table G is referred to in the winning subject person lottery process (when the race information MAP data is “7”), the probability that “Kappa” is the race winning subject is 0 / 32768, “Kappa” will not win the race.

[Race win rate MAP lottery table]
Next, the race winning rate MAP lottery table will be described with reference to FIG. FIG. 35 is a diagram showing a configuration of a race winning rate MAP lottery table. The race winning rate MAP lottery table is referred to, for example, in a race winning rate MAP lottery process (S327) during a race information lottery process (see FIG. 83, which will be described later).

  The race win rate MAP lottery table defines the correspondence between the race win rate MAP and the lottery value for each set value (1 to 6). In the present embodiment, the race winning rate MAP is “race winning rate 5%”, “race winning rate 10%”, “race winning rate 20%”, “race winning rate 30%”, “race winning rate 50%”, “race winning rate”. 66% "," Race Win Rate 80% "," Race Win Rate 100% "," Race Win Rate 2nd Race 50% "-" Race Win Rate 5th Race 50% "," Race Win Rate 2nd Race 66% "-" Race There are 20 types, "winning rate 5th game 66%" and "race winning rate 2nd game 80%" to "race winning rate 5th game 80%".

  In the race win rate MAP lottery process using the race win rate MAP lottery table, first, a random value extracted from a predetermined numerical range (0 to 32767 and random number denominator = 32768 in this embodiment) is used as the race win rate MAP. The lottery value corresponding to each race winning rate MAP specified in the lottery table is sequentially subtracted. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). When the subtraction result becomes negative (“digit” occurs), the race win rate MAP at that time is won. For example, when the set value is “1”, the probability that the race win rate MAP of “the race win rate 5th game 50%” wins is 4410/32768.

[Race win rate MAP data table]
Next, the race win rate MAP data table will be described with reference to FIGS. FIG. 36 is a diagram showing a configuration of the race win rate MAP data table. FIG. 37 is obtained by rewriting the race win rate data (“1” to “8”) defined in the race win rate MAP data table shown in FIG. 36 into specific win rate values (percent display). Note that the race win rate MAP data table is referred to, for example, in a race win rate data acquisition process (S329) during a race information lottery process (see FIG. 83 to be described later).

  The race win rate MAP data table stores predetermined race win rate data ("1" to "8") for each race win rate MAP determined by the race win rate MAP lottery process. The race win rate data “1”, “2”, “3”, “4”, “5”, “6”, “7”, and “8” have a win rate of 5%, a win rate of 10%, and a win rate of 20, respectively. %, Win rate 30%, win rate 50%, win rate 66%, win rate 80% and win rate 100%.

  Specifically, the race winning rate MAP is “race winning rate 5%”, “race winning rate 10%”, “race winning rate 20%”, “race winning rate 30%”, “race winning rate 50%”, “race winning rate 66% ”,“ Race Win Rate 80% ”and“ Race Win Rate 100% ”, only the race win rate data of the race effect in the current cycle (first race) is defined in the race win rate MAP data table. Further, when the race win rate MAP is any one of “race win rate second game 50%”, “race win rate second game 66%” and “race win rate second game 80%”, the first and second races Race win rate data for the race (one cycle ahead) is defined in the race win rate MAP data table. If the race win rate MAP is any one of “race win rate 3rd race 50%”, “race win rate 3rd race 66%” and “race win rate 3rd race 80%”, the first 3 to 3 Race win rate data up to the race (two cycles ahead) is defined in the race win rate MAP data table. In addition, when the race win rate MAP is any one of “race win rate 4th race 50%”, “race win rate 4th race 66%” and “race win rate 4th race 80%” Race win rate data up to the race (3 cycles ahead) is defined in the race win rate MAP data table. Furthermore, when the race win rate MAP is any one of “the race win rate 50% of the 5th race”, “the race win rate 5% of the 66th race” and “the race win rate 5th of the 80th race”, the first race 5 Race win rate data up to the race (four cycles ahead) is defined in the race win rate MAP data table.

  In the race winning rate data acquisition process using the race winning rate MAP data table, for example, when the race winning rate MAP is “race winning rate 5th race 50%”, the race win rate data of the first to fifth races. "2" (win rate 10%), "2" (win rate 10%), "2" (win rate 10%), "2" (win rate 10%), "5" (win rate 50%) The

[Race result lottery table]
Next, the race result lottery table will be described with reference to FIG. FIG. 38 is a diagram showing a configuration of a race result lottery table. Note that the race result lottery table is referred to, for example, in a race result lottery process (S644) during a race_game start process described later (see FIG. 108 described later).

  The race result lottery table defines the correspondence between the race result (winning win / non-winning) and the lottery value for each race win rate.

  In the race result lottery process using the race result lottery table, first, random numbers extracted from a predetermined numerical range (0 to 32767 and random number denominator = 32768 in this embodiment) are stored in the race result lottery table. Subtract the lottery value corresponding to each race result (winning win / non-winning) specified in. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). If the subtraction result is negative (“digit” occurs), the race result at that time is a win.

[After-AT race victory expectation data selection lottery table]
Next, a post-AT race victory expectation degree data selection lottery table will be described with reference to FIG. FIG. 39 is a diagram showing a configuration of a post-AT race victory expectation degree data selection lottery table. The post-AT race victory expectation degree data selection lottery table is referred to, for example, in the post-AT race victory expectation degree data selection lottery process (S716) during the AT-in-game start process (see FIG. 111, which will be described later). The

  The post-AT race victory expectation degree data selection lottery table defines the correspondence between the race win rate and the lottery value. Note that the post-AT race victory expectation degree data selection lottery table is commonly referred to regardless of the set value (1 to 6).

  In the post-AT race victory expectation data selection lottery process using the post-AT race victory expectation data selection lottery table, first, from a predetermined numerical range (0 to 32767 in this embodiment, random number denominator = 32768). The extracted random numbers are sequentially subtracted by lottery values corresponding to the winning percentages defined in the post-AT race victory expectation degree data selection lottery table. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). When the subtraction result becomes negative (“digit” occurs), the winning percentage at that time is won. In this embodiment, as shown in FIG. 39, the race win rates selected after AT are “win rate 5%”, “win rate 10%”, “win rate 30%”, “win rate 50%”, and “win rate 100”. % ".

[Pseudo BB lottery (general medium) table]
Next, the pseudo BB lottery (general medium) table will be described with reference to FIG. FIG. 40 is a diagram illustrating a configuration of a pseudo BB lottery (general medium) table. Note that the pseudo BB lottery (general medium) table is referred to, for example, in a pseudo BB lottery process described later (see FIG. 103 described later) when the sub gaming state is a normal state.

  The pseudo BB lottery (medium) table defines the correspondence between the winning / non-winning (lottery result) of the pseudo BB game and the lottery value for each type of internal winning combination.

  In the pseudo BB lottery process using the pseudo BB lottery (general medium) table, first, a random value extracted from a predetermined numerical range (0 to 32767 and random number denominator = 32768 in the present embodiment) is simulated. The lottery value of each lottery result specified in the BB lottery (general medium) table is sequentially subtracted. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). If the subtraction result is negative (“digit” occurs), the lottery result (pseudo BB game winning / non-winning) at that time is won.

  For example, in the pseudo BB lottery process using the pseudo BB lottery (general medium) table, if the internal winning combination is “normal lip”, the non-winning of the pseudo BB game is always determined, and the internal winning combination is “determined” In the case of “combination”, the winning of the pseudo BB game is surely determined.

[Pseudo BB lottery (AT, AT preparation, race) table]
Next, with reference to FIG. 41, the pseudo BB lottery (AT in progress / AT preparation in progress / race) table will be described. FIG. 41 is a diagram showing a configuration of a pseudo BB lottery (AT / AT preparation / race) table. Note that the pseudo BB lottery (AT / AT preparation / during race) table, for example, in a pseudo BB lottery process described later (see FIG. 103 described later), when the sub gaming state is other than the normal state (sub gaming state) Is in the AT state, the AT preparation state, or the transition effect state).

  The pseudo BB lottery (AT / AT preparation / race) table also has the same configuration as the pseudo BB lottery (general) table, and the pseudo BB lottery process is performed by the same method. Therefore, here, the structure of the pseudo BB lottery (during AT / AT preparation / during race) table and the explanation of the technique of the pseudo BB lottery process using the pseudo BB lottery (during AT / AT preparation / during race) table Is omitted.

[Pseudo BB sign lottery table]
Next, with reference to FIG. 42, the pseudo BB precursor lottery table will be described. FIG. 42 is a diagram showing a configuration of the pseudo BB precursor lottery table. The pseudo BB precursor lottery table is referred to, for example, in a pseudo BB precursor lottery process (S587) during a pseudo BB lottery process described later (see FIG. 103 described later).

  The pseudo BB precursory lottery table defines the correspondence between the number of precursor games (including no precursor) at the time of the pseudo BB game winning and the lottery value for each type of internal winning combination.

  In the pseudo BB precursor lottery process using the pseudo BB precursor lottery table, first, a random value extracted from a predetermined numerical range (0 to 32767, random denominator = 32768 in this embodiment) is used as a pseudo BB precursor. The numbers are sequentially subtracted by the lottery value for each number of precursor games specified in the lottery table. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). If the subtraction result is negative (“digit” occurs), the number of precursor games at that time is won.

  For example, in the pseudo BB precursor lottery process using the pseudo BB precursor lottery table, if the internal winning combination is “weak”, the number of precursor games of one game is won with a probability of 128/32768, and 512/32768. It wins the number of precursor games of two games with a probability of 32,32768 and wins the number of precursor games of three games.

[Cycle shortened lottery table]
Next, with reference to FIGS. 43 and 44, the cycle shortening lottery table will be described. FIG. 43 is a diagram showing a configuration of the cycle shortened lottery table (part 1), and FIG. 44 is a diagram showing a configuration of the cycle shortened lottery table (part 2). The cycle shortening lottery table (part 1 and part 2) is referred to, for example, in the cycle shortening related process (S570) in the later-described general medium_game start process (see FIGS. 101 and 102 described later).

  The cycle shortened lottery table defines the correspondence between the number of shortened games (the number of subtracted games in the normal game) in the non-AT game period (one cycle) and the lottery value for each winning history data of the internal winning combination. . In the cycle shortening lottery table, the number of shortened games is “0”, “5”, “10”, “20”, “30”, “40”, “50”, “60”, “70”, “ 100 "," 150 "and" 170 "are provided.

  Note that the winning history data “losing 2 series” of the internal winning combination in the cycle shortening lottery table (part 1) indicates a case where the internal winning combination “losing” is winning 2 games in succession. The winning history data “Lip Triple” indicates a case where the internal winning combination “Normal Lip” is won for three consecutive games. The winning history data “Bell Triple” indicates a case where the internal winning combination “3 bells” (left 3 bells and middle right 3 bells) has won 3 consecutive games.

  In addition, the winning history data “weak 1st” and “strong 1st” of the internal winning combination in the cycle shortening lottery table (part 2) indicate that the current internal winning combination of the game is “weak” and “strong”, respectively. The case of “Che” is shown. The winning history data “Weak and weak 2” indicates the case where the internal winning combination “Weak Choi” wins two games in a row, and the winning history data “Strong and strong 2” indicates the internal winning combination “Strong”. Shows a case where two games are won in succession. The winning history data “Weak and strong 2” indicates that the internal winning roles “Weak” and “Strong” are consecutively won in this order. The case where the roles “strong Choi” and “weak Choi” are successively won in this order is shown. In addition, the winning history data “rare role triple” includes the internal winning role “rare role” (“weak choi”, “strong choi”, “watermelon”, “chance eye A”, “chance eye B” and “determined role”. ": The specified internal winning combination) indicates that three games have been won in succession.

  In the cycle shortening related process using the cycle shortening lottery table, first, random number values extracted from a predetermined numerical range (0 to 32767, random number denominator = 32768 in this embodiment) are stored in the cycle shortening lottery table. Subtract sequentially with the lottery value for each specified number of shortened games. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). If the subtraction result becomes negative (“digit” occurs), the number of shortened games at that time is won.

  For example, in the cycle shortening related process using the cycle shortening lottery table, when the winning history data is “3 consecutive losses”, the number of shortened games of 10 games is won with a probability of 30720/32768, and 1600/32768 The winning game number of 30 games is won, and the shortening game number of 50 games is won with a probability of 448/32768. That is, in the present embodiment, even in the normal game, even if the internal winning combination “losing” is continuously won, there is a possibility that a privilege of obtaining the number of shortened games (shortening the game period in the non-AT state) may be obtained.

[Pseudo BB cycle shortening lottery table]
Next, the pseudo BB cycle shortening lottery table will be described with reference to FIG. FIG. 45 is a diagram showing a configuration of a pseudo BB cycle shortening lottery table. Note that the pseudo BB cycle shortened lottery table is referred to, for example, in the pseudo BB cycle shortened lottery process (S598) in the later-described general medium BB_game start time process (see FIG. 104 described later).

  The pseudo BB cycle shortened lottery table shows the correspondence between the number of shortened games (the number of subtracted games of the normal game) and the lottery value of the game period (one cycle) in the non-AT state for each internal winning combination or its winning history data. Is specified. In the pseudo BB cycle shortened lottery table, “0”, “5”, “10”, “20”, “30”, “50”, “100”, and “170” are provided as the number of shortened games. However, in the pseudo BB cycle shortening lottery process, when “170” is won as the number of shortened games, a privilege with a race winning rate of 100% is also obtained.

  In the pseudo BB cycle shortening lottery process using the pseudo BB cycle shortening lottery table, first, a random number value extracted from a predetermined numerical range (0 to 32767 and random number denominator = 32768 in the present embodiment) is simulated. Subtract sequentially with the lottery value for each number of shortened games specified in the BB cycle shortened lottery table. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). If the subtraction result becomes negative (“digit” occurs), the number of shortened games at that time is won.

  For example, in the pseudo BB cycle shortened lottery process using the pseudo BB cycle shortened lottery table, when the winning history data is “losing triples”, the number of shortened games of 30 games is won with a probability of 32112/32768, The number of shortened games of 100 games with a probability of 656/32768 is won. That is, in this embodiment, when a pseudo BB game is started during a normal game, even if the internal winning combination “losing” is continuously won in the pseudo BB game state, the number of shortened games is acquired (in the non-AT state). There is a possibility that a privilege of shortening the game period may be obtained. Also, for example, in the pseudo BB cycle shortened lottery process using the pseudo BB cycle shortened lottery table, when the internal winning combination is “reach eye lip”, not only the number of shortened games of 170 games is always won, The race win rate set in the current set is updated to 100% race win rate (AT winning).

[Directly placed lottery table]
Next, with reference to FIG. 46, the directly added lottery table will be described. FIG. 46 is a diagram showing a configuration of a direct addition lottery table. The directly added lottery table is referred to, for example, in determining the number of AT games to be added in the directly added lottery process (S734) during the BB_game start time process (see FIG. 112, which will be described later), which will be described later. .

  The directly added lottery table defines the correspondence between the number of added AT games and the lottery value for each internal winning combination or the winning history data. In this embodiment, the number of additional AT games is “0” (no additional), “10”, “20”, “30”, “50”, “100”, “150”, “200”, and “200”. 300 "is provided.

  In the direct addition lottery process using the direct addition lottery table, first, random number values extracted from a predetermined numerical range (0 to 32767 and random number denominator = 32768 in this embodiment) are directly added to the direct addition lottery table. Subtract one by one from the lottery value of each additional AT game specified. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). If the result of the subtraction becomes negative (“digit” occurs), the number of AT games added at that time is won.

  For example, in the direct addition lottery process using the direct addition lottery table, when the winning history data is “3 consecutive losses”, 20 games are added with the probability of 32936/32768 and the number of AT games is won, and 32/32768 Add 100 games with the probability of winning the number of AT games. That is, in the present embodiment, when a pseudo BB game is started during an AT game, even if the internal winning combination “losing” is continuously won in the pseudo BB game state, the benefit of adding the number of AT games can be obtained. there is a possibility.

[AT start game number lottery (when Kappa wins) table]
Next, an AT start game number lottery (when Kappa victory) table will be described with reference to FIGS. 47 to 50 are diagrams showing the configurations of an AT start game number lottery (when Kappa victory) table (part 1) to an AT start game number lottery (when Kappa victory) table (part 4), respectively. These AT start game number lottery (when Kappa victory) tables are referred to, for example, in the Kappa sushi MAP lottery process (S683) during the Kappa victory_game start process (see FIG. 110, which will be described later). The

  The AT start game number lottery (when Kappa wins) table defines the correspondence between the sushi MAP number and the lottery value for each sushi MAP number currently set. The sushi MAP is the kappa sushi map MAP corresponding to the sushi material from the first dish to the tenth dish displayed on the liquid crystal display device 11 in the above-mentioned Kappa sushi production (the game for determining the number of AT start games when “Kappa” wins). The MAP defines data (see FIG. 51 described later).

  In the AT start game number lottery (when Kappa wins) table, “1” to “45” are defined as sushi MAP numbers. In the initial state, the sushi MAP is not set. In this case, the lottery value in the “first time” column in the AT start game number lottery (when Kappa wins) table is referenced (see FIG. 50).

  In the kappa sushi MAP lottery process using the AT start game number lottery (at the time of Kappa victory) table, first, randomness extracted from a predetermined numerical range (in this embodiment, 0-32767, random number denominator = 32768). The numerical value is sequentially subtracted by the lottery value of each sushi MAP number specified in the AT start game number lottery (when Kappa wins) table. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). If the subtraction result is negative (“digit” is generated), the sushi MAP number at that time is won.

[Kappa Sushi MAP Data Table]
Next, the kappa sushi MAP data table will be described with reference to FIG. FIG. 51 is a diagram showing a configuration of a kappa sushi MAP data table. Note that the kappa sushi MAP data table is referred to, for example, in the kappa sushi MAP data acquisition process (S684) during the Kappa victory_game start process (described later with reference to FIG. 110).

  In the kappa sushi MAP data table, kappa sushi MAP data (“1” to “1”) corresponding to the first to tenth sushi items specified for each sushi MAP number determined by the kappa sushi MAP lottery process. 8 ") is stored. That is, the kappa sushi MAP data table is displayed on the screen of the liquid crystal display device 11 in the AT start game number determination game (kappa sushi production) performed when “kappa” wins in the race production of the transition production game. Types of sushi material from the first game to the tenth game are defined.

  In the kappa sushi MAP data table, the sushi material corresponding to the kappa sushi MAP data “1” is “squid”, the sushi material corresponding to the kappa sushi MAP data “2” is “egago”, and the kappa sushi MAP. The sushi material corresponding to the data “3” is “kappaki”, and the sushi material corresponding to the kappa sushi MAP data “4” is “salmon”. The sushi material corresponding to the kappa sushi MAP data “5” is “Ikura”, the sushi material corresponding to the kappa sushi MAP data “6” is “tuna”, and corresponds to the kappa sushi MAP data “7”. The sushi material is “urchin”, and the sushi material corresponding to the kappa sushi MAP data “8” is “Ise shrimp”.

  In the kappa sushi MAP data acquisition process using the kappa sushi MAP data table, for example, when the sushi MAP number is “1”, the kappa sushi MAP data from the first dish to the tenth dish is “ 1 (squid), “1” (squid), “2” (egg), “1” (squid), “4” (salmon), “1” (squid), “2” (egg), “1 "(Squid)," 1 "(squid) and" 5 "(squid) are acquired.

[Kappa game number acquisition lottery table]
Next, the kappa game number acquisition lottery table will be described with reference to FIG. FIG. 52 is a diagram showing a configuration of a kappa game number acquisition lottery table. The kappa game number acquisition lottery table is referred to, for example, in the kappa game number acquisition lottery process (S696) in the kappa victory time_game start time process (see FIG. 110 described later).

  The kappa game number acquisition lottery table defines the correspondence between the number of AT start games at the time of Kappa victory and the lottery value for each kappa sushi MAP data (“1” to “8”). In this embodiment, “10”, “20”, “30”, “100”, “150”, “200”, and “300” are provided as the number of AT start games when Kappa wins. In the kappa game number acquisition lottery table, for each kappa sushi MAP data (“1” to “8”), a lottery value of “LIFE UP” is also defined. When “LIFE UP” is won, “1” is added to the value of the kappa end counter that manages the end timing of the kappa sushi production (AT start game number determination game).

  In the kappa game number acquisition lottery process using the kappa game number acquisition lottery table, first, a random number value extracted from a predetermined numerical range (0 to 32767, random number denominator = 32768 in this embodiment) is used. The number is sequentially subtracted by each AT start game number or lottery value of “LIFE UP” defined in the game number acquisition lottery table. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). If the subtraction result becomes negative (“digit” occurs), the number of AT start games or “LIFE UP” at that time is won.

  For example, in the case where the set kappa sushi MAP data is “1” (squid) and the video production in which “kappa” eats the sushi story “squid” is displayed on the liquid crystal display device 11, the kappa game number acquisition lottery is performed. In the kappa game number acquisition lottery process using the table, the AT start game number of 10 games is won with a probability of 32672/32768, and the AT start game number of 300 games with a probability of 96/32768 is won. For example, if the set kappa sushi MAP data is “3” (kappaki) and “Kappa” eats the sushi story “kappaki”, the liquid crystal display device 11 displays a video effect. In the kappa game number acquisition lottery process using the game number acquisition lottery table, the AT start game number is not won, but “LIFE UP” is always won.

  Further, for example, when the set kappa sushi MAP data is “8” (Ise Shrimp) and the video production in which “Kappa” eats the sushi story “Ise Shrimp” is displayed on the liquid crystal display device 11, the Kappa In the kappa game number acquisition lottery process using the game number acquisition lottery table, the AT start game number of 100 games wins with a probability of 27854/32768, and the AT start game number of 150, 200 or 300 games with a probability of 1638/32768 Will win. That is, in this embodiment, in the kappa sushi production performed when “kappa” wins in the race production of the transition production game, when “kappa” is directed to eat high-quality ingredients sushi, Win big AT start games.

[Kappa sushi data conversion generation lottery table]
Next, the kappa sushi data conversion occurrence lottery table will be described with reference to FIG. FIG. 53 is a diagram showing a configuration of a kappa sushi data conversion generation lottery table. The kappa sushi data conversion generation lottery table is referred to, for example, in the kappa sushi data conversion generation lottery process (S692) during the Kappa victory_game start time process described later (see FIG. 110 described later).

  The kappa sushi data conversion occurrence lottery table defines the correspondence between the winning / non-winning (lottery result) of the kappa sushi data conversion occurrence and the lottery value for each type of internal winning combination.

  In the kappa sushi data conversion generation lottery process using the kappa sushi data conversion generation lottery table, first, a random number value extracted from a predetermined numerical range (0 to 32767 and random number denominator = 32768 in this embodiment) is used. Then, the lottery value of each lottery result defined in the kappa sushi data conversion generation lottery table is sequentially subtracted. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). When the subtraction result becomes negative (“digit” occurs), the lottery result at that time is won.

  For example, in the kappa sushi data conversion generation lottery process using the kappa sushi data conversion generation lottery table, if the internal winning combination is “losing”, the kappa sushi data conversion occurrence is non-winning with a probability of 31130/32768, The occurrence of Kappa sushi data conversion will be won with a probability of 1638/32768.

[Kappa Sushi data conversion lottery table]
Next, the kappa sushi data conversion lottery table will be described with reference to FIGS. 54 to 58 are diagrams showing configurations of a kappa sushi data conversion lottery (one plate ahead) table to a kappa sushi data conversion lottery (five plates ahead) table, respectively.

  The kappa sushi data conversion lottery (one plate ahead) table of FIG. 54 shows the sushi (Kappa Sushi MAP) displayed in the game one game ahead (second plate) from the current game of the AT start game number determination game when Kappa wins. (Data) conversion lottery table. The kappa sushi data conversion lottery table (2 plates ahead) in FIG. 55 is a sushi material conversion lottery table displayed in the game 2 games ahead (3 plates) from the current game of the AT start game number determination game when Kappa wins. It is. The kappa sushi data conversion lottery (3 plates ahead) table in FIG. 56 is a sushi material conversion lottery table displayed in the game 3 games ahead (4 plates) from the current game of the AT start game number determination game when Kappa wins. It is. The kappa sushi data conversion lottery (4 dishes ahead) table in FIG. 57 is a sushi news conversion lottery table displayed in the game 4 games ahead (fifth dish) from the current game of the AT start game number determination game when Kappa wins. It is. The kappa sushi data conversion lottery (five plates ahead) table of FIG. 58 shows the conversion of sushi items displayed in the game of the fifth game ahead (sixth plate) from the current game of the AT start game number determination game when Kappa wins. It is a lottery table. Each kappa sushi data conversion lottery table is referred to, for example, in a kappa sushi data conversion lottery process (S694) in a kappa victory time_game start time process (see FIG. 110 described later).

  Each kappa sushi data conversion lottery table corresponds to the kappa sushi MAP data ("1" to "8") after conversion and the lottery value for each currently set kappa sushi MAP data (sushi material). Is specified.

  In the kappa sushi data conversion lottery process using each kappa sushi data conversion lottery table, first, a random number value extracted from a predetermined numerical range (0 to 32767, random number denominator = 32768 in this embodiment) Each kappa sushi data conversion lottery table sequentially subtracts the converted kappa sushi MAP data (sushi material) with the lottery value. Next, it is determined whether or not the result of subtraction has become negative (whether or not a so-called “digit” has occurred). If the subtraction result becomes negative (“digit” occurs), the kappa sushi MAP data (sushi material) after conversion is won.

  For example, in the kappa sushi data conversion lottery process using the kappa sushi data conversion lottery (one dish ahead) table, if the currently set kappa sushi MAP data (sushi material) is “5” (tuna) The kappa sushi MAP data (sushi material) is converted from “5” (tuna) to “7” (urchin) with a probability of 29492/32768, and the kappa sushi MAP data (sushi material) is “5” with a probability of 3276/32768. (Tuna) is converted to “8” (Ise shrimp).

  As shown in FIGS. 54 to 58, in the present embodiment, in the kappa sushi data conversion lottery process, the value of the kappa sushi MAP data after conversion does not become smaller than the value of the kappa sushi MAP data before conversion. That is, the number of acquired AT games after conversion does not become smaller than the number of acquired AT games before conversion by the kappa sushi data conversion lottery process. However, for example, when the currently set kappa sushi MAP data (sushi material) is “8” (Ise lobster), the kappa sushi data conversion lottery process does not convert the kappa sushi MAP data (sushi material). .

<Description of main control circuit operation>
Next, the contents of various processes executed by the main CPU 93 of the main control circuit 91 using a program will be described with reference to FIGS.

[Main operation processing of pachislot by control of main CPU]
First, the procedure of main operation processing (processing after power-on) of the pachislot machine 1 performed under the control of the main CPU 93 will be described with reference to a flowchart shown in FIG. 59 (hereinafter referred to as main flow).

  First, when power is turned on to the pachislot machine 1, the main CPU 93 performs a power-on process (S1). In this process, it is determined whether the backup has been normally performed or the setting has been appropriately changed, and initialization corresponding to the determination result is performed. Details of the power-on process will be described later with reference to FIG. 60 described later.

  Next, the main CPU 93 performs an initialization process at the end of one game (S2). In this initialization process, the data in the designated storage area in the main RAM 95 is cleared. The designated storage area here is a storage area that needs to be erased for each unit game (game) such as an internal winning combination storage area or a display combination storage area.

  Next, the main CPU 93 performs medal acceptance / start check processing (S3). In this processing, a medal sensor (not shown), input of the start switch 79, etc. are checked. The details of the medal acceptance / start check process will be described later with reference to FIG.

  Next, the main CPU 93 performs a random value acquisition process (S4). In this process, the main CPU 93 extracts a random number value (0 to 65535) for internal winning combination lottery and stores the extracted random value in a random value storage area (not shown) provided in the main RAM 95. In the present embodiment, in addition to the random value for the internal winning combination lottery, various random numbers for performance (0 to 65535 and / or 0 to 255) can be acquired. Various random values may be acquired in S4.

  Next, the main CPU 93 performs an internal lottery process (S5). In this process, the internal winning combination is determined by lottery based on the random number value for internal winning combination lottery extracted in S4. Details of the internal lottery process will be described later with reference to FIG. 63 described later.

  Next, the main CPU 93 performs a reel stop initial setting process (S6). Details of the reel stop initial setting process will be described later with reference to FIG.

  Next, the main CPU 93 performs a start command generation storage process (S7). In this process, the main CPU 93 generates start command data to be transmitted to the sub control circuit 101 and stores the command data in a communication data storage area provided in the main RAM 95. The start command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by command data transmission processing in interrupt processing described later with reference to FIG. The start command data includes various kinds of information necessary for effects such as an internal winning combination.

  Next, the main CPU 93 performs a wait process (S8). In this process, when the predetermined time (for example, 4.1 seconds) has not elapsed since the start of the previous game, the main CPU 93 digests the waiting time until the predetermined time elapses.

  Next, the main CPU 93 performs a reel rotation start process (S9). In this process, the main CPU 93 requests the start of rotation of all reels. When the start of rotation of all reels is requested, three stepping motors (not shown) are driven by an interrupt process (see FIG. 72, which will be described later) executed at a constant cycle (1.1172 msec). Controlled, rotation of the left reel 3L, middle reel 3C and right reel 3R is started. At this time, each reel is subjected to acceleration control until the rotation speed reaches a constant speed, and then controlled so as to maintain the constant speed. When it is determined that the reel effect (lock effect) is to be performed during the reel acceleration period at the start of the game, the main CPU 93 sets the reel effect pattern and sets the reel effect in the reel rotation start process of S9. Also controls.

  Next, the main CPU 93 performs a reel rotation start command generation / storage process (S10). In this process, the main CPU 93 generates reel rotation start command data to be transmitted to the sub-control circuit 101 and stores the command data in a communication data storage area provided in the main RAM 95. The reel rotation start command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by a command data transmission process in an interrupt process described later with reference to FIG. By this processing, the sub control circuit 101 can recognize the start of reel rotation, and can determine the timing for executing various effects.

  Next, the main CPU 93 performs a pull-in priority storage process (S11). In this process, the main CPU 93 acquires the pull-in priority data and stores it in the pull-in priority data storage area. The details of the pull-in priority storage process will be described later with reference to FIG.

  Next, the main CPU 93 performs a reel stop control process (S12). In this process, the rotation of the corresponding reel is stopped based on the timing when the left stop button 19L, the middle stop button 19C, and the right stop button 19R are pressed and the internal winning combination. The details of the reel stop control process will be described later with reference to FIG. 68 described later.

  Next, the main CPU 93 performs a winning search process (S13). In this process, the main CPU 93 performs a combination of symbols displayed on the effective line (winning determination line) after the left reel 3L, the middle reel 3C and the right reel 3R are all stopped, and a symbol combination table (see FIGS. 10 to 12). ). Then, the main CPU 93 determines whether or not the display combination is displayed on the active line, and stores the determination result in the display combination storage area.

  Next, the main CPU 93 performs medal payout processing (S14). In this process, the hopper device 51 is driven and the number of credits is updated based on the payout number of the display combination determined in S13, and medals are paid out. At this time, in the present embodiment, the number of medals to be paid out differs depending on the display combination, but as shown in the symbol combination table (see FIGS. 10 to 12), when the number of medals inserted is 3, The maximum payout number (payout upper limit) is 10.

  Next, the main CPU 93 performs a winning operation command generation / storage process (S15). In this processing, the main CPU 93 generates data of a winning operation command to be transmitted to the sub control circuit 101 and stores the command data in a communication data storage area provided in the main RAM 95. Also, the winning action command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by a command data transmission process in an interrupt process described later with reference to FIG. By this processing, the sub control circuit 101 can recognize the symbol combination displayed along the winning determination line, and can determine the timing for executing various effects.

  Next, the main CPU 93 performs a bonus end check process (S16). In this process, the main CPU 93 refers to various counters (not shown) for managing the end timing of the bonus game provided in the main RAM 95 and checks whether or not the operation of the bonus game is to be ended. The details of the bonus end check process will be described later with reference to FIG.

  Next, the main CPU 93 performs a bonus operation check process (S17). In this process, the main CPU 93 checks whether or not to start the operation of the bonus game and whether or not to replay. Details of the bonus operation check process will be described later with reference to FIG. 71 described later. When the bonus operation check process ends, the main CPU 93 returns the process to S2, and repeats the processes after S2.

[Power-on processing]
Next, with reference to FIG. 60, the power-on process performed in S1 in the main flow (see FIG. 59) will be described.

  First, the main CPU 93 determines whether the backup is normal (S21). In this determination process, the main CPU 93 determines whether the backup is normal by performing error detection using the checksum value.

  For example, when the power is turned off, the set value of pachislot 1 (the value at which the payout rate is set in one of six predetermined stages) and the checksum value calculated from the set value are stored in a predetermined area of the main RAM 95 as backup data. Stored. In the process of S21, the main CPU 93 reads the setting value and checksum value stored in the main RAM 95. Next, the main CPU 93 compares the checksum value calculated from the read setting value with the checksum value backed up. If the two thumb values match, the main CPU 93 determines that the backup is normal.

  When the main CPU 93 determines that the backup is not normal in S21 (when S21 is NO), the main CPU 93 performs the process of S23 described later. On the other hand, when the main CPU 93 determines that the backup is normal in S21 (when S21 is YES), the main CPU 93 sets the backed-up setting value in a predetermined area in the main RAM 95 (S22). As a result, when the backup is normal, the setting value before the power is turned off is set in the main RAM 95.

  After the processing of S22 or when S21 is NO, the main CPU 93 determines whether or not a setting change switch (not shown) is in an on state (S23). In S23, when the main CPU 93 determines that the setting change switch is not in the ON state (when S23 is NO), the main CPU 93 performs the process of S29 described later.

  On the other hand, when the main CPU 93 determines in S23 that the setting change switch is in the ON state (when S23 is YES), the main CPU 93 performs a predetermined initialization process at the time of setting change (S24). In this process, for example, the main CPU 93 clears the data stored in the internal winning combination storing area and the display winning combination storing area of the main RAM 95 and also clears the set value.

  Next, the main CPU 93 performs initialization command generation / storage processing (S25). In this process, the main CPU 93 generates initialization command data to be transmitted to the sub-control circuit 101 and stores the command data in a communication data storage area provided in the main RAM 95. The initialization command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by command data transmission processing in interrupt processing described later with reference to FIG. The initialization command data includes the presence / absence of setting value change, setting value information and the like.

  After the process of S25, the main CPU 93 executes a set value change process (S26). In this process, the main CPU 93 selects a set value from predetermined 1 to 6 according to the operation result of the reset switch, and sets the set value based on the operation result of the start lever 23 that is operated thereafter. To confirm.

  Next, the main CPU 93 determines whether or not the setting change switch is on (S27).

  In S27, when the main CPU 93 determines that the setting change switch is on (when S27 is YES), the main CPU 93 repeats the process of S27. When the setting change switch is in the on state, it means that the operation of the setting change switch has not been completed. In this case, the main CPU 93 performs the process of S27 until the setting change switch is not in the on state. repeat.

  On the other hand, when the main CPU 93 determines in S27 that the setting change switch is not in the ON state (when S27 is NO), the main CPU 93 performs initialization command generation and storage processing (S28). In this process, the main CPU 93 generates initialization command data to be transmitted to the sub-control circuit 101 and stores the command data in a communication data storage area provided in the main RAM 95. Then, after the process of S28, the main CPU 93 ends the power-on process, and moves the process to S2 of the main flow (see FIG. 59).

  Here, returning to the processing of S23 again, if S23 is NO, the main CPU 93 determines whether the backup is normal (S29).

  When the main CPU 93 determines that the backup is normal in S29 (when S29 is YES), the main CPU 93 restores the set value to the state before the power interruption based on the backup data (S30). After the process of S30, the main CPU 93 ends the power-on process, and moves the process to S2 of the main flow (see FIG. 59).

  On the other hand, when the main CPU 93 determines that the backup is not normal in S29 (when S29 is NO), the main CPU 93 performs power-on error processing (S31). In this process, the main CPU 93 displays an error display or the like indicating that the backup is not normal.

  In this embodiment, an error (backup error) that occurs when backup is not normal cannot be canceled by operating the stop release switch or the reset switch, and a new setting change is performed. Canceled.

[Medal reception / start check processing]
Next, with reference to FIG. 61, the medal acceptance / start check process performed in S3 in the main flow (see FIG. 59) will be described.

  First, the main CPU 93 determines whether or not there is an automatic insertion request (S41). The determination of whether or not there is an automatic input request is performed by determining whether or not the automatic input counter is “0”. That is, the main CPU 93 determines that there is no automatic input request when the automatic input counter is “0”, and determines that there is an automatic input request when the automatic input counter is “1” or more.

  The automatic insertion counter is data for identifying whether or not a display combination related to replay (replay) has been established in the previous unit game. When the display combination related to the re-game is established, the medals for the number of coins inserted in the previous unit game are automatically inserted into the automatic insertion counter.

  When the main CPU 93 determines in S41 that there is no automatic insertion request (when S41 is NO), the main CPU 93 performs the process of S44 described later. On the other hand, when the main CPU 93 determines in S41 that there is an automatic loading request (when S41 is YES), the main CPU 93 performs an automatic loading process (S42). In this process, the value of the automatic insertion counter is copied to the insertion number counter, and then the value of the automatic insertion counter is cleared.

  After the processing of S42, the main CPU 93 performs medal insertion command generation storage processing (S43). In this processing, the main CPU 93 generates medal insertion command data to be transmitted to the sub-control circuit 101 and stores the command data in a communication data storage area provided in the main RAM 95. In addition, the medal insertion command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by command data transmission processing in interrupt processing described later with reference to FIG. The medal insertion command data includes information such as the number of inserted medals.

  After the processing of S43 or when S41 is NO, the main CPU 93 permits medal reception (S44). In this process, the solenoid of the selector 66 (see FIG. 5) is driven, and medals inserted from the medal insertion slot 20 are accepted. The received medals are counted and guided to the hopper device 51.

  Next, the main CPU 93 sets the maximum number of inserted sheets according to the gaming state (S45). Specifically, when the gaming state is a non-MB gaming state (including an inter-flag state), the main CPU 93 sets the maximum value of the inserted number to “3”. Further, when the gaming state is the MB gaming state, the main CPU 93 sets the maximum value of the inserted number to “2”.

  Next, the main CPU 93 performs a MAXBET insertion process (S46). In this process, the main CPU 93 determines validity / invalidity of the MAX bet operation based on the gaming state, the number of inserted medals and the number of credits (stored number). The details of the MAXBET insertion process will be described later with reference to FIG.

  Next, the main CPU 93 determines whether or not the medal acceptance is permitted (S47). When the main CPU 93 determines that the medal acceptance is not permitted in S47 (when S47 is NO), the main CPU 93 performs a process of S52 described later.

  On the other hand, when the main CPU 93 determines that the medal acceptance is permitted in S47 (when S47 is YES), the main CPU 93 performs a medal insertion check process (S48). In this process, the main CPU 93 determines whether or not a medal has been inserted. If a medal has been inserted, the main CPU 93 adds “1” to the value of the inserted number counter.

  Next, the main CPU 93 performs medal insertion command generation storage processing (S49). In this processing, the main CPU 93 generates medal insertion command data to be transmitted to the sub-control circuit 101 and stores the command data in a communication data storage area provided in the main RAM 95. In addition, the medal insertion command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by command data transmission processing in interrupt processing described later with reference to FIG.

  Next, the main CPU 93 determines whether or not a medal can be inserted or credited (S50). When the main CPU 93 determines in S50 that the medal can be inserted or credited (when S50 is YES), the main CPU 93 performs a process of S52 described later. On the other hand, when the main CPU 93 determines in S50 that the medal cannot be inserted or credited (when S50 is NO), the main CPU 93 performs a medal acceptance prohibition process (S51). In this process, the solenoid of the selector 66 (see FIG. 5) is not driven, and the inserted medal is discharged from the medal payout port 32.

  After S51, when S47 is NO or when S50 is YES, the main CPU 93 determines whether or not the inserted number is a game start possible number (S52). Specifically, the main CPU 93 determines whether or not the inserted number is set to “2”.

  In S52, when the main CPU 93 determines that the inserted number is not the game start possible number (when S52 is NO), the main CPU 93 returns the process to S46 and repeats the processes after S46. On the other hand, when the main CPU 93 determines in S52 that the inserted number is the game start possible number (when S52 is YES), the main CPU 93 determines whether or not the start switch 79 is ON (S53). ).

  In S53, when the main CPU 93 determines that the start switch 79 is not on (when S53 is NO), the main CPU 93 returns the process to S46 and repeats the processes after S46. On the other hand, when the main CPU 93 determines in S53 that the start switch 79 is on (when S53 is YES), the main CPU 93 performs a medal acceptance prohibition process (S54).

  After the process of S54, the main CPU 93 ends the medal acceptance / start check process, and moves the process to S4 of the main flow (see FIG. 59).

[MAXBET input processing]
Next, with reference to FIG. 62, the MAXBET insertion process performed in S46 during the medal acceptance / start check process (see FIG. 61) will be described.

  First, the main CPU 93 determines whether or not a MAX bet operation has been performed (S61). Specifically, the main CPU 93 determines whether or not the MAX bet button 21 has been pressed by the player.

  In S61, when the main CPU 93 determines that the MAX bet operation has not been performed (when S61 is NO), the main CPU 93 ends the MAXBET insertion process, and the process is a medal acceptance / start check process (FIG. 61). (Refer to S47).

  On the other hand, when the main CPU 93 determines in S61 that the MAX bet operation has been performed (when S61 is YES), the main CPU 93 determines whether "2MB" or "3MB" is established (winning). It discriminate | determines (S62). That is, the main CPU 93 refers to the carryover combination storage area (see FIG. 26) to determine whether or not the current gaming state is the state between 2 MB flags or the state between 3 MB flags.

  In S62, when the main CPU 93 determines that “2MB” or “3MB” is not established (win) (when S62 is NO), the main CPU 93 performs the process of S65 described later. On the other hand, when the main CPU 93 determines that “2 MB” or “3 MB” is established (winning) in S62 (when S62 is YES), the main CPU 93 determines the number of inserted medals and the number of credits. It is determined whether or not the sum of (the number of stored sheets) is “3” or more (S63).

  In S63, when the main CPU 93 determines that the total of the current number of inserted medals and the number of credits (stored number) is not “3” or more (when S63 is NO), the main CPU 93 performs the MAXBET insertion process. Then, the process proceeds to S47 in the medal acceptance / start check process (see FIG. 61).

  On the other hand, when the main CPU 93 determines in S63 that the total of the current number of inserted medals and the number of credits (stored number) is “3” or more (when S63 is YES), the main CPU 93 “3” is set to the number of sheets (S64). After the process of S64, the main CPU 93 ends the MAXBET insertion process, and moves the process to S47 of the medal acceptance / start check process (see FIG. 61).

  Thus, in this embodiment, even if the player performs a MAX bet operation in the state between 2 MB flags or the state between 3 MB flags, the total number of inserted medals and the number of credits is multiplied by the state between the MB flags. When the number is less than the maximum value “3”, the number of medals is not set. That is, in this case, the MAX bet operation executed by the player is invalidated.

  Here, returning to the process of S62 again, if S62 is NO, the main CPU 93 sets a predetermined number of credited medals (S65). At this time, two or three multiplied sheets are set. After the process of S65, the main CPU 93 ends the MAXBET insertion process, and moves the process to S47 of the medal acceptance / start check process (see FIG. 61).

  As described above, in the MAXBET insertion process of the present embodiment, if the total of the current number of inserted medals and the number of credits (stored number) is less than “3” in the inter-MB flag state, the player's MAX The bet operation is treated as invalid, and this process is executed by the main control circuit 91. That is, in the present embodiment, the main control circuit 91 determines that the sum of the current number of inserted medals and the number of credits (stored number) is less than “3” and the player's MAX bet in the inter-MB flag state. When an operation is detected, it also serves as a means for invalidating the player's MAX betting operation (betting operation invalidating means).

[Internal lottery processing]
Next, with reference to FIG. 63, the internal lottery process performed in S5 in the main flow (see FIG. 59) will be described.

  First, the main CPU 93 refers to the gaming state flag storage area (see FIG. 27) to determine whether or not the gaming state is the MB gaming state (S71).

  In S71, when the main CPU 93 determines that the gaming state is the MB gaming state (when S71 is YES), the main CPU 93 performs a process during MB operation (S72). As shown in the internal lottery tables for the 2MB gaming state and the 3MB gaming state in FIGS. 19 and 20, in the MB gaming state, the “CB combination”, that is, all the small combinations are always won. Therefore, in the MB operating process, the main CPU 93 turns on all the small combination bits in the internal winning combination storing area (see FIG. 24). Then, after the process of S72, the main CPU 93 ends the internal lottery process and moves the process to S6 of the main flow (see FIG. 59).

  On the other hand, when the main CPU 93 determines in S71 that the gaming state is not the MB gaming state (when S71 is NO), the main CPU 93 sets an internal lottery table corresponding to the gaming state (S73). In this process, the main CPU 93 refers to the gaming state flag storage area (see FIG. 27), grasps the current gaming state, and determines the type of the internal lottery table.

  Next, the main CPU 93 obtains a random number value for internal lottery stored in the random value storage area (S74). Then, the main CPU 93 sets “1” as the initial value of the winning number.

  Next, the main CPU 93 obtains a lottery value corresponding to the winning number with reference to the internal lottery table, and subtracts the lottery value from the random number value for internal lottery (S75).

  Next, the main CPU 93 determines whether or not the calculation result in S75 is less than “0” (negative value) (S76). In S76, when the main CPU 51 determines that the calculation result is less than “0” (when S76 is YES), the main CPU 93 performs the process of S79 described later.

  On the other hand, when the main CPU 93 determines in S76 that the calculation result is not less than “0” (when S76 is NO), the main CPU 51 updates the random number value and the winning number (S77). Specifically, the value of the operation result is set as a random value, and the winning number is added by “1”.

  Next, the main CPU 93 determines whether or not all winning numbers have been checked (S78). When the main CPU 93 determines in S78 that all the winning numbers have not been checked (when S78 is NO), the main CPU 93 returns the process to S75 and repeats the processes after S75.

  On the other hand, when it is determined in S78 that the main CPU 93 has checked all the winning numbers (when S78 is YES), the main CPU 93 performs the process of S80 described later.

  Here, the process returns to S76 again, and if S76 is YES (when a digit is generated in the subtraction process), the main CPU 93 selects the small role / replay data pointer corresponding to the winning number where the digit is generated. And a bonus data pointer is acquired (S79).

  After the processing of S79 or when S78 is YES, the main CPU 93 refers to the internal lottery table (see FIGS. 13 to 15 and the like) and acquires the internal winning combination based on the small combination / replay data pointer. (S80). Next, the main CPU 93 stores the acquired internal winning combination in the carryover combination storing area (S81).

  Next, the main CPU 93 determines whether or not the data stored in the carryover combination storage area is “00000000” (S82). In S82, when the main CPU 93 determines that the data stored in the carryover combination storage area is not “00000000” (when S82 is NO), the main CPU 93 performs the process of S87 described later.

  On the other hand, when the main CPU 93 determines in S82 that the data stored in the carryover combination storage area is “00000000” (when S82 is YES), the main CPU 93 selects the internal lottery table (FIG. 13 to FIG. 13). The internal winning combination is acquired based on the bonus data pointer (S83).

  Next, the main CPU 93 stores the acquired internal winning combination in the carryover combination storing area (S84).

  Next, the main CPU 93 refers to the carryover combination storage area and determines whether the MB (“2 MB” or “3 MB”) is being carried over (S85). In S85, when the main CPU 93 determines that the MB is not carried over (when S85 is NO), the main CPU 93 performs the process of S87 described later.

  On the other hand, when the main CPU 93 determines in S85 that the MB is being carried over (when S85 is YES), the main CPU 93 sets the RT gaming state corresponding to the type of the MB being carried over (S86). . Specifically, when “2 MB” is being carried over (between 2 MB flags), the main CPU 93 sets the RT1 gaming state as the RT state (bit 3 of the gaming state flag storage area (see FIG. 27)). ("1" is stored (set)). On the other hand, when “3 MB” is being carried over (between 3 MB flags), the main CPU 93 sets the RT2 gaming state as the RT state (“1” in bit 4 of the gaming state flag storage area (see FIG. 27)). Is stored (set)).

  After the process of S86, or when S82 or S85 is NO, the main CPU 93 updates the internal winning combination storing area based on the internal winning combination stored in the carryover combination storing area (S87). Thereafter, the main CPU 93 ends the internal lottery process, and moves the process to S6 of the main flow (see FIG. 59).

  As described above, the internal lottery process of the present embodiment is executed by the main control circuit 91. That is, in the present embodiment, the main control circuit 91 also serves as means for executing an internal winning combination determining process (internal winning combination determining means). In S86 during the internal lottery process described above, the RT gaming state corresponding to the type of the MB being carried over is shifted. That is, in the present embodiment, the main control circuit 91 also serves as means for performing transition control of the RT gaming state (replay time state control means).

[Reel stop initial setting process]
Next, with reference to FIG. 64, the reel stop initial setting process performed in S6 in the main flow (see FIG. 59) will be described.

  First, the main CPU 93 determines whether or not the gaming state is the MB gaming state (S91).

  In S91, when the main CPU 93 determines that the gaming state is the MB gaming state (when S91 is YES), the main CPU 93 performs a process of S93 described later. On the other hand, in S91, when the main CPU 93 determines that the gaming state is not the MB gaming state (when S91 is NO), the main CPU 93 sets the value of the small role / replay data pointer as the rotation stop number. (S92).

  After the processing of S92 or when S91 is YES, the main CPU 93 refers to the reel stop initial setting table (not shown) and corresponds to the turning stop number based on the acquired turning stop number. Various information is acquired (S93). In this process, the number of the stop table of the reels used during the first stop to the third stop and information necessary for the control change process (when the reels are stopped in a specific order and stopped at a specific position) Information for selecting the stop table again is acquired.

  In the reel stop initial setting table, the correspondence between the number for stopping the rotation and various information such as a drawing priority table selection data and a drawing priority table number described later is defined. The stop table is a table that directly or indirectly defines information on the number of sliding pieces with respect to the pressed position of the stop button. In this stop table, the number of sliding pieces is used so that the reels stop at the stop position intended by the designer so as not to cause any disadvantage to the player and to prevent erroneous winnings by using the prescribed information. Is stipulated.

  Next, the main CPU 93 stores the rotating identifier “0FFH (11111111B)” in the symbol code storage area (see FIG. 30) (S94).

  Next, the main CPU 93 stores “3” in the stop button non-operating counter provided in the main RAM 95 (S95). Thereafter, the main CPU 93 ends the reel stop initial setting process, and moves the process to S7 of the main flow (see FIG. 59). The stop button non-operating counter is a counter for managing the number of stop buttons whose stop operation has not been detected.

[Retrieve priority storage processing]
Next, with reference to FIG. 65, the drawing priority order storing process performed in S11 in the main flow (see FIG. 59) will be described.

  First, the main CPU 93 stores the value of the stop button non-operating counter in the main RAM 95 as the number of searches (S101). Next, the main CPU 93 performs a search target reel determination process (S102). In this process, for example, the main CPU 93 selects a predetermined reel from the rotating reels, and determines the selected reel as a search target reel.

  For example, in the process of S102, when all (three) reels are rotated, the left reel 3L is first determined as the search target reel. Thereafter, various processes up to S111 described later are performed on the left reel 3L. When the process returns to S102 again, next, the middle reel 3C is determined as a search target reel. Then, various processes up to S111 described later are performed on the middle reel 3C, and when returning to S102 again, the right reel 3R is next determined as a search target reel.

  Next, the main CPU 93 performs a pull-in priority table selection process (S103). In this process, the pull-in priority table is selected based on the internal winning combination (data pointer) and the operation stop button. Details of the pull-in priority table selection process will be described later with reference to FIG. 66 described later.

  Next, the main CPU 93 sets “0” as the position data of the search symbol and sets “20” as the number of symbol checks (S104). Then, the main CPU 93 performs symbol code storage processing (S105). In this process, the symbol code corresponding to the position data of the current search symbol located on the effective line of the search target reel is stored in the symbol code storage area. At this time, symbol codes for the number of valid lines are stored. Details of the symbol code storage process will be described later with reference to FIG. 67 described later.

  Next, the main CPU 93 updates the display combination storing area (see FIG. 25) based on the symbol code acquired in S105 and the data in the symbol code storing area (see FIG. 30) (S106). At this time, regardless of whether the internal winning combination is won or not, a combination of symbols that can be displayed (a displayable combination) is stored in the display combination storing area based on the stopped symbol.

  In this embodiment, the symbol code storage area information (symbol code and displayable role corresponding thereto) is updated for each reel to be stopped. At this time, the displayable combination may be obtained from data prepared in advance that defines the correspondence between the stopped reel symbol and the corresponding displayable combination, or the stopped reel symbol. And the symbol combination table (see FIGS. 10 to 12) may be acquired by collating. When the former method is used, the correspondence relationship between the symbol and the displayable combination changes for each reel.

  Next, the main CPU 93 performs a pull-in priority data acquisition process (S107). In this process, the main CPU 93 draws in priority for the combination whose bit is “1” in the display combination storage area (see FIG. 25) and whose bit is “1” in the internal winning combination storage area. With reference to a ranking table (not shown), pull-in priority data is acquired.

  The pull-in priority table is a table that defines the correspondence between the pull-in priority data for each storage area type and the predetermined priority in each pull-in priority table number. The pull-in priority order table is used for searching whether there is a more appropriate number of sliding pieces in addition to the number of sliding pieces obtained based on the stop table. The priority order is data that defines the order of priority stop display (drawn) among the types of symbol combinations related to winning. Normally, the priority order is set in the order of replay, small role and bonus from the highest.

  If the symbol position is an erroneous winning prize when stopped, “use prohibited (000H)” is acquired as the drawing priority data in S107. Further, if the symbol position is not internally won but does not result in an erroneous winning even if it is stopped, “can be stopped (001H)” is acquired as the drawing priority data in S107.

  Next, the main CPU 93 stores the acquired drawing priority data in a drawing priority data storage area (not shown) corresponding to the search target reel (S108). At this time, the pull-in priority data is stored in the pull-in priority data storage area so that each priority value corresponds to a bit in the storage area.

  The pull-in priority data storage area is provided with a priority data storage area for each reel type. Each drawing priority data storage area stores drawing priority data determined in accordance with each symbol position “0” to “19” of the corresponding reel. In the present embodiment, by referring to this pull-in priority data storage area, it is searched whether there is a more appropriate number of sliding symbols in addition to the number of sliding symbols determined based on the stop table.

  The contents of the priority order pull-in data stored in the pull-in priority order data storage area differ depending on the type of the pull-in priority order table number in the pull-in priority order table referenced when determining the pull-in priority order data. The pull-in priority data indicates that the higher the value, the higher the priority.

  By referring to the drawing priority data, it is possible to relatively evaluate the priority among the symbols arranged on the peripheral surface of the reel. That is, the symbol for which the largest value is determined as the pull-in priority data becomes the symbol with the highest priority. Therefore, it can be said that the pull-in priority data indicates the rank between the symbols arranged on the peripheral surface of the reel. When there are a plurality of symbols having the same value of the pull-in priority data, one symbol is determined according to the priority order defined by the priority order table.

  Next, the main CPU 93 adds “1” to the position data of the search symbol and subtracts “1” from the number of symbol checks (S109). Next, the main CPU 93 determines whether or not the number of symbol checks is “0” (S110).

  In S110, when the main CPU 93 determines that the number of symbol checks is not “0” (when S110 is NO), the main CPU 93 returns the process to S105 and repeats the processes after S105. On the other hand, in S110, when the main CPU 93 determines that the number of symbol checks is “0” (in the case where S110 is YES), the main CPU 93 determines whether or not the search has been performed for the number of searches (S111).

  In S111, when it is determined that the main CPU 93 has not searched for the number of times of search (when S111 is NO), the main CPU 93 returns the process to S102 and repeats the processes after S102. On the other hand, when it is determined in S111 that the main CPU 93 has searched as many times as the number of searches (when S111 is YES), the main CPU 93 ends the pull-in priority storage process, and the process proceeds to S12 of the main flow (see FIG. 59). Move to.

[Pull-in priority table selection processing]
Next, with reference to FIG. 66, the pull-in priority table selecting process performed in S103 in the pull-in priority storing process flowchart (see FIG. 65) will be described.

  First, the main CPU 93 determines whether or not the pull-in priority table selection data is set (S121).

  In S121, when the main CPU 93 determines that the pull-in priority table selection data is set (in the case where S121 is YES), the main CPU 93 stores the pressing order storage area (see FIG. 29) and the operation stop button storage area. Referring to (see FIG. 28), the drawing priority table number corresponding to the drawing priority table selection data is set from the drawing priority table selection table (not shown) (S122). After the process of S122, the main CPU 93 ends the pull-in priority order table selection process, and moves the process to S104 in the pull-in priority order storing process (see FIG. 65).

  The pull-in priority table selection table defines the correspondence between the pull-in priority selection number and the stop button pressing order, and the pull-in priority table number in each combination. The pull-in priority table number is data for acquiring information related to the priority order of display combinations defined in the pull-in priority table (not shown).

  On the other hand, when the main CPU 93 determines that the pull-in priority table selection data is not set in S121 (when S121 is NO), the main CPU 93 displays the pull-in priority table corresponding to the pull-in priority table number. Set (S123). After the process of S123, the main CPU 93 ends the pull-in priority table selection process, and moves the process to S104 in the pull-in priority storage process (see FIG. 65).

[Design code storage processing]
Next, with reference to FIG. 67, the symbol code storing process performed in S105 in the flowchart of the drawing priority order storing process (see FIG. 65) will be described.

  First, the main CPU 93 sets valid line data (S131). In the present embodiment, the effective line is provided with one line (center line) as described above. Next, the main CPU 93 sets check symbol position data for the search target reel based on the search symbol position and the effective line data (S132). For example, when the search target reel is the left reel 3L, since it is desired to acquire information on the middle stage of the search target reel, the check symbol position data indicating the middle stage is set.

  Next, the main CPU 93 acquires a symbol code of the symbol position data for checking (S133). Then, after storing the acquired symbol code in the symbol code storage area, the main CPU 93 ends the symbol code storage processing, and moves the processing to S106 of the pull-in priority storage processing (see FIG. 65).

[Reel stop control process]
Next, the reel stop control process performed in S12 in the main flow (see FIG. 59) will be described with reference to FIG.

  First, the main CPU 93 determines whether or not a valid stop button has been pressed (S141). In S141, when the main CPU 93 determines that the effective stop button is not pressed (when S141 is NO), the main CPU 93 repeats the process of S141 and the effective stop button pressing operation is executed. Wait until.

  On the other hand, when the main CPU 93 determines in S141 that a valid stop button has been pressed (in the case where S141 is YES), the main CPU 93 stores the pressing order storage area (see FIG. 29) and the operation stop button storage area (see FIG. 28) is updated (S142). Next, the main CPU 93 subtracts “1” from the value of the stop button non-operating counter (S143).

  Next, the main CPU 93 determines a search target reel from the operation stop button (S144). Then, the main CPU 93 stores the stop start position in the main RAM 95 based on the symbol counter (S145).

  Next, the main CPU 93 performs a sliding piece number determination process (S146). In this process, the main CPU 93 acquires the number of pieces of sliding piece determination based on the type of stop button at the time of the first stop, various stop tables, and the like.

  Next, the main CPU 93 performs a priority pull-in control process (S147). In this process, the drawing priority order data is compared according to each symbol position within the range of the maximum number of sliding symbols “4” or “1” from the stop start position, and the most appropriate number of sliding symbols is determined. Details of the priority pull-in control process will be described later with reference to FIG.

  Next, the main CPU 93 performs reel stop command generation / storage processing (S148). In this process, the main CPU 93 generates reel stop command data to be transmitted to the sub control circuit 101 and stores the command data in a communication data storage area provided in the main RAM 95. Further, the reel stop command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by a command data transmission process in an interrupt process described later with reference to FIG. The reel stop command transmitted in this process includes information such as the type of reel to be stopped, the number of sliding pieces, and the ON / OFF edge of the stop switch.

  Next, the main CPU 93 determines a planned stop position based on the stop start position and the number of sliding piece determination data acquired in S146, and stores the determined planned stop position in the main RAM 95 (S149). In this process, the main CPU 93 adds the number of sliding frames to the stop start position, and sets the result as the planned stop position.

  Next, the main CPU 93 sets the planned stop position determined in S149 as a search symbol position (S150). Next, the main CPU 93 performs the symbol code acquisition process described with reference to FIG. 67 (S151). Thereafter, the main CPU 93 updates the symbol code storage area (see FIG. 30) using the acquired symbol code (S152).

  Next, the main CPU 93 performs control change processing (S153). Next, the main CPU 93 determines whether or not the stop button non-operation counter is “0” (S154). In S154, when the main CPU 93 determines that the inoperative counter is not “0” (when S154 is NO), the main CPU 93 performs the pull-in priority storage process described with reference to FIG. 65 (S155). ). Thereafter, the main CPU 93 returns the process to S141 and repeats the processes after S141.

  On the other hand, when the main CPU 93 determines that the inoperative counter is “0” in S154 (when S154 is YES), the main CPU 93 ends the reel stop control process, and the process proceeds to the main flow (FIG. 59). (Refer to S13).

  As described above, the reel stop control process of the present embodiment is executed by the main control circuit 91. That is, in the present embodiment, the main control circuit 91 also serves as means (stop control means) for executing stop control of reel rotation (design variation display).

[Priority pull-in control processing]
Next, with reference to FIG. 69, the priority pull-in control process performed in S147 in the flowchart of the reel stop control process (see FIG. 68) will be described.

  First, the main CPU 93 sets a pull-in priority data storage area corresponding to the operation stop button (S161). Next, the main CPU 93 acquires data of the stop start position (S162).

  Next, the main CPU 93 determines whether the MB (“2 MB” or “3 MB”) is operating (S163). In S163, when the main CPU 93 determines that the MB is not operating (when S163 is NO), the main CPU 93 performs a process of S165 described later. On the other hand, when the main CPU 93 determines that the MB is operating in S163 (when S163 is YES), the main CPU 93 determines whether or not the search target reel is the left reel 3L (S164). .

  In S164, when the main CPU 93 determines that the search target reel is not the left reel 3L (when S164 is NO), the main CPU 93 performs a process of S165 described later. On the other hand, when the main CPU 93 determines in S164 that the search target reel is the left reel 3L (when S164 is YES), the main CPU 93 performs the process of S167 described later.

  When S163 or S164 is NO (when the maximum number of sliding symbols is 4 and reel stop control is performed), the main CPU 93 sets a priority table corresponding to the number of sliding symbols determination data (S165).

  Note that the priority order table includes the sliding piece number determination data obtained based on the stop table and a range of numerical values predetermined as the number of sliding pieces (“0” to “4” when the maximum number of sliding pieces is four). )) In order of priority (hereinafter referred to as "priority order"). That is, in the priority order table, the order of the number of sliding frames to be preferentially applied is determined for each piece of sliding frame number determination data. In this embodiment, each numerical value is searched (checked) sequentially from the lower priority order “5” of the priority order table, and the number corresponding to the priority order “1” is preferentially applied as the number of sliding frames. So that In the process of S165, for example, when the number of pieces of sliding piece determination data is “4”, the priority order data defined in the address in the priority order table corresponding to the number of pieces of sliding piece determination data “4” is stored. Set.

  After the process of S165, the main CPU 93 sets “5” as the initial value of the priority order and the number of checks (S166). By this processing, the priority order is checked (searched) five times within the range of 0 frame to 4 frames. Then, after the process of S166, the main CPU 93 performs a process of S169 described later.

  When S164 is YES (when the maximum number of sliding symbols is one and reel stop control is performed), the main CPU 93 sets the priority table for the MB gaming state corresponding to the number of sliding symbols determination data. (S167). Next, the main CPU 93 sets “3” as the initial value of the priority order and sets “2” as the number of checks (S168). By this processing, the priority order is checked (searched) twice in the range of 0 frame to 1 frame. Then, after the process of S168, the main CPU 93 performs a process of S169 described later.

  After the processing of S166 or S168, the main CPU 93 sets the sliding piece number determination data as the number of sliding pieces (S169).

  Next, the main CPU 93 extracts a stop search position based on the stop start position and the priority order (S170). Next, the main CPU 93 acquires pull-in priority order data of the stop search position (S171).

  Next, the main CPU 93 determines whether or not the value of the pull-in priority data acquired in S171 is greater than or equal to the value of the pull-in priority data acquired previously (S172). In S172, when the main CPU 93 determines that the pull-in priority data acquired in S171 is not equal to or higher than the pull-in priority data acquired previously (when S172 is NO), the main CPU 93 performs the process of S174 described later. .

  On the other hand, when the main CPU 93 determines in S172 that the pull-in priority data acquired in S171 is greater than or equal to the pull-in priority data acquired previously (when S172 is YES), the main CPU 93 determines the number of sliding frames. Update (S173).

  After the process of S173 or when S172 is NO, the main CPU 93 subtracts “1” from the priority order value and the number of checks (S174).

  Next, the main CPU 93 determines whether or not the number of checks is “0” (S175). In S175, when the main CPU 93 determines that the number of checks is not “0” (when S175 is NO), the main CPU 93 returns the process to S170 and repeats the processes after S170.

  On the other hand, when the main CPU 93 determines that the number of checks is “0” in S175 (when S175 is YES), the main CPU 93 sets the finally updated number of sliding symbols (S176). After the process of S176, the main CPU 93 ends the priority pull-in control process, and moves the process to S148 of the reel stop control process (see FIG. 68).

[Bonus end check process]
Next, with reference to FIG. 70, the bonus end check process performed in S16 in the main flow (see FIG. 59) will be described.

  First, the main CPU 93 determines whether or not the MB (“2 MB” or “3 MB”) is in operation with reference to the gaming state flag storage area (see FIG. 27) (S181). In S181, when the main CPU 93 determines that the MB is not operating (when S181 is NO), the main CPU 93 ends the bonus end check process, and the process proceeds to S17 in the main flow (see FIG. 59). Move.

  On the other hand, when the main CPU 93 determines that the MB is operating in S181 (when S181 is YES), the main CPU 93 performs CB termination processing (S182). In this processing, processing such as turning off a game state flag (not shown) corresponding to “CB”, clearing the winning possible number counter and the possible gaming number counter, and the like are performed. Next, the main CPU 93 updates the value of the bonus end number counter (S183).

  Next, the main CPU 93 determines whether or not the value of the bonus end number counter is less than “0” (S184). In S184, when the main CPU 93 determines that the value of the bonus end number counter is not less than “0” (when S184 is NO), the main CPU 93 ends the bonus end check process, and the process proceeds to the main flow (FIG. 59)).

  On the other hand, when the main CPU 93 determines in S184 that the value of the bonus end number counter is less than “0” (when S184 is YES), the main CPU 93 performs MB end processing (S185). In this process, the main CPU 93 clears the bonus end number counter and sets the gaming state flag (2MB gaming state flag or 3MB gaming state flag) corresponding to the active MB ("2MB" or "3MB") to the off state. To do. Note that the value of the bonus end number counter is less than “0” means that the number of medals paid out exceeds 2 during the 2 MB gaming state, or the number of medals paid out exceeds 30 during the 3 MB gaming state. Means when

  Next, the main CPU 93 performs a bonus end command generation / storage process (S186). In this process, the main CPU 93 generates bonus end command data to be transmitted to the sub control circuit 101 and stores the command data in a communication data storage area provided in the main RAM 95. Also, the bonus end command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by command data transmission processing in the interrupt processing described later with reference to FIG. The bonus end command includes information indicating that the bonus game has ended.

  After the process of S186, the main CPU 93 ends the bonus end check process, and moves the process to S17 in the main flow (see FIG. 59).

[Bonus activation check process]
Next, with reference to FIG. 71, the bonus operation check process performed in S17 in the main flow (see FIG. 59) will be described.

  First, the main CPU 93 determines whether the MB (“2 MB” or “3 MB”) is operating (S191). In S191, when the main CPU 93 determines that the MB is not operating (when S191 is NO), the main CPU 93 performs the process of S193 described later.

  On the other hand, when the main CPU 93 determines that the MB is operating in S191 (when S191 is YES), the main CPU 93 performs CB operation processing (S192). After the process of S192, the main CPU 93 ends the bonus operation check process and moves the process to S2 of the main flow (see FIG. 59).

  When S191 is NO, the main CPU 93 determines whether the MB (“2 MB” or “3 MB”) is a winning prize (S193). In S193, when the main CPU 93 determines that the MB is not a prize (when S193 is NO), the main CPU 93 performs the process of S197 described later.

  On the other hand, when the main CPU 93 determines that the MB is a winning in S193 (when S193 is YES), the main CPU 93 performs an MB operation process corresponding to the type of the winning MB (S194). In this process, the main CPU 93 sets “1” to the corresponding bit in the game state flag storage area (see FIG. 27), and sets the value of the bonus end number counter to a predetermined value (“30” or “2”). Set to. Further, in this process, the main CPU 93 also performs the CB operation process of S192.

  Next, the main CPU 93 clears the value of the carryover combination storage area (S195). Next, the main CPU 93 performs a bonus start command generation / storage process (S196). In this process, the main CPU 93 generates bonus start command data to be transmitted to the sub-control circuit 101 and stores the command data in a communication data storage area provided in the main RAM 95. The bonus start command stored in the communication data storage area is transmitted from the main control circuit 91 to the sub control circuit 101 by a command data transmission process in an interrupt process described later with reference to FIG. The bonus start command includes information indicating that the bonus game has started.

  After the process of S196, the main CPU 93 ends the bonus operation check process and moves the process to S2 of the main flow (see FIG. 59).

  When S193 is NO, the main CPU 93 determines whether or not a winning combination related to replay (replay) has been won (S197). In S197, when the main CPU 93 determines that the winning combination related to replay has not been won (when S197 is NO), the main CPU 93 ends the bonus operation check process, and the process proceeds to the main flow (see FIG. 59). Move to S2.

  On the other hand, when the main CPU 93 determines in S197 that the winning combination relating to replay has been won (when S197 is YES), the main CPU 93 requests automatic insertion of medals (S198). That is, the main CPU 93 copies the insertion number counter to the automatic insertion number counter. After the process of S198, the main CPU 93 ends the bonus operation check process and moves the process to S2 of the main flow (see FIG. 59).

[Interrupt processing under the control of the main CPU (1.1172 msec)]
Next, with reference to FIG. 72, an interrupt process by the control of the main CPU 93 will be described.

  First, the main CPU 93 saves the register (S201). Next, the main CPU 93 performs an input port check process (S202). In this process, signals input from various switches such as a stop switch are checked.

  Next, the main CPU 93 performs timer update processing (S203). In this process, the main CPU 93 performs a process of subtracting the value of the lock timer for each interrupt process, for example. When the value of the lock timer becomes 0, the main CPU 93 clears the game lock flag.

  Next, the main CPU 93 performs a reel control process (S204). In this process, the main CPU 51 starts rotation of the left reel 3L, the middle reel 3C, and the right reel 3R when the start of rotation of all the reels is requested, and thereafter, each reel rotates at a constant speed. Three stepping motors are driven and controlled. When the number of sliding symbols is determined, the main CPU 93 updates the symbol counter of the corresponding reel by the number of sliding symbols. Then, the main CPU 93 waits until the updated symbol counter matches the value corresponding to the planned stop position (the symbol at the planned stop position reaches the area on the effective line of the reel display window 4). The corresponding stepping motor is driven and controlled so that the reel rotation is decelerated and stopped. In the present embodiment, in the process of S204, not only the above-described normal acceleration process, constant speed process, and stop process, but also a reel effect pattern is set when the reel effect pattern is set during the acceleration process. Reel effect (reel action) and lock control processing are also performed.

  Next, the main CPU 93 performs command data transmission processing (S205). In this process, the main CPU 93 transmits various command data stored in the communication data storage area to the sub-control circuit 101.

  Next, the main CPU 93 performs a lamp and 7-segment driving process (S206). In this process, the main CPU 93 drives and controls the 7-segment display 24 to display the number of payouts and the number of credits. Next, the main CPU 93 performs a register restoration process (S207). After that, the main CPU 93 ends the interrupt process.

<Description of operation of sub-control circuit>
Next, the contents of various processes (tasks) executed by the sub CPU 102 of the sub control circuit 101 using a program will be described with reference to FIGS. 73 to 124. Various tables necessary for various processes of the sub CPU 102 described below are stored in the ROM cartridge substrate 86, and various control flags, various control counters, various storage areas, and the like are provided in the sub RAM 103.

[Sub CPU power-on processing]
First, the power-on process of the sub CPU 102 will be described with reference to FIG. The request process in the power-on process shown in FIG. 73 is a process of making a request for starting various tasks necessary for the function of the pachislot 1 to the OS.

  First, the sub CPU 102 performs an initialization process (S211). In this processing, the sub CPU 102 executes processing such as initialization of the CPU and internal devices and initialization of peripheral ICs.

  Next, the sub CPU 102 issues a lamp control task (see FIG. 74 described later) activation request as a subtask activation request (S212). Next, the sub CPU 102 makes an activation request for a sound control task (see FIG. 75 described later) (S213). Then, the sub CPU 102 makes an activation request for the mother task (see FIG. 76 described later) (S214).

[Ramp control task]
Next, a lamp control task performed by the sub CPU 102 will be described with reference to FIG. In the above-described power-on process of the sub CPU 102 (see FIG. 73), when a lamp control task request is generated from the OS in response to a lamp control task activation request from the sub CPU 102, the lamp control task is executed according to the procedure described below. Executed.

  First, the sub CPU 102 performs a timer interrupt initialization process (S221). Next, the sub CPU 102 performs initialization processing of lamp control related data (S222).

  Next, the sub CPU 102 performs a timer interruption waiting process (S223). Next, the sub CPU 102 performs a sound control task (see FIG. 75 described later) execution process (S224).

  Next, the sub CPU 102 performs lamp data analysis processing (S225). Next, the sub CPU 102 performs a lamp effect execution process (S226). Then, after the processing of S226, the sub CPU 102 returns the processing to S223 and repeats the processing after S223.

Sound control task
Next, a sound control task performed by the sub CPU 102 will be described with reference to FIG. In the above-described power-on process of the sub CPU 102 (see FIG. 73), when a sound control task request is generated from the OS in response to a sound control task activation request from the sub CPU 102, the sound control task is executed according to the procedure described below. Executed.

  First, the sub CPU 102 performs an initialization process of sound control related data (S231). Next, the sub CPU 102 performs a lamp control task (see FIG. 74) execution process (S232).

  Next, the sub CPU 102 performs sound data analysis processing (S233). Next, the sub CPU 102 performs a sound effect execution process (S234). Then, after the process of S234, the sub CPU 102 returns the process to S232 and repeats the processes after S232.

[Mother task]
Next, a mother task performed by the sub CPU 102 will be described with reference to FIG. In the above-described power-on process of the sub CPU 102 (see FIG. 73), when a mother task request is generated from the OS in response to a mother task activation request from the sub CPU 102, the mother task is executed according to the procedure described below. .

  First, the sub CPU 102 makes an activation request for a main task (see FIG. 77 described later) (S241). Next, the sub CPU 102 makes an activation request for the main board communication task (see FIG. 78 described later) (S242). Then, the sub CPU 102 makes an activation request for an animation task (see FIG. 79 described later) (S243).

[Main Task]
Next, the main task performed by the sub CPU 102 will be described with reference to FIG. In the mother task (see FIG. 76) of the sub CPU 102 described above, when a main task request is generated from the OS in response to a main task activation request from the sub CPU 102, the main task is executed according to the procedure described below.

  First, the sub CPU 102 performs a VSYNC (Vertical Synchronizing Signal) interrupt initialization process (S251). Next, the sub CPU 102 performs a VSYNC interrupt waiting process (S252).

  Next, the sub CPU 102 performs a drawing process (S253). Then, after the processing of S253, the sub CPU 102 returns the processing to S252 and repeats the processing after S252.

[Main board communication task]
Next, the main board communication task performed by the sub CPU 102 will be described with reference to FIG. In the mother task (see FIG. 76) of the sub CPU 102 described above, when a main board communication task request is generated from the OS in response to a main board communication task activation request by the sub CPU 102, main board communication is performed according to the procedure described below. The task is executed.

  First, the sub CPU 102 performs communication message queue initialization processing (S261). Next, the sub CPU 102 performs reception command check processing (S262). In this process, the sub CPU 102 extracts the type of received command and the like.

  Next, the sub CPU 102 determines whether or not a command different from the previous one has been received (S263).

  In S263, when it is determined that the sub CPU 102 has not received a command different from the previous command (when S263 is NO), the sub CPU 102 returns the process to S262 and repeats the processes after S262. On the other hand, when it is determined in S263 that the sub CPU 102 has received a command different from the previous one (when S263 is YES), the sub CPU 102 generates various game information based on the received command, and generates the generated various The game information is stored in the sub RAM 103 (S264).

  Next, the sub CPU 102 performs command analysis processing (S265). The details of the command analysis process will be described later with reference to FIG. Then, after the process of S265, the sub CPU 102 returns the process to S262 and repeats the processes after S262.

[Anime task]
Next, an animation task performed by the sub CPU 102 will be described with reference to FIG. In the above-described mother task of the sub CPU 102 (see FIG. 76), when an animation task request is generated from the OS in response to the animation task activation request from the sub CPU 102, the animation task is executed according to the procedure described below.

  First, the sub CPU 102 checks the change of the current game information generated by the main board communication task from the previous game information (S271). Next, the sub CPU 102 performs object control processing (S272).

  Next, the sub CPU 102 performs animation task management processing (S273). Then, after the processing of S273, the sub CPU 102 returns the processing to S271 and repeats the processing after S271.

[Command analysis processing]
Next, the command analysis processing performed in S265 in the main board communication task flowchart (see FIG. 78) will be described with reference to FIG.

  First, the sub CPU 102 performs effect content determination processing (S281). In this processing, the sub CPU 102 determines the production content according to the received data. Details of the effect content determination process will be described later with reference to FIG.

  Next, the sub CPU 102 performs lamp data determination processing (S282). In this process, the sub CPU 102 determines predetermined lamp data in accordance with the content of the effect determined in S281. Next, the sub CPU 102 performs sound data determination processing (S283). In this process, the sub CPU 102 determines predetermined sound data according to the effect content determined in S281.

  Next, the sub CPU 102 registers the determined various data (S284). Then, after the processing of S284, the sub CPU 102 ends the command analysis processing, and moves the processing to S262 of the main board communication task (see FIG. 78).

[Production content decision processing]
Next, with reference to FIG. 81, the effect content determination process performed in S281 in the flowchart of the command analysis process (see FIG. 80) will be described. The effect data determined (registered) in the following process is data specifying animation data, sound data, and lamp data. Therefore, when effect data is registered in the following processes, corresponding animation data and the like are determined, and effects such as video display are executed.

  First, the sub CPU 102 determines whether or not the initialization command is received (S291).

  When the sub CPU 102 determines in S291 that the initialization command is being received (S291 is YES), the sub CPU 102 performs initialization command reception processing (S292). In this process, the sub CPU 102 determines (registers) the effect data at the time of the initialization process, based on information such as the presence / absence of a change in the set value and the set value included in the initialization command. Details of the initialization command reception process will be described later with reference to FIG. Then, after the process of S292, the sub CPU 102 ends the effect content determination process and moves the process to S282 of the command analysis process (see FIG. 80).

  On the other hand, when the sub CPU 102 determines in S291 that the initialization command is not received (when S291 is NO), the sub CPU 102 determines whether or not the medal insertion command is received (S293).

  When the sub CPU 102 determines in S293 that the medal insertion command is being received (S293 is YES), the sub CPU 102 performs a medal insertion command receiving process (S294). In this process, the sub CPU 102 determines effect data at the time of medal insertion (betting) based on information such as presence / absence of medal insertion, value of the number-of-insertion counter, value of credit counter, etc. included in the medal insertion command (sign up. After the process of S294, the sub CPU 102 ends the effect content determination process, and moves the process to S282 of the command analysis process (see FIG. 80).

  On the other hand, when the sub CPU 102 determines in S293 that the medal insertion command is not received (S293 is NO), the sub CPU 102 determines whether or not it is a start command reception (S295).

  When the sub CPU 102 determines in S295 that the start command is being received (when S295 is YES), the sub CPU 102 performs a start command receiving process (S296). In this processing, the sub CPU 102 includes information such as the type of gaming state flag, the value of the bonus end number counter, the type of internal winning combination, the type of flag related to the lock effect, the value of the effect timer, etc., included in the start command. Based on this, the production data at the start (start) of the game is determined (registered). The details of the start command reception process will be described later with reference to FIG. After the process of S296, the sub CPU 102 ends the effect content determination process, and moves the process to S282 of the command analysis process (see FIG. 80).

  On the other hand, when the sub CPU 102 determines in S295 that the start command is not received (when S295 is NO), the sub CPU 102 determines whether or not the reel rotation start command is received (S297).

  When the sub CPU 102 determines in S297 that the reel rotation start command is being received (when S297 is YES), the sub CPU 102 performs a reel rotation start command reception process (S298). In this process, the sub CPU 102 determines (registers) effect data at the start of reel rotation based on the reel rotation start command. After the process of S298, the sub CPU 102 ends the effect content determination process, and moves the process to S282 of the command analysis process (see FIG. 80).

  On the other hand, when the sub CPU 102 determines in S297 that the reel rotation start command is not received (when S297 is NO), the sub CPU 102 determines whether or not it is a reel stop command reception (S299).

  When the sub CPU 102 determines in S299 that the reel stop command is being received (when S299 is YES), the sub CPU 102 performs a reel stop command receiving process (S300). In this process, the sub CPU 102, based on information such as the type of the stop reel (operation stop button), the stop start position, the number of sliding pieces, the effect number, etc. included in the reel stop command, produces the effect data at the time of reel stop. Determine (register). Then, after the process of S300, the sub CPU 102 ends the effect content determination process and moves the process to S282 of the command analysis process (see FIG. 80).

  On the other hand, when it is determined in S299 that the sub CPU 102 is not receiving a reel stop command (when S299 is NO), the sub CPU 102 determines whether or not it is receiving a winning action command (S301).

  When the sub CPU 102 determines in S301 that it is time to receive a winning action command (when S301 is YES), the sub CPU 102 performs processing for receiving a winning action command (S302). In this process, the sub CPU 102 determines (registers) effect data at the time of winning operation based on information included in the winning operation command, such as the type of display combination, a flag related to a lock effect, the number of medals paid out, and the like. . Details of the winning operation command reception process will be described later with reference to FIG. Then, after the process of S302, the sub CPU 102 ends the effect content determination process, and moves the process to S282 of the command analysis process (see FIG. 80).

  On the other hand, when it is determined in S301 that the sub CPU 102 is not receiving a winning action command (NO in S301), the sub CPU 102 determines whether or not it is a bonus start command reception (S303).

  When the sub CPU 102 determines in S303 that the bonus start command is being received (when S303 is YES), the sub CPU 102 performs a bonus start command receiving process (S304). In this process, the sub CPU 102 determines (registers) effect data at the start of the bonus based on the bonus start command. After the process of S304, the sub CPU 102 ends the effect content determination process, and moves the process to S282 of the command analysis process (see FIG. 80).

  On the other hand, when it is determined in S303 that the sub CPU 102 is not receiving a bonus start command (NO in S303), the sub CPU 102 determines whether it is receiving a bonus end command (S305).

  When the sub CPU 102 determines in S305 that the bonus end command is being received (S305 is YES), the sub CPU 102 performs a bonus end command receiving process (S306). In this process, the sub CPU 102 determines (registers) effect data at the end of the bonus based on the bonus end command. After the process of S306, the sub CPU 102 ends the effect content determination process, and moves the process to S282 of the command analysis process (see FIG. 80).

  On the other hand, when it is determined in S305 that the sub CPU 102 is not receiving a bonus end command (NO in S305), the sub CPU 102 determines whether or not it is an input state command reception (S307).

  When the sub CPU 102 determines in S307 that the input state command is not received (when S307 is NO), the sub CPU 102 ends the effect content determination process, and the process is the command analysis process (see FIG. 80) S282. Move to.

  On the other hand, when it is determined in S307 that the sub CPU 102 is receiving an input state command (YES in S307), the sub CPU 102 performs an input state command receiving process (S308). In this process, the sub CPU 102 determines (registers) effect data at the time of receiving the input state command based on, for example, information on the on-edge state / off-edge state of each operation unit included in the input state command. Then, after the process of S308, the sub CPU 102 ends the effect content determination process, and moves the process to S282 of the command analysis process (see FIG. 80).

[Process when receiving initialization command]
Next, with reference to FIG. 82, the initialization command reception process performed in S292 in the flowchart of the effect content determination process (see FIG. 81) will be described.

  In the present embodiment, the sub CPU 102 causes the sub game state (hereinafter referred to as “game state (previous)”) in the previous unit game (game) and the sub game state (hereinafter referred to as “game state”) in the current unit game. (Currently) ”and the sub game state in the next unit game (hereinafter referred to as“ game state (next time) ”).

  Hereinafter, the case where the sub game state is the normal state is referred to as “general medium”, and the pseudo BB state when the pseudo BB game is started in the normal state is referred to as “general medium BB”. The case where the sub game state is the transition effect state is referred to as “race in progress”, and the case where the sub game state is the AT preparation state is referred to as “AT preparation”. A case where the sub gaming state is the AT state is referred to as “AT in progress”, and a pseudo BB state when the pseudo BB game is started in the AT state is referred to as “AT in progress BB”. Furthermore, in the present embodiment, a case where the sub gaming state is the W chance state is referred to as “W chance state”, and a case where the sub gaming state is the additional challenge state is referred to as “addition challenge”.

  First, the sub CPU 102 initializes the appearance-related variables (S311). In this process, the sub CPU 102 sets “general” in the gaming state (previous), gaming state (current), and gaming state (next time). In this process, the sub CPU 102 sets “180” to the value of the period counter.

  Next, the sub CPU 102 performs a race information lottery process (S312). Details of the race information lottery process will be described later with reference to FIG. 83 described later. After the process of S312, the sub CPU 102 ends the initialization command reception process and also ends the effect content determination process (see FIG. 81).

[Race information lottery processing]
Next, with reference to FIG. 83, the race information lottery process performed in S312 in the flowchart (see FIG. 82) of the initialization command reception process will be described. In this race information lottery process, various types of information related to the character's race effect performed in the transition effect game are determined by lottery.

  First, the sub CPU 102 performs a race starter MAP lottery process with reference to the race starter MAP lottery table (see FIG. 32) (S321). Next, the sub CPU 102 sets the lottery result value (MAP number) of the race starter MAP lottery process to “race starter MAP” (S322).

  Next, the sub CPU 102 refers to the race information MAP data table (see FIG. 33), and based on the value of the “race starter MAP” (race information MAP number), the winning person lottery table corresponding to the race information MAP data. The type (target tables A to J) (see FIG. 34) is determined (S323). In this process, based on the set race starter MAP (race information MAP), the “target table” (target table) corresponding to the race information MAP data for the first four races (first to fifth races) Any one of A to J) is determined.

  Next, the sub CPU 102 sets the “target table” for the determined first to fifth races (S324). Then, the sub CPU 102 performs lottery processing for the race victory target (candidate) person from the first race to the fifth race based on the “target table” from the first race to the fifth race set in S324 ( S325).

  Next, the sub CPU 102 sets the lottery result of the victory subject lottery process to “race winner” (S326). Through this process, the race winners from race 1 to race 5 (“Men A”, “Men B”, “Woman A”, “Tengu”, “Kappa” and “Men A / M B”) Is set to “Race Winner”.

  Next, the sub CPU 102 refers to the race win rate MAP lottery table (see FIG. 35) and performs a race win rate MAP lottery process (S327). In this process, the sub CPU 102 determines the race win rate MAP that defines the race win rate data of the “race winner” (race winner) set in S326 based on the current set value (any one of 1 to 6). To decide. Next, the sub CPU 102 sets the lottery result (race winning rate MAP) of the race winning rate MAP lottery processing in the “race winning rate map” (S328).

  Next, the sub CPU 102 refers to the race win rate MAP data table (see FIG. 36) and acquires race win rate data corresponding to the set “race win rate map” (S329). In this process, as shown in FIG. 36, only the race win rate data for the current race (the first race) may be determined, or the race win rate data for the second and subsequent races may also be determined. is there. Next, the sub CPU 102 sets the race winning rate data acquired in S329 (S330).

  Then, after the process of S330, the sub CPU 102 ends the race information lottery process and also ends the initialization command reception process (see FIG. 82). As described above, in the pachi-slot 1 of the present embodiment, the race victory target of the race effect executed in the transition effect game when the initialization command is received (when information regarding the content of the race effect is not set in the initial state). The (candidate) person and their winning percentage are determined.

  As described above, in the race information lottery process of the present embodiment, information regarding the content of the race effect is determined from the first race to the fifth race (four sets ahead of the current set) at the start of the game period of the normal game, This process is executed by the sub-control circuit 101. In other words, in the present embodiment, the sub-control circuit 101 determines information related to the content of each transition effect game performed after the end of the normal game from the current set to the fourth set at the start of the normal game period ( It also serves as a transition effect determining means).

[Start command reception processing]
Next, with reference to FIG. 84, the start command reception process performed in S296 in the flowchart of the effect content determination process (see FIG. 81) will be described.

  First, the sub CPU 102 performs a variable setting process (S341). In this processing, the sub CPU 102 performs setting processing of various variables (various flags, counters, etc.) used for effect control according to the type of the sub gaming state. Details of the variable setting process will be described later with reference to FIG.

  Next, the sub CPU 102 performs a payout state update process (S342). In this process, the sub CPU 102 updates information on the gaming state (previous), gaming state (current), and gaming state (next time). Note that the details of the payout state update processing will be described later with reference to FIG. 92 described later.

  Next, the sub CPU 102 performs a Bns (bonus) state update process (S343). In this processing, the sub CPU 102 performs setting processing of various variables (various flags, counters, etc.) used for effect control according to the type of the pseudo BB state. Details of the Bns state update process will be described later with reference to FIG. 93 described later.

  The types of pseudo BB states managed in this embodiment are “BB winning”, “between BB flags”, “waiting for BB operation”, “in BB”, “in JAC”, “in ChaBB”, and “in ChaJAC”. 7 types. “Between BB flags” indicates a state in which a pseudo BB game is being carried over, and “JAC in progress” indicates a state of “JACGAME guaranteed section”. Further, “in ChaBB” indicates the state of “JACIN challenge section” in “general medium BB”, and “in ChaJAC” indicates the state of “JACIN challenge section” in “BB in AT”.

  Next, the sub CPU 102 determines whether or not the sub game state is a game start time of “general medium” (hereinafter referred to as “general medium_game start time”) (S344).

  In S344, when the sub CPU 102 determines that the sub gaming state is “general medium_game start time” (when S344 is YES), the sub CPU 102 performs general medium_game start process (S345). . Note that the details of the process during the general medium_game start will be described later with reference to FIGS. 101 and 102 described later. Then, after the process of S345, the sub CPU 102 performs a process of S356 described later.

  On the other hand, in S344, when the sub CPU 102 determines that the sub game state is not “general medium_game start” (when S344 is NO), the sub CPU 102 determines that the sub game state is “general medium BB”. It is determined whether or not it is a start time (hereinafter referred to as “general BB_game start time”) (S346).

  In S346, when the sub CPU 102 determines that the sub gaming state is “general medium BB_game start” (when S346 is YES), the sub CPU 102 performs general medium BB_game start processing (S347). . Details of the general BB_game start time process will be described later with reference to FIG. Then, after the process of S347, the sub CPU 102 performs a process of S356 described later.

  On the other hand, in S346, when the sub CPU 102 determines that the sub game state is not “general BB_game start” (when S346 is NO), the sub CPU 102 starts the game in which the sub game state is “race”. It is determined whether or not it is time (hereinafter referred to as “during race_game start”) (S348).

  In S348, when the sub CPU 102 determines that the sub gaming state is “during racing_when game is started” (when S348 is YES), the sub CPU 102 performs processing during racing_when game starts (S349). . Details of the process during the race_game start will be described later with reference to FIG. Then, after the process of S349, the sub CPU 102 performs the process of S356 described later.

  On the other hand, in S348, when the sub CPU 102 determines that the sub gaming state is not “race_starting game” (when S 348 is NO), the sub CPU 102 determines that the sub gaming state is “AT ready”. It is determined whether or not it is a start time (hereinafter referred to as “at AT preparation_game start time”) (S350).

  In S350, when the sub CPU 102 determines that the sub game state is “AT ready_game start” (when S350 is YES), the sub CPU 102 performs AT preparation_game start processing ( S351). Details of the AT preparation_game start process will be described later with reference to FIG. 109 described later. Then, after the processing of S351, the sub CPU 102 performs processing of S356 described later.

  On the other hand, in S350, when the sub CPU 102 determines that the sub game state is not “AT ready_at the start of game” (when S350 is NO), the sub CPU 102 determines that the game with the sub game state “AT” is in progress. It is determined whether or not it is the start time (hereinafter referred to as “at AT start time”) (S352).

  In S352, when the sub CPU 102 determines that the sub gaming state is “AT during game start” (when S352 is YES), the sub CPU 102 performs a process during AT AT game start (S353). . Details of the AT_game start process will be described later with reference to FIG. Then, after the processing of S353, the sub CPU 102 performs processing of S356 described later.

  On the other hand, in S352, when the sub CPU 102 determines that the sub gaming state is not “AT during start of game” (when S352 is NO), the sub CPU 102 determines that the game with the sub gaming state “AT BB” is performed. It is determined whether or not it is a start time (hereinafter referred to as “at BB_game start time”) (S354).

  In S354, when the sub CPU 102 determines that the sub game state is “at BB_game start at AT” (when S354 is YES), the sub CPU 102 performs a process at BB_game start during AT (S355). . The details of the AT BB_game start time process will be described later with reference to FIG. Then, after the process of S355, the sub CPU 102 performs a process of S356 described later.

  On the other hand, in S354, when the sub CPU 102 determines that the sub gaming state is not “at BB during AT start” (when S354 is NO), the sub CPU 102 performs processing of S356 described later.

  After the processing of S345, S347, S349, S351, S353, or S355, or when S354 is NO, the sub CPU 102 performs BB precursor counter management processing (S356). In this process, the sub CPU 102 subtracts the value of the BB precursor counter indicating the number of remaining precursor games until the pseudo BB game is activated.

  Next, the sub CPU 102 performs a game state setting process (S357). In this process, the sub CPU 102 sets a gaming state (next time). Details of the game state setting process will be described later with reference to FIG. 113 described later. Then, after the process of S357, the sub CPU 102 ends the start command reception process and ends the effect content determination process (see FIG. 81).

  Note that although not shown in FIG. 84, in the series of repeated processing of the above-described sub gaming state determination processing and gaming start processing during start command reception processing, the sub gaming state is actually “W chance”. And a game start process of “during W chance”, a process of determining whether the sub game state is “addition challenge”, and a game start process of “addition challenge” Is called.

[Variable setting process]
Next, with reference to FIG. 85, the variable setting process performed in S341 in the flowchart of the start command reception process (see FIG. 84) will be described.

  First, the sub CPU 102 determines whether or not the gaming state (next time) is “general” (S361).

  In S361, when the sub CPU 102 determines that the gaming state (next time) is “general” (when S361 is YES), the sub CPU 102 performs a general_variable setting process (S362). The details of the general medium_variable setting process will be described later with reference to FIG. 86 described later. Then, after the processing of S362, the sub CPU 102 performs processing of S367 described later.

  On the other hand, in S361, when the sub CPU 102 determines that the gaming state (next time) is not “general medium” (when S361 is NO), the sub CPU 102 determines that the gaming state (next time) is pseudo BB (“general medium”). BB "or" BB during AT ") is determined (S363).

  In S363, when the sub CPU 102 determines that the gaming state (next time) is the pseudo BB (when S363 is YES), the sub CPU 102 performs a BB_variable setting process (S364). Details of the BB_variable setting process will be described later with reference to FIG. 87 described later. After the process of S364, the sub CPU 102 performs a process of S367 described later.

  On the other hand, in S363, when the sub CPU 102 determines that the gaming state (next time) is not in the pseudo BB (when S363 is NO), the sub CPU 102 determines that the gaming state (next time) is “AT ready”. It is determined whether or not (S365).

  In S365, when the sub CPU 102 determines that the gaming state (next time) is “AT ready” (when S365 is YES), the sub CPU 102 performs AT preparing_variable setting processing (S366). Details of the AT preparing_variable setting process will be described later with reference to FIG. 88 described later. Then, after the process of S366, the sub CPU 102 performs a process of S367 described later.

  On the other hand, when the sub CPU 102 determines in S365 that the gaming state (next time) is not “AT ready” (when S365 is NO), the sub CPU 102 performs the process of S367 described later.

  After S362, S364, or S366, or if S365 is NO, is the sub CPU 102 at the end of the game whose game state (current) is “general” (hereinafter referred to as “general end”)? It is determined whether or not (S367).

  When the sub CPU 102 determines in S367 that the gaming state (current) is “general end” (when S367 is YES), the sub CPU 102 performs general end_variable setting processing (S368). Details of the general end time_variable setting process will be described later with reference to FIG. 89 described later. Then, after the processing of S368, the sub CPU 102 performs processing of S373 described later.

  On the other hand, when the sub CPU 102 determines in S367 that the gaming state (current) is not “general end” (when S367 is NO), the sub CPU 102 determines that the gaming state (current) is “general BB” or It is determined whether or not it is the time when the game of “BB during AT” ends (hereinafter referred to as “when BB ends”) (S369).

  In S369, when the sub CPU 102 determines that the gaming state (current) is “BB end time” (when S369 is YES), the sub CPU 102 performs a BB end time_variable setting process (S370). Details of the BB end time_variable setting process will be described later with reference to FIG. 90 described later. Then, after the process of S370, the sub CPU 102 performs the process of S373 described later.

  On the other hand, when the sub CPU 102 determines in S369 that the gaming state (current) is not “BB finished” (when S369 is NO), the sub CPU 102 determines that the gaming state (current) is “Race”. It is determined whether or not it is an end time (hereinafter referred to as “race end time”) (S371).

  When the sub CPU 102 determines in S371 that the gaming state (current) is “at the end of the race” (when S371 is YES), the sub CPU 102 performs a race end_variable setting process (S372). Details of the race end time_variable setting process will be described later with reference to FIG. 91 described later. Then, after the processing of S372, the sub CPU 102 performs processing of S373 described later.

  On the other hand, when the sub CPU 102 determines in S371 that the gaming state (current) is not “at the end of the race” (when S371 is NO), the sub CPU 102 performs the process of S373 described later.

  After the processing of S368, S370, or S372, or when S371 is NO, the sub CPU 102 initializes “the number of G (game) added directly over AT” (S373). In this process, the sub CPU 102 sets “0” to the number of added AT games. Then, after the process of S373, the sub CPU 102 ends the variable setting process and moves the process to S342 of the start command reception process (see FIG. 84).

  In addition, although not shown in FIG. 85, in the series of repeated processing of the gaming state (next time) and variable setting processing described above during the variable setting process, the gaming state (next time) is actually “race”. , A process for determining whether or not one of “at AT”, “during W chance”, and “during extra challenge”, and a variable setting process in these sub gaming states are also performed. In the variable setting process when the gaming state (next time) is “W chance”, “5” is set as the number of bell navigations.

  Further, although not shown in FIG. 85, in the series of processing of determining the game state (current) and the variable setting process described above during the variable setting process, the game state (current) is actually “W chance in progress”. ”And“ During add-on challenge ”, and a variable setting process in these sub gaming states are also performed. In the variable setting process when the gaming state (current) is “W chance”, “5” is set as the number of bell navigations.

[General_variable setting process]
Next, with reference to FIG. 86, the general medium_variable setting process performed in S362 in the variable setting process flowchart (see FIG. 85) will be described.

  First, the sub CPU 102 determines whether or not the gaming state (current) is different from the gaming state (next time) ("general") (S381).

  In S381, when the sub CPU 102 determines that the gaming state (current) is not different from the gaming state (next time) (when S381 is NO), the sub CPU 102 ends the general medium_variable setting process and performs the process. The process proceeds to S367 in the variable setting process (see FIG. 85). On the other hand, when the sub CPU 102 determines in S381 that the gaming state (current) is different from the gaming state (next time) (when S381 is YES), the sub CPU 102 indicates that the gaming state (current) is “race”. It is determined whether or not there is (S382).

  In S382, when the sub CPU 102 determines that the gaming state (current) is not “race” (when S382 is NO), the sub CPU 102 ends the general medium_variable setting process, and the process is the variable setting process. The process moves to S367 (see FIG. 85).

  On the other hand, in S382, when the sub CPU 102 determines that the gaming state (current) is “race” (when S382 is YES), the sub CPU 102 determines that the next period ( The number of shortened games (next shortened game number) in the non-AT game period of the next set is calculated (S383).

  “Oyado points” are the number of surplus reduced games generated by the cycle shortening lottery (may be multiple times) performed during the normal game of the current cycle (current set) and the pseudo BB game. This corresponds to the total number of games of all the shortened games for the surplus generated by the pseudo BB cycle shortened lottery (there may be a plurality of times).

  Next, the sub CPU 102 sets “180” in the cycle counter (S384). Next, the sub CPU 102 subtracts the next shortened game number calculated in S383 from the value (180) of the cycle counter (S385). By this processing, the subtraction result is set as the number of stay games in the normal state in the next set. Then, after the process of S385, the sub CPU 102 ends the general_variable setting process, and moves the process to S367 of the variable setting process (see FIG. 85).

  As described above, in S585 of the general_variable setting process of this embodiment, the number of next shortened games (the number of surplus shortened games in the current set) is subtracted from the number of set games (180 games) of the normal game of the next set. This process is executed by the sub-control circuit 101. In other words, in the present embodiment, the sub-control circuit 101 also serves as means for subtracting the surplus number of shortened games from the number of set games for the next set of normal games (game number subtraction means).

[In BB_Variable setting process]
Next, with reference to FIG. 87, the BB variable setting process performed in S364 in the variable setting process flowchart (see FIG. 85) will be described.

  First, the sub CPU 102 determines whether or not the gaming state (current) is different from the gaming state (next time) (“general BB” or “AT BB”) (S391).

  In S391, when the sub CPU 102 determines that the gaming state (current) is not different from the gaming state (next time) (when S391 is NO), the sub CPU 102 ends the BB variable setting process, and performs the process. The process proceeds to S367 in the variable setting process (see FIG. 85). On the other hand, when the sub CPU 102 determines in S391 that the gaming state (current) is different from the gaming state (next time) (when S391 is YES), the sub CPU 102 has a value of “0” for the BB precursor counter. Whether or not (S392).

  In step S392, when the sub CPU 102 determines that the value of the BB precursor counter is not “0” (in the case where S392 is NO), the sub CPU 102 ends the BB in-variable setting process and executes the variable setting process ( Move to S367 in FIG.

  On the other hand, when the sub CPU 102 determines in S392 that the value of the BB precursor counter is “0” (when S392 is YES), the sub CPU 102 resets the value of the BB precursor counter (“−1”). Set) (S393). After the process of S393, the sub CPU 102 ends the BB_variable setting process, and moves the process to S367 of the variable setting process (see FIG. 85).

[Under AT preparation_Variable setting processing]
Next, with reference to FIG. 88, the AT preparing_variable setting process performed in S366 in the variable setting process flowchart (see FIG. 85) will be described.

  First, the sub CPU 102 determines whether or not the gaming state (current) is different from the gaming state (next time) (“AT ready”) (S401).

  In S401, when the sub CPU 102 determines that the gaming state (current) is not different from the gaming state (next time) (when S401 is NO), the sub CPU 102 ends the AT preparation_variable setting process, Is transferred to S367 of the variable setting process (see FIG. 85). On the other hand, when the sub CPU 102 determines in S401 that the gaming state (current) is different from the gaming state (next time) (when S401 is YES), the sub CPU 102 determines that the “race victory flag”, “race runner map” "," Race Winning Rate Map "and" Race Consecutive Loss Counter "are cleared (S402).

  The “race victory flag” is a flag indicating whether or not the set “race winner” (race winner (candidate)) wins the race production. When the “race winner” wins the race, , “1” is set in the “race victory flag”. The “race consecutive loss counter” is a counter that manages the number of times that the set “race winner” continuously loses the race effect (the number of times that the AT is not continuously won). In the present embodiment, when the “race winner” loses 10 times in the race effect (at the ceiling), the winning combination is AT.

  After the process of S402, the sub CPU 102 ends the AT preparation_variable setting process, and moves the process to S367 of the variable setting process (see FIG. 85).

[General end_variable setting process]
Next, with reference to FIG. 89, the general end time_variable setting process performed in S368 in the variable setting process flowchart (see FIG. 85) will be described.

  First, the sub CPU 102 determines whether or not the gaming state (current) (“general end time”) is different from the gaming state (next time) (S411).

  In S411, when the sub CPU 102 determines that the gaming state (current) is not different from the gaming state (next time) (when S411 is NO), the sub CPU 102 ends the general end time_variable setting process, Is shifted to S373 in the variable setting process (see FIG. 85). On the other hand, when the sub CPU 102 determines in S411 that the gaming state (current) is different from the gaming state (next time) (when S411 is YES), the sub CPU 102 clears the “winning combination history” (S412). .

  The “winning role history” is data representing the winning history of internal winning combinations (including “losing”, “small role”, and “replay”) for five games, and is used for the cycle shortened lottery and the directly added lottery. It is done.

  Then, after the process of S412, the sub CPU 102 ends the general end time_variable setting process, and moves the process to S373 of the variable setting process (see FIG. 85).

[When BB ends_variable setting process]
Next, with reference to FIG. 90, the BB end time_variable setting process performed in S370 in the variable setting process flowchart (see FIG. 85) will be described.

  First, the sub CPU 102 determines whether or not the gaming state (current) (“general BB” or “AT BB”) is different from the gaming state (next time) (S421).

  In S421, when the sub CPU 102 determines that the gaming state (current) is not different from the gaming state (next time) (when S421 is NO), the sub CPU 102 ends the BB end time_variable setting process, Is shifted to S373 in the variable setting process (see FIG. 85). On the other hand, when the sub CPU 102 determines in S421 that the gaming state (current) is different from the gaming state (next time) (when S421 is YES), the sub CPU 102 initializes the “BB game counter” (“−” 1 ”is set) (S422). The “BB game counter” is a counter that manages the number of remaining games in the JACIN challenge section (the section in which the push order 2-choice game for JACGAME is played).

  After the process of S422, the sub CPU 102 ends the BB end time_variable setting process, and moves the process to S373 of the variable setting process (see FIG. 85).

[Race end_variable setting process]
Next, with reference to FIG. 91, the race end time_variable setting process performed in S372 in the variable setting process flowchart (see FIG. 85) will be described.

  First, the sub CPU 102 determines whether or not the gaming state (current) ("race") is different from the gaming state (next time) (S431).

  In S431, when the sub CPU 102 determines that the gaming state (current) is not different from the gaming state (next time) (when S431 is NO), the sub CPU 102 ends the race end_variable setting process, Is shifted to S373 in the variable setting process (see FIG. 85). On the other hand, when the sub CPU 102 determines in S431 that the gaming state (current) is different from the gaming state (next time) (when S431 is YES), the sub CPU 102 determines that “the number of racing games” and “race occurrence flag”. Then, the data of “post-AT race flag” and “race winning percentage rewrite flag” are cleared (S432).

  The “race game number” is data for managing the number of elapsed games (1 to 10 games) of the race effect performed in the transition effect game, and the “race occurrence flag” indicates whether or not the race effect is generated. It is a flag to show. The “AT race flag” is a flag indicating whether or not a race effect is generated after AT, and the “Race win rate rewriting flag” is a flag indicating whether or not the race win rate data is rewritten. Although a detailed description is omitted, in this embodiment, when a “rare role” is won in a game in a normal state, a lottery for increasing the race win rate is performed. When the winning lottery of the race winning rate is won, the “race winning rate rewriting flag” is turned on.

  Then, after the process of S432, the sub CPU 102 ends the race end time_variable setting process, and moves the process to S373 of the variable setting process (see FIG. 85).

[Out of ball status update processing]
Next, with reference to FIG. 92, a description will be given of the appearance state update process performed in S342 in the flowchart of the start command reception process (see FIG. 84).

  First, the sub CPU 102 determines whether or not the gaming state (previous) is different from the gaming state (current) (S451).

  In S451, when the sub CPU 102 determines that the gaming state (previous) is not different from the gaming state (current) (when S451 is NO), the sub CPU 102 performs processing of S453 described later. On the other hand, when the sub CPU 102 determines in S451 that the gaming state (previous) is different from the gaming state (current) (when S451 is YES), the sub CPU 102 changes the gaming state (previous) to the gaming state (current). Is set (S452).

  After the processing of S452 or when S451 is NO, the sub CPU 102 determines whether or not the gaming state (current) is different from the gaming state (next time) (S453). In S453, when the sub CPU 102 determines that the gaming state (current) is not different from the gaming state (next time) (when S453 is NO), the sub CPU 102 ends the ball status update process and starts the process. The process proceeds to S343 in the command reception process (see FIG. 84).

  On the other hand, when the sub CPU 102 determines in S453 that the gaming state (current) is different from the gaming state (next time) (when S453 is YES), the sub CPU 102 changes the gaming state (current) to the gaming state (next time). Is set (S454). Then, after the process of S454, the sub CPU 102 ends the appearance state update process, and moves the process to S343 of the start command reception process (see FIG. 84).

[Bns state setting process]
Next, with reference to FIG. 93, the Bns state setting process performed in S343 in the flowchart of the start command reception process (see FIG. 84) will be described.

  First, the sub CPU 102 determines whether or not the pseudo BB state is “BB winning” (S461).

  In S461, when the sub CPU 102 determines that the pseudo BB state is “BB winning” (when S461 is YES), the sub CPU 102 performs BB winning_Bns state setting processing (S462). Details of the BB winning time_Bns state setting process will be described later with reference to FIG. 94 described later. After the process of S462, the sub CPU 102 ends the Bns state setting process, and moves the process to S344 of the start command reception process (see FIG. 84).

  On the other hand, when the sub CPU 102 determines in S461 that the pseudo BB state is not “BB winning” (when S461 is NO), the sub CPU 102 determines whether or not the pseudo BB state is “between BB flags”. Is discriminated (S463).

  In S463, when the sub CPU 102 determines that the pseudo BB state is “between BB flags” (when S463 is YES), the sub CPU 102 performs a BB flag inter-Bns state setting process (S464). Details of the BB flag inter-Bns state setting process will be described later with reference to FIG. 95 described later. After the process of S464, the sub CPU 102 ends the Bns state setting process, and moves the process to S344 of the start command reception process (see FIG. 84).

  On the other hand, when the sub CPU 102 determines in S463 that the pseudo BB state is not “between BB flags” (when S463 is NO), the sub CPU 102 determines whether or not the pseudo BB state is “waiting for BB operation”. Is discriminated (S465).

  In S465, when the sub CPU 102 determines that the pseudo BB state is “waiting for BB operation” (when S465 is YES), the sub CPU 102 performs a BB operation waiting_Bns state setting process (S466). Details of the BB operation waiting_Bns state setting process will be described later with reference to FIG. 96 described later. After the process of S466, the sub CPU 102 ends the Bns state setting process, and moves the process to S344 of the start command reception process (see FIG. 84).

  On the other hand, when the sub CPU 102 determines in S465 that the pseudo BB state is not “waiting for BB operation” (when S465 is NO), the sub CPU 102 determines whether or not the pseudo BB state is “BB in progress”. A determination is made (S467).

  In S467, when the sub CPU 102 determines that the pseudo BB state is “BB” (when S467 is YES), the sub CPU 102 performs a BB in-Bns state setting process (S468). Details of the BB_Bns state setting process will be described later with reference to FIG. 97 described later. After the process of S468, the sub CPU 102 ends the Bns state setting process, and moves the process to S344 of the start command reception process (see FIG. 84).

  On the other hand, when the sub CPU 102 determines in S467 that the pseudo BB state is not “BB” (when S467 is NO), the sub CPU 102 determines whether or not the pseudo BB state is “JAC”. (S469).

  In S469, when the sub CPU 102 determines that the pseudo BB state is “JAC in progress” (when S469 is YES), the sub CPU 102 performs a JAC in-Bns state setting process (S470). Details of the JAC_Bns state setting process will be described later with reference to FIG. After the process of S470, the sub CPU 102 ends the Bns state setting process, and moves the process to S344 of the start command reception process (see FIG. 84).

  On the other hand, when the sub CPU 102 determines that the pseudo BB state is not “JAC” in S469 (when S469 is NO), the sub CPU 102 determines whether the pseudo BB state is “ChaBB”. (S471).

  In S471, when the sub CPU 102 determines that the pseudo BB state is “ChaBB in progress” (when S471 is YES), the sub CPU 102 performs the ChaBB in-Bns state setting process (S472). Details of the ChaBB_Bns state setting process will be described later with reference to FIG. 99 described later. After the process of S472, the sub CPU 102 ends the Bns state setting process, and moves the process to S344 of the start command reception process (see FIG. 84).

  On the other hand, when the sub CPU 102 determines that the pseudo BB state is not “ChaBB” in S471 (when S471 is NO), the sub CPU 102 determines whether or not the pseudo BB state is “ChaJAC”. (S473).

  In S473, when the sub CPU 102 determines that the pseudo BB state is “ChaJAC in progress” (when S473 is YES), the sub CPU 102 performs ChaJAC in-Bns state setting processing (S474). The details of the ChaJAC_Bns state setting process will be described later with reference to FIG. After the process of S474, the sub CPU 102 ends the Bns state setting process, and moves the process to S344 of the start command reception process (see FIG. 84).

  On the other hand, when the sub CPU 102 determines in S473 that the pseudo BB state is not “ChaJAC in progress” (when S473 is NO), the sub CPU 102 ends the Bns state setting process, and starts the process when the start command is received. The process moves to S344 (see FIG. 84).

[BB winning state_Bns state setting process]
Next, with reference to FIG. 94, the BB winning time_Bns state setting process performed in S462 in the flowchart of the Bns state setting process (see FIG. 93) will be described.

  First, the sub CPU 102 changes the pseudo BB state to “between BB flags” (S481). Next, the sub CPU 102 performs an inter-BB flag_Bns state setting process (S482). Details of the BB flag inter-Bns state setting process will be described later with reference to FIG. 95 described later. After the processing of S482, the sub CPU 102 ends the BB winning time_Bns state setting process and also ends the Bns state setting process (see FIG. 93).

[BB flag inter-Bns state setting process]
Next, with reference to FIG. 95, between BB flags _Bns performed in S464 in the flowchart of Bns state setting processing (see FIG. 93) or S482 in the flowchart of BB winning time_Bns state setting processing (see FIG. 94). The state setting process will be described.

  First, the sub CPU 102 determines whether or not the gaming state (current) is “general BB” or “AT BB” (S491).

  In S491, when the sub CPU 102 determines that the gaming state (current) is not “general BB” or “AT BB” (when S491 is NO), the sub CPU 102 performs a process of S493 described later. On the other hand, when the sub CPU 102 determines in S491 that the gaming state (current) is “general BB” or “AT BB” (when S491 is YES), the sub CPU 102 changes the pseudo BB state to “ A transition is made to "waiting for BB operation" (S492).

  After the process of S492 or when S491 is NO, the sub CPU 102 performs a BB operation wait_Bns state setting process (S493). Details of the BB operation waiting_Bns state setting process will be described later with reference to FIG. 96 described later. After the processing of S493, the sub CPU 102 ends the BB flag inter-Bns state setting process, and also ends the Bns state setting process (see FIG. 93) or the BB winning time_Bns state setting process (see FIG. 94).

[BB operation waiting_Bns state setting process]
Next, referring to FIG. 96, BB operation waiting_Bns performed in S466 in the flowchart of Bns state setting processing (see FIG. 93) or in S493 in the flowchart of BB flag_Bns state setting processing (see FIG. 95). The state setting process will be described.

  First, the sub CPU 102 determines whether or not the “BB entry flag” is on (S501). The “BB entry flag” is a flag indicating whether or not the pseudo BB state shifts from “BB operation waiting” to “BB in progress”. When the flag is on, the pseudo BB state is “ The process proceeds to “BB in progress” and the pseudo BB game is started.

  In S501, when the sub CPU 102 determines that the BB entry flag is not in the on state (when S501 is NO), the sub CPU 102 ends the BB operation waiting_Bns state setting process and the Bns state setting process (FIG. 93). (See FIG. 95).

  On the other hand, when the sub CPU 102 determines in S501 that the BB entry flag is on (when S501 is YES), the sub CPU 102 turns the BB entry flag off (S502). Next, the sub CPU 102 transitions the pseudo BB state to “in BB” (S503).

  Next, the sub CPU 102 sets the initial value “2” to “BB guaranteed JAC number” (S504). The “BB guaranteed JAC count” is the number of JACIN successes (JACGAME execution count) guaranteed in the JACGAME guaranteed section, and in this embodiment, JACGAME is guaranteed twice in the JACGAME guaranteed section.

  Next, the sub CPU 102 sets an initial value “10” as the value of the BB game counter (S505).

  Next, the sub CPU 102 sets an initial value “5” as the value of “JAC bell navigation number” (S506). In the present embodiment, the game period of one JACGAME is managed by the number of times of navigating the small role (bell number of times) related to “push order bell” (CT bell) in which 10 medals are paid out, 5 times. When the number of times of the bell navigation is finished, one JACGAME game period is finished. “JAC bell navigation number” represents the remaining number of bell navigations in JACGAME.

  Next, the sub CPU 102 turns off the “penalty flag” (S507). The “penalty flag” is a flag indicating whether or not a penalty has occurred. After the processing of S507, the sub CPU 102 ends the BB operation waiting_Bns state setting process, and also ends the Bns state setting process (see FIG. 93) or the BB flag inter_Bns state setting process (see FIG. 95).

[In-BB_Bns state setting process]
Next, the BB in-Bns state setting process performed in S468 in the flowchart of the Bns state setting process (see FIG. 93) will be described with reference to FIG.

  First, the sub CPU 102 determines whether or not the “BARJAC entry flag” is in an on state (S511). The “BARJAC entry flag” is a flag indicating whether or not the transition to the “JAC in progress” of the pseudo BB state has been determined. The “BARJAC rush flag” has a predetermined symbol combination (in this embodiment, “black BAR”-“black BAR”-“black BAR” or “black cherry”-“black BAR”-“black BAR”) It turns on when it is stopped and displayed above.

  In S511, when the sub CPU 102 determines that the BARJAC inrush flag is not on (when S511 is NO), the sub CPU 102 ends the BB in-Bns state setting process and Bns state setting process (see FIG. 93). ) Also ends.

  On the other hand, when the sub CPU 102 determines in S511 that the BARJAC rush flag is on (when S511 is YES), the sub CPU 102 turns the BAR JAC rush flag off (S512). Next, the sub CPU 102 changes the pseudo BB state to “JAC in progress” (S513).

  Next, the sub CPU 102 determines whether or not the number of BB guaranteed JACs is greater than “0” (S514). In S514, when the sub CPU 102 determines that the number of BB guaranteed JACs is not greater than “0” (when S514 is NO), the sub CPU 102 ends the BB in-Bns state setting process and the Bns state setting process. (See FIG. 93) also ends.

  On the other hand, when the sub CPU 102 determines in S514 that the BB guaranteed JAC number is larger than “0” (when S514 is YES), the sub CPU 102 subtracts “1” from the BB guaranteed JAC number (S515). Then, after the processing of S515, the sub CPU 102 ends the in-BB_Bns state setting process and also ends the Bns state setting process (see FIG. 93).

[JAC in_Bns state setting process]
Next, with reference to FIG. 98, the JAC in-Bns state setting process performed in S470 in the flowchart of the Bns state setting process (see FIG. 93) will be described.

  First, the sub CPU 102 determines whether or not the number of times of JAC bell navigation is “0” (S521). In S521, when the sub CPU 102 determines that the number of times of JAC bell navigation is not “0” (when S521 is NO), the sub CPU 102 ends the JAC in-Bns state setting process and also sets the Bns state setting process (FIG. 93). See also).

  On the other hand, when the sub CPU 102 determines in S521 that the JAC bell navigation count is “0” (when S521 is YES), the sub CPU 102 determines whether or not the BB guaranteed JAC count is greater than “0”. (S522).

  In S522, when the sub CPU 102 determines that the BB guaranteed JAC number is not greater than “0” (when S522 is NO), the sub CPU 102 transitions the pseudo BB state to “ChaBB in progress” (S523). On the other hand, when the sub CPU 102 determines that the number of BB guaranteed JACs is greater than “0” in S522 (when S522 is YES), the sub CPU 102 transitions the pseudo BB state to “in BB” (S524). .

  After the processing of S523 or S524, the sub CPU 102 sets the initial value “5” to the value of the number of times of JAC bell navigation (S525). Then, after the processing of S525, the sub CPU 102 ends the JAC_Bns state setting process and also ends the Bns state setting process (see FIG. 93).

[ChaBB_Bns state setting process]
Next, with reference to FIG. 99, the ChaBB_Bns state setting process performed in S472 in the flowchart of the Bns state setting process (see FIG. 93) will be described.

  First, the sub CPU 102 determines whether or not the BB game counter is less than “0” (S531).

  In S531, when the sub CPU 102 determines that the BB game counter is not less than “0” (when S531 is NO), the sub CPU 102 performs processing of S533 described later. On the other hand, when the sub CPU 102 determines that the BB game counter is less than “0” in S531 (when S531 is YES), the sub CPU 102 changes the pseudo BB state to “none” (S532). In this process, the data indicating the pseudo BB state is reset, and the sub gaming state returns from the pseudo BB state to the normal state.

  After the processing of S532 or when S531 is NO, the sub CPU 102 determines whether or not the BARJAC entry flag is in an on state (S533). In S533, when the sub CPU 102 determines that the BARJAC rush flag is not in the on state (when S533 is NO), the sub CPU 102 ends the ChaBB_Bns state setting process and also sets the Bns state setting process (see FIG. 93). ) Also ends.

  On the other hand, when the sub CPU 102 determines in S533 that the BARJAC rush flag is on (when S533 is YES), the sub CPU 102 turns the BAR JAC rush flag off (S534). Next, the sub CPU 102 transitions the pseudo BB state to “ChaJAC in progress” (S535).

  Then, after the processing of S535, the sub CPU 102 ends the ChaBB in-Bns state setting process and also ends the Bns state setting process (see FIG. 93).

[In ChaJAC_Bns state setting process]
Next, the ChaJAC_Bns state setting process performed in S474 in the flowchart of the Bns state setting process (see FIG. 93) will be described with reference to FIG.

  First, the sub CPU 102 determines whether or not the number of times of JAC bell navigation is “0” (S541). In S541, when the sub CPU 102 determines that the number of times of JAC bell navigation is not “0” (when S541 is NO), the sub CPU 102 ends the ChaJAC in-Bns state setting process and also sets the Bns state setting process (FIG. 93). See also).

  On the other hand, when the sub CPU 102 determines in S541 that the JAC bell navigation number is “0” (when S541 is YES), the sub CPU 102 determines whether or not the value of the BB game counter is greater than “0”. A determination is made (S542).

  In S542, when the sub CPU 102 determines that the value of the BB game counter is not greater than “0” (when S542 is NO), the sub CPU 102 transitions the pseudo BB state to “none” (S543). In this process, the data indicating the pseudo BB state is reset, and the sub gaming state returns from the pseudo BB state to the AT state. On the other hand, when the sub CPU 102 determines in S542 that the value of the BB game counter is greater than “0” (when S542 is YES), the sub CPU 102 changes the pseudo BB state to “ChaBB in progress” (S544). ).

  After the processing of S543 or S544, the sub CPU 102 sets an initial value “5” to the value of the number of times of JAC bell navigation (S545). Then, after the process of S545, the sub CPU 102 ends the ChaJAC_Bns state setting process and also ends the Bns state setting process (see FIG. 93).

[General _Processing at game start]
Next, with reference to FIG. 101 and FIG. 102, the general medium_game start process performed in S345 in the flowchart of the start command reception process (see FIG. 84) will be described.

  First, the sub CPU 102 determines whether or not the value of the period counter is greater than “0” (S551).

  In S551, when the sub CPU 102 determines that the value of the cycle counter is not greater than “0” (when S551 is NO), the sub CPU 102 performs the process of S553 described later. On the other hand, in S551, when the sub CPU 102 determines that the value of the cycle counter is greater than “0” (when S551 is YES), the sub CPU 102 subtracts “1” from the value of the cycle counter (S552).

  After the process of S552 or when S551 is NO, the sub CPU 102 determines whether or not the race information MAP data is “0” (S553). In the present embodiment, as described above, five pieces of race information MAP data (“1” to “10”) up to four races ahead (first to fifth races) are stored in advance at the start of normal game set. Although the race information MAP data of the end race is deleted each time a race effect is finished, the race information MAP data from the next set on is stored in the storage area on the head side. Stored shifted. At this time, “0” is stored as race information MAP data in the last storage area that is empty. Therefore, in the process of S553, the sub CPU 102 determines whether or not the race information data in the storage area to be referenced is empty.

  When the sub CPU 102 determines that the race information MAP data is “0” in S553 (when S553 is YES), the sub CPU 102 performs the race information lottery process described with reference to FIG. 83 (S554). That is, if the information on the content of the race production of the current set (the type of the teammate character who will be the race victory target (candidate), the race win rate data of the teammate character) is not set, the game of the current set of normal games Information on the content of the race performance is determined by lottery at the start of the period. At this time, information on the content of the race production from the current set to the fourth set ahead (1st to 5th races) is determined. Then, after the processing of S554, the sub CPU 102 performs processing of S569 described later.

  On the other hand, when the sub CPU 102 determines in S553 that the race information MAP data is not “0” (when S553 is NO), the sub CPU 102 determines whether or not the gaming state (previous) is “in race”. Is discriminated (S555). In S555, when the sub CPU 102 determines that the gaming state (previous) is not “race” (when S555 is NO), the sub CPU 102 performs processing of S569 described later.

  On the other hand, in S555, when the sub CPU 102 determines that the gaming state (previous) is “race” (when S555 is YES), the sub CPU 102 satisfies the re-lottery condition of the race starter MAP. It is determined whether or not there is (S556). In the present embodiment, the race lotter MAP's re-lottery condition is when the number of consecutive losses of the race (the value of the race consecutive loss counter) is “5”.

  In S556, when the sub CPU 102 determines that the re-lotting condition of the race starter MAP is not satisfied (when S556 is NO), the sub CPU 102 performs the process of S559 described later.

  On the other hand, when the sub CPU 102 determines in S556 that the re-lotting condition for the race starter MAP is satisfied (when S556 is YES), the sub CPU 102 determines the race starter MAP lottery table (see FIG. 32). Referring to, a race starter MAP lottery process is performed (S557). Next, the sub CPU 102 sets the lottery result value (race information MAP number) of the race starter MAP lottery process to “race starter MAP” (S558).

  After the processing of S558 or when S556 is NO, the sub CPU 102 refers to the race information MAP data table (see FIG. 33), and based on the value of “race starter MAP” (race information MAP number), The type (target tables A to J) of the winning person lottery table (see FIG. 34) corresponding to the race information MAP data is determined (S559). In this process, based on the set race starter MAP (race information MAP), the “target table” (target table) corresponding to the race information MAP data for the first four races (first to fifth races) Any one of A to J) is determined. Next, the sub CPU 102 sets the “target table” for the determined first to fifth races (S560).

  Next, the sub CPU 102 performs a lottery process for race winners (candidates) from the first race to the fifth race based on the “target table” from the first race to the fifth race set in S560 ( S561). Next, the sub CPU 102 sets the lottery result of the victory subject lottery process to “race winner” (S562). Through this process, the race winners from race 1 to race 5 (“Men A”, “Men B”, “Woman A”, “Tengu”, “Kappa” and “Men A / M B”) Is set to “Race Winner”.

  Next, the sub CPU 102 checks the race winning ratio data of the current set (S563).

  Next, the sub CPU 102 determines whether or not the “race information data” is “0” (S564). “Race information data” refers to race win rate data, and in the process of S564, the sub CPU 102 determines whether or not the current set of race win rate data is set.

  When the sub CPU 102 determines that the race information data is not “0” in S564 (when S564 is NO), the sub CPU 102 performs the process of S569 described later.

  On the other hand, when the sub CPU 102 determines that the race information data is “0” in S564 (when S564 is YES), the sub CPU 102 refers to the race winning rate MAP lottery table (see FIG. 35), and races. Win rate MAP lottery processing is performed (S565). In this process, the sub CPU 102 determines the race win rate MAP that defines the race win rate data of the “race winner” (race winner) set in S562 based on the current set value (any one of 1 to 6). To decide.

  Next, the sub CPU 102 sets the lottery result (race winning rate MAP) of the race winning rate MAP lottery processing in the “race winning rate map” (S566).

  Next, the sub CPU 102 refers to the race win rate MAP data table (see FIG. 36), and acquires race win rate data corresponding to the set “race win rate map” (S567). In this process, as shown in FIG. 36, only the race win rate data for the current race (the first race) may be determined, or the race win rate data for the second and subsequent races may also be determined. is there. Next, the sub CPU 102 sets the race winning percentage data acquired in S567 (S568).

  After the process of S554 or S568, or when S555 or S564 is NO, the sub CPU 102 performs a pseudo BB lottery process (S569). The details of the pseudo BB lottery process will be described later with reference to FIG. 103 described later.

  Next, the sub CPU 102 performs cycle shortening related processing (S570). In this process, the sub CPU 102 refers to the cycle shortened lottery table (see FIGS. 43 and 44), and performs the cycle shortened lottery based on the data of “winning combination history”.

  Next, the sub CPU 102 determines whether or not the value of the cycle counter is “10” or more and the “race occurrence flag” is in an off state (S571).

  In S571, when the sub CPU 102 determines that the determination condition of S571 is not satisfied (in the case where S571 is NO), the sub CPU 102 determines that the “Oyado Point” is the lottery result of the cycle shortened lottery determined in S570. The corresponding number of shortened games is added (S572).

  After the processing of S572, the sub CPU 102 performs a race victory expectation degree data up lottery with reference to a race victory expectation degree lottery table (not shown) (S573). Next, the sub CPU 102 sets the lottery result of the race win expectation data up lottery in the race win rate data (S574). Then, after the process of S574, the sub CPU 102 ends the general medium_game start process, and moves the process to S356 of the start command reception process (see FIG. 84).

  On the other hand, when it is determined in S571 that the sub CPU 102 satisfies the determination condition of S571 (when S571 is YES), the sub CPU 102 determines the cycle shortened lottery result (shortened) determined in S570 from the value of the cycle counter. The number of games) is subtracted, and the calculation result is set to the value of the period counter. Then, the sub CPU 102 determines whether or not the value of the period counter after subtraction is less than “10” (S575).

  In S575, when the sub CPU 102 determines that the value of the period counter after subtraction is not less than “10” (when S575 is NO), the sub CPU 102 ends the general medium_game start process and performs the process. The process proceeds to S356 in the start command reception process (see FIG. 84).

  On the other hand, when the sub CPU 102 determines in S575 that the value of the period counter after subtraction is less than “10” (when S575 is YES), the sub CPU 102 determines the surplus corresponding to the calculation (subtraction) result. The number of shortened games is added to “Oyado points” (S576). Next, the sub CPU 102 sets “10” to the value of the cycle counter (S577). Then, after the processing of S577, the sub CPU 102 ends the general_game start process, and moves the process to S356 of the start command reception process (see FIG. 84).

  As described above, in S570 of the general medium_game start process of the present embodiment, a shortened lottery of the game period of the normal game is performed, and this process is executed by the sub-control circuit 101. That is, in the present embodiment, the sub-control circuit 101 also serves as means (normal game shortening means, first normal game shortening means) for determining the subtraction number of the current remaining unit game number of the normal game in the normal game. In addition, in S576 of the general medium_game start process, the subtraction result is obtained when the value obtained by subtracting the number of shortened games determined by the cycle shortening lottery of the normal game from the remaining number of unit games of the normal game is less than 10 games. Is stocked as the number of surplus reduced games. In other words, in the present embodiment, the sub control circuit 101 also serves as means for stocking the subtraction result as a surplus number of shortened games when the subtraction result is less than 10 games (surplus game number stock means).

[Pseudo BB lottery processing]
Next, with reference to FIG. 103, the pseudo BB lottery process performed in S569 in the flowchart of the general medium_game start process (see FIGS. 101 and 102) will be described.

  First, the sub CPU 102 determines whether or not the value of the BB precursor counter is “0” or more (S581). When the sub CPU 102 determines in S581 that the value of the BB precursor counter is “0” or more (when S581 is YES), the sub CPU 102 ends the pseudo BB lottery process, and the process is in general_games. The process proceeds to S570 of the start time process (see FIGS. 101 and 102).

  On the other hand, when the sub CPU 102 determines in S581 that the value of the BB precursor counter is not “0” or more (when S581 is NO), the sub CPU 102 determines that the gaming state (current) is “general”. It is determined whether or not (S582).

  In S582, when the sub CPU 102 determines that the gaming state (current) is not “general” (when S582 is NO), the sub CPU 102 performs a pseudo BB lottery (AT / AT preparation / race) table. Referring to FIG. 41, a pseudo BB lottery process is performed based on the internal winning combination (S583). On the other hand, in S582, when the sub CPU 102 determines that the gaming state (current) is “general” (when S582 is YES), the sub CPU 102 determines the pseudo BB lottery (general) table (see FIG. 40). ) And a pseudo BB lottery process is performed based on the internal winning combination (S584).

  After the processing of S583 or S584, the sub CPU 102 determines whether or not the pseudo BB lottery has been won (S585). In S585, when it is determined that the sub CPU 102 has not won the pseudo BB lottery (when S585 is NO), the sub CPU 102 ends the pseudo BB lottery process, and the process is in general_game start process (FIG. 101). And the process proceeds to S570 in FIG.

  On the other hand, when it is determined in S585 that the sub CPU 102 has won the pseudo BB lottery (when S585 is YES), the sub CPU 102 sets “at the time of BB winning” in the pseudo BB state (S586). Next, the sub CPU 102 refers to the pseudo BB precursor lottery table (see FIG. 42) and performs a pseudo BB precursor lottery process based on the internal winning combination (S587).

  Next, the sub CPU 102 sets the lottery result of the pseudo BB precursor lottery (number of precursor games of the pseudo BB game) in the BB precursor counter (S588). Then, after the process of S588, the sub CPU 102 ends the pseudo BB lottery process, and moves the process to S570 of the general medium_game start process (see FIGS. 101 and 102).

  As described above, the pseudo BB lottery process of the present embodiment is executed by the sub control circuit 101. That is, in the present embodiment, the sub-control circuit 101 also serves as means for determining execution of the pseudo BB game (special game determination means).

[General BB_Game Start Processing]
Next, with reference to FIG. 104, the general medium BB_game start process performed in S347 in the flowchart of the start command reception process (see FIG. 84) will be described.

  First, the sub CPU 102 performs a BB entry determination process (at the start of a game) (S591). In this process, the sub CPU 102 manages on / off of a “BB entry check flag” provided to check the occurrence of an event called “command spill” due to a got action (injustice). The details of the BB entry determination process (at the start of the game) will be described later with reference to FIG.

  Next, the sub CPU 102 performs a BBJAC transition determination process (at the start of the game) (S592). In this process, the sub CPU 102 manages on / off of a “BARJAC entry check flag” provided for checking the occurrence of “command spill”. Details of the BBJAC transition determination process (at the start of the game) will be described later with reference to FIG.

  Next, the sub CPU 102 performs a BB counter management process (S593). The details of the BB counter management process will be described later with reference to FIG.

  Next, the sub CPU 102 determines whether or not the race occurrence flag is on (S594).

  When the sub CPU 102 determines in S594 that the race occurrence flag is in the on state (when S594 is YES), the sub CPU 102 refers to a race winning winning rate lottery table (not shown) and increases the winning rate after winning the race. Processing is performed (S595). Next, the sub CPU 102 sets the lottery result of the winning process after winning the race winning lottery process in the race winning percentage data (S596). Then, after the process of S596, the sub CPU 102 performs a process of S604 described later.

  On the other hand, when the sub CPU 102 determines in S594 that the race occurrence flag is not on (when S594 is NO), the sub CPU 102 determines whether or not the value of the cycle counter is “1” or more. (S597). In S597, when the sub CPU 102 determines that the value of the cycle counter is not “1” or more (when S597 is NO), the sub CPU 102 performs the process of S604 described later.

  On the other hand, when the sub CPU 102 determines in S597 that the value of the cycle counter is “1” or more (when S597 is YES), the sub CPU 102 refers to the pseudo BB cycle shortened lottery table (see FIG. 45). Then, based on the “winning combination history”, a pseudo BB cycle shortening lottery process is performed (S598). Next, the sub CPU 102 subtracts the number of shortened games determined by the pseudo BB cycle shortening lottery process from the current cycle counter value, and sets the calculation result in the cycle counter (S599).

  Next, the sub CPU 102 determines whether or not the value of the cycle counter after the arithmetic processing in S599 is “0” or less (S600). In S600, when the sub CPU 102 determines that the value of the period counter is not “0” or less (when S600 is NO), the sub CPU 102 performs the process of S604 described later.

  On the other hand, when the sub CPU 102 determines in S600 that the value of the cycle counter is equal to or less than “0” (when S600 is YES), the sub CPU 102 turns on the race occurrence flag (S601). By this process, the race effect of the transition effect game is started after the end of the pseudo BB game.

  Next, the surplus number of shortened games (absolute value of the calculation result) corresponding to the calculation result value of S599 is added to the “hotel point” (S602). Next, the sub CPU 102 sets “0” to the value of the cycle counter (S603). Then, after the process of S603, the sub CPU 102 performs a process of S604 described later.

  After the process of S596 or S603, or when S597 or S600 is NO, the sub CPU 102 refers to a push order navigation lottery table (not shown) and performs a push order navigation lottery process of a small role related to “push order bell”. (S604). Next, the sub CPU 102 sets the lottery result of the push order navigation lottery process to “push order navigation number” (S605). After the process of S605, the sub CPU 102 ends the general medium BB_game start process, and moves the process to S356 of the start command reception process (see FIG. 84).

  As described above, in S598 of the general BB_game start process of the present embodiment, the game period shortened lottery (pseudo BB cycle shortened lottery) of the normal game is performed, and this process is executed by the sub-control circuit 101. That is, in the present embodiment, the sub-control circuit 101 also serves as means (second normal game shortening means) for determining the subtraction number of the current remaining unit game number of the normal game in the pseudo BB game.

[BB entry determination process (at start of game)]
Next, with reference to FIG. 105, the BB entry determination process (at the start of the game) performed in S591 in the general BB_game start process flowchart (see FIG. 104) will be described.

  First, the sub CPU 102 turns off the BB entry check flag (S611). Next, the sub CPU 102 determines whether or not the gaming state (current) is “Race” (S612).

  In S612, when the sub CPU 102 determines that the gaming state (current) is not “race” (when S612 is NO), the sub CPU 102 determines whether or not the pseudo BB state is “waiting for BB operation”. It discriminate | determines (S613). In S613, when the sub CPU 102 determines that the pseudo BB state is not “waiting for BB operation” (in the case of NO determination in S613), the sub CPU 102 ends the BB entry determination process (at the start of the game) and performs the general process. The process proceeds to S592 in the middle BB_game start process (see FIG. 104).

  On the other hand, when the sub CPU 102 determines in S613 that the pseudo BB state is “waiting for BB operation” (when S613 is YES), the sub CPU 102 determines that the internal winning combination is “normal lip 1” to “normal lip”. 8 ”is determined (S614).

  In S614, when the sub CPU 102 determines that the internal winning combination is not “normal lip 1” to “normal lip 8” (when S614 is NO), the sub CPU 102 determines the BB entry determination process (game start) ) And the process proceeds to S592 of the general medium BB_game start process (see FIG. 104). On the other hand, when the sub CPU 102 determines in S614 that the internal winning combination is any one of “normal lip 1” to “normal lip 8” (when S614 is YES), the sub CPU 102 determines the BB entry check flag. Is turned on (S615). After the process of S615, the sub CPU 102 ends the BB entry determination process (at the start of the game), and moves the process to S592 of the general medium BB_game start process (see FIG. 104).

  Here, returning to the processing of S612 again, when the sub CPU 102 determines in S612 that the sub gaming state is “race” (when S612 is YES), the sub CPU 102 indicates that the pseudo BB state is “ It is determined whether or not “between BB flags” (S616). In S616, when the sub CPU 102 determines that the pseudo BB state is not “between BB flags” (when S616 is NO), the sub CPU 102 ends the BB entry determination process (at the start of the game), and performs the process in general. The process proceeds to S592 in the middle BB_game start process (see FIG. 104).

  On the other hand, in S616, when the sub CPU 102 determines that the pseudo BB state is “between BB flags” (when S616 is YES), the sub CPU 102 determines that the internal winning combination is “normal lip 2” or “normal lip”. 4 ”is determined (S617).

  In S617, when the sub CPU 102 determines that the internal winning combination is not “normal lip 2” or “normal lip 4” (when S617 is NO), the sub CPU 102 performs the BB entry determination process (at the start of the game). The process is terminated, and the process proceeds to S592 of the general medium BB_game start process (see FIG. 104). On the other hand, when the sub CPU 102 determines in S617 that the internal winning combination is “normal lip 2” or “normal lip 4” (when S617 is YES), the sub CPU 102 turns on the BB entry check flag. (S618). After the process of S618, the sub CPU 102 ends the BB entry determination process (at the start of the game), and moves the process to S592 of the general medium BB_game start process (see FIG. 104).

[BBJAC transition determination process (at start of game)]
Next, with reference to FIG. 106, the BBJAC transition determination process (at the start of the game) performed in S592 in the general middle BB_game start time process flowchart (see FIG. 104) will be described.

  First, the sub CPU 102 determines whether or not the BARJAC inrush check flag is on (S621). In S621, when the sub CPU 102 determines that the BARJAC inrush check flag is not in an on state (when S621 is NO), the sub CPU 102 performs processing of S625 described later.

  On the other hand, when the sub CPU 102 determines in S621 that the BARJAC inrush check flag is on (when S621 is YES), the sub CPU 102 determines whether or not the pseudo BB state is “BB in progress”. (S622). In S622, when the sub CPU 102 determines that the pseudo BB state is not “BB” (when S622 is NO), the sub CPU 102 performs a process of S625 described later.

  On the other hand, when the sub CPU 102 determines that the pseudo BB state is “BB in progress” in S622 (when S622 is YES), the sub CPU 102 turns on the BARJAC inrush flag (S623). Next, the sub CPU 102 performs the BB in-Bns state setting process described in FIG. 97 (S624). Then, after the processing of S624, the sub CPU 102 performs processing of S625 described later.

  After the process of S624, or when S621 or S622 is NO, the sub CPU 102 turns off the BARJAC inrush check flag (S625).

  Next, the sub CPU 102 determines whether or not the pseudo BB state is “BB in progress” or “ChaBB in progress” (S626). In S626, when the sub CPU 102 determines that the pseudo BB state is not “BB” or “ChaBB” (when S626 is NO), the sub CPU 102 ends the BBJAC transition determination process (at the start of the game). The process proceeds to S593 in the general medium BB_game start process (see FIG. 104).

  On the other hand, when the sub CPU 102 determines that the pseudo BB state is “BB” or “ChaBB” in S626 (when S626 is YES), the sub CPU 102 determines that the internal winning combination is “normal lip 1”. It is determined whether or not any one of “normal lip 8” and “bell lip 1” to “bell lip 4” (S627).

  When the sub CPU 102 determines in S627 that the internal winning combination is not one of “normal lip 1” to “normal lip 8” and “bell lip 1” to “bell lip 4” (when S627 is NO). The CPU 102 ends the BBJAC transition determination process (at the start of the game), and moves the process to S593 of the general medium BB_game start process (see FIG. 104). On the other hand, when the sub CPU 102 determines in S627 that the internal winning combination is any one of “normal lip 1” to “normal lip 8” and “bell lip 1” to “bell lip 4” (when S627 is YES) ) The sub CPU 102 turns on the BARJAC inrush check flag (S628). After the process of S628, the sub CPU 102 ends the BBJAC transition determination process (at the start of the game), and moves the process to S593 in the general medium BB_game start process (see FIG. 104).

[BB counter management processing]
Next, with reference to FIG. 107, the BB counter management process performed in S593 in the general BB_game start process flowchart (see FIG. 104) will be described.

  First, the sub CPU 102 determines whether or not the pseudo BB state is “ChaBB in progress” (S631). When the sub CPU 102 determines in S631 that the pseudo BB state is not “ChaBB” (when S631 is NO), the sub CPU 102 performs processing of S634 described later.

  On the other hand, when the sub CPU 102 determines in S631 that the pseudo BB state is “ChaBB in progress” (S631 is YES), the sub CPU 102 determines whether or not the value of the BB game counter is greater than “0”. Is discriminated (S632).

  In S632, when the sub CPU 102 determines that the value of the BB game counter is not larger than “0” (when S632 is NO), the sub CPU 102 performs the process of S634 described later. On the other hand, when the sub CPU 102 determines in S632 that the value of the BB game counter is greater than “0” (when S632 is YES), the sub CPU 102 subtracts “1” from the value of the BB game counter (S633). ). Then, after the processing of S633, the sub CPU 102 performs processing of S634 described later.

  After the processing of S633, or when S631 or S632 is NO, the sub CPU 102 determines whether or not the pseudo BB state is “JAC in progress” or “Cha JAC in progress” (S634).

  In S634, when the sub CPU 102 determines that the pseudo BB state is not “JAC” or “Cha JAC” (when S634 is NO), the sub CPU 102 terminates the BB counter management process and performs the process in general. The process proceeds to S594 in the BB_game start process (see FIG. 104). On the other hand, when the sub CPU 102 determines in S634 that the pseudo BB state is “JAC in progress” or “Cha JAC in progress” (when S634 is YES), the sub CPU 102 determines that the internal winning combination is “push order bell”. It is determined whether or not (any one of winning numbers “9” to “12”) (S635).

  In S635, when the sub CPU 102 determines that the internal winning combination is not “push order bell” (when S635 is NO), the sub CPU 102 ends the BB counter management process, and the process is in progress. The process proceeds to S594 of the process (see FIG. 104). On the other hand, when the sub CPU 102 determines in S635 that the internal winning combination is “push order bell” (when S635 is YES), the sub CPU 102 determines whether or not the number of times of JAC bell navigation is greater than “0”. A determination is made (S636).

  In S636, when the sub CPU 102 determines that the number of times of JAC bell navigation is not greater than “0” (when S636 is NO), the sub CPU 102 ends the BB counter management process, and the process is in progress during the general BB_game start. The process proceeds to S594 of the process (see FIG. 104).

  On the other hand, when the sub CPU 102 determines in S636 that the JAC bell navigation count is greater than “0” (in the case where S636 is YES), the sub CPU 102 subtracts “1” from the JAC bell navigation count (S637). Then, after the process of S637, the sub CPU 102 ends the BB counter management process, and moves the process to S594 of the general medium BB_game start process (see FIG. 104).

[Processing at the start of the game during the race]
Next, with reference to FIG. 108, a description will be given of the in-race_game start time process performed in S349 in the flowchart (see FIG. 84) of the start command reception time process.

  First, the sub CPU 102 performs the BB entry determination process (at the start of the game) described with reference to FIG. 105 (S641). Next, the sub CPU 102 adds “1” to the number of racing games (S642).

  Next, the sub CPU 102 determines whether or not the number of racing games is “1” (S643). When the sub CPU 102 determines in S643 that the number of racing games is not “1” (when S643 is NO), the sub CPU 102 performs the process of S650 described later.

  On the other hand, when the sub CPU 102 determines that the number of racing games is “1” in S643 (when S643 is YES), the sub CPU 102 is set with reference to the race result lottery table (see FIG. 38). A race result lottery process is performed based on the race win rate data (S644). In this process, the result of the race effect performed in the transition effect game (winning win / non-winning) is determined. That is, in the present embodiment, the race result (AT game winning / non-winning) is determined by lottery in the first game (starting game) of the race effect.

  Next, the sub CPU 102 determines whether or not the race win is won by the race result lottery (whether or not the AT is won) (S645).

  When determining in S645 that the sub CPU 102 has won the race (when S645 is YES), the sub CPU 102 turns on the race victory flag (S646). Then, after the process of S646, the sub CPU 102 performs a process of S650 described later.

  On the other hand, when it is determined in S645 that the sub CPU 102 has not won the race (when S645 is NO), the sub CPU 102 determines whether or not the value of the consecutive race loss counter is “9” or more. (S647).

  In S647, when the sub CPU 102 determines that the value of the race consecutive loss counter is “9” or more (when S647 is YES), the sub CPU 102 turns the race victory flag on (S648). That is, when the number of consecutive losses in the race is “10” (ceiling), the race victory flag is turned on, and AT winning is achieved. Then, after the process of S648, the sub CPU 102 performs a process of S650 described later.

  On the other hand, when the sub CPU 102 determines in S647 that the value of the race losing counter is not “9” or more (when S647 is NO), the sub CPU 102 adds “1” to the value of the race losing counter (S649). ). Then, after the process of S649, the sub CPU 102 performs a process of S650 described later.

  After the process of S646, S648, or S649, or when S643 is NO, the sub CPU 102 performs the pseudo BB lottery process described with reference to FIG. 103 (S650). Next, the sub CPU 102 determines whether or not the pseudo BB state is “BB winning” (S651).

  In S651, when the sub CPU 102 determines that the pseudo BB state is not “BB winning” (when S651 is NO), the sub CPU 102 performs processing of S653 described later. On the other hand, when the sub CPU 102 determines in S651 that the pseudo BB state is “BB winning” (when S651 is YES), the sub CPU 102 turns on the race victory flag (S652).

  After the processing of S652 or when S651 is NO, the sub CPU 102 determines whether the pseudo BB state is “between BB flags” or “waiting for BB operation” (S653). In S653, when the sub CPU 102 determines that the pseudo BB state is not “between BB flags” or “waiting for BB operation” (when S653 is NO), the sub CPU 102 performs the process of S656 described later.

  On the other hand, in S653, when the sub CPU 102 determines that the pseudo BB state is “between BB flags” or “waiting for BB operation” (in the case where S653 is YES), the sub CPU 102 directly adds the lottery table (FIG. 46). Referring to), on the basis of the “winning combination history”, the number of AT games is added and lottery processing (directly added lottery processing) is performed (S654). Next, the sub CPU 102 adds the value of the lottery result of the direct addition lottery process (the number of additional AT games) to the remaining number of AT games (S655).

  After the processing of S655, or when S653 is NO, the sub CPU 102 refers to a push order navigation lottery table (not shown) and performs a push order navigation lottery process of a small role related to “push order bell” (S656). Next, the sub CPU 102 sets the lottery result of the push order navigation lottery process to “push order navigation number” (S657). Then, after the process of S657, the sub CPU 102 ends the process during the race_game start, and moves the process to S356 of the process at the time of start command reception (see FIG. 84).

[Under AT preparation_Processing at game start]
Next, with reference to FIG. 109, the AT preparation_game start process performed in S351 in the flowchart of the start command reception process (see FIG. 84) will be described.

  First, the sub CPU 102 performs the pseudo BB lottery process described with reference to FIG. 103 (S661). Next, the sub CPU 102 determines whether or not the gaming state (current) is different from the gaming state (previous) (S662).

  In S662, when the sub CPU 102 determines that the gaming state (current) is different from the gaming state (previous) (when S662 is YES), the sub CPU 102 performs processing of S675 described later. On the other hand, when the sub CPU 102 determines in S662 that the gaming state (current) is not different from the gaming state (previous) (when S662 is NO), the sub CPU 102 determines that the “race winner” is “male A”. Is determined (S663).

  In S663, when the sub CPU 102 determines that the “race winner” is “male A” (when S663 is YES), the sub CPU 102 performs the process at the time of the male A victory_game start (S664). . In this process, the sub CPU 102 determines the AT start game number of AT games (the number of basic stay games in the AT state) according to the content of the AT start game number determination game when the “male A” wins. In this process, the sub CPU 102 turns on the AT entry flag. Then, after the processing of S664, the sub CPU 102 performs processing of S675 described later.

  On the other hand, when the sub CPU 102 determines in S663 that the “race winner” is not “male A” (when S663 is NO), the sub CPU 102 determines whether the “race winner” is “male B”. It is determined whether or not (S665).

  In S665, when the sub CPU 102 determines that the “race winner” is “male B” (when S665 is YES), the sub CPU 102 performs a process when man B wins_game start (S666). . In this process, the sub CPU 102 determines the AT start game number of the AT game in accordance with the content of the AT start game number determination game when the “male B” wins. In this process, the sub CPU 102 turns on the AT entry flag. Then, after the processing of S666, the sub CPU 102 performs processing of S675 described later.

  On the other hand, when the sub CPU 102 determines in S665 that the “race winner” is not “male B” (when S665 is NO), the sub CPU 102 determines whether the “race winner” is “female A”. It is determined whether or not (S667).

  In S667, when the sub CPU 102 determines that the “race winner” is “female A” (when S667 is YES), the sub CPU 102 performs the process when the female A wins_game start (S668). . In this process, the sub CPU 102 determines the AT start game number of the AT game according to the content of the AT start game number determination game when the “woman A” wins. In this process, the sub CPU 102 turns on the AT entry flag. Then, after the processing of S668, the sub CPU 102 performs processing of S675 described later.

  On the other hand, in S667, when the sub CPU 102 determines that the “race winner” is not “woman A” (NO in S667), the sub CPU 102 determines whether or not the “race winner” is “kappa”. Is determined (S669).

  In S669, when the sub CPU 102 determines that the “race winner” is “kappa” (when S669 is YES), the sub CPU 102 performs a process at the time of Kappa victory_game start (S670). In this process, the sub CPU 102 determines the AT start game number of the AT game according to the content of the AT start game number determination game at the time of “Kappa” victory. Details of the Kappa victory_game start process will be described later with reference to FIG. 110 described later. Then, after the process of S670, the sub CPU 102 performs a process of S675 described later.

  On the other hand, when the sub CPU 102 determines in S669 that the “race winner” is not “kappa” (when S669 is NO), the sub CPU 102 determines whether or not the “race winner” is “Tengu”. Is discriminated (S671).

  In S671, when the sub CPU 102 determines that the “race winner” is “Tengu” (when S671 is “YES”), the sub CPU 102 performs a process when Tengu wins_game start (S672). In this process, the sub CPU 102 determines the AT start game number of the AT game according to the content of the AT start game number determination game at the time of the above-mentioned “Tengu” victory. In this process, the sub CPU 102 turns on the AT entry flag. Then, after the processing of S672, the sub CPU 102 performs processing of S675 described later.

  On the other hand, when the sub CPU 102 determines in S671 that the “race winner” is not “Tengu” (when S671 is NO), the sub CPU 102 determines that “race winner” is “male A / male B”. It is determined whether or not there is (S673). In S673, when the sub CPU determines that the “race winner” is not “male A / male B” (when S673 is NO), the sub CPU performs a process of S675 described later.

  On the other hand, in S673, when the sub CPU 102 determines that the “race winner” is “male A / male B” (when S673 is YES), the sub CPU 102 determines that the man A / m B wins_game. Processing at the start is performed (S674). In this process, the sub CPU 102 determines the AT start game number of the AT game in accordance with the content of the AT start game number determination game when the “male A / male B” wins. In this process, the sub CPU 102 turns on the AT entry flag. Then, after the processing of S674, the sub CPU 102 performs processing of S675 described later.

  After S664, S666, S668, S670, S672, or S674, if S662 is YES, or if S673 is NO, the sub CPU 102 refers to a push order navigation lottery table (not shown), Is performed in the push order navigation lottery process of the small role relating to "" (S675). Next, the sub CPU 102 sets the lottery result of the push order navigation lottery process to “push order navigation number” (S676). After the process of S676, the sub CPU 102 ends the AT preparation_game start process, and moves the process to S356 of the start command reception process (see FIG. 84).

[When Kappa wins _Processing at game start]
Next, with reference to FIG. 110, the Kappa victory_game start time process performed in S670 in the AT preparation_game start time process flowchart (see FIG. 109) will be described.

  First, the sub CPU 102 determines whether the kappa sushi MAP data (see FIG. 51) of the current game is “0” (whether the kappa sushi MAP is not set) (S681).

  In step S681, when the sub CPU 102 determines that the kappa sushi MAP data is not “0” (in the case where S681 is NO), the sub CPU 102 moves the kappa sushi MAP data from the next game onward toward the storage area on the top side. Move one (S682). Specifically, the sub CPU 102 stores the second plate to the tenth plate of kappa sushi MAP data (any one of “1” to “8” is stored or is empty (“0”)). The shift is made to the storage area for the kappa sushi MAP data for the 9th to 9th dishes, and the storage area for the 10th dish for the sushi MAP data is emptied (“0” is stored). Then, after the processing of S682, the sub CPU 102 performs processing of S687 described later.

  On the other hand, when the sub CPU 102 determines that the kappa sushi MAP data is “0” in S681 (when S681 is YES), the sub CPU 102 determines the AT start game number lottery (when Kappa wins) table (FIG. 47). Referring to FIG. 50), kappa sushi MAP lottery processing is performed (S683). By this process, the number “Kappa Sushi MAP” is determined. Next, the sub CPU 102 refers to the kappa sushi MAP data table (see FIG. 51), and based on the number of “kappa sushi MAP” determined in S683, the kappa sushi MAP data ( Sushi data) is acquired (S684).

  After the processing of S684, the sub CPU 102 sets the kappa sushi MAP data from the first dish to the tenth dish acquired in S684 (S685). Specifically, the sub CPU 102 stores the kappa sushi MAP data from the first dish to the tenth dish specified in the kappa sushi MAP in the corresponding storage area. Next, the sub CPU 685 sets an initial value “5” to the kappa end counter (S686).

  After the processing of S682 or S686, the sub CPU 102 determines whether or not the sixth plate of kappa sushi MAP data is empty (“0”) (S687). In step S687, when the sub CPU 102 determines that the sixth plate of kappa sushi MAP data is not empty (NO in step S687), the sub CPU 102 performs processing in step S691 described later.

  On the other hand, when the sub CPU 102 determines in S687 that the sixth plate of kappa sushi MAP data is empty (when S687 is YES), the sub CPU 102 determines the AT start game number lottery (when Kappa wins). With reference to the table (see FIGS. 47 to 50), kappa sushi MAP lottery processing is performed based on the current kappa sushi MAP number (S688). By this process, the number of “Kappa Sushi MAP” set in the sixth dish is determined.

  Next, the sub CPU 102 refers to the kappa sushi MAP data table (see FIG. 51), and obtains 10 dishes of kappa sushi MAP data based on the number of “kappa sushi MAP” determined in S688 (S689). . Next, the sub CPU 102 sets the kappa sushi MAP data for the 10 dishes specified in the kappa sushi MAP acquired in S689 in the storage area for the sixth and subsequent dishes that are empty (S690).

  After the process of S690 or when S687 is NO, the sub CPU 102 determines whether or not the internal winning combination is “group 1 combination” (S691). The “group 1 combination” is an internal winning combination corresponding to any of the winning numbers “9” to “14”, and “213 bell 1” to “213 bell 8”, “231 bell 1” to “231”. Inside of any of "Bell 8", "312 Bell 1" to "312 Bell 8", "321 Bell 1" to "321 Bell 8", "1xx 3 Bells", "2xx 3 Bells" and "3xx 3 Bells" It is a winning role.

  When the sub CPU 102 determines in S691 that the internal winning combination is not “group 1 combination” (when S691 is NO), the sub CPU 102 refers to the kappa sushi data conversion occurrence lottery table (see FIG. 53), A kappa sushi data conversion generation lottery process is performed based on the internal winning combination (S692).

  Next, the sub CPU 102 determines whether or not the kappa sushi data conversion generation lottery has been won (S693). When the sub CPU 102 determines that the kappa sushi data conversion occurrence lottery has not been won in S693 (when S693 is NO), the sub CPU 102 ends the kappa victory_game start process and prepares for AT preparation. The process proceeds to S675 in the middle_game start process (see FIG. 109).

  On the other hand, when it is determined in S693 that the sub CPU 102 has won the kappa sushi data conversion generation lottery (when S693 is YES), the sub CPU 102 reads the kappa sushi data conversion lottery table (see FIGS. 54 to 58). The conversion lottery process of sushi material (kappa sushi MAP data) for 5 dishes (2nd to 6th dishes) after the next game is performed (S694).

  Next, the sub CPU 102 rewrites the second to sixth plates of kappa sushi MAP data (sushi material) based on the lottery result of the kappa sushi data conversion generation lottery processing of S694 (S695). After the process of S695, the sub CPU 102 ends the Kappa victory_game start process and moves the process to S675 of the AT preparation_game start process (see FIG. 109).

  Here, returning to the processing of S691 again, in S691, when the sub CPU 102 determines that the internal winning combination is “group 1 role” (when S691 is YES), the sub CPU 102 determines the number of kappa games. With reference to the acquired lottery table (see FIG. 52), the number of acquired AT games is determined by lottery based on the kappa sushi MAP data (sushi material) (S696). Next, the sub CPU 102 adds the determined number of acquired AT games to the number of currently acquired AT games (S697).

  Next, the sub CPU 102 determines whether the sushi material at the time of acquiring the AT game number is “squid”, “salmon”, or “tuna” (the kappa sushi MAP data is “1”, “4”, “6”). Is determined) (S698). In S698, when the sub CPU 102 determines that the sushi material is not any of “squid”, “salmon”, and “tuna” (when S698 is NO), the sub CPU 102 performs processing of S700 described later.

  On the other hand, when the sub CPU 102 determines in S698 that the sushi material is any one of “squid”, “salmon”, and “tuna” (when S698 is YES), the sub CPU 102 determines the value of the kappa end counter. 1 is subtracted (S699).

  After the processing of S699 or when S698 is NO, the sub CPU 102 determines whether or not the value of the kappa end counter is less than “0” (S700).

  In S700, when the sub CPU 102 determines that the value of the kappa end counter is not less than “0” (when S700 is NO), the sub CPU 102 determines the number of AT games after the addition operation of S697 as “AT start game number”. ”Is set (S701). Then, after the process of S701, the sub CPU 701 ends the Kappa victory_game start process, and moves the process to S675 of the AT preparation_game start process (see FIG. 109).

  On the other hand, when the sub CPU 102 determines in S700 that the value of the kappa end counter is less than “0” (when S700 is YES), the sub CPU 102 turns on the AT entry flag (S702). Next, the sub CPU 102 sets “20 times” in “BET return chance” (S703).

  By the processing of S703, it is possible to perform lottery by pressing the BET button 20 times (resurrection of consecutive hits) as a recovery lottery of the AT start game number determination game performed at the end of the Kappa victory_game start processing. If the winning lottery by pressing the BET button 20 times is won, the Kappa victory time_game start time process (AT start game number acquisition process) is performed again.

  Then, after the processing of S703, the sub CPU 102 ends the Kappa victory_game start processing, and moves the processing to S675 of AT preparation_game start processing (see FIG. 109).

  Although not shown in FIG. 110, if the sushi material is “Kappaki” in the lottery process for the number of acquired AT games in S696 (when the kappa sushi MAP data is “3”), “LIFE UP” Will win. In this case, the sub CPU 102 performs a process of adding “1” to the value of the Kappa end counter instead of a series of processes from the AT game number addition process (S697) to the Kappa end counter subtraction process (S699). Done.

  As described above, in S684 of the Kappa victory_game start process of the present embodiment, ten dishes (10 games) of sushi material (kappa sushi MA data) sequentially displayed on the liquid crystal display device 11 are determined. This process is executed by the sub-control circuit 101. That is, in the present embodiment, the sub-control circuit 101 also serves as means (game information determination means) for determining game information for 10 games sequentially displayed on the liquid crystal display device 11 in the kappa sushi production. In addition, in S695 of the Kappa victory_game start process, if the internal winning combination is other than “Group role 1” (for example, “losing”) and the winning lottery is a kappa sushi data conversion generation lottery, the second to sixth dishes The kappa sushi MAP data (sushi material) for the eyes is rewritten, and this processing is executed by the sub-control circuit 101. That is, in this embodiment, the sub-control circuit 101 also serves as means (game information changing means) for changing the kappa sushi MAP data (sushi material) for the second and subsequent dishes when the internal winning combination is lost. In S697 of the Kappa victory_game start process, if the internal winning combination is “group winning 1” (the specified internal winning combination), the number of acquired AT games is added to the number of currently acquired AT games. This process is executed by the sub-control circuit 101. In other words, in the present embodiment, the sub control circuit 101 also serves as means for adding the number of acquired AT games to the number of currently acquired AT games (unit game number adding means).

  In addition, in S697 to S699 of the Kappa victory_game start process, when the internal winning combination is “Group role 1”, the value of the Kappa end counter is updated according to the sushi material (Kappa Sushi MA data) (“ 1 ”subtraction or“ 1 ”addition), and this processing is executed by the sub-control circuit 101. That is, in the present embodiment, the sub-control circuit 101 also serves as means for updating the value of the kappa end counter (end information update means). In S701 of the Kappa victory_game start process, if the value of the Kappa end counter is less than “0” (when the game for determining the AT start game number at the time of Kappa victory ends), it is acquired at that time. The total number of AT games that are present is set as the number of AT start games, and this process is executed by the sub-control circuit 101. That is, in the present embodiment, the sub-control circuit 101 sets means for setting the total number of AT games acquired until the end of the game for determining the number of AT start games at the time of Kappa victory as the number of AT start games (number of basic unit games). It also serves as a determination means. Further, in S703 of the Kappa victory_game start time process, at the end of the AT start game number determination game, an AT start game number determination game revival lottery at the time of Kappa victory is performed, and this process is executed by the sub-control circuit 101. The In other words, in the present embodiment, the sub-control circuit 101 performs means for reviving the AT start game number determination game at the time of Kappa victory at the end of the game period of the AT start game number determination game at the time of Kappa victory (return lottery means). Also doubles.

[Processing during AT_game start]
Next, with reference to FIG. 111, a description will be given of the AT_game start process performed in S353 in the flowchart of the start command reception process (see FIG. 84).

  First, the sub CPU 102 determines whether or not the number of remaining AT games is greater than “0” (S711).

  In S711, when the sub CPU 102 determines that the number of remaining AT games is not greater than “0” (when S711 is NO), the sub CPU 102 performs a process of S713 described later. On the other hand, when the sub CPU 102 determines in S711 that the number of remaining AT games is larger than “0” (when S711 is YES), the sub CPU 102 subtracts “1” from the number of remaining AT games (S712).

  After the processing of S712 or when S711 is NO, the sub CPU 102 determines whether or not the gaming state (current) is different from the gaming state (previous) and the gaming state (previous) is “AT ready”. (S713). In S713, when the sub CPU 102 determines that the determination condition of S713 is not satisfied (when S713 is NO), the sub CPU 102 performs a process of S718 described later.

  On the other hand, when the sub CPU 102 determines in S713 that the determination condition of S713 is satisfied (in the case where S713 is YES), the sub CPU 102 refers to the winning person lottery table (see FIG. 34) and determines the race victory target ( A candidate) person lottery process is performed (S714). Next, the sub CPU 102 sets the lottery result of the victory subject lottery process to “race winner” (S715).

  Next, the sub CPU 102 refers to the post-AT race victory expectation degree data selection lottery table (see FIG. 39), and performs a win rate lottery process (post-AT race win rate lottery process) performed in the transition effect game after AT (see FIG. 39). S716). Next, the sub CPU 102 sets the lottery result of the after-AT race winning rate lottery processing in S716 to the race winning rate data (S717).

  After the process of S717 or when S713 is NO, the sub CPU 102 performs the pseudo BB lottery process described with reference to FIG. 103 (S718). Next, the sub CPU 102 refers to the directly added lottery table (see FIG. 46), and performs an additional lottery process (directly added lottery process) for the number of AT games (S719). Next, the sub CPU 102 adds the value of the lottery result of the direct addition lottery process (the number of additional AT games) to the number of remaining AT games (S720).

  Next, the sub CPU 102 refers to a push order navigation lottery table (not shown) and performs a push order navigation lottery process for a small role related to “push order bell” (S721). Next, the sub CPU 102 sets the lottery result of the push order navigation lottery process to “push order navigation number” (S722). Then, after the processing of S722, the sub CPU 102 ends the AT_game start processing, and moves the processing to S356 of the start command reception processing (see FIG. 84).

  As described above, in the in-AT game start process of this embodiment, the number of AT games is added and lottery is performed, and this process is executed by the sub-control circuit 101. In other words, in the present embodiment, the sub control circuit 101 also serves as means (notification game addition means, first notification game addition means) for determining the addition number of the unit game number of AT games in AT games.

[Process during BB_game start during AT]
Next, with reference to FIG. 112, the AT-time BB_game start time process performed in S355 in the flowchart of the start command reception process (see FIG. 84) will be described.

  First, the sub CPU 102 performs the BB entry determination process (at the start of the game) described with reference to FIG. 105 (S731). Next, the sub CPU 102 performs the BBJAC transition determination process (at the start of the game) described in FIG. 106 (S732). Next, the sub CPU 102 performs the BB counter management process described in FIG. 107 (S733).

  Next, the sub CPU 102 refers to the directly added lottery table (see FIG. 46), and performs an additional lottery process (directly added lottery process) for the number of AT games (S734). Next, the sub CPU 102 adds the value of the lottery result of the direct addition lottery process (the number of additional AT games) to the remaining number of AT games (S735).

  Next, the sub CPU 102 refers to a push order navigation lottery table (not shown), and performs a push order navigation lottery process of a small role related to “push order bell” (S736). Next, the sub CPU 102 sets the lottery result of the push order navigation lottery process to “push order navigation number” (S737). Then, after the process of S737, the sub CPU 102 ends the AT-time BB_game start process, and moves the process to S356 of the start command reception process (see FIG. 84).

  As described above, in the in-AT BB_game start process of this embodiment, the number of AT games is added and lottery is performed, and this process is executed by the sub-control circuit 101. That is, in the present embodiment, the sub-control circuit 101 also serves as means (second notification game addition means) for determining the addition number of the unit game number of AT games in the pseudo BB game.

[Game state setting process]
Next, with reference to FIG. 113, the game state setting process performed in S357 in the flowchart (see FIG. 84) of the start command reception process will be described.

  First, the sub CPU 102 determines whether or not the gaming state (current) is “general” (S741).

  In S741, when the sub CPU 102 determines that the gaming state (current) is “general medium” (when S741 is YES), the sub CPU 102 performs general medium_gaming state setting processing (S742). The details of the general medium_game state setting process will be described later with reference to FIG. 114 described later. Then, after the processing of S742, the sub CPU 102 ends the gaming state setting processing and also ends the start command reception processing (see FIG. 84).

  On the other hand, in S741, when the sub CPU 102 determines that the gaming state (current) is not “general” (when S741 is NO), the sub CPU 102 has the gaming state (current) “general BB”. Whether or not (S743).

  In S743, when the sub CPU 102 determines that the gaming state (current) is “general medium BB” (when S743 is YES), the sub CPU 102 performs general medium BB_gaming state setting processing (S744). Details of the general medium BB_game state setting process will be described later with reference to FIG. 115 described later. Then, after the process of S744, the sub CPU 102 ends the gaming state setting process and also ends the start command reception process (see FIG. 84).

  On the other hand, in S743, when the sub CPU 102 determines that the gaming state (current) is not “general medium BB” (when S743 is NO), the sub CPU 102 has the gaming state (current) “race”. Is determined (S745).

  In S745, when the sub CPU 102 determines that the gaming state (current) is “race” (when S745 is YES), the sub CPU 102 performs a racing_gaming state setting process (S746). Details of the racing_game state setting process will be described later with reference to FIG. 116 described later. Then, after the process of S746, the sub CPU 102 ends the gaming state setting process and also ends the start command reception process (see FIG. 84).

  On the other hand, when the sub CPU 102 determines in S745 that the gaming state (current) is not “race” (when S745 is NO), the sub CPU 102 has the gaming state (current) “AT ready”. Whether or not (S747).

  In S747, when the sub CPU 102 determines that the gaming state (current) is “AT ready” (when S747 is YES), the sub CPU 102 performs AT preparing_game state setting processing (S748). . The details of the AT preparation_game state setting process will be described later with reference to FIG. 117 described later. Then, after the process of S748, the sub CPU 102 ends the gaming state setting process and also ends the start command reception process (see FIG. 84).

  On the other hand, when the sub CPU 102 determines in S747 that the gaming state (current) is not “AT ready” (when S747 is NO), the sub CPU 102 determines that the gaming state (current) is “AT BB”. It is determined whether or not there is (S749).

  When the sub CPU 102 determines in S749 that the gaming state (current) is “AT BB” (when S749 is YES), the sub CPU 102 performs an AT BB_gaming state setting process (S750). Details of the AT BB_gaming state setting process will be described later with reference to FIG. 118 described later. Then, after the process of S750, the sub CPU 102 ends the gaming state setting process and also ends the start command reception process (see FIG. 84).

  On the other hand, when the sub CPU 102 determines in S749 that the sub gaming state is not “AT BB” (when S749 is NO), the sub CPU 102 ends the gaming state setting process and also receives a start command reception process. (See FIG. 84) also ends.

  Although not shown in FIG. 113, in the series of repeated processing of the above-described sub gaming state determination process and gaming state setting process during the gaming state setting process, the sub gaming state is actually “W chance”. A determination process for determining whether or not there is a game state setting process for “W Chance”, a determination process for determining whether or not the sub gaming state is “AT”, and a game state setting process for “AT” are also performed. .

[General_Game state setting process]
Next, with reference to FIG. 114, the general_game state setting process performed in S742 in the flowchart of the game state setting process (see FIG. 113) will be described.

  First, the sub CPU 102 determines whether or not the value of the cycle counter is “0” (S761).

  In S761, when the sub CPU 102 determines that the value of the cycle counter is not “0” (when S761 is NO), the sub CPU 102 performs processing of S763 described later. On the other hand, when the sub CPU 102 determines in S761 that the value of the cycle counter is “0” (when S761 is YES), the sub CPU 102 sets “in race” to the gaming state (next time) ( S762).

  After the process of S762 or when S761 is NO, the sub CPU 102 determines whether or not the value of the BB precursor counter is “0” (S763). In S763, when the sub CPU 102 determines that the value of the BB precursor counter is not “0” (when S763 is NO), the sub CPU 102 ends the general medium_gaming state setting process and the gaming state setting process. (See FIG. 113) also ends.

  On the other hand, when the sub CPU 102 determines in S763 that the value of the BB precursor counter is “0” (when S763 is YES), the sub CPU 102 determines that the gaming state (next time) is “race”. It is determined whether or not (S764).

  In S764, when the sub CPU102 determines that the gaming state (next time) is not “race” (when S764 is NO), the sub CPU102 performs the process of S766 described later. On the other hand, when the sub CPU 102 determines that the gaming state (next time) is “race” in S764 (when S764 is YES), the sub CPU 102 turns on the race occurrence flag (S765).

  After the process of S765 or when S764 is NO, the sub CPU 102 determines whether or not the race occurrence flag is on (S766). In S766, when the sub CPU 102 determines that the race occurrence flag is not on (when S766 is NO), the sub CPU 102 performs the process of S768 described later. On the other hand, when the sub CPU 102 determines in S766 that the race occurrence flag is on (when S766 is YES), the sub CPU 102 sets “0” in the cycle counter (S767).

  After the processing of S767 or when S766 is NO, the sub CPU 102 sets “general BB” in the gaming state (next time) (S768). Then, after the process of S768, the sub CPU 102 ends the general medium_game state setting process and also ends the game state setting process (see FIG. 113).

[General BB_Game state setting process]
Next, with reference to FIG. 115, the general medium BB_game state setting process performed in S744 in the flowchart of the game state setting process (see FIG. 113) will be described.

  First, the sub CPU 102 determines whether or not the value of the BB game counter is “0” (S771). In S771, when the sub CPU 102 determines that the value of the BB game counter is not “0” (when S771 is NO), the sub CPU 102 ends the general BB_game state setting process and the game state setting process. (See FIG. 113) also ends.

  On the other hand, when the sub CPU 102 determines in S771 that the value of the BB game counter is “0” (when S771 is YES), the sub CPU 102 determines that the pseudo BB state is “ChaJAC” and JAC It is determined whether or not the number of times of bell navigation is greater than “0” (S772). In S772, when the sub CPU 102 determines that the determination condition of S772 is satisfied (when S772 is YES), the sub CPU 102 ends the general BB_gaming state setting process and the gaming state setting process (see FIG. 113). ) Also ends.

  On the other hand, when the sub CPU 102 determines in S772 that the determination condition in S772 is not satisfied (when S772 is NO), the sub CPU 102 determines whether or not the race occurrence flag is in the on state (S773). .

  In S773, when the sub CPU 102 determines that the race occurrence flag is not on (when S773 is NO), the sub CPU 102 sets “general medium” to the gaming state (next time) (S774). Then, after the processing of S774, the sub CPU 102 ends the general BB_gaming state setting process and also ends the gaming state setting process (see FIG. 113).

  On the other hand, when the sub CPU 102 determines in S773 that the race occurrence flag is on (when S773 is YES), the sub CPU 102 sets “in race” to the gaming state (next time) (S775). . Then, after the processing of S775, the sub CPU 102 ends the general BB_gaming state setting process and also ends the gaming state setting process (see FIG. 113).

[Race_Game state setting process]
Next, with reference to FIG. 116, the in-race_gaming state setting process performed in S746 in the gaming state setting process flowchart (see FIG. 113) will be described.

  First, the sub CPU 102 determines whether or not the number of racing games is the tenth game (S781). When the sub CPU 102 determines that the number of racing games is not the tenth game in S781 (when S781 is NO), the sub CPU 102 ends the in-race_gaming state setting process and the gaming state setting process (FIG. 113) also ends.

  On the other hand, in S781, when the sub CPU 102 determines that the number of race games is the tenth game (when S781 is YES), the sub CPU 102 determines whether or not the race victory flag is in an on state ( S782).

  When the sub CPU 102 determines in S782 that the race victory flag is not on (when S782 is NO), the sub CPU 102 sets “general medium” in the gaming state (next time) (S783). Then, after the process of S783, the sub CPU 102 ends the in-race_gaming state setting process and also ends the gaming state setting process (see FIG. 113).

  On the other hand, when the sub CPU 102 determines in S782 that the race victory flag is on (when S782 is YES), the sub CPU 102 determines whether or not the value of the BB precursor counter is “0”. (S784).

  In S784, when the sub CPU 102 determines that the value of the BB precursor counter is not “0” (when S784 is NO), the sub CPU 102 sets “AT ready” to the gaming state (next time) (S785). ). Then, after the process of S785, the sub CPU 102 ends the in-race_gaming state setting process and also ends the gaming state setting process (see FIG. 113).

  On the other hand, in S784, when the sub CPU 102 determines that the value of the BB precursor counter is “0” (when S784 is YES), the sub CPU 102 sets “BB during AT” to the gaming state (next time). (S786). Then, after the processing of S786, the sub CPU 102 ends the in-race_gaming state setting process and also ends the gaming state setting process (see FIG. 113).

[AT preparation_game state setting process]
Next, with reference to FIG. 117, the AT preparation_game state setting process performed in S748 in the flowchart of the game state setting process (see FIG. 113) will be described.

  First, the sub CPU 102 determines whether or not the AT entry flag is on (S791). In S791, when the sub CPU 102 determines that the AT entry flag is not on (when S791 is NO), the sub CPU 102 ends the AT preparation_game state setting process and also sets the game state setting process (FIG. 113) also ends.

  On the other hand, when the sub CPU 102 determines in S791 that the AT entry flag is on (when S791 is YES), the sub CPU 102 sets “AT in progress” to the gaming state (next time) (S792). . Next, the sub CPU 102 determines whether or not the value of the BB precursor counter is “0” or more (S793).

  In S793, when the sub CPU 102 determines that the value of the BB precursor counter is not equal to or greater than “0” (when S793 is NO), the sub CPU 102 performs processing of S796 described later.

  On the other hand, when the sub CPU 102 determines that the value of the BB precursor counter is “0” or more in S793 (when S793 is YES), the sub CPU 102 sets “0” to the value of the BB precursor counter. (S794). Next, the sub CPU 102 sets “AT BB” in the gaming state (next time) (S795).

  After the processing of S795 or when S793 is NO, the sub CPU 102 turns off the “game number lottery end flag” (S796). The “game number lottery end flag” is a flag indicating whether or not to end the AT start game number determination game. Then, after the process of S796, the sub CPU 102 ends the AT preparing_game state setting process and also ends the game state setting process (see FIG. 113).

[AT during BB_gaming state setting process]
Next, with reference to FIG. 118, the BB_gaming state setting process during AT performed in S750 in the flowchart of the gaming state setting process (see FIG. 113) will be described.

  First, the sub CPU 102 determines whether or not the value of the BB game counter is “0” (S801). In S801, when the sub CPU 102 determines that the value of the BB game counter is not “0” (when S801 is NO), the sub CPU 102 ends the AT-time BB_gaming state setting process and the gaming state setting process. (See FIG. 113) also ends.

  On the other hand, when the sub CPU 102 determines in S801 that the value of the BB game counter is “0” (when S801 is YES), the sub CPU 102 determines that the pseudo BB state is “ChaJAC” and JAC. It is determined whether or not the number of bell navigations is greater than “0” (S802). In S802, when the sub CPU 102 determines that the determination condition of S802 is satisfied (when S802 is YES), the sub CPU 102 ends the AT BB_gaming state setting process and the gaming state setting process (see FIG. 113). ) Also ends.

  On the other hand, when the sub CPU 102 determines in S802 that the determination condition in S802 is not satisfied (when S802 is NO), the sub CPU 102 determines whether or not the race victory flag is in an on state (S803). .

  In S803, when the sub CPU 102 determines that the race victory flag is on (when S803 is YES), the sub CPU 102 sets “AT ready” in the gaming state (next time) (S804). Then, after the processing of S804, the sub CPU 102 ends the BB_gaming state setting process during AT and also ends the gaming state setting process (see FIG. 113).

  On the other hand, when the sub CPU 102 determines in S803 that the race victory flag is not in the on state (when S803 is NO), the sub CPU 102 determines whether or not the “add-on challenge flag” is in the on state ( S805). The “addition challenge flag” is a flag indicating whether or not a game in the addition challenge state is executed. Although not shown, it is set in the AT preparation_game state setting process.

  In S805, when the sub CPU 102 determines that the extra challenge flag is in the on state (when S805 is YES), the sub CPU 102 sets “in an extra challenge” to the gaming state (next time) (S806). Then, after the processing of S806, the sub CPU 102 ends the BB_gaming state setting process during AT and also ends the gaming state setting process (see FIG. 113).

  On the other hand, when the sub CPU 102 determines in S805 that the added challenge flag is not in the on state (when S805 is NO), the sub CPU 102 sets “AT in progress” to the gaming state (next time) (S807). Then, after the processing of S807, the sub CPU 102 ends the BB_gaming state setting process during AT and also ends the gaming state setting process (see FIG. 113).

[Process when receiving a winning action command]
Next, with reference to FIG. 119, the winning action command reception process performed in S302 in the flowchart of the effect content determination process (see FIG. 81) will be described.

  First, the sub CPU 102 determines whether or not the sub game state is a time of winning a “General BB” (hereinafter referred to as “General BB_Winning”) (S811).

  In S811, when the sub CPU 102 determines that the sub gaming state is “general medium BB_winning” (when S811 is YES), the sub CPU 102 performs general medium BB_winning processing (S812). The details of the general medium BB_winning process will be described later with reference to FIG. 120 described later. Then, after the processing of S812, the sub CPU 102 ends the winning operation command reception processing and also ends the effect content determination processing (see FIG. 81).

  On the other hand, when the sub CPU 102 determines in S811 that the sub gaming state is not “general medium BB_winning” (when S811 is NO), the sub CPU 102 wins when the sub gaming state is “race” (in the case of a race). Hereinafter, it is determined whether or not it is “during race_winning” (S813).

  In S813, when the sub CPU 102 determines that the sub gaming state is “during race_winning” (when S813 is YES), the sub CPU 102 performs a racing_winning process (S814). Details of the process during the race_winning will be described later with reference to FIG. 123 described later. Then, after the process of S814, the sub CPU 102 ends the winning action command reception process and also ends the effect content determination process (see FIG. 81).

  On the other hand, in S813, when the sub CPU 102 determines that the sub gaming state is not “during race_winning” (when S813 is NO), the sub CPU 102 wins when the sub gaming state is “AT BB”. (Hereinafter referred to as “in-AT BB_winning time”) is determined (S815). In S815, when the sub CPU 102 determines that the sub gaming state is not “AT during BB_winning” (when S815 is NO), the sub CPU 102 ends the winning operation command receiving process and determines the contents of the effect. The process (see FIG. 81) is also terminated.

  On the other hand, when the sub CPU 102 determines in S815 that the sub gaming state is “at BB_winning during AT” (when S815 is YES), the sub CPU 102 performs processing during BB_winning during AT (S816). . Details of the AT BB_winning process will be described later with reference to FIG. 124 described later. Then, after the process of S816, the sub CPU 102 ends the process when receiving the winning action command and also ends the effect content determination process (see FIG. 81).

[General BB_winning process]
Next, with reference to FIG. 120, the general medium BB_winning process performed in S812 in the flowchart (see FIG. 119) of the winning operation command reception process will be described.

  First, the sub CPU 102 performs a BB entry determination process (at the time of winning a prize) (S821). Details of the BB entry determination process (at the time of winning a prize) will be described later with reference to FIG. 121 described later.

  Next, the sub CPU 102 performs a BBJAC transition determination process (at the time of winning a prize) (S822). Details of the BBJAC transition determination process (at the time of winning a prize) will be described later with reference to FIG. 122 described later. After the process of S822, the sub CPU 102 ends the general medium BB_winning process and also ends the winning operation command reception process (see FIG. 119).

[BB entry determination process (when winning)]
Next, with reference to FIG. 121, the BB entry determination process (at the time of winning) performed in S821 in the general middle BB_winning time process flowchart (see FIG. 120) will be described.

  First, the sub CPU 102 determines whether or not the BB entry check flag is on (S831). In S831, when the sub CPU 102 determines that the BB entry check flag is not in the on state (when S831 is NO), the sub CPU 102 ends the BB entry determination process (at the time of winning), and the process is in general BB_winning. The process proceeds to S822 in the time process (see FIG. 120).

  On the other hand, in S831, when the sub CPU 102 determines that the BB entry check flag is on (when S831 is YES), the sub CPU 102 turns the BB entry check flag off (S832).

  Next, the sub CPU 102 determines whether or not the stop button pressing order by the player is a predetermined order (whether or not the pressing order is correct) (S833). When the internal winning combination is “normal lip 1” or “normal lip 3”, if the stop button is pressed “middle right”, the correct pressing order is obtained. When the internal winning combination is “normal lip 2” or “normal lip 4”, if the stop button is pressed “right middle left”, the correct answer is the pressing order. When the internal winning combination is “normal lip 5” or “normal lip 7”, if the stop button is pressed in the “middle left / right” direction, the correct pressing order is obtained. Further, when the internal winning combination is “normal lip 6” or “normal lip 8”, if the stop button is pressed in the “middle right left”, the correct answer is the pressing order.

  In S833, when the sub CPU 102 determines that the stop button pressing order by the player is not the predetermined order (when S833 is NO), the sub CPU 102 ends the BB entry determination process (at the time of winning) and the process Is transferred to S822 in the general medium BB_winning process (see FIG. 120).

  On the other hand, when the sub CPU 102 determines in S833 that the stop button is pressed by the player in a predetermined order (when S833 is YES), the sub CPU 102 turns on the BB entry flag (S834). ). Then, after the process of S834, the sub CPU 102 ends the BB entry determination process (at the time of winning) and moves the process to S822 of the general medium BB_winning process (see FIG. 120).

[BBJAC transition determination process (when winning)]
Next, with reference to FIG. 122, the BBJAC transition determination process (at the time of winning) performed at S822 in the general BB_winning time process flowchart (see FIG. 120) will be described.

  First, the sub CPU 102 determines whether or not the BARJAC inrush check flag is on (S841). In S841, when the sub CPU 102 determines that the BARJAC inrush check flag is not on (when S841 is NO), the sub CPU 102 performs processing of S848 described later.

  On the other hand, when the sub CPU 102 determines in S841 that the BARJAC rush check flag is on (when S841 is YES), the sub CPU 102 turns the BAR JAC rush check flag off (S842). Next, the sub CPU 102 determines whether or not the pseudo BB state is “BB in progress” (S843).

  In S843, when the sub CPU 102 determines that the pseudo BB state is “BB in progress” (in the case where S843 is YES), the sub CPU 102 performs a process of S847 described later. On the other hand, when the sub CPU 102 determines in S843 that the pseudo BB state is not “BB” (when S843 is NO), the sub CPU 102 determines whether or not the pseudo BB state is “ChaBB”. (S844).

  In S844, when the sub CPU 102 determines that the pseudo BB state is not “Cha BB” (when S844 is NO), the sub CPU 102 performs the process of S848 described later. On the other hand, when the sub CPU 102 determines in S844 that the pseudo BB state is “ChaBB in progress” (when S844 is YES), the sub CPU 102 determines that the display combination (winning combination) is “BAR Rip”. It is determined whether or not (S845). The winning combination “BAR lip” corresponds to “bell lip 3” or “bell lip 4”.

  In S845, when the sub CPU 102 determines that the display combination (winning combination) is “BAR Rip” (when S845 is YES), the sub CPU 102 performs the process of S847 described later. On the other hand, when the sub CPU 102 determines in S845 that the display combination (winning combination) is not “BAR lip” (when S845 is NO), the sub CPU 102 has the gaming state (current) “AT BB”. It is determined whether or not there is (S846).

  In S846, when the sub CPU 102 determines that the gaming state (current) is “AT BB” (when S846 is YES), the sub CPU 102 performs processing of S847 described later. On the other hand, when the sub CPU 102 determines in S846 that the gaming state (current) is not “AT BB” (when S846 is NO), the sub CPU 102 performs processing in S848 described later.

  If S843, S845, or S846 is YES, the sub CPU 102 turns on the BARJAC entry flag (S847).

  After the processing of S847, or when S841, S844, or S846 is NO, the sub CPU 102 determines whether or not the gaming state (current) is different from the gaming state (next time) (S848). When the sub CPU 102 determines that the gaming state (current) is not different from the gaming state (next time) in S848 (when S848 is NO), the sub CPU 102 ends the BBJAC transition determination process (at the time of winning). The process during the general BB_winning process (see FIG. 120) is also terminated.

  On the other hand, when the sub CPU 102 determines in S848 that the gaming state (current) is different from the gaming state (next time) (when S848 is YES), the sub CPU 102 determines whether or not the BARJAC entry flag is on. Is discriminated (S849). In S849, when the sub CPU 102 determines that the BARJAC entry flag is not on (when S849 is NO), the sub CPU 102 ends the BBJAC transition determination process (at the time of winning) and performs the process during the general BB_winning. The time process (see FIG. 120) is also terminated.

  On the other hand, when the sub CPU 102 determines in S849 that the BARJAC entry flag is in the ON state (when S849 is YES), the sub CPU 102 sets the gaming state (current) to the gaming state (next time) (S850). ). Next, the sub CPU 102 sets “0” to the value of the BB game counter (S851). Then, after the process of S851, the sub CPU 102 ends the BBJAC transition determination process (at the time of winning) and also ends the process during the general BB_winning process (see FIG. 120).

[Process during race_winning]
Next, with reference to FIG. 123, the in-race winning process at S814 in the flowchart (see FIG. 119) of the winning operation command reception process will be described.

  First, the sub CPU 102 determines whether or not the BB entry check flag is on (S861). In S861, when the sub CPU 102 determines that the BB entry check flag is not in the on state (when S861 is NO), the sub CPU 102 ends the in-race_winning process and receives a winning action command reception process ( 119) also ends.

  On the other hand, in S861, when the sub CPU 102 determines that the BB entry check flag is on (when S861 is YES), the sub CPU 102 turns the BB entry check flag off (S862).

  Next, the sub CPU 102 determines whether or not the stop button pressing order by the player is a predetermined order (whether or not the pressing order is correct) (S863).

  In S863, when the sub CPU102 determines that the stop button pressing order by the player is not the predetermined order (when S863 is NO), the sub CPU102 turns the penalty flag on (S864). Then, after the processing of S864, the sub CPU 102 ends the in-race_winning process and also ends the winning operation command reception process (see FIG. 119).

  On the other hand, when the sub CPU 102 determines in S863 that the order of pressing the stop button by the player is a predetermined order (when S863 is YES), the sub CPU 102 turns on the BB entry flag (S865). ). Next, the sub CPU 102 sets “AT BB” in the gaming state (next time) (S866). Then, after the processing of S866, the sub CPU 102 ends the in-race_winning process and also ends the winning operation command reception process (see FIG. 119).

[AT BB_winning process]
Next, with reference to FIG. 124, the AT-time BB_winning process performed in S816 in the flowchart (see FIG. 119) of the winning operation command reception process will be described.

  First, the sub CPU 102 performs the BB entry determination process (at the time of winning) described with reference to FIG. 121 (S871). Next, the sub CPU 102 performs the BBJAC transition determination process (at the time of winning a prize) described in FIG. 122 (S872). After the processing of S872, the sub CPU 102 ends the AT-time BB_winning time process and also ends the winning action command reception time process (see FIG. 119).

<Various effects of the present invention>
In the pachi-slot 1 of this embodiment, the following various effects are obtained.

[Various effects obtained in games between 2MB flags]
In the present embodiment, as described above, in the RT1 (high RT) gaming state in which the bonus “2 MB” for winning and winning only in the case of a two-player game is carried over, that is, in the state between 2 MB flags, a predetermined number of games (190 Various games such as a non-AT game (a normal game and a transition effect game) with a game) as one cycle and an AT game with a specific number of games are performed. In the game in the state between the 2 MB flags, the suggestion of three cards is performed, and as long as the player plays the game of three cards according to the suggestion, the game can be performed without winning the bonus “2 MB”. In addition, as long as the player plays three games in the state between the 2 MB flags, the lottery table in which the establishment and winning of the bonus “2 MB” is not referenced is referred to, so the bonus “2 MB” performs any stop operation. So that no prizes are received.

  Also, in the pachislot 1 of the present embodiment, in a normal game, when a “losing” or a specific internal winning combination (small role or replaying combination) is won once or continuously won, a non-AT game period (normal A lottery (cycle shortening lottery) for shortening the number of games in a game period) is performed. If this cycle shortening lottery is won, the game period of the current set in the non-AT state is shortened, and the period until the transition to the AT state can be shortened. Furthermore, in the present embodiment, when “losing” or a predetermined internal winning combination (replay combination) is won once in an AT game, or when a consecutive winning combination is made, an additional lottery (directly added lottery) is added. When the bonus lottery is performed, the number of remaining AT games increases.

  That is, in the pachi-slot 1 of the present embodiment, in a game in a high RT game state in which a bonus is carried over, even if the internal winning combination becomes “losing”, it is possible to continue an advantageous game without winning a bonus. . Further, in the present embodiment, the content of the privilege given at the time of “losing” is varied according to the type of the sub gaming state (“normal state” or “AT state”) in the high RT gaming state during the bonus carryover. be able to.

  Therefore, in the present embodiment, it is possible to give a game value to “losing” that occurs in a game in a high RT gaming state during bonus carryover, and it is possible to widen the range of games. In addition, in a game in a high RT game state in which a bonus is carried over, “losing” in which a bonus is not won can be appropriately generated, so that gambling of the gaming machine can be maintained. From the above, in the pachi-slot 1 of the present embodiment, it is possible to improve the player's interest in games in a high RT gaming state during bonus carryover.

  Further, in the pachi-slot 1 of the present embodiment, in a game between 2 MB flags, when the total number of credits and inserted medals of the current medal is less than 3, the player performs a MAX bet operation. However, the MAX bet operation becomes invalid. In this case, in the state between the 2 MB flags, the double betting game by the MAX bet operation is not started, and the winning of the bonus “2 MB” being carried over can be avoided more reliably.

  That is, in the present embodiment, in the state between the 2 MB flags, a game with the number of medals to be disadvantageous to the player cannot be performed by the MAX bet operation. Therefore, in the pachislot machine 1 of this embodiment, even a player who does not have game knowledge can play a game with peace of mind.

[Various effects obtained by lottery shortening of regular games]
In the present embodiment, as a result of subtracting the number of remaining games of the current game of the current set by the number of shortened games determined by the cycle shortening lottery performed during the normal game, the subtraction result is less than a predetermined number of games (10 games). If it becomes, the surplus number of shortened games corresponding to the subtraction result is stocked. Then, the stocked number of shortened games is applied as the number of shortened games in the next set. In this case, from the start of the next set, the game is played in a state where the game period of the non-AT state is shortened.

  Therefore, in this embodiment, the normal game of the next set can be applied to the normal game of the next set without wasting the number of shortened games (privileges) surplus in the current set without wasting it. A player's interest in games can be given. Further, in this case, since a motive for causing the player to execute the next set of normal games can be generated, the operating rate of the gaming machine can be increased.

[Various effects obtained by pseudo BB game]
As described above, the pachislot machine 1 of the present embodiment includes a pseudo BB game that increases the payout of medals, and when a pseudo BB lottery is won in a normal game or an AT game, the pseudo BB game is started as an interrupt process. The Therefore, the normal game is not a game that simply digests the game, but a game in which more medals can be obtained by the pseudo BB game.

  In the present embodiment, in the pseudo BB game started during the normal game, even when “losing” or “rare role” is won internally, the period of the non-AT game period (the game period of the normal game) A shortened lottery is performed. Then, when the subtraction result is less than “0” as a result of subtracting the remaining number of games of the normal game of the current set by the number of shortened games determined by the cycle shortening lottery at this time, the surplus corresponding to the subtraction result The number of shortened games in minutes is stocked. Then, the stocked number of shortened games is applied as the number of shortened games in the next set.

  On the other hand, in the pseudo BB game started during the AT game, when “losing” or “rare role” is won internally, an extra lottery (directly over lottery) is performed and the extra lottery is won. In this case, the current number of remaining AT games increases.

  In other words, in the pseudo BB game, the privilege given to the winning of “losing” or “rare role” according to the type of the sub gaming state (“normal state” or “AT state”) at the start of the pseudo BB game. The contents of can be different. Furthermore, even in the pseudo BB game, a game value can be given to “losing”. Therefore, in this embodiment, the interest with respect to the pseudo BB game can be improved.

  In addition, in the AT game in the state between the 2 MB flags, not only a game for notifying the player of the internal winning small role is performed, but also a pseudo BB game may be started. It is possible to prevent the AT game from becoming a monotonous game.

[Various effects that can be obtained from the game to determine the number of games starting AT when Kappa wins]
In the game for determining the number of AT start games at the time of “Kappa” victory of this embodiment, as described above, the character “Kappa” is eaten in sequence according to the type of internal winning combination, The number of AT start games is determined in accordance with the type of sushi material eaten. That is, in the game for determining the number of AT start games at the time of winning “Kappa”, the number of basic stay games in the AT state (number of AT start games) is not determined by one lottery, but over a plurality of games. It is determined based on the type of the internal winning combination and the sushi material (game information) displayed on the liquid crystal screen of the liquid crystal display device 11. Therefore, in the present embodiment, it is possible to increase the interest of the player with respect to the game for acquiring the number of games in the AT state (AT start game number determination game).

  In addition, in the AT start game number determination game at the time of “Kappa” victory of this embodiment, as described above, the sushi story data (game information) after the next game is stored even if the internal winning combination is “Lost”. There is a possibility that it will be converted into better data for the player. That is, in the present embodiment, it is possible to give a game value to “losing” even in the AT start game number determination game, and to maintain interest even when “losing” is determined.

<Various modifications>
The configuration and operation of the gaming machine according to one embodiment of the present invention have been described above including the effects thereof. However, the present invention is not limited to the above-described embodiments, and various embodiments and modifications are included without departing from the gist of the present invention described in the claims. For example, the following various modifications can be considered.

[Modification 1]
In the pachi-slot 1 of the above embodiment, when “losing” is won in a normal game or a pseudo BB game (one time or in succession), the game period (the number of stay games) in the normal state is shortened (cycle reduction). May be obtained. In the pachi-slot 1 of the above embodiment, when “losing” is won in an AT game, there is a possibility that a benefit of adding the number of AT games is obtained.

  However, the present invention is not limited to this, and a function for granting a privilege by winning a “losing” (single or consecutive winnings) is also provided in a game in a sub game state other than a normal game, a pseudo BB game, and an AT game. May be. In the first modification, therefore, a pachislot machine having a function of obtaining a benefit of AT winning when “losing” is won in the transition effect game (race effect) will be described.

(1) In-race lottery table First, with reference to FIG. 125, the in-race lottery table necessary for executing the above-described privilege (AT win) grant function in the transition effect game (race effect) will be described. To do. FIG. 125 is a diagram illustrating a configuration of a lottery table during race_losing. In addition, the lottery table during race_losing is determined by, for example, winning / non-winning of the race victory in the lottery processing during race_losing during the race (see FIG. 126 described later) (see FIG. 126 described later). This is referred to when determining whether the AT game is won or not.

  The lottery table during race_losing defines the correspondence between the winning / non-winning of the race win and the lottery value for each value of the lose counter (“1” to “4”). The lose counter is a counter that manages (counts) the number of consecutive “loses” in the race performance period (10 games).

  Therefore, for example, when “losing” is won three times in succession during a race performance, the value of the losing counter is “3”. In this case, the player wins the race with a probability of 6554/32768, and wins the race with the probability of 26214/32768 (race victory flag ON). When the value of the loss counter is “1” (when the first “losing” is won), the winning of the race is always non-winning (AT non-winning).

(2) Process during Race_Game Start Next, with reference to FIG. 126, a process during race_game start in Modification 1 will be described. The in-race_game start process in this example is also performed in S349 in the flowchart (see FIG. 84) of the start command reception process in the above embodiment.

  Further, in this example, processes other than the process at the start of the race_game by the sub control circuit 101 are the same as in the above embodiment. Therefore, only the process at the start of the race_game will be described here.

  As shown in the comparison of the flowchart of the process at the start of the game shown in FIG. 126 and the flowchart of the process at the start of the game shown in FIG. 108 and the flowchart of the process at the start of the game shown in FIG. The processes from S901 to S915 in the flowchart of the game start process are the same as the processes from S641 to S655 in the flowchart of the in-race_game start process in the above embodiment. Therefore, description of the processing from S901 to S915 is omitted here.

  In this example, after the processing of S915 or when S913 is NO, the sub CPU 102 determines whether or not the result of the race result lottery is a non-winning race win and the internal winning combination is “lost”. Is discriminated (S916).

  In S916, when the sub CPU 102 determines that the determination condition of S916 is not satisfied (when S916 is NO), the sub CPU 102 sets “0” in the loss counter (S917). Then, after the processing of S917, the sub CPU 102 performs processing of S922 described later.

  On the other hand, when it is determined in S916 that the sub CPU 102 satisfies the determination condition of S916 (when S916 is YES), the sub CPU 102 adds “1” to the value of the loss counter (S918). Next, the sub CPU 102 refers to the lottery table during race_losing (see FIG. 125), and performs lottery processing during race_losing based on the value of the lost counter after the addition (S919).

  Next, the sub CPU 102 determines whether or not the result of lottery processing during a race_losing is a non-winning race win (S920). In S920, when the sub CPU 102 determines that the result of the lottery process during race_losing is non-winning of the race win (when S920 is YES), the sub CPU 102 performs the process of S922 described later.

  On the other hand, in S920, when the sub CPU 102 determines that the result of the lottery process during race_losing is not a win of the race victory (when S920 is NO), the sub CPU 102 turns on the race victory flag. (S921). Then, after the processing of S921, the sub CPU 102 performs processing of S922 described later.

  After the process of S917 or S921, or when S920 is YES, the sub CPU 102 refers to a push order navigation lottery table (not shown) and performs a push order navigation lottery process of a small role related to “push order bell” (S922). ). Next, the sub CPU 102 sets the lottery result of the push order navigation lottery process to “push order navigation number” (S923). Then, after the process of S923, the sub CPU 102 ends the process at the start of the race_game and shifts the process to S356 of the process at the time of start command reception (see FIG. 84).

  In the pachislot of Modification 1 described above, the same effects as in the above embodiment can be obtained, and even in the transition effect state (during the period of the race effect), a game value can be given to “losing”, It is possible to improve the interest in the transition effect game. In the first modification, when “losing” is won once (in the case where the value of the losing counter is “1”), the non-winning of the race victory is always determined. However, the present invention may be configured such that a winning of the race victory can be obtained with a predetermined probability even when “losing” is won once.

[Modification 2]
In the modified example 2, as in the modified example 1, when the “losing” is won in the transition effect game (race effect) (when the player wins once or continuously), the pachislot having the function of obtaining the benefit of AT winning is obtained. Will be described. However, in this example, the lottery form of AT lottery performed at the time of “losing” is different from that of the first modification.

  Specifically, in this example, not only the winning / non-winning of the race win but also the race win rate MAP lottery table determined at the start of the normal game set (cycle) according to the value of the lost counter (see FIG. 35). It is also possible to select a re-lottery of the race win rate using. Therefore, the configuration of the in-race lottery table used in this example is different from that of the first modification.

  Here, with reference to FIG. 127, the lottery table during race_losing in the second modification will be described. FIG. 127 is a diagram illustrating a configuration of a lottery table during a race_losing in this example. Also in this example, the lottery table during race_losing is referred to, for example, in the lottery processing during race_losing during game start processing (S919) in the first modification described in FIG. 126 above. The

  In this example, the lottery table during _losing shows the lottery result type (winning / non-winning of the race victory and re-lotting of the race winning rate) for each value of the lost counter (“1” to “3”). Define the correspondence with lottery values. In this example as well, the value of the lose counter indicates the number of consecutive wins for “losing” during the race performance period (10 games).

  In this example, as shown in FIG. 127, when the value of the lose counter is “1”, the winning of the race victory is always obtained as the lottery result. When the value of the lose counter is “2”, a re-lottery of the race win rate is always obtained as a lottery result. If the value of the lose counter is “3”, the winning of the race is always obtained as the lottery result.

  In this example, the value of the lose counter is “2” in the lottery process during race_losing (S919) in the process during race_starting the game (see FIG. 126 described later), and the player has won the lottery again. In this case, the sub CPU 102 refers to the race win rate MAP lottery table determined at the start of the set in the process of S919, and re-lots the race win rate data based on the set value.

  This example is configured in the same manner as the first modification except that the lottery form of the AT lottery performed at the time of “losing” is different from the first modification. Therefore, also in Modification 2, the same effect as in Modification 1 can be obtained. In the second modification, an example in which a non-winning race is always determined when “losing” is internally won once (when the loss counter value is “1”) has been described. The present invention is not limited to this, and even when “losing” is won once, at least one of the winning of the re-lotting of the race winning rate and the winning of the race winning may be obtained with a predetermined probability.

[Modification 3]
In the first and second modified examples, the pachislot having the function of obtaining the benefit of winning AT is described when “losing” is won in the transition effect game (race effect) (when the game is won once or continuously). However, the present invention is not limited to this. In the transition effect game, when “losing” is won, another privilege may be given. For example, when “losing” is won in a transition effect game (one time or continuously winning), a game of “addition challenge state” in which a pseudo BB game is won and stocked with a high probability over a predetermined number of games. May be stocked.

  In this case, the game of “addition challenge state” stocked during the transition effect game (race effect) has a specific symbol combination (“yellow BAR” − “yellow BAR” − “yellow BAR”) after the transition to the AT state. Stopped on the active line and started.

  In the configuration of this example, the game after the transition to the AT state can be made more advantageous to the player, and the difference in gameability (game advantage) between the AT state and other states is increased. Can do. Therefore, in this example, the playability between the AT state and other states can be sharpened, and the fun of the game can be further improved.

[Modification 4]
In the pachi-slot 1 of the above embodiment, when “losing” is won in a normal game or a pseudo BB game (one time or in succession), the game period (the number of stay games) in the normal state is shortened (cycle reduction). However, the present invention is not limited to this. In the normal game or the pseudo BB game, when “losing” is won (when the game is won once or continuously), the cycle shortened lottery may not be performed.

  In this case, the configuration of the cycle shortening lottery table and the pseudo BB cycle shortening lottery table used in this example is the cycle shortening lottery table (see FIGS. 43 and 44) and the pseudo BB cycle shortening lottery table (see FIG. 45) of the above embodiment. ), The field defining the lottery value related to “losing” is deleted.

  As in this example, in a normal game or a simulated BB game, when a “losing” is won, a benefit is not given to the game between the AT state and other states (advantage of the game) The difference can be increased. Therefore, in this example, the playability between the AT state and other states can be sharpened, and the fun of the game can be further improved.

[Modification 5]
In the pachislot of the above-described embodiment or the above-described various modifications, a configuration has been described in which a predetermined privilege is given at the time of “losing” in a plurality of types of sub gaming states, but the present invention is not limited to this, and a plurality of types of sub Only in one sub gaming state of the gaming state, a privilege giving function at the time of “losing” winning may be provided.

  DESCRIPTION OF SYMBOLS 1 ... Pachislot (game machine), 2 ... Exterior body, 2a ... Cabinet, 2b ... Front door, 3L ... Left reel, 3C ... Middle reel, 3R ... Right reel, 4 ... Reel display window, 11 ... Liquid crystal display device, 19L ... left stop button, 19C ... middle stop button, 19R ... right stop button, 21 ... medal slot, 51 ... hopper device, 55 ... main control board case, 57 ... sub control board case, 71 ... main control board, 72 ... Sub-control board 91 ... Main control circuit 93 ... Main CPU 101 ... Sub-control circuit 102 ... Sub CPU

Claims (2)

An input operation detecting means for detecting an input operation of the game medium;
Game medium storage means for storing the excess game media;
Bet detection means for detecting whether or not a predetermined maximum number of the game media has been thrown into the unit game from the game media stored in the game media storage means by one operation of the player;
A start operation detecting means for detecting a start operation by the player after the insertion of the game medium is detected by at least one of the input operation detecting means and the bet detecting means;
An internal winning combination determining means for determining an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means;
Fluctuation display means that is constituted by a plurality of display rows, and that variably displays symbols necessary for the game based on detection of the start operation by the start operation detection means,
A stop operation detecting means for detecting a stop operation by the player;
Based on the determination result of the internal winning combination determining means and the detection of the stop operation by the stop operation detecting means, stop control means for stopping the variation display of the symbol,
Inter-flag game control means for controlling the operation of the game performed in the inter-flag state in which the special internal winning combination determined by the internal winning combination determining means is carried over,
In the inter-flag state, the total number of inserted game media detected by the input operation detecting means and the stored number of game media stored by the game medium storing means is less than a predetermined number, and A bet operation invalidating means for invalidating the player's operation when the player's operation is detected by the bet detecting means;
A gaming machine comprising The special internal winning combination is an internal winning combination for winning and winning in a unit game in which the number of inserted game media is less than the predetermined number, and the special internal winning combination is determined by the internal winning combination determining means. If determined, the probability that the internal winning combination relating to replay is determined by the internal winning combination determining means shifts to a higher replay time state than the replay time state before the special internal winning combination is determined. Replay time state control means for performing control,
An informing means for informing information giving an advantageous state for the player,
In the high replay time state, the game in the inter-flag state is performed by playing the game with the predetermined number of inserted game media.
The gaming machine according to claim 1, wherein the notifying means notifies instruction information for setting the number of inserted game media for each unit game to the predetermined number in the inter-flag state.

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