JP2015201954A - Power conversion device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power conversion device which suppresses reflux current in a circuit to reduce a loss.SOLUTION: A power conversion device has: a first conversion circuit which converts current inputted from a direct current power supply to output an alternating current power; a second conversion circuit which is electrically connected to the first conversion circuit, converts the alternating current power to a three-phase alternating current power, and outputs the three-phase alternating current power to a reactor connected to an output side; and a controller 100 which controls the first and second conversion circuits. The first conversion circuit has: a plurality of switching elements which are connected in a bridge state; and a plurality of reflux elements which are connected to a plurality of switching elements in parallel, respectively. The second conversion circuit has a plurality of bidirectional switching elements S which are connected to an upper arm and a lower arm in each phase, respectively and can be switched bidirectionally. The controller 100 makes a second zero vector period in which voltage is not outputted to the output side from the second conversion circuit accord with a first zero vector period in which voltage is not outputted from the first conversion circuit to control the bidirectional switching elements S.

Description

  The present invention relates to a power conversion device.

  A matrix converter is disclosed that outputs a three-phase AC voltage having a desired frequency by inputting a high-frequency sine wave voltage to a matrix converter and treating the input voltage as a PDM control pulse (Non-patent Document 1). ).

Operation verification of high-frequency single-phase / three-phase matrix converter using PDM control method SPC-11-02 (Author Yuki Nakata (Nagaoka University of Technology))

  However, the PDM control method disclosed in the above non-patent document is converted from the output of the DC power source to AC (primary conversion), further converted to AC (secondary conversion), and power conversion that outputs AC When applied to a circuit, a return current is generated by the current of the reactor connected to the output side of the three-phase AC matrix converter. And there was a problem that the loss of a power converter circuit became large because this return current also flows into the circuit part of primary conversion.

  The problem to be solved by the present invention is to provide a power converter that suppresses the return current in the circuit and reduces the loss.

  The present invention includes a first conversion circuit that converts electric power input from a DC power source and outputs AC power, and is electrically connected to the first conversion circuit to convert AC power into three-phase AC power. A second conversion circuit that outputs three-phase AC power to a reactor connected to the first converter, and a controller that controls the first conversion circuit and the second conversion circuit, and outputs no voltage from the second conversion circuit to the output side. The above-described problem is solved by controlling the bidirectional switching element so that the two zero vector period is matched with the first zero vector period in which no voltage is output from the first conversion circuit.

  According to the present invention, the current path of the second conversion circuit is formed so that the dielectric current generated in the reactor does not flow to the first conversion circuit by the switching operation of the both switching elements, so that the return current in the conversion circuit is suppressed. , Loss can be reduced.

It is a circuit diagram of a power converter concerning an embodiment of the present invention. It is a block diagram of the controller 100 of FIG. It is a conceptual diagram for demonstrating PDM control by a matrix converter control part, Comprising: (a) shows the time characteristic of the input voltage of a matrix converter, (b) shows the time characteristic of a PDM signal, (c) is a matrix converter It is a graph which shows the characteristic of output voltage. In the power converter device which concerns on a comparative example, it is a circuit diagram for demonstrating the current pathway which flows in a 1st mode. In the power converter device which concerns on a comparative example, it is a circuit diagram for demonstrating the current pathway which flows in a 2nd mode. In the power converter device concerning a comparative example, it is a circuit diagram for explaining the current course which flows in the 3rd mode. In the power conversion device according to the comparative example, (a) a zero vector of the inverter, (b) a primary transformer voltage (V ₁ ), (c) a primary transformer current (I ₁ ), (d) a secondary transformer voltage _{(V 1), (e)} 2 -side transformer current _(I 2), and is a graph showing the time course of the zero vector of (f) the matrix converter. In the power converter device which concerns on this invention, it is a circuit diagram for demonstrating the current pathway which flows in a 1st mode. In the power converter device which concerns on this invention, it is a circuit diagram for demonstrating the current pathway which flows in a 3rd mode. In the power converter according to the present invention, (a) the zero vector of the inverter, (b) the primary transformer voltage (V ₁ ), (c) the primary transformer current (I ₁ ), (d) the secondary transformer voltage _{(V 1), (e)} 2 -side transformer current _(I 2), and is a graph showing the time course of the zero vector of (f) the matrix converter.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a schematic diagram of a power converter according to an embodiment of the present invention. The power conversion apparatus of this example is an apparatus for converting DC power input from a DC power source into AC and outputting the converted AC power. For example, it is a device for supplying electric power from a DC power source such as a storage battery to a load in the house from outside the house via a home wiring.

As shown in FIG. 1, the power conversion device 1 includes a battery 10, a rectifier circuit 20, an inverter 30, a transformer 40, a matrix converter 50, a rectifier circuit 60, and a controller 100. Although not shown in FIG. 1, the power conversion apparatus includes a sensor for detecting input / output to the inverter 30 and a sensor for detecting input / output to the matrix converter 50. . The sensors are current sensors and voltage sensors. In FIG. 1, a circuit surrounded by an alternate long and short dash line represents a connection circuit of the switching elements S _up , S _vp , S _wp , S _un , S _vn , S _wn .

  The battery 10 is a direct current power source and is configured by connecting a plurality of batteries. When the power conversion device 1 outputs power using a power source mounted on a moving body such as a vehicle, the battery 10 is provided on the moving body. The battery 10 is not limited to a vehicle, and may be a stationary power source.

  The rectifier circuit 20 is a circuit for preventing noise generated by the switching operation of the inverter 30 from flowing through the battery 10. The rectifier circuit 20 includes a coil 21 and a capacitor 22, and is connected between the battery 10 and the inverter 30. The coil 21 is connected to the positive electrode of the battery 10 via a wiring. The capacitor 22 is connected between the wirings connected to the positive electrode and the negative electrode of the battery 10.

The inverter 30 is a conversion circuit that converts electric power input from the battery 10 into alternating current and outputs the converted alternating current power to the transformer 40. The inverter 30 includes transistors Tr _{1 to} Tr ₄ and diodes D _{1 to} D _4, and is connected between the rectifier circuit 20 and the transformer 40.

The transistors Tr _{1 to} Tr ₄ are composed of IGBTs or the like. The series circuit of the transistor Tr ₁ and the transistor Tr _{2 and} the series circuit of the transistor Tr ₃ and the transistor Tr ₄ are connected in parallel. The connection point between the transistor Tr ₁ and the transistor Tr ₂ (neutral) is connected to one end of the primary winding of the transformer 40, the connection point between the transistors Tr ₃ and the transistor Tr ₄ (neutral point) The other end of the primary winding of the transformer 40 is connected. Thus, the transistors Tr _{1 to} Tr ₄ are connected in a bridge shape between the positive electrode and the negative electrode of the battery 10.

The diodes D _{1 to} D ₄ are elements for reflux, and are connected in parallel to the transistors Tr _{1 to} Tr ₄ , respectively. The directions of the diodes D _{1 to} D ₄ (current conduction direction) are connected in the opposite direction to the directions of the transistors Tr _{1 to} Tr ₄ . The transistors Tr _{1 to} Tr ₄ are switched on and off based on a switching signal transmitted from the controller 100. Although not shown in FIG. 1, a driving circuit is connected between the transistors Tr _{1 to} Tr ₄ and the controller 100, and the driving circuit receives a transistor from the controller 100 according to a switching signal. on the Tr ₁ to Tr _4, the gate pulse for switching off outputs to the transistor _Tr 1 to Tr _4.

  The transformer 40 is a circuit that changes the voltage of the AC power output from the inverter 30 and outputs it to the input side of the matrix converter 50. The transformer 40 includes a coil (primary transformer) 41 and a coil (secondary transformer) 42, and is connected between the inverter 30 and the matrix converter 50.

The matrix converter 50 is a conversion circuit that converts AC power output from the transformer 40 into three-phase AC power. The matrix converter 50 includes a plurality of bidirectionally switchable switching elements S _up , S _un , S _vp , S _vn , S _wp , S _wn . The matrix converter 50 is connected between the transformer 40 and the rectifier circuit 60.

Switching element _{S up} in order to switchable element bidirectionally, the transistor _{Tr up1} and the transistor _{Tr up2} such as a MOSFET or IGBT, and a diode _{D up1} and diode _{D up2.} The transistor Tr _up1 and the transistor Tr _up2 are connected in series in opposite directions, the diode D _up1 and the diode D _up2 are connected in series in opposite directions, and the transistor Tr _up1 and the diode D _up1 are connected in parallel in the opposite direction. The transistor Tr _up2 and the diode D _up2 are connected in parallel in opposite directions. Other switching elements _{S un, S vp, S vn} , S wn, S wn likewise, transistor _{Tr UN1, Tr UN2} and the diode _{D UN1, D} bridge circuit _UN2, transistor _{Tr vp1, Tr vp2} a diode _{D vp1,} bridge circuit D _vp2, transistor _{Tr vn1,} bridge circuit _{Tr vn2} and diode _{D vn1, D vn2,} transistor _{Tr wp1, Tr wp2} a diode _{D wp1,} bridge circuit _{D wp2,} transistor _{Tr wn1, Tr wn2} a diode _{D wn1} , D _wn2 bridge circuit.

Three pairs of circuits in which two switching elements S _up , S _un , S _vp , S _vn , S _wp , S _wn are connected in series are connected in parallel to the coil 42 of the transformer 40. The three-phase output lines are connected to the connection points (neutral points) of the switching elements S _up , S _un , S _vp , S _vn , S _wp , and S _wn connected in pairs. As a result, a three-phase matrix converter 50 is configured in which switching elements S _up , S _un , S _vp , S _vn , S _wp , and S _wn that are bidirectionally switchable are connected to the upper arm and the lower arm in each phase. Has been.

  The rectifier circuit 60 is a filter circuit for rectifying the three-phase AC power output from the matrix converter 50 and outputting it as system power used in the load. The rectifier circuit 60 includes coils 61 to 63 and capacitors 64 to 66. Coils 61 to 63 are connected to the u-phase, v-phase, and w-phase of matrix converter 50, respectively. The capacitors 64 to 66 are connected between the u phase and the v phase, between the v phase and the w phase, and between the w phase and the u phase, respectively.

  A power grid 70 is a wiring network that is an output destination of the power conversion apparatus 1. When a load is connected to the power transmission network 70, the load receives power from the power conversion device 1. At this time, the load has an inductive (reactor) component, and the output side of the matrix converter 50 is connected to the reactor via the rectifier circuit 60.

The controller 100 controls the inverter 30 by switching on and off the transistors Tr _{1 to} Tr ₄ , and switches the switching elements S _up , S _un , S _vp , S _vn , S _wp , S _wn on and off. Thus, the matrix converter 50 is controlled.

  Next, the configuration of the controller 100 will be described with reference to FIG. FIG. 2 is a block diagram of the controller 100. The controller 100 includes a ROM (Read Only Memory) in which various programs are stored, a CPU as an operation circuit for executing the programs, and the like. And the controller 100 has the inverter control part 110 and the matrix converter control part 120 as a functional block for exhibiting the control function of the inverter 30 and the matrix converter 50. FIG.

  The inverter control unit 110 detects the voltage of the battery 10 using a sensor, and controls the inverter 30 to output a predetermined AC voltage from the inverter 30 with respect to the input voltage to the inverter 30. The inverter control unit 110 includes a primary side switching signal generation unit 111 and a zero vector signal generation unit 112.

  The primary-side switching signal generator 111 calculates a command value for outputting a high-frequency AC voltage from the inverter 30 with respect to the voltage or current of the battery 10. When generating the command value, the primary side switching signal generation unit 111 calculates the command value by PI control while feeding back the output value of the inverter 30 using a sensor connected to the output side of the inverter 30. To do. The frequency of the AC voltage output from the inverter 30 is set in advance and is higher than the frequency of the three-phase AC output from the matrix converter 50. The primary side switching signal generation unit 111 compares the calculated command value with a preset carrier to thereby control a switching signal for controlling the inverter 30 (hereinafter also referred to as a primary side switching signal). ) Is generated. That is, the primary side switching signal generator 11 controls the inverter 30 by PWM control.

The primary side switching signal generator 111 outputs the primary side switching signal to the transistors Tr ₁ to Tr ₄ via the drive circuit. Further, the primary side switching signal generation unit 111 outputs the primary side switching signal to the zero vector signal generation unit 112.

The zero vector signal generation unit 112 generates a zero vector signal based on the primary side switching signal generation unit. The zero vector signal is a signal that represents a zero vector period in which no voltage is applied from the inverter 30 to the coil 41 (period in which the output voltage of the inverter 30 is zero). Since the zero vector period is determined by the on / off states of the transistors Tr _{1 to} Tr ₄ , the zero vector signal generation unit 112 is a primary-side switching signal that represents the on / off switching timing of the transistors Tr _{1 to} Tr _4. To specify a zero vector period. Then, the zero vector signal generation unit 112 generates a zero vector signal in which the specified zero vector period is set to a high level and a period other than the zero vector period is set to a low level. The zero vector signal generation unit 112 outputs the zero vector signal to the secondary side switching signal generation unit 122.

  The matrix converter control unit 120 calculates a command value for outputting a predetermined three-phase AC voltage from the matrix converter 50 with respect to the voltage applied to the coil 42. The input to the matrix converter 50 is a high frequency. On the other hand, the output of the matrix converter 50 has a low frequency because it is assumed to be a power source for household loads connected to the power transmission network 70. That is, the input frequency of the matrix converter is sufficiently higher than the output frequency. Therefore, the matrix converter control unit 120 controls the matrix converter 50 by PDM control. The matrix converter control unit 120 includes a PDM control signal generation unit 121 and a secondary side switching signal generation unit 122.

  The PDM control by the matrix converter control unit 120 will be described with reference to FIG. 3A and 3B are conceptual diagrams for explaining the PDM control by the matrix converter control unit 120. FIG. 3A shows the time characteristics of the input voltage input to the matrix converter 50, and FIG. 3B shows the PDM control signal generation. 4 is a graph showing the time characteristics of the PDM signal generated by the unit 121, and FIG.

The input voltage input to the matrix converter 50 is a high-frequency sine wave voltage as shown in FIG. The matrix converter control unit 120 treats the half cycle of the input voltage to the matrix converter 50 as one pulse of PDM control, and switches the switching elements S (switching elements S _up , S _un , S _vp , S _vn , S _wp , S A switching signal for switching on / off of _wn ) is generated. The time width corresponding to this one pulse is the minimum unit of the output of the matrix converter 50, and the PDM control forms the waveform of the output voltage by adjusting the number of output pulses of the minimum unit, and the pulse density and the positive / negative of the pulse. doing.

  The PDM control signal generation unit 121 generates a rectangular wave PDM control signal having a duty corresponding to the pulse density. A high level period (ON period) of the PDM control signal is a pulse output period. The secondary side switching signal generation unit 122 generates a secondary side switching signal for switching on and off of the switching element S using the PDM control signal, and outputs the secondary side switching signal to each switching element S. At this time, since the input to the matrix converter 50 is a single-phase alternating current, the secondary side switching signal generation is performed so that the on / off of the switching elements S of the upper and lower arms is inverted when the positive / negative of the input voltage is inverted. The unit 122 generates a secondary side switching signal. Therefore, the matrix converter control unit 120 discriminates the polarity of the input voltage from the control signal (PWM control signal) of the inverter 30, and controls the switching element S so that the switching signals of the upper and lower arms are switched in the negative case. To do.

  Since the input voltage is a sine wave, a zero cross point appears every half cycle as shown in FIG. Then, the secondary side switching signal generation unit 122 switches the switching element S on and off in accordance with the zero cross point for each half cycle. Thereby, the switching loss becomes almost zero, and the loss generated in the switching element S can be reduced.

  By the PDM control as described above, the output voltage of the matrix converter 50 becomes a low frequency waveform lower than the frequency of the input voltage as shown by the dotted line in FIG. That is, in the node of the output voltage, the ON period of the PDM control signal is shortened and the pulse density is coarse. On the other hand, in the antinode portion of the output voltage, the ON period of the PDM control signal becomes long and the pulse density becomes dense. Thus, the controller 100 generates the output voltage by adjusting the density of pulses output from the matrix converter 50 with respect to the input voltage of the matrix converter 50.

  By the way, when the matrix converter 50 is controlled by PDM control, a reflux current flows in the matrix converter 50 during the ON period of the PDM control signal by the reactor connected to the power transmission network 70, and the inverter 30 passes through the transformer 40. It was a problem to flow in. Hereinafter, the operation principle of the circuit when the return current flows will be described with reference to FIGS. The circuit operation when the reflux current flows will be described as the circuit operation according to the comparative example. The circuit configuration according to the comparative example is the same as the circuit shown in FIG.

  The circuit operation of the inverter 30 and the matrix converter 50 according to the comparative example is divided into three operation modes, and the return current is described. FIG. 4A is a circuit diagram for explaining a current flowing through inverter 30 and matrix converter 50 in the first mode. FIG. 4B is a circuit diagram for explaining a current flowing in the second mode, and FIG. 4C is a circuit diagram for explaining a current flowing in the third mode. In the circuit diagrams shown in FIGS. 4A to 4C, a part of the circuit shown in FIG. 1 is omitted.

  In the first mode, the inverter 30 outputs a voltage to the primary transformer, and the matrix converter 50 outputs a voltage to the power transmission network (reactor) 70.

In the first mode, as shown in FIG. 4A, the transistors Tr ₄ of the lower arm of the arm transistor Tr ₁ and the inverter 30 on the inverter 30 are turned on, the other transistor _Tr 2, Tr ₃ is turned off . Further, the switching element S _up of the upper arm and the switching elements S _vn and S _{wn of the} lower arm are turned on, and the other switching elements S _un , S _vp and S _wp are turned off.

  In the second mode, the inverter 30 does not output voltage to the primary transformer, and the matrix converter 50 outputs voltage to the power transmission network (reactor) 70.

In the second mode, as shown in FIG. 4B, the transistor Tr _{1 in} the upper arm of the inverter 30 is turned on, and the other transistors Tr ₂ , Tr ₃ , Tr ₄ are turned off. The state of the switching element of the matrix converter 50 is the same as in the first mode.

  In the third mode, the inverter 30 does not output a voltage to the primary transformer, and the matrix converter 50 does not output a voltage to the power transmission network (reactor) 70.

In the third mode, as shown in FIG. 4C, the state of the transistor of the inverter 30 is the same as in the second mode. Further, the switching elements S _vn and S _wn of the lower arm of the matrix converter 50 are turned on, and all the switching elements S _up , S _vp and S _wp of the upper arm and the switching element S _un of the lower arm are turned off. .

Then, during the ON period of the PDM control signal, the state of the first mode and the second mode is periodically repeated, so that an output voltage whose pulse density is adjusted is output from the matrix converter 50 to the power transmission network 70. Note that, during the OFF period of the PDM control signal, the inverter 30 operates the transistors Tr _{1 to} Tr ₄ so as to output a pulse having a predetermined cycle, but the matrix converter 50 operates so as not to output a voltage. ing.

In the control of such a comparative example, the zero vector of the inverter 30, primary transformer voltage (V ₁ ), primary transformer current (I ₁ ), secondary transformer voltage (V ₁ ), secondary transformer current The time transition of (I ₂ ) and the zero vector of the matrix converter 50 is represented by (a) to (f) in FIG. 5A and 5F, the level (1) of the INV zero vector indicates that no voltage is output from the inverter 30 to the primary transformer, and the MC (matrix converter) zero vector (1) Indicates that no voltage is output from the matrix converter to the power transmission network 70. Further, in FIG. 5, mode 1, mode 2, and mode 3 correspond to the first mode, the second mode, and the third mode shown in FIGS.

  In mode 2, the switching element S operates so that the matrix converter 50 forms a closed circuit between the secondary transformer and the power transmission network 70. Therefore, the reactor of power transmission network 70 charged in mode 1 is discharged in mode 2, and the reflux current flows to matrix converter 50. As shown in FIG. 5E, in the mode 2, the secondary transformer current flows. Furthermore, the return current of the matrix converter 50 also returns to the inverter 30 via the transformer 40. Therefore, as shown in FIG. 5C, the primary transformer current flows in the mode 2 state.

  Since the return current is a loss of the power converter, the power converter of the present invention matches the zero vector period of the matrix converter 50 with the zero vector period of the inverter 30 so that the return current does not flow. 50 is controlled.

  Returning to FIG. 2, the secondary-side switching signal generation unit 122 acquires a zero vector signal representing the zero vector period of the inverter 30 from the zero vector signal generation unit 112 and acquires a PDM control signal from the PDM control signal generation unit 121. To do. The secondary side switching signal generator 122 outputs a switching signal corresponding to the PDM control signal to the switching element S during the OFF period of the PDM control signal.

  Further, the secondary side switching signal generation unit 122 outputs a voltage from the output side of the matrix converter 50 to the power transmission network 70 in accordance with the level of the zero vector signal during the ON period of the PDM control signal (FIG. 4A). And a third mode (see FIG. 4C) in which no voltage is output from the output side of the matrix converter 50 to the power transmission network 70. The secondary side switching signal generator 122 outputs a switching signal (gate pulse) corresponding to the PDM control signal to the switching element S when the level of the zero vector signal is low (zero).

The matrix converter control unit 120 turns on at least one switching element S _up , S _vp , S _wp among the upper arms of the matrix converter 50 during the ON period of the PDM control signal and not the zero vector period of the inverter 30. And at least one switching element S _un , S _vn , S _wn of the lower arm is turned on. Thereby, since the controller 100 can control the matrix converter 50 by PDM control, switching loss can be reduced.

On the other hand, when the level of the zero vector signal is at a low level (zero), the secondary side switching signal generation unit 122 turns off the switching elements S _up , S _vp , S _wp on the upper arm of the matrix converter 50 and turns off the matrix. Converter 50 does not output a voltage to power transmission network 70.

That is, the matrix converter control unit 120 turns off the upper-arm switching elements S _up , S _vp , and S _wp during a period in which the PDM control signal is on and is a zero vector period of the inverter 30. Thereby, the controller 100 can control the switching element S so that the zero vector period of the inverter 30 and the zero vector period of the matrix converter 50 are matched.

  The above circuit operation will be described with reference to FIGS. 6A, 6B and 7. FIG. 6A is a circuit diagram for explaining a current flowing through inverter 30 and matrix converter 50 in the first mode. FIG. 6B is a circuit diagram for explaining a current flowing in the third mode. In the circuit diagrams shown in FIGS. 6A and 6B, a part of the circuit shown in FIG. 1 is omitted.

7A to 7F show the zero vector, the primary transformer voltage (V ₁ ), the primary transformer current (I ₁ ), the secondary side of the inverter 30 in the power conversion device 1 of the present invention. It is a graph showing time transition of transformer voltage (V ₁ ), secondary side transformer current (I ₂ ), and matrix converter 50. In FIG. 7, mode 1 and mode 3 correspond to the first mode and the third mode shown in FIGS. 6A and 6B, respectively.

  In the comparative example, the switching element S is controlled so that the present invention is in the mode 3 during the period in which the return current flows through the inverter 30 (mode 2 period). As shown in FIG. 6B, in mode 3, the input side of the matrix converter 50 is disconnected from the secondary transformer. Therefore, the current generated by the discharge of the reactor of the power transmission network 70 does not flow from the matrix converter 50 to the secondary transformer, and thus the return current does not flow to the inverter 30.

  That is, as shown in FIG. 7 (f), by setting the period in which the return current flows in the comparative example as the MC zero vector period, the current path flowing from the matrix converter 50 to the transformer 40 is eliminated. And the current of the secondary transformer becomes zero (see FIGS. 7C and 7E), and the return current of the inverter 30 disappears. Thereby, this invention can make a loss small, suppressing the return current of the inverter 30. FIG.

  As described above, the present invention controls the switching element S so that the zero vector period of the matrix converter 50 is matched with the zero vector period of the inverter 30. As a result, the control period of mode 2 that causes the generation of the return current as in the comparative example is eliminated, so that the return current can be prevented. As a result, the conversion efficiency of the power conversion device can be increased, and the capacity of the transformer 40 can be reduced, so that the transformer can be downsized.

  In the present invention, the controller 100 generates a switching signal for controlling the switching element S based on the PDM control signal and the zero vector signal of the inverter 30. Thus, the zero vector signal of the inverter 30 can be generated from the switching signal of the inverter 30, and the switching signal of the matrix converter 50 can be generated by the AND operation of the zero vector signal and the PDM control signal. A delay between the period and the inverter zero vector period can be prevented.

  The inverter 30 corresponds to a first conversion circuit according to the present invention, and the matrix converter 50 corresponds to a second conversion circuit according to the present invention.

10 ... Battery 20 ... rectifying circuit 21 ... coil 22 ... condenser 30 ... inverter Tr ₁ to Tr 4 _... transistor D ₁ to D 4 _... diode transformer 41 ... coil 50 ... matrix converter _{S up, S un, S vp} , S _vn , S _wp , S _wn ... switching element 60 ... rectifier circuit 61, 62, 63 ... coil 64, 65, 66 ... capacitor 70 ... power transmission network 100 ... controller 110 ... inverter control unit 111 ... primary side switching signal generation unit 112 ... Zero vector signal generation unit 120 ... Matrix converter control unit 121 ... PDM control signal generation unit 122 ... Secondary side switching signal unit

Claims (3)

A first conversion circuit that converts power input from a DC power source and outputs AC power;
A second conversion circuit that is electrically connected to the first conversion circuit, converts AC power into three-phase AC power, and outputs the three-phase AC power to a reactor connected to an output side;
A controller for controlling the first conversion circuit and the second conversion circuit;
The first conversion circuit includes:
A plurality of switching elements connected in a bridge shape;
A plurality of reflux elements respectively connected in parallel to the plurality of switching elements;
The second conversion circuit includes:
Each phase has a plurality of bidirectional switching elements connected to the upper arm and the lower arm, respectively, and capable of bidirectional switching,
The controller is
Controlling the bidirectional switching element in accordance with a second zero vector period during which no voltage is output from the second conversion circuit to the output side, and a first zero vector period during which no voltage is output from the first conversion circuit. A power conversion device. The controller is
Generating a first switching signal for driving the switching element of the first conversion circuit, and a first zero vector signal indicating the first zero vector period;
The second switching signal for driving the bidirectional switching element is generated based on a pulse signal for PDM control for controlling the second conversion circuit based on a pulse density and the first zero vector signal. 1. The power conversion device according to 1. The second switching signal is:
All the bidirectional switching elements of the upper arm are turned off in a period that is an on period of the pulse signal and that is the first zero vector period,
At least one of the bidirectional switching elements of the upper arm and at least one of the bidirectional switching elements of the lower arm are turned on during a period when the pulse signal is on and not the first zero vector period. The power converter according to claim 2, wherein the power converter is a signal to be transmitted.

Images