JP2015177098A - semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To appropriately inject and fill an underfill between a substrate and a semiconductor chip in a semiconductor device in which a surface of the substrate is blocked into a lyophilic region and a repellent region and semiconductor chips are fixed on the lyophilic region in an aligned manner by utilizing surface tension of a liquid.SOLUTION: A semiconductor device comprises: a substrate 10; a semiconductor chip 20 mounted and fixed on one surface 1a of the substrate 10; and an underfill 30 filled between the substrate 10 and the semiconductor chip 20. A surface of a first region 11 of the one surface 1a of the substrate 10, which is located directly below the semiconductor chip 20 is formed to be a lyophilic region and a surface of a second region 12 around the first region 11 is formed to be a repellent region. On part of the second region 12, third regions 13 each of which has a slit shape extending from the side of an end face 23 of the semiconductor chip 20 toward the end face 23 and surfaces of which have the same lyophilicity with the first region 11 are provided in place of the second region 12.

Description

  The present invention relates to a semiconductor device including a substrate, a semiconductor chip fixed on one surface of the substrate, and an underfill filled between the one surface of the substrate and the semiconductor chip, and in particular, a surface of a liquid such as water. The present invention relates to a substrate and a semiconductor chip that are aligned using tension.

  Conventionally, as alignment technology by self-organization when stacking semiconductor chips on a substrate, lyophilic regions (hydrophilic regions for water) and lyophobic regions (hydrophobic for water) on the substrate. In general, the surface region of the water is confined and the surface tension of the water is used.

  As a semiconductor device using such a surface tension of a liquid such as water, for example, a semiconductor device described in Patent Document 1 has been proposed. In this device, the semiconductor chip is aligned with respect to the temporary substrate using the surface tension of water, and then the semiconductor chip is transferred and fixed to a wafer as a substrate to remove the temporary substrate.

  However, in the transfer method according to Patent Document 1, since the alignment is performed twice, that is, bonding to a temporary substrate and transfer to a wafer, it takes time and it is difficult to improve alignment accuracy.

  As a supplement to this point, as shown in Non-Patent Document 1, a direct alignment method that performs alignment and bonding collectively by mounting a semiconductor chip directly on a substrate using the surface tension of water. Has been proposed.

  This direct alignment is performed as follows. First, a semiconductor chip mounting area on one surface of a wafer as a substrate is defined as a lyophilic area, and the entire circumference of the lyophilic area is defined as a lyophobic area. And water is arrange | positioned in a lyophilic area | region, a semiconductor chip is mounted on this water, and chip alignment is performed using the surface tension of water.

  Then, by heating this, water is evaporated, and the electrode on the semiconductor chip side and the electrode on the substrate side are bonded by solid phase bonding such as solder bonding or metal bonding. Thus, the semiconductor chip and the substrate are fixed. The above is the method of direct alignment. According to this, since the substrate and the semiconductor chip need only be aligned once, simplification and improved alignment accuracy can be achieved as compared with the case where the alignment is performed twice. I can plan.

JP 2010-225803 A

Fukushima, 7 others, "Multichip-to-Wafer Three-Dimensional Integration Technology Usage Self-Assembly WITH ExcierLAMP ITREONE TRION ITREON ETR ETRON ITREON ETR ETRON ITREON ETR E RION Vol. 59, no. 11, Nov. 2012, p. 2956-2963

  The inventor of the present invention is studying further filling an underfill between the substrate and the semiconductor chip in the semiconductor device using the direct alignment method. Here, the underfill is made of an epoxy resin or the like normally used in the field of semiconductor devices, and reinforces the bonding strength of the bonding portion between the substrate and the semiconductor chip or seals and protects the bonding portion. It is something to do.

  In this case, after fixing the substrate and the semiconductor chip by the above-described direct alignment method, the underfill that is made liquid by mixing a solvent or the like is injected from the end face side of the semiconductor chip directly under the semiconductor chip. To do.

  However, at this time, in the direct alignment method, a portion of one surface of the substrate directly below the semiconductor chip is a lyophilic region, and outside the lyophilic region, the liquid repellent so as to surround the entire end surface of the semiconductor chip. It is considered as a sex area. Therefore, the liquid underfill is repelled in the liquid repellent area outside the semiconductor chip and does not enter the lyophilic area directly below the semiconductor chip.

  The present invention has been made in view of the above-described problem, and divides one surface of a substrate into a lyophilic region and a lyophobic region, and a semiconductor chip is placed on the lyophilic region using the surface tension of the liquid. It is an object of the present invention to provide a semiconductor device that is aligned and fixed so that an underfill can be appropriately injected and filled between a substrate and a semiconductor chip.

In order to achieve the above object, according to the first aspect of the present invention, a substrate (10), a semiconductor chip (20) mounted on one surface (1a) of the substrate and fixed to the substrate, one surface of the substrate, and a semiconductor An underfill (30) made of an insulating resin filled between the chips, and a semiconductor device comprising:
When a region located immediately below the semiconductor chip on one surface of the substrate is a first region (11), and a region surrounding the first region adjacent to the first region is a second region (12), The surface of the first region is a lyophilic region, the surface of the second region is a liquid repellent region having a higher liquid repellency than the first region, and part of the second region includes A third region (13) having a slit shape extending so as to reach the end surface from the side of the end surface (23) of the semiconductor chip and having the same lyophilicity as the first region is the second region (13). It is provided in place of the area.

  According to this, the underfill wets preferentially outside the semiconductor chip in the third region having a slit shape that is a lyophilic region, rather than the second region that is a liquid repellent region. In other words, the third region having an elongated slit shape from the side of the semiconductor chip toward the end face of the semiconductor chip defines an underfill injection path.

  Therefore, according to the present invention, the underfill can easily enter the first region, which is a lyophilic region located immediately below the end surface of the semiconductor chip, so that the underfill is provided between the substrate and the semiconductor chip. Can be properly injected and filled.

  In addition, the code | symbol in the bracket | parenthesis of each means described in the claim and this column is an example which shows a corresponding relationship with the specific means as described in embodiment mentioned later.

(A) is a schematic plan view which shows the semiconductor device concerning 1st Embodiment of this invention, (b) is a schematic sectional drawing in alignment with the dashed-dotted line AA in (a). FIG. 2 is a schematic plan view showing a planar shape of one surface side of the semiconductor substrate in FIG. 1. FIG. 3 is a schematic plan view showing main steps of the method for manufacturing the semiconductor device according to the first embodiment. (A) is a schematic plan view which shows the semiconductor device concerning 2nd Embodiment of this invention, (b) is a schematic sectional drawing in alignment with the dashed-dotted line BB in (a). (A) is a schematic plan view which shows the semiconductor device concerning 3rd Embodiment of this invention, (b) is a schematic sectional drawing in alignment with the dashed-dotted line CC in (a). It is a schematic plan view which shows the semiconductor device concerning 4th Embodiment of this invention. It is a schematic plan view which shows the semiconductor device concerning 5th Embodiment of this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other are given the same reference numerals in the drawings in order to simplify the description. Further, in each of the following plan views, for easy identification, the surface of the first region 11 and the third region 13 which are lyophilic regions are point-hatched and the second region which is a liquid repellent region. The surface of the region 12 is hatched with hatching for convenience.

(First embodiment)
The semiconductor device S1 according to the first embodiment of the present invention will be described with reference to FIGS. In FIG. 2, the outline of the semiconductor chip 20 that is actually in the same position as the rectangular first area 11 is indicated by a one-dot chain line, and the outline is identified in the first area for identification. 11 is slightly shifted.

  This semiconductor device S1 is mounted on a vehicle such as an automobile, for example, and is applied as a device for driving various electronic devices for the vehicle. The semiconductor device S1 of the present embodiment is broadly divided into a substrate 10, a semiconductor chip 20 mounted on the one surface 1a of the substrate 10 and fixed to the substrate 10, and a surface 1a of the substrate 10 and the semiconductor chip 20 between them. And an underfill 30 made of a filled insulating resin.

  The substrate 10 may be any substrate on which the semiconductor chip 20 is mounted. Typically, the substrate 10 can be a wiring substrate that is electrically connected to the semiconductor chip 20 to form a circuit. For example, the substrate 10 may be a semiconductor substrate such as Si (silicon) or SiC (silicon carbide), a printed substrate based on an epoxy resin, a ceramic substrate made of alumina, or the like.

  In the example shown in FIG. 2, the substrate 10 is formed by laminating respective films constituting a first region 11, a second region 12, and a third region 13, which will be described later, on a base 10 a. Constitutes one surface 1 a of the substrate 10. The base 10a constitutes the main body of the substrate 10 and is made of a semiconductor such as Si, a resin such as an epoxy resin, a ceramic such as alumina, or the like as described above.

  The semiconductor chip 20 has a plate shape having one surface 21 as one surface 21 and the other surface 22 as the other surface 22 and an end surface 23 connecting the one surface 21 and the other surface 22. Here, the semiconductor chip 20 has a typical rectangular plate shape.

  Such a semiconductor chip 20 is made of a semiconductor such as Si or SiC. Specifically, the semiconductor chip 20 includes, for example, an IC chip, a microcomputer, various transistor elements and the like manufactured by a normal semiconductor process.

  The underfill 30 plays a role of reinforcing the joint or protecting it by sealing in the field of semiconductor devices, and is made of, for example, an epoxy resin. Such an underfill 30 fixes the substrate 10 and the semiconductor chip 20, and then mixes the solvent or the like into the liquid underfill 30 from the end face 23 side of the semiconductor chip 20 directly below the semiconductor chip 20. It is placed by pouring and heating to cure.

  Here, a region located immediately below the semiconductor chip 20 in the one surface 1 a of the substrate 10 is defined as a first region 11, and a region surrounding the first region 11 adjacent to the first region 11 is a second region 12. And The first region 11 is the same size or smaller than the outer shape of the semiconductor chip 20 defined by the end face 23 of the semiconductor chip 20 and is located within the outer shape range of the semiconductor chip 20.

  Here, as shown in FIGS. 1 and 2, the outer shape of the semiconductor chip 20 and the first region 11 are substantially the same size and the same shape of a rectangle. However, for example, the first region 11 may be a rectangle that is slightly smaller than the outer shape of the semiconductor chip 20. In this case, the second region 12 is formed immediately below the peripheral part inside the end face 23 of the semiconductor chip 20.

  Here, the surface of the first region 11 is a lyophilic region, and the surface of the second region 12 is a liquid repellant region having a higher liquid repellency than the first region 11. That is, in the first region 11 and the second region 12, the first region 11 is more easily wetted by liquids such as water, and the second region 12 is easier to repel liquids such as water.

  For example, in the first region 11 that is lyophilic and the second region 12 that is lyophobic, the liquid contact angle difference is 10 degrees or more, and the second region 12 is larger. Further, while maintaining the magnitude relationship of the contact angle, the contact angle θ1 of the first region 11 is set to, for example, 100 degrees or less, and the contact angle θ2 of the second region 12 is set to, for example, 60 degrees or more. It is supposed to be.

  Further, as shown in FIGS. 1 to 3, a third region having the same lyophilicity as that of the first region 11 is formed on a part of the second region 12 of the one surface 1 a of the substrate 10. 13 is provided instead of the second region 12. That is, the third region 13 is a lyophilic region at the same level as the first region 11.

  Here, a plurality of third regions 13 are provided around the first region 11 and the end face 23 of the semiconductor chip 20. Each third region 13 has an elongated shape extending from the side of the end surface 23 of the semiconductor chip 20 so as to reach the end surface 23, that is, a slit shape. Here, the third region 13 has a rectangular shape with a constant width.

  Here, since the first region 11 and the outer shape of the semiconductor chip 20 have the same shape and the same size, the end of the third region 13 on the chip side coincides with the end surface 23 of the semiconductor chip 20. In position.

  Here, when the first region 11 is smaller than the outer shape of the semiconductor chip 20, the end portion on the chip side of the third region 13 is located inside the semiconductor chip 20 with respect to the end surface 23 of the semiconductor chip 20. It will be. However, in any case, the third region 13 having the slit shape does not change at all from the side of the end face 23 of the semiconductor chip 20 so as to reach the end face 23.

  Here, the third region 13 is continuously connected to the first region 11. That is, the third region 13 having a slit shape continuously extends from the end of the first region 11 having a rectangular shape. In addition, as described above, the third region 13 is a lyophilic region at the same level as the first region 11, and the magnitude relationship of the contact angle between the first region 11 and the second region 12 described above is as follows. The magnitude relationship of the contact angle between the third region 13 and the second region 12 is applied as it is.

  Further, the first region 11 and the third region 13 may be made of different materials as long as the lyophilic property is the same, but are continuous regions having the same lyophilic property. Basically the same material. For example, examples of the material of the first region 11 and the third region 13 include silicon dioxide, silicon nitride, hydrophilic polyimide resin, and hydrophilic epoxy resin.

  On the other hand, examples of the material of the second region that is liquid repellent include single crystal silicon, polycrystalline silicon, amorphous silicon, fluorine resin, silicon resin, hydrophobic polyimide resin, and hydrophobic epoxy resin. Polyimide resin and epoxy resin can change hydrophilicity and hydrophobicity by treatment.

  Such first region 11 to third region 13 can be formed by using a normal film forming method such as vapor deposition, coating, curing, or thermal oxidation depending on the material. Here, typically, the films constituting the first region 11 and the third region 13 are simultaneously formed using the same material.

  Depending on the material, each of the regions 11 to 13 may not be a film formed on the base 10a of the substrate 10 but the base 10a of the substrate 10 itself. For example, when the second region 12 is made of a silicon material, the base 10 a itself of the substrate 10 as a silicon semiconductor substrate may be exposed and this exposed surface may be configured as the second region 12.

  In the semiconductor device S <b> 1 of the present embodiment, the underfill 30 is interposed between the one surface 1 a of the substrate 10 and the other surface 22 of the semiconductor chip 20. Specifically, the space between the other surface 22 of the semiconductor chip 20 and the first region 11 is filled with the underfill 30.

  Here, electrodes such as bumps (not shown) are provided on a part of the other surface 22 of the semiconductor chip 20. On the other hand, on the one surface 1 a side of the substrate 10, electrodes such as lands are provided at positions corresponding to the electrodes of the semiconductor chip 20. In the electrode portion of the substrate 10, the film constituting the first region 11 is opened so as to expose the electrode.

  The electrodes of the semiconductor chip 20 and the electrodes of the substrate 10 are joined by soldering, metal joining, or the like, and are electrically and mechanically connected. The underfill 30 is filled between the semiconductor chip 20 and the substrate 10 except for the joint portion of the electrode.

  In such a semiconductor device S1, the substrate 10 is formed by selectively producing the regions 11 to 13 using the normal film formation method, and the semiconductor chip 20 and the substrate 10 are bonded by the direct alignment method. Thereafter, the underfill 30 is injected. Although not limited, a specific example of the method of manufacturing the semiconductor device S1 will be described more specifically with reference to FIG.

  In the specific example shown in FIG. 3, the regions 11 to 13 are formed in the case where the regions 11 to 13 are films formed on the base 10 a of the substrate 10 as in the examples of FIGS. 1 and 2. An example of the method is shown.

  First, as the substrate 10, a semiconductor substrate having a silicon semiconductor base 10a is used. Here, as shown in FIG. 3A, a silicon oxide film 14 is formed on the entire surface of the base 10a by thermal oxidation or the like. This silicon oxide film 14 finally becomes the first region 11 and the third region 13 as a lyophilic region.

  Then, as shown in FIG. 3A, a resist R is formed on the surface of the silicon oxide film 14 by coating or the like at portions that become the first region 11 and the third region 13. The resist R is formed by, for example, a photolithography method that performs exposure and development.

  As a result, portions of the surface of the silicon oxide film 14 that become the first region 11 and the third region 13 are masked by the resist R. Next, as shown in FIG. 3B, a liquid-repellent film 15 which will eventually become the second region 12 is formed on the entire surface of this. Thus, the entire resist R and the entire portion of the silicon oxide film 14 exposed from the resist R are covered with the liquid repellent film 15.

  Thereafter, the resist R is lifted off with an organic solvent such as NMP (N-methylpyrrolidone). As a result, as shown in FIG. 3C, the silicon oxide film 14 appears at the portion covered with the resist R, which becomes the lyophilic first region 11 and the third region 13. . On the other hand, the portion where the resist R does not exist is formed as the second region 12 made of the liquid repellent film 15. Thus, the substrate 10 having the regions 11 to 13 formed on the one surface 1a is completed.

  And with respect to this board | substrate 10, water is apply | coated to the 1st area | region 11 of the one surface 1a of the board | substrate 10, and the semiconductor chip 20 is mounted on it. Thereby, water is arranged in a state of being confined in the first region 11. At this time, the water slightly protrudes into the third region 13 continuous to the first region 11, but there is no particular problem.

  However, in order to further improve the alignment accuracy, it is preferable to prevent the water from protruding. In view of this point, it is desirable to narrow the width of the slit-shaped third region 13 so that water does not enter the third region 13 due to surface tension. For example, the width of the third region 13 is preferably 100 μm or less. In addition, this width | variety is a width | variety of the site | part which contact | connects the 1st area | region 11 among the 3rd area | regions 13. FIG.

  Thus, after the semiconductor chip 20 is aligned through water, it is heated. By this heating, water evaporates and the electrode on the semiconductor chip 20 side and the electrode on the substrate 10 side are joined by solid phase joining such as solder joining or metal joining. Thus, the semiconductor chip 20 and the substrate 10 are fixed. This is the direct alignment method.

  Thereafter, as described above, the underfill 30 that has been made liquid by mixing a solvent or the like is injected from the end face 23 side of the semiconductor chip 20 directly under the semiconductor chip 20. At this time, a liquid underfill 30 is disposed in the third region 13 which is a lyophilic region, and the injection is performed through the third region 13.

  At this time, the underfill 30 gets wet preferentially outside the semiconductor chip 20 in the third region 13 which is a lyophilic region than the second region 12 which is a liquid repellent region. That is, the injection path of the liquid underfill 30 is defined by the third region 13. Therefore, the underfill 30 does not substantially protrude outside the third region 13 and flows into the first region 11 immediately below the semiconductor chip 20 by capillary action.

  In this way, the underfill 30 is injected between the semiconductor chip 20 and the substrate 10 which are bonded and fixed, and the underfill 30 is filled between the injections. Thereafter, by heating the underfill 30, the underfill 30 is cured and the semiconductor device S1 of this embodiment is completed.

  Thus, according to the present embodiment, the underfill 30 easily enters the first region 11 that is a lyophilic region located immediately below the end surface 23 of the semiconductor chip 20. Therefore, according to the present embodiment, the underfill 30 can be appropriately injected and filled between the substrate 10 and the semiconductor chip 20.

  When the third region 13 is used as an injection path for the underfill 30, in order to form the flow of the underfill 30 from the outside of the semiconductor chip 20 toward the semiconductor chip 20, It is desirable that the length is somewhat long. Although not limited, for example, the length of the third region 13 is desirably 20 μm or more.

  In the present embodiment, the third region 13 is continuously connected to the first region 11. Therefore, the underfill 30 can be more smoothly injected from the third region 13 serving as the underfill 30 injection path into the first region 11 immediately below the semiconductor chip 20.

(Second Embodiment)
The semiconductor device S2 according to the second embodiment of the present invention will be described with reference to FIG. 4 focusing on differences from the first embodiment. In the first embodiment, as shown in FIGS. 1 and 3, a plurality of the third regions 13 are provided around the first region 11 and the end face 23 of the semiconductor chip 20.

  On the other hand, as in the present embodiment shown in FIG. 4, only one third region 13 may be provided outside the first region 11 and the end face 23 of the semiconductor chip 20. Also in this case, the underfill 30 is appropriately injected between the substrate 10 and the semiconductor chip 20 by using the one third region 13 as an injection path for the underfill 30 as in the first embodiment. And can be filled.

  In other words, one or more third regions 13 may be provided outside the first region 11 and the end face 23 of the semiconductor chip 20. However, there is an advantage that the restriction on the injection location of the underfill 30 is smaller in the case of a plurality of cases than in the case of a single case.

(Third embodiment)
A semiconductor device S3 according to a third embodiment of the present invention will be described with reference to FIG. In the present embodiment, like the second embodiment, only one third region 13 is provided, and differences from the second embodiment will be mainly described. In the second embodiment, as in the first embodiment, the outer shape of the semiconductor chip 20 and the first region 11 are substantially the same size and the same shape of a rectangle.

  However, in the present embodiment, as shown in FIG. 5, the first region 11 has a rectangular shape that is slightly smaller than the outer shape of the semiconductor chip 20. In other words, in the present embodiment, the second region 12 is formed immediately below the peripheral portion inside the end surface 23 of the semiconductor chip 20.

  In the present embodiment, as shown in FIG. 5, the third region 13 is not continuously connected to the first region 11, and is between the first region 11 and the third region 13. The second region 12 is interposed.

  Even in this case, in the injection of the underfill 30, the underfill 30 passes through the other surface 22 of the semiconductor chip 20 that is originally lyophilic from the third region 13, and the first region immediately below the semiconductor chip 20. Therefore, there is virtually no problem with the injectability. Therefore, according to the present embodiment, the underfill 30 can be appropriately injected and filled between the substrate 10 and the semiconductor chip 20.

  In the present embodiment, since the second region 12 is interposed between the first region 11 and the third region 13, the water is contained in the first region 11 during the alignment with water described above. To the third region 13 can be reliably prevented.

  In addition, since this embodiment employs a configuration in which the second region 12 is interposed between the first region 11 and the third region 13, even when there are a plurality of the third regions 13. Of course, it can be applied. That is, it goes without saying that this embodiment may be applied in combination with the first embodiment.

(Fourth embodiment)
The semiconductor device S4 according to the fourth embodiment of the present invention will be described with reference to FIG. 6, focusing on the differences from the first embodiment. In the first embodiment, as shown in FIGS. 1 and 3, the third region 13 has a rectangular shape with a constant width.

  On the other hand, as shown in FIG. 6, in the present embodiment, the third region 13 has a tapered shape that is narrowed from the side of the end surface 23 of the semiconductor chip 20 toward the end surface 23. Yes. Specifically, the third region 13 of the present embodiment has a trapezoidal shape with a width that decreases from the side of the end face 23 of the semiconductor chip 20 toward the end face 23.

  According to this, when water is confined in the first region 11 in the alignment with water described above, the width of the third region 13 on the first region 11 side is narrow, so that the water is in the third region. There is an advantage that it is easy to prevent the region 13 from protruding.

  In the present embodiment, since the third region 13 has a tapered shape that is narrowed from the side of the end face 23 of the semiconductor chip 20 toward the end face 23, Of course, the present invention can be applied even when the number of the regions 13 is one. That is, it goes without saying that the present embodiment may be applied in combination with the second embodiment and the third embodiment as well as the first embodiment.

(Fifth embodiment)
A semiconductor device S5 according to the fifth embodiment of the present invention will be described with reference to FIG. 7, focusing on differences from the first embodiment. In the first embodiment, as shown in FIGS. 1 and 3, the third region 13 has a rectangular shape with a constant width.

  On the other hand, as shown in FIG. 7, in the present embodiment, in the third region 13, the part on the end face 23 side of the semiconductor chip 20 is thinner than the part outside the end face 23. It has a different shape. In the fourth embodiment, the width of the third region 13 is continuously narrowed from the side of the end face 23 of the semiconductor chip 20 toward the end face 23. It has a discontinuously narrow width.

  That is, also in the present embodiment, as in the fourth embodiment, when water is confined in the first region 11 in the above-described alignment with water, the width of the third region 13 on the first region 11 side. Therefore, it is easy to prevent water from protruding to the third region 13.

  In the present embodiment, the third region 13 has a shape in which the portion on the end face 23 side of the semiconductor chip 20 is discontinuously thin with a step as compared with the portion outside the end face 23. Of course, the present invention can be applied even when the number of the third regions 13 is one. That is, it goes without saying that the present embodiment may be applied in combination with the second embodiment and the third embodiment as well as the first embodiment.

(Other embodiments)
Note that the alignment between the semiconductor chip 20 and the substrate 10 is not limited to the above water, and any liquid other than water may be used as long as it is suitable for alignment using surface tension. .

  Further, the planar shape of the semiconductor chip 20 and the outer shape of the first region 11 are not limited to the rectangles shown in the above drawings, but may be other polygons, circles, or the like. In any case, it is only necessary that the first region 11 is located within the range of the outer shape of the semiconductor chip 20 immediately above it.

  Moreover, in the said FIG. 3, the example of selective production of each area | region 11-13 by lift-off was described. However, the regions 11 to 13 may be formed by using selective film formation using a mask or the like, or by configuring the base 10a itself as the regions. Of course.

  Further, the present invention is not limited to the above-described embodiment, and can be appropriately changed within the scope described in the claims. The above embodiments are not irrelevant to each other, and can be combined as appropriate unless the combination is clearly impossible, and the above embodiments are not limited to the illustrated examples. Absent. In each of the above-described embodiments, it is needless to say that elements constituting the embodiment are not necessarily essential unless explicitly stated as essential and clearly considered essential in principle. Yes. Further, in each of the above embodiments, when numerical values such as the number, numerical value, quantity, range, etc. of the constituent elements of the embodiment are mentioned, it is clearly limited to a specific number when clearly indicated as essential and in principle. The number is not limited to the specific number except for the case. Further, in each of the above embodiments, when referring to the shape, positional relationship, etc. of the component, etc., the shape, unless otherwise specified and in principle limited to a specific shape, positional relationship, etc. It is not limited to the positional relationship or the like.

DESCRIPTION OF SYMBOLS 1a One surface of a board | substrate 10 Board | substrate 11 1st area | region 12 2nd area | region 13 3rd area | region 20 Semiconductor chip 23 End surface 30 of a semiconductor chip 30 Underfill

Claims (4)

A substrate (10);
A semiconductor chip (20) mounted on one surface (1a) of the substrate and fixed to the substrate;
An underfill (30) made of an insulating resin filled between one surface of the substrate and the semiconductor chip,
Of the one surface of the substrate, a region located immediately below the semiconductor chip is a first region (11), and a region surrounding the first region adjacent to the first region is a second region (12). When
The surface of the first region is a lyophilic region,
The surface of the second region is a liquid repellent region having a higher liquid repellency than the first region,
A part of the second region has a slit shape extending from the side of the end surface (23) of the semiconductor chip so as to reach the end surface, and the surface has the same lyophilicity as the first region. A semiconductor device characterized in that the third region (13) is provided in place of the second region.   The semiconductor device according to claim 1, wherein the third region is continuously connected to the first region.   3. The semiconductor device according to claim 1, wherein the third region has a tapered shape that is narrowed from a side of an end face of the semiconductor chip toward the end face. 4.   3. The semiconductor according to claim 1, wherein the third region has a shape in which a part on an end face side of the semiconductor chip is thinner than a part on the outer side of the end face. 4. apparatus.

Images