JP2015173196A - Method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device capable of achieving a high yield by preventing temporary fixing at a low temperature and misregistration due to transportation in a device or misregistration at thermal compression.SOLUTION: A method for manufacturing a semiconductor device comprises: a step S1 of forming a resin composition layer on an electrode surface of a first semiconductor wafer in which an electrode is formed (resin composition layer forming step); a step S2 of forming a recess in the resin composition layer by removing at least a part of the resin composition layer on the electrode and exposing at least a part of the electrode (electrode exposing step); a step S3 of obtaining a semiconductor chip with a resin composition by dividing the first semiconductor wafer into individual pieces (dividing step); and a step S4 of fitting an electrode formed on a second semiconductor wafer or an electrode of a support member for semiconductor chip mounting into the recess (temporary fixing step).

Description

  The present invention relates to a method for manufacturing a semiconductor device.

  2. Description of the Related Art In recent years, semiconductor packages having various forms have been proposed as electronic components have been improved in performance and functionality. As a semiconductor package, there is one in which a semiconductor chip (semiconductor element) and a semiconductor chip mounting support member are joined, and an adhesive is used for this joining.

  In recent years, in the field of semiconductor mounting, a flip chip mounting method in which semiconductor chips are connected to each other and / or a semiconductor chip and a support member for mounting a semiconductor chip are connected via a plurality of conductive bumps has attracted attention. Yes. In the flip chip mounting method, abnormal connection between the substrate and the semiconductor chip via the conductive bumps may occur due to stress based on the difference in thermal expansion coefficient between the respective connection members. For this reason, a method of sealing conductive bumps by filling a resin (underfill material) between connecting members for the purpose of alleviating the stress is known (for example, Patent Document 1). Furthermore, the use of a negative photosensitive adhesive composition as a connection material for connecting semiconductor chips or connecting a semiconductor chip and a semiconductor chip mounting support member has been studied (for example, Patent Document 2). ).

Japanese Patent No. 3999840 International Publication No. 2011/049011

Proceedings of 2009 Electronic Components and Technology Conference, 11-13 (2009).

  Here, when connecting by heating and / or pressurization, after positioning the substrate and the semiconductor chip, the chip is temporarily fixed on the substrate at a temperature lower than the connection temperature, and then the connection temperature. A process of thermocompression bonding while raising the temperature may be used. Such temporary fixing has been studied as an effective technique particularly for connecting a plurality of chips together. (For example, Non-Patent Document 1).

  However, in order to perform such temporary fixing, heating of 100 ° C. or more is required in order to soften the connection material and promote the expression of adhesiveness in order to prevent displacement during thermocompression bonding. For this reason, when using the electrode which is easy to be oxidized like copper, for example, there existed a subject that connectivity fell by formation of an oxide film. In addition, if temporary fixing is performed by heating the connection material, it is not possible to sufficiently prevent misalignment due to subsequent conveyance in the apparatus, or misalignment due to softening again due to heating during thermocompression bonding, resulting in a decrease in yield. There was an inviting problem.

  The present invention has been made in view of the above circumstances, and is formed as a connection material in connection between semiconductor chips, connection between a semiconductor chip and a semiconductor wafer or a semiconductor chip mounting support member, or connection between semiconductor wafers. The electrode of the resin composition layer is exposed, and a temporary fixing state is established by fitting the electrode to be joined into a recess generated at that time. It is an object of the present invention to provide a method for manufacturing a semiconductor device having a high yield by preventing misalignment due to or misalignment during thermocompression bonding.

  In order to solve the above problems, a semiconductor device manufacturing method of the present invention includes a resin composition layer forming step of forming a resin composition layer on an electrode surface of a first semiconductor wafer on which an electrode is formed, An electrode exposing step of removing at least a part of the resin composition layer on the electrode of the semiconductor wafer to form a recess in the resin composition layer to expose at least a part of the electrode of the first semiconductor wafer; An individualization step for obtaining a semiconductor chip with a resin composition by dividing the semiconductor wafer into pieces, and a temporary fixing step for fitting the electrodes of the second semiconductor wafer on which the electrodes are formed or the semiconductor chip mounting support member into the recesses, Have.

  In this case, you may further have the connection process which electrically connects the electrode of the semiconductor chip with a resin composition, and the electrode of the 2nd semiconductor wafer or the support member for semiconductor chip mounting.

  The method for producing a semiconductor device of the present invention comprises a resin composition layer forming step of forming a resin composition layer on the electrode surface of a first semiconductor wafer on which electrodes are formed, and a resin composition on the electrodes of the first semiconductor wafer. Removing at least part of the physical layer to form a recess in the resin composition layer, exposing at least part of the electrode of the first semiconductor wafer; and exposing the second semiconductor wafer on which the electrode is formed A temporary fixing step of fitting the electrode into the recess.

  In this case, you may further have the connection process which electrically connects the electrode of a 1st semiconductor wafer, and the electrode of a 2nd semiconductor wafer.

  The method for producing a semiconductor device of the present invention comprises a resin composition layer forming step of forming a resin composition layer on the electrode surface of a first semiconductor wafer on which electrodes are formed, and a resin composition on the electrodes of the first semiconductor wafer. Removing at least part of the physical layer to form a recess in the resin composition layer, exposing at least part of the electrode of the first semiconductor wafer, and separating the resin of the first semiconductor wafer into a resin It has the individualization process which obtains the semiconductor chip with a composition, and the temporary fixing process which inserts the electrode of the other semiconductor chip in which the electrode was formed in a recessed part.

  In this case, you may further have the connection process which electrically connects the electrode of the semiconductor chip with a resin composition, and the electrode of another semiconductor chip.

  The semiconductor device manufacturing method of the present invention includes a resin composition layer forming step of forming a resin composition layer on an electrode surface of a first semiconductor wafer or a semiconductor chip mounting support member on which an electrode is formed, and a first semiconductor At least a part of the resin composition layer on the electrode of the wafer or semiconductor chip mounting support member is removed to form a recess in the resin composition layer, and at least the electrode of the first semiconductor wafer or semiconductor chip mounting support member An electrode exposing step of exposing a part, and a temporary fixing step of fitting the electrode of the semiconductor chip on which the electrode is formed into the recess.

  In this case, you may further have the connection process which electrically connects the electrode of a semiconductor chip, and the electrode of the 1st semiconductor wafer or the support member for semiconductor chip mounting.

  The resin composition layer may be a photosensitive resin composition that can be patterned by exposure and development. Thereby, the resin layer on the electrode can be accurately removed together with a desired region.

  In this case, the electrode exposure step may include an exposure step and a development step. Thereby, the residue of the photosensitive resin on an electrode can be reduced.

  The temperature of the temporary fixing step may be 100 ° C. or less. Thereby, it becomes possible to suppress the oxidation of an electrode at the time of temporary fixation, and subsequent connectivity becomes good.

  The temperature of the connection step may be 150 ° C. or higher. As a result, bonding between electrodes, that is, metal bonding is suitably formed, good conduction can be realized, and a highly reliable semiconductor device can be obtained.

  The connecting step may be performed as a step in which the electrodes of the plurality of chips are simultaneously electrically connected by thermocompression bonding of the plurality of chips or wafers at once. Thereby, at the time of thermocompression bonding, the work time required for temperature rise and fall of the tool portion to which a load is applied can be greatly shortened.

  According to the present invention, the semiconductor chip is connected to the semiconductor chip or the semiconductor wafer or the semiconductor chip mounting support member, or the semiconductor wafer is connected to each other. A semiconductor device can be obtained. In addition, by preventing misalignment during conveyance or thermocompression bonding in the apparatus, a semiconductor device can be obtained with a high yield while shortening the working time.

It is a flowchart which shows the manufacturing method of the semiconductor device of 1st Embodiment. It is a flowchart which shows the manufacturing method of the semiconductor device of 1st Embodiment. It is process drawing which shows the manufacturing method of the semiconductor device of 1st Embodiment typically. It is process drawing which shows the manufacturing method of the semiconductor device of 1st Embodiment typically. It is process drawing which shows the manufacturing method of the semiconductor device of 1st Embodiment typically. It is process drawing which shows the manufacturing method of the semiconductor device of 1st Embodiment typically. It is process drawing which shows the manufacturing method of the semiconductor device of 1st Embodiment typically. It is process drawing which shows the manufacturing method of the semiconductor device of 1st Embodiment typically. It is process drawing which shows the manufacturing method of the semiconductor device of 1st Embodiment typically. It is process drawing which shows typically the manufacturing method of the semiconductor device of 2nd Embodiment. It is process drawing which shows typically the manufacturing method of the semiconductor device of 2nd Embodiment. It is process drawing which shows typically the manufacturing method of the semiconductor device of 2nd Embodiment. It is process drawing which shows typically the manufacturing method of the semiconductor device of 2nd Embodiment. It is process drawing which shows typically the manufacturing method of the semiconductor device of 2nd Embodiment. It is process drawing which shows the manufacturing method of the semiconductor device of 3rd Embodiment typically. It is process drawing which shows the manufacturing method of the semiconductor device of 3rd Embodiment typically. It is process drawing which shows the manufacturing method of the semiconductor device of 3rd Embodiment typically. It is process drawing which shows the manufacturing method of the semiconductor device of 3rd Embodiment typically. It is process drawing which shows the manufacturing method of the semiconductor device of 3rd Embodiment typically.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of an optical semiconductor device according to one aspect of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals.

  Hereinafter, embodiments according to one aspect of the present invention will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same reference numerals are used for the same or equivalent elements, and duplicate descriptions are omitted.

(First embodiment)
1 and 2 are flowcharts showing a method for manufacturing a semiconductor device according to the first embodiment, and FIGS. 3 to 9 are process diagrams schematically showing the method for manufacturing a semiconductor device according to the first embodiment. is there.

  As shown in FIG. 1, in the first embodiment, first, a resin composition layer forming step (S1) is performed, then an electrode exposing step (S2) is performed, and then an individualization step (S3). Next, a temporary fixing step (S4) is performed, and then a connecting step (S5) is performed. As shown in FIG. 2, in the electrode exposure step (S2), an exposure step (S21) is first performed, and then a development step (S22) is performed.

  In the resin composition layer forming step (S1), a resin composition layer (also referred to as “adhesive layer”) is formed on the electrode surface of the first semiconductor wafer on which the electrode (also referred to as “connection electrode”) is formed. Form.

  In the electrode exposure step (S2), at least a part of the resin composition layer on the electrode is removed to form a recess in the resin composition layer to expose at least a part of the electrode.

  In the exposure step (S21), the resin composition layer is irradiated with actinic rays to expose portions other than the removed portion of the resin composition layer.

  In the developing step (S22), the unexposed part is developed and removed.

  In the individualization step (S3), the first semiconductor wafer is separated into individual semiconductor chips with a resin composition.

  In the temporary fixing step (S4), the electrode of the second semiconductor wafer on which the electrode is formed or the semiconductor chip mounting support member is fitted into the recess of the resin composition layer in the semiconductor chip with a resin composition.

  In the connecting step (S5), the electrode of the semiconductor chip with the resin composition is electrically connected to the electrode of the semiconductor chip mounting support member on which the second semiconductor wafer or electrode is formed.

  Next, these steps will be described in detail with reference to FIGS.

  In the resin composition layer forming step (S1), a semiconductor wafer composed of the first semiconductor wafer 12 on which the connection electrode 1 is formed is prepared (see FIG. 3A), and the circuit surface of this semiconductor wafer is prepared. Then, the resin composition layer 2 is laminated (see FIG. 3B).

  The connection electrode 1 is formed on the circuit surface which is the surface of the first semiconductor wafer 12 and protrudes from the first semiconductor wafer 12.

  The connection electrode 1 is formed by gold bumps or copper bumps formed by plating, and bumps in which solder is formed on copper. The connection electrode 1 is formed by a gold stud bump formed using a gold wire, a metal ball fixed to an electrode pad by thermocompression using ultrasonic waves as necessary, a bump formed by plating or vapor deposition, or the like. May be. The connection electrode 1 may be made of a single metal or may be made of a plurality of metals. The connection electrode 1 may contain gold, silver, copper, nickel, indium, palladium, tin, bismuth, or the like. Further, the connection electrode 1 may be a single layer body or a laminate including a plurality of metal layers.

  As a laminating method for laminating the resin composition layer 2, a film-like adhesive previously formed into a film shape is prepared, and this is applied to the first semiconductor wafer 12 by using a method such as spin coating or spin coating. Examples thereof include a method in which a liquid varnish containing the composition is applied onto the first semiconductor wafer 12 and dried by heating.

  As a method for attaching the film adhesive to the first semiconductor wafer 12, a laminating method is generally used. Examples of the laminating apparatus include an apparatus in which rollers are installed above and below the film adhesive sheet, and an apparatus that presses the film adhesive sheet on the first semiconductor wafer 12 in a vacuum state. When laminating, it is preferable to heat the film adhesive sheet. Thereby, the resin composition layer 2 can be sufficiently adhered to the first semiconductor wafer 12, and the resin composition layer 2 is provided around the connection electrode 1 protruding from the first semiconductor wafer 12. Can be embedded without gaps. The heating temperature is such that the resin composition layer 2 is softened and does not harden. When the resin composition layer 2 includes, for example, an epoxy resin, an acrylic acid copolymer having a softening temperature of 40 ° C., and a latent curing agent for an epoxy resin having a reaction start temperature of 100 ° C., the heating temperature is For example, 80 ° C.

  The film-like or liquid adhesive composition according to the present embodiment has adhesiveness to an adherend such as a semiconductor chip with a resin composition and a substrate. For example, it is possible to bond the resist pattern and the adherend by applying pressure while heating the adherend as necessary.

  The resin composition layer 2 contains a thermosetting resin. The thermosetting resin is cured by three-dimensionally crosslinking with heat.

  The thermosetting resin included in the resin composition layer 2 includes epoxy resin, bismaleimide resin, triazine resin, polyimide resin, polyamide resin, cyanoacrylate resin, phenol resin, unsaturated polyester resin, melamine resin, urea resin, polyurethane. Examples include resins, polyisocyanate resins, furan resins, resorcinol resins, xylene resins, benzoguanamine resins, diallyl phthalate resins, silicone resins, polyvinyl butyral resins, siloxane-modified epoxy resins, siloxane-modified polyamideimide resins, and acrylate resins. These can be used alone or as a mixture of two or more.

  The resin composition layer 2 may include a curing agent for promoting the curing reaction. In this case, the resin composition layer 2 preferably contains a latent curing agent in order to achieve both high reactivity and storage stability.

  The resin composition layer 2 may contain a thermoplastic resin. Examples of the thermoplastic resin include polyester resin, polyether resin, polyamide resin, polyamideimide resin, polyimide resin, polyarylate resin, polyvinyl butyral resin, polyurethane resin, phenoxy resin, polyacrylate resin, polybutadiene, acrylonitrile butadiene copolymer ( NBR), acrylonitrile butadiene rubber styrene resin (ABS), styrene butadiene copolymer (SBR), acrylic acid copolymer and the like. These can be used alone or in combination of two or more. Among these, a thermoplastic resin having a softening point near room temperature is preferable, and an acrylic acid copolymer containing glycidyl methacrylate or the like as a raw material is preferable in order to ensure stickability to the first semiconductor wafer 12.

  A filler (inorganic fine particles) for reducing the linear expansion coefficient may be added to the resin composition layer 2. Such fillers may be crystalline or non-crystalline. When the linear expansion coefficient after curing of the resin composition layer 2 is small, thermal deformation is suppressed. Therefore, by adding a filler for reducing the linear expansion coefficient to the resin composition layer 2 and suppressing a decrease in the linear expansion coefficient after the resin composition layer 2 is cured, the electrode of the semiconductor chip with the resin composition And electrical connection between the second semiconductor wafer and the electrode of the semiconductor chip mounting support member (wiring substrate) can be maintained. Thereby, the reliability of the semiconductor device manufactured by connecting the semiconductor chip with a resin composition and the second semiconductor wafer can be improved.

  The resin composition layer 2 may contain an additive such as a coupling agent. Thereby, the adhesiveness of the semiconductor chip with a resin composition and the second semiconductor wafer or the semiconductor chip mounting support member can be improved.

  The film-like or liquid adhesive composition according to this embodiment is not particularly limited, but is preferably a photosensitive resin composition. Even after the photosensitive resin composition is patterned, it is preferable that the photosensitive resin composition has adhesiveness to an adherend by heating and pressing as necessary. The photosensitive resin composition is more preferably capable of patterning (pattern formation) by exposure and development in the electrode exposure step (S2). In this case, the developing method is preferably capable of developing with an alkaline aqueous solution.

  Moreover, when using the resin composition which does not have photosensitivity, the resin composition layer 2 on the electrode 1 for a connection is removed using techniques, such as a laser or an imprint, in an electrode exposure process (S2). be able to.

  As the photosensitive resin composition that can be used as the adhesive composition according to the present embodiment, both a negative type and a positive type can be used. Here, an embodiment in which a negative type is used will be described.

  In the electrode exposure step (S2), first, an exposure step (S21) is performed. In the exposure step (S21), the resin composition layer 2 provided on the first semiconductor wafer 12 is exposed to actinic rays (typically ultraviolet rays) through a mask 10 having openings at predetermined positions. ) Is irradiated (see FIG. 3C). Thereby, the resin composition layer 2 is exposed in a predetermined pattern. At this time, portions other than the removed portion of the resin composition layer 2 are exposed.

  In the electrode exposure step (S2), next, a development step (S22) is performed. In the development step (S22), the unexposed portion of the resin composition layer 2 is removed by development using an alkaline developer, so that at least a part of the connection electrode 1 is present on the resin composition layer 2. The resin composition layer 2 is patterned so that the exposed recess 3 is formed (see FIG. 4A).

  In the individualization step (S3), the laminated body of the first semiconductor wafer 12 and the resin composition layer 2 is cut for each first semiconductor chip 4 with a resin composition by dicing (see FIG. 4B).

  At this time, a planned cutting line called a scribe line for dicing may be formed in the first semiconductor wafer 12. For example, the planned cutting lines are arranged in a grid pattern. An alignment mark at the time of cutting may be provided in the planned cutting line. At this time, it is preferable that the resin composition layer 2 on the scribe line is also removed by patterning in the steps of FIG. 4A and FIG. As a result, dirt and deterioration of the dicer blade can be reduced, and the visibility of the alignment mark at the time of cutting can be improved.

  FIG. 4C is an enlarged view in which the first semiconductor chip 4 with a resin composition singulated in FIG. 4B is turned upside down.

  In the temporary fixing step (S3), as shown in FIG. 5, first, the connection electrode 1 and the protruding electrode 5 on the circuit surface of the first semiconductor chip with resin composition 4 on which the resin composition layer 2 is formed are provided. The formed second semiconductor wafer 13 or the protruding electrode 5 of the semiconductor chip mounting support (not shown) is aligned. The second semiconductor wafer 13 or the semiconductor chip mounting support portion includes a circuit forming substrate and a protruding electrode 5 provided on the circuit. The alignment is performed using, for example, a flip chip bonder.

  In the temporary fixing step (S3), next, the wafer surface of the first semiconductor chip with resin composition 4 is arranged so that the surface of the semiconductor chip 4 faces the suction / heating head 14 side, and is placed on the suction / heating head 14 of the flip chip bonder. The first semiconductor chip 4 with a resin composition on which the resin composition layer 2 is formed is placed. Subsequently, the alignment mark formed on the circuit surface of the first semiconductor chip with a resin composition 4 is recognized using a camera. When the alignment mark is covered with the resin composition layer 2, the first resin composition-attached semiconductor is transmitted through the resin composition layer 2 formed on the first semiconductor chip with resin composition 4. It is preferable to observe the circuit surface of the chip 4. In this case, it is not necessary to process the first semiconductor chip 4 with a resin composition in order to observe the circuit surface of the first semiconductor chip 4 with a resin composition. Since the alignment mark can be recognized by observing the circuit surface, the position of the semiconductor chip 4 with the first resin composition can be specified.

  Further, by irradiating the resin composition layer 2 with light from a direction inclined with respect to the normal direction of the surface of the resin composition layer 2, the circuit surface of the first semiconductor chip 4 with the resin composition is observed. Also good. In this case, it is possible to suppress irregular reflection of light on the surface of the resin composition layer 2. Therefore, the connection electrode 1 of the first semiconductor chip 4 with the resin composition and the protruding electrode 5 of the second semiconductor wafer 13 or the semiconductor chip mounting support can be aligned with high accuracy. Moreover, you may observe the circuit surface of the 1st semiconductor chip 4 with a resin composition, blocking the reflected light from the surface of the resin composition layer 2 using the camera which has a polarizing filter.

  On the other hand, the alignment mark provided on the second semiconductor wafer 13 or the semiconductor chip mounting support is recognized using another camera. Thereby, the position of the protruding electrode 5 can be specified.

  Image signals from the two cameras are input to a computer. Thereby, the computer can accurately align the connection electrode 1 of the first semiconductor chip with a resin composition 4 and the protruding electrode 5 of the second semiconductor wafer 13 or the semiconductor chip mounting support. The relative position between the first semiconductor chip with resin composition 4 and the second semiconductor wafer 13 or the semiconductor chip mounting support can be controlled.

  In the temporary fixing step (S3), when the alignment can be performed as described above, the first semiconductor chip 4 with the resin composition is then attached to the second semiconductor wafer 13 or while heating the suction / heating head as necessary. It arrange | positions so that the support part for semiconductor chip mounting may be touched. At this time, the temporarily fixed state is formed by fitting the protruding electrode 5 of the second semiconductor wafer 13 or the semiconductor chip mounting support portion into the recess 3. Thereby, the heating temperature of temporary fixing can be made into 100 degrees C or less (it is not necessary to heat), and a favorable temporary fixing state can be maintained, suppressing the oxidation of the metal member containing an electrode. In particular, when an electrode containing a metal that is easily oxidized, for example, copper, is used, the effect can be further improved. Further, the heating temperature of the adsorption / heating head at this time is preferably 100 ° C. or lower, more preferably 50 ° C. or lower in terms of further delaying the progress of metal oxidation, and 30 ° C. or lower in terms of tact time due to increase / decrease in tool temperature. Is particularly preferred.

  Moreover, it is preferable that the size of the recess 3 and the size of the protruding electrode 5 of the second semiconductor wafer 13 or the semiconductor chip mounting support portion have the following magnitude relationship.

  When the shape viewed from directly above the recess 3 or the protruding electrode 5 is a rectangle (including a square) or an ellipse (including a circle), the length of the long side or long axis of the recess 3 is R3, and the length of the protruding electrode 5 is The length of the side or long axis is represented as R5, the short side or uniaxial length of the recess 3 is represented as R3 ′, and the short side or uniaxial length of the protruding electrode 5 is represented as R5 ′. In this case, the relationship between R3, R5, R′3, and R′5 is preferably 0.2 <R5 / R3 <1.1 and 0.5 <R′5 / R′3 <1.1. 0.4 <R5 / R3 <0.9 and 0.4 <R′5 / R′3 <0.9, more preferably 0.5 <R5 / R3 <0.8 and 0.5 It is particularly preferable that <R′5 / R′3 <0.8. When R5 / R3 is larger than 0.2, the holding state of the first semiconductor chip 4 with the resin composition in the temporarily fixed state is sufficient, and the possibility of causing a positional shift is lowered, which is smaller than 1.1. In this case, the biting of the adhesive between the protruding electrode 5 and the connection electrode 1 of the first semiconductor chip 4 with the resin composition is suppressed, and the conductivity is improved.

  The height of the connecting electrode 1 of the semiconductor chip 4 with the first resin composition, the height of the protruding electrode 5 of the second semiconductor wafer 13 or the semiconductor chip mounting support, and the film thickness of the resin composition layer 2 are as follows. It is preferable to have a relationship. When the height from the substrate surface of the connection electrode 1 to the highest point is H1, the height from the substrate surface of the protruding electrode 5 to the highest point is H5, and the film thickness of the resin composition layer 2 is H2, 0.7 < {(H1 + H5) / H2} <1.2 is preferable, 0.8 <{(H1 + H5) / H2} <1.1 is more preferable, and 0.85 <{(H1 + H5) / H2}. It is particularly preferred that <1.05. When {(H1 + H5) / H2} is greater than 0.7, the amount of resin displacement decreases when the connecting electrode 1 and the protruding electrode 5 are joined. As a result, the biting of the adhesive between the electrodes is suppressed. This improves continuity. On the other hand, when it is smaller than 1.2, the resin composition layer 2 is sufficiently pressed against the second semiconductor wafer 13 or the semiconductor chip mounting support portion when the connection electrode 1 and the protruding electrode 5 are joined. Can improve and maintain the reliability thereafter.

  In the connection step (S5), the protruding electrode 5 and the connection electrode 1 of the first resin composition-attached semiconductor chip 4 are electrically connected using the suction / heating head 14 of the flip chip bonder. At this time, together with the connection between the protruding electrode 5 and the connection electrode 1, the gap 6 that may exist at the time of FIG. 5 which is the temporary fixing step (S 4) is filled by the deformation of the resin composition layer 2. As a result, as shown in FIG. 6, a laminated body 17 is manufactured in which the semiconductor chip 4 with the first resin composition is laminated on the second semiconductor wafer 13 or the semiconductor chip mounting support. As a condition for the connection, there is no problem as long as bonding of metal electrodes, bonding by melting of solder balls, or bonding of copper is possible, and for example, the temperature can be set to 150 ° C. or higher. Moreover, said joining will be possible if it is the range of temperature: 150 degreeC-400 degreeC, pressure: 0.1MPa -2.0MPa, time: 10 second-2 hours. At this time, by including a flux component in the resin composition layer 2, the connectivity can be improved by efficiently removing the oxide film such as solder balls or copper bumps.

  Further, the connection after forming the temporarily fixed state is not performed for each of the first semiconductor chips 4 with the resin composition, but in units of several or as schematically shown in FIG. 13 or the semiconductor chip 4 with the first resin composition disposed (temporarily fixed) on the entire surface of the semiconductor chip mounting support portion can be connected together. In this case, each first semiconductor chip with a resin composition 4 to be connected by using a wafer bonder (wafer crimping machine) or the like, for example, by using a support substrate 16 for wafer bonding as shown in FIG. Temperature and pressure can be applied uniformly. As the conditions at this time, for example, temperature: 150 ° C. to 400 ° C., pressure: 0.1 MPa to 2.0 MPa, time: 10 seconds to 2 hours can be used as described above. 7 and 8, reference numeral 15 denotes a wafer in a state where chips are temporarily fixed.

  After the connection, the resin composition layer 2 may be heated as necessary to further advance the curing reaction.

  After that, as shown in FIG. 9, a stacked body 17 in which the first semiconductor chip with resin composition 4 is stacked on the second semiconductor wafer 13 is cut for each semiconductor device 7 by dicing. The semiconductor device 7 cut in this way is also referred to as a semiconductor chip.

  At this time, a planned cutting line called a scribe line for dicing may be formed on the second semiconductor wafer 13. For example, the planned cutting lines are arranged in a grid pattern. An alignment mark at the time of cutting may be provided in the planned cutting line.

  With the above method, the semiconductor device 7 shown in FIG. 9 is obtained.

  The semiconductor device manufacturing method according to the present embodiment has been described above. However, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention.

  For example, in the first semiconductor chip with a resin composition 4, by forming a through electrode or the like at the time of the first semiconductor wafer 12 and forming an electrode on the back surface of the circuit surface, at the stage of FIG. Semiconductor chips of the same type or different types can be stacked on the first semiconductor chip 4 with a resin composition by using the same manufacturing method. By repeating this, a semiconductor device can be obtained as a stacked body of a plurality of chips. Moreover, when laminating | stacking a some chip | tip, it can also carry out through the process as described in 2nd Embodiment mentioned later.

  Also, in the temporary fixing step, the semiconductor chip with the resin composition is fitted into the concave portion, not the electrode of the second semiconductor wafer or the semiconductor chip mounting support member (wiring board), but another semiconductor chip on which the electrode is formed. These electrodes may be used. In this case, in the connection step, the electrode of the resin composition semiconductor chip and the electrode of another semiconductor chip are electrically connected.

(Second Embodiment)
In the second embodiment, the resin composition layer forming step and the electrode exposing step are performed as in the first embodiment.

  10 to 14 are process diagrams schematically showing the method of manufacturing a semiconductor device according to the second embodiment.

  FIG. 10 shows a state in which the resin composition layer forming step and the electrode exposing step are performed as in the first embodiment, and the resin composition layer 2 is patterned on the first semiconductor wafer 12 on which the connection electrodes 1 are formed. Is shown. In the second embodiment, it is more preferable that the resin composition layer 2 on the scribe line is also removed by patterning at the same time as the recess 3 in the electrode exposure step similar to the first embodiment to form the opening 19. It is a form. This is because, like the first embodiment, it is possible to improve the workability such as reducing the dirt and deterioration of the dicer blade and improving the visibility of the alignment mark during cutting. In the next temporary fixing step, when the first semiconductor wafer 12 is connected (temporarily fixed) to the second semiconductor chip 18, the resin composition layer 2 is significantly larger than the outer peripheral portion of the second semiconductor chip 18. If it protrudes, the resin composition rises on the second semiconductor chip 18 and there is a concern about contamination of the bonding tool or device.

  Next, without performing the singulation process, in the temporary fixing process, the connection electrode 1 on the first semiconductor wafer 12 and the protruding electrode 5 of the second semiconductor chip 18 provided with the corresponding protruding electrode 5 As in the first embodiment (see FIG. 5), the position is adjusted using a flip chip bonder or the like (see FIG. 11). When alignment is possible, the second semiconductor chip 18 is disposed in contact with the first semiconductor wafer 12 while heating the suction / heating head as necessary. At this time, the temporarily fixed state is formed by fitting the protruding electrode 5 of the second semiconductor chip 18 into the recess 3. At this time, the preferable relationship such as the size of the recess 3 and the protruding electrode 5, the thickness of the resin composition layer 2 and the height of the protruding electrode 5 is the same as in the first embodiment.

  Next, in the connection step, the protruding electrode 5 is connected to the connection electrode 1 on the first semiconductor wafer 12 (see FIG. 12). As in the first embodiment, each second semiconductor chip 18 can be connected individually, or a plurality of second semiconductor chips 18 can be connected together. The preferred embodiment is the same as the first embodiment (see FIG. 13).

  At this time, together with the connection between the protruding electrode 5 and the connection electrode 1, the gap 6 that may exist at the time of FIG. 11, which is a temporary fixing step, is filled by the deformation of the resin composition layer 2. As a result, as shown in FIG. 12, a stacked body 17 in which the second semiconductor chips 18 are stacked on the first semiconductor wafer 12 is manufactured. After the connection, the resin composition layer 2 may be heated as necessary to further advance the curing reaction.

  Thereafter, the stacked body 17 in which the first semiconductor chip 4 with the resin composition is stacked on the second semiconductor wafer 13 is cut into each semiconductor device 7 (chip stacked body) by dicing (see FIG. 14).

  With the above method, the semiconductor device 7 shown in FIG. 14 is obtained.

  The semiconductor device manufacturing method according to the present embodiment has been described above. However, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention.

  For example, in the second semiconductor chip 18, for example, a through electrode or the like is formed at the time of the second semiconductor wafer 13 before being singulated, and an electrode is formed on the back surface of the circuit surface. Further, the same type or different types of semiconductor chips can be stacked on the second semiconductor chip 18 by using the same manufacturing method. By repeating this, a semiconductor device can be obtained as a stacked body of a plurality of chips. In addition, when stacking a plurality of chips, the steps described in the first embodiment can be performed together.

  Further, in the resin composition layer forming step and the electrode exposing step, a semiconductor chip mounting support member may be used instead of the first semiconductor wafer. In this case, in the connecting step, the electrode of the resin composition semiconductor chip and the electrode of the semiconductor chip mounting support member are electrically connected.

(Third embodiment)
In the third embodiment, the resin composition layer forming step and the electrode exposing step are performed as in the first embodiment.

  15 to 19 are process diagrams schematically showing the method for manufacturing a semiconductor device according to the third embodiment.

  FIG. 15 shows a state in which the resin composition layer forming step is performed similarly to the first and second embodiments, and the resin composition layer 2 is patterned on the first semiconductor wafer 12 on which the connection electrodes 1 are formed. Show. At this time, the resin composition layer 2 on the scribe line can also be removed by patterning at the same time as the recess 3 in the electrode exposure step similar to the first embodiment.

  Next, the upper and lower electrodes of the second semiconductor wafer 13 provided with the protruding electrodes 5 in the recesses 3 are aligned using, for example, a wafer bonder in the temporary fixing step without performing the individualization step (see FIG. 16). ).

  When alignment is possible, the second semiconductor wafer 13 is placed in contact with the first semiconductor wafer 12 while heating the bonding tool of the wafer bonder as necessary. At this time, for example, a support substrate 16 for wafer bonding can be used. At this time, the temporarily fixed state is formed by fitting the protruding electrode 5 of the second semiconductor wafer 13 into the recess 3. A preferred embodiment is the same as the first and second embodiments in relation to the size of the recess 3 and the protruding electrode 5 or the film thickness of the resin composition layer 2 and the height of the protruding electrode 5 (FIG. 17). reference).

  Bonding of wafers using a wafer bonder can also be performed in a bonding process described later with an apparatus different from the temporary fixing process or with a different unit by means of in-device transfer. In this case, by taking the temporarily fixed state which is the embodiment of the present invention, it is possible to prevent the positional deviation at the time of conveyance.

  Next, in the connection step, the protruding electrode 5 and the connection electrode 1 are connected. It is preferable to apply a uniform temperature and pressure to the entire wafer surface using a wafer bonder or the like. Preferred temperature and pressure conditions are the same as in the first embodiment (see FIG. 18).

  At this time, the gap 6 that may exist at the time of FIG. 17 together with the connection is filled by deformation of the resin composition layer 2, and the wafer laminate 20 is manufactured as shown in FIG. 18. After the connection, the resin composition layer 2 may be heated as necessary to further advance the curing reaction.

  Thereafter, the wafer laminated body 20 of the chip on the wafer in which the first semiconductor composition-attached semiconductor chip 4 is laminated on the second semiconductor wafer 13 is cut for each semiconductor device 21 (chip laminated body) by dicing (FIG. 19). .

  With the above method, the semiconductor device 21 shown in FIG. 19 is obtained. The method for manufacturing a semiconductor device of the present invention is not limited to the above-described embodiment, and can be appropriately changed without departing from the gist of the present invention.

  Further, in the method of manufacturing a semiconductor device of the present invention, in the second semiconductor wafer 13, for example, a through electrode is formed and an electrode is formed on the back surface of the circuit surface. These semiconductor wafers or semiconductor chips can be laminated by using the same manufacturing method or the steps described in the first and second embodiments. By repeating this, a semiconductor device can be obtained as a stacked body of a plurality of chips.

  DESCRIPTION OF SYMBOLS 1 ... Connection electrode, 2 ... Resin composition layer, 3 ... Recessed part, 4 ... Semiconductor chip with 1st resin composition, 5 ... Projection electrode, 6 ... Air gap, 8 ... Semiconductor device (chip laminated body), 10 ... Mask: 12 ... first semiconductor wafer, 13 ... second semiconductor wafer, 14 ... adsorption / heating head, 15 ... wafer in which chips are temporarily fixed, 16 ... support substrate, 17 ... stack of chips on wafer , 18 second semiconductor chip, 19 opening of resin composition layer on scribe line, 20 wafer stack, 21 semiconductor device (chip stack).

Claims (12)

A resin composition layer forming step of forming a resin composition layer on the electrode surface of the first semiconductor wafer on which the electrodes are formed;
An electrode for removing at least part of the resin composition layer on the electrode of the first semiconductor wafer to form a recess in the resin composition layer and exposing at least part of the electrode of the first semiconductor wafer An exposure process;
An individualization step for obtaining a semiconductor chip with a resin composition by separating the first semiconductor wafer;
A temporary fixing step of fitting the electrode of the second semiconductor wafer or the semiconductor chip mounting support member on which the electrode is formed into the recess;
A method of manufacturing a semiconductor device having A connection step of electrically connecting the electrode of the semiconductor chip with the resin composition and the electrode of the second semiconductor wafer or the semiconductor chip mounting support member;
The method of manufacturing a semiconductor device according to claim 1, further comprising: A resin composition layer forming step of forming a resin composition layer on the electrode surface of the first semiconductor wafer on which the electrodes are formed;
Electrode exposure for removing at least a part of the resin composition layer on the electrode of the first semiconductor wafer to form a recess in the resin composition layer and exposing at least a part of the electrode of the first semiconductor wafer Process,
A temporary fixing step of fitting the electrode of the second semiconductor wafer on which the electrode is formed into the recess;
A method of manufacturing a semiconductor device having A connection step of electrically connecting the electrode of the first semiconductor wafer and the electrode of the second semiconductor wafer;
The method of manufacturing a semiconductor device according to claim 3, further comprising: A resin composition layer forming step of forming a resin composition layer on the electrode surface of the first semiconductor wafer on which the electrodes are formed;
Electrode exposure for removing at least a part of the resin composition layer on the electrode of the first semiconductor wafer to form a recess in the resin composition layer and exposing at least a part of the electrode of the first semiconductor wafer Process,
An individualization step of obtaining a semiconductor chip with a resin composition by dividing the first semiconductor wafer into pieces,
A temporary fixing step of fitting an electrode of another semiconductor chip on which the electrode is formed into the recess;
A method of manufacturing a semiconductor device having A connection step of electrically connecting the electrode of the semiconductor chip with the resin composition and the electrode of the other semiconductor chip;
The method of manufacturing a semiconductor device according to claim 5, further comprising: A resin composition layer forming step of forming a resin composition layer on the electrode surface of the first semiconductor wafer or semiconductor chip mounting support member on which the electrode is formed;
At least a part of the resin composition layer on the electrode of the first semiconductor wafer or semiconductor chip mounting support member is removed to form a recess in the resin composition layer, and the first semiconductor wafer or semiconductor chip mounting An electrode exposure step of exposing at least a part of the electrode of the support member
A temporary fixing step of fitting the electrode of the semiconductor chip on which the electrode is formed into the recess;
A method of manufacturing a semiconductor device having A connection step of electrically connecting the electrode of the semiconductor chip and the electrode of the first semiconductor wafer or the support member for mounting the semiconductor chip;
The method of manufacturing a semiconductor device according to claim 7, further comprising:   The manufacturing method of the semiconductor device as described in any one of Claims 1-8 whose said resin composition layer is the photosensitive resin composition in which pattern formation is possible by exposure and image development.   The method for manufacturing a semiconductor device according to claim 9, wherein the electrode exposure step includes an exposure step and a development step.   The manufacturing method of the semiconductor device as described in any one of Claims 1-10 whose temperature of the said temporary fixing process is 100 degrees C or less.   The method for manufacturing a semiconductor device according to any one of claims 2, 4, 6, and 8, wherein a temperature in the connection step is 150 ° C or higher.

Images