JP2015162488A - Solar cell element and solar cell module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solar cell element which suppresses the occurrence of a PID phenomenon and is excellent in photoelectric conversion efficiency and mass productivity, and a solar cell module using the same.SOLUTION: A solar cell element 1 includes a semiconductor substrate 2 and an antireflection layer 9 disposed on one main surface of the semiconductor substrate 2 and containing silicon nitride. The antireflection layer 9 has a first antireflection layer 9a having a low oxygen concentration and a second antireflection layer 9b having a higher oxygen concentration than the first antireflection layer 9a. The first antireflection layer 9a and the second antireflection layer 9b are laminated in this order from the semiconductor substrate 2 side.

Description

  The present invention relates to a solar cell element and a solar cell module including the solar cell element.

  Currently used solar cell elements are crystalline solar cell elements using a semiconductor substrate made of single crystal or polycrystalline silicon. In a crystalline solar cell element, an antireflection layer is usually provided on the light-receiving surface side surface of a semiconductor substrate (see, for example, Patent Document 1 below).

On the other hand, large-scale solar power plants having a power generation amount of 1 megawatt or more have been constructed using solar cell modules. The power generation system of this large-scale solar power plant has a higher voltage than a solar power generation system of about several kilowatts installed in a general house. For this reason, a PID (Potential Induced Degradation) phenomenon in which the output characteristics of the solar cell module deteriorate may occur.

  As a countermeasure for reducing the occurrence of the PID phenomenon, it has been proposed to reduce the oxygen concentration in the antireflection layer of the solar cell element (see Non-Patent Document 1).

JP 2014-11246 A

K. Mishina et al. “INVESTGATION ON PID-RESISTANT ANTI-REFLECTION COATING FOR CRYSTALINE SILICON SOLAR CELLS” Proc. 28th European Photovoltaic Solar Energy Conference (Paris 2013) pp.1139-1143

  However, in the solar cell element having the above-described configuration, the light transmittance in the entire antireflection layer may be lowered, or the lifetime of the photogenerated carrier may be shortened, resulting in a decrease in photoelectric conversion efficiency. Moreover, when producing a solar cell element having such a configuration, the growth rate (film thickness growth rate) of the antireflection layer is lowered, which may impair the productivity of the solar cell element.

  Accordingly, an object of the present invention is to provide a solar cell element that suppresses the occurrence of the PID phenomenon and is excellent in photoelectric conversion efficiency and mass productivity, and a solar cell module using the solar cell element.

  A solar cell element according to an aspect of the present invention is a solar cell element including a semiconductor substrate and an antireflection layer that is disposed on one main surface of the semiconductor substrate and includes silicon nitride, and the antireflection layer is provided. The layer includes a first antireflection layer having a low oxygen concentration and a second antireflection layer having an oxygen concentration higher than that of the first antireflection layer, and the first antireflection layer and the first antireflection layer from the semiconductor substrate side. Two antireflection layers are laminated in this order.

  Moreover, the solar cell module which concerns on one form of this invention is equipped with the said solar cell element.

  According to the solar cell element and the solar cell module configured as described above, the oxygen concentration of the first antireflection layer of the antireflection layer is set lower than the oxygen concentration of the second antireflection layer. As a result, the light transmittance is higher than that of the first antireflection layer alone. Further, diffusion of oxygen atoms from the antireflection layer to the semiconductor substrate can be suppressed, and the lifetime of the photogenerated carrier can be prevented from being shortened. Thereby, a solar cell element and a solar cell module excellent in photoelectric conversion efficiency can be provided.

  In addition, since the second antireflection layer having an oxygen concentration lower than that of the first antireflection layer is provided on the first antireflection layer, it is possible to suppress the influence of a decrease in the growth rate. For this reason, generation | occurrence | production of a PID phenomenon can be suppressed and a solar cell element and a solar cell module with high reliability and productivity can be provided.

Fig.1 (a) is the top view which looked at the solar cell element which concerns on one Embodiment of this invention from the surface side, FIG.1 (b) is the top view which looked at the solar cell element from the back surface side. FIG. 2 is a cross-sectional view taken along the line TT in FIG. FIG. 3 is an enlarged cross-sectional view enlarging a portion A of FIG. 4A to 4F are cross-sectional views illustrating an example of a method for manufacturing a solar cell element according to an embodiment of the present invention. FIG. 5 is a cross-sectional view showing an example of the structure of a parallel plate type PECVD apparatus according to the present embodiment. FIG. 6 is a plan view showing an example of the structure of the transport cart used in the PECVD apparatus according to the present embodiment. Fig.7 (a) is a top view which shows the 1st surface side of the solar cell module which concerns on one Embodiment of this invention, FIG.7 (b) is a top view which shows the 2nd surface side of a solar cell module. Fig.8 (a) is a top view which shows the state which connected the connection member to the solar cell element which concerns on one Embodiment of this invention, FIG.8 (b) is sectional drawing which shows the connection state of two solar cell elements. It is. FIG. 9 is an exploded cross-sectional view showing a partial structure of a solar cell module according to an embodiment of the present invention.

  One embodiment of the solar cell element and solar cell module of the present invention will be described with reference to the drawings. In addition, since drawing is shown typically, the size of the component in each figure, a positional relationship, etc. can be changed suitably.

<Solar cell element>
As shown in FIGS. 1 and 2, the solar cell element 1 includes a semiconductor substrate 2. The solar cell element 1 has a surface 1a that is a first main surface that mainly receives light, and a back surface 1b that is a second main surface facing the surface 1a. The semiconductor substrate 2 also has a surface 2 a that is one main surface corresponding to the surface 1 a of the solar cell element 1 and a back surface 2 b that is another main surface corresponding to the back surface 1 b of the solar cell element 1.

  As the semiconductor substrate 2, for example, a single crystal silicon substrate or a polycrystalline silicon substrate is used. Since the semiconductor substrate 2 contains a dopant element such as boron or gallium, it has one conductivity type (for example, p-type). doing. The thickness of the semiconductor substrate 2 is, for example, about 150 to 250 μm, and the planar shape is not particularly limited, but may be a square shape or a rectangular shape having a side of about 100 to 180 mm. Further, minute irregularities for reducing the reflectance of light may be provided on the surface 2 a side of the semiconductor substrate 2. In the following, an example in which a p-type polycrystalline silicon substrate is used as the semiconductor substrate 2 will be described.

  As shown in FIG. 2, the semiconductor substrate 2 has a reverse conductivity type layer 8 provided on the surface 1 a side of the solar cell element 1. The reverse conductivity type layer 8 has the opposite conductivity type (n-type) to the one conductivity type region 7 of the semiconductor substrate 2 and forms a pn junction with the one conductivity type region 7. The n-type reverse conductivity type layer 8 is formed by diffusing a dopant element such as phosphorus on the surface 2 a side of the semiconductor substrate 2.

  Furthermore, as shown to Fig.1 (a), on the surface 1a of the solar cell element 1, the bus-bar electrode 3 and the finger electrode 4 are arrange | positioned as a surface electrode. Moreover, as shown in FIG.1 (b), the collector electrode 5 and the connection electrode 6 are arrange | positioned as a back surface electrode at the back surface 1b.

  The bus bar electrode 3 provided on the surface 1a (surface 2a of the semiconductor substrate 2) side of the solar cell element 1 has a role of collecting photogenerated carriers (hereinafter referred to as carriers) collected by the finger electrodes 4. The bus bar electrodes 3 are formed in an elongated shape having a width of about 1 to 3 mm along the Y-axis direction in FIG.

  The finger electrode 4 has a role of collecting carriers and extends in the X-axis direction of FIG. 1A and is connected so as to be substantially orthogonal to the bus bar electrode 3. Moreover, the width | variety of the finger electrode 4 is about 50-200 micrometers, and multiple pieces are formed at intervals of about 1-8 mm. The bus bar electrode 3 and the finger electrode 4 are formed by, for example, applying a conductive paste mainly composed of silver in a desired shape and then baking it. The thickness of the bus bar electrode 3 and finger electrode 4 after firing is, for example, about 10 to 30 μm.

  Further, as shown in FIG. 1B, a connection electrode 6 is provided on the back surface 1 b (the back surface 2 b of the semiconductor substrate 2) side of the solar cell element 1. The connection electrodes 6 have a width of about 1 to 5 mm, and about 2 to 5 are arranged at positions substantially opposite to the bus bar electrodes 3 provided on the surface 1a in the Y-axis direction of FIG. The connection electrode 6 is formed, for example, by applying a conductive paste mainly composed of silver in a desired shape and baking it. The thickness of the connection electrode 6 after firing is about 10 to 30 μm.

  The collecting electrode 5 collects carriers on the back surface 1 b of the solar cell element 1 and transmits them to the connection electrode 6. The current collecting electrode 5 is formed on the substantially entire surface of the back surface 2 b excluding the 0.5 to 3 mm width portion in the outer peripheral portion of the back surface 2 b of the semiconductor substrate 2 and the arrangement portion of the connection electrode 6. The current collecting electrode 5 can be formed by, for example, applying a conductive paste mainly composed of aluminum in a desired shape and then baking it. The thickness of the collector electrode 5 is, for example, about 15 to 50 μm.

A BSF (Back-Surface-Field) region 10 shown in FIG. 2 forms an internal electric field on the back surface 2b side of the semiconductor substrate 2 and reduces the decrease in conversion efficiency due to recombination of minority carriers in the vicinity of the back surface 2b. have. The BSF region 10 has the same conductivity type as the one conductivity type region 7 of the semiconductor substrate 2, and the dopant element is present at a concentration higher than the concentration of the dopant element doped in the one conductivity type region 7. To do. Further, when the semiconductor substrate 2 is p-type, the BSF region 10 has a concentration of these dopant elements of 1 × 10 ^{18 to} 5 ×, for example, by diffusing a dopant element such as boron or aluminum on the back surface 2b side. It may be formed so as to be about 10 ²¹ atoms / cm ³ .

As shown in FIG. 2, the antireflection layer 9 is disposed on the reverse conductivity type layer 8 forming one main surface of the semiconductor substrate 2. The antireflection layer 9 improves the photoelectric conversion efficiency of the solar cell element 1 by reducing the reflectance of light on the surface 1a of the solar cell element 1 and increasing the number of electron-hole pairs generated by light absorption. Contribute to. Further, the antireflection layer 9 also has an effect as a passivation film that reduces a decrease in conversion efficiency due to recombination of minority carriers at the interface and grain boundary of the semiconductor substrate 2. As the material of the antireflection layer 8, a silicon nitride film (SiNx film; composition ratio (x) having a width centering on Si ₃ N ₄ stoichiometry) having an excellent effect as a passivation film is preferably used. be able to. This silicon nitride film can be produced using a PECVD (plasma enhanced chemical vapor deposition) apparatus or the like.

  Further, as shown in FIG. 3, the antireflection layer 9 in the present embodiment is formed on the first antireflection layer 9a disposed on the reverse conductivity type layer 8 of the semiconductor substrate 2 and the first antireflection layer 9a. It has the 2nd antireflection layer 9b arranged. The oxygen concentration of the first antireflection layer 9a is lower than the oxygen concentration of the second antireflection layer 9b. As described above, the antireflection layer 9 has the first antireflection layer 9a having a low oxygen concentration and the second antireflection layer 9b having a higher oxygen concentration than the first antireflection layer 9a. The first antireflection layer 9a and the second antireflection layer 9b are laminated in this order.

  The PID phenomenon in a large-scale solar power plant is said to be caused by the movement of sodium (Na) released from the glass of the solar cell module to the surface of the semiconductor substrate 2. As described above, by disposing the first antireflection layer 9a having a low oxygen concentration on the semiconductor substrate 2, it is possible to suppress the movement of sodium to the surface of the semiconductor substrate 2, and to prevent the appearance of the PID phenomenon. Can be suppressed.

  In addition, since the second antireflection layer 9b is provided, the second antireflection layer 9b can be bonded to silicon, oxygen, and nitrogen (Si—O—N). As a result, the light transmittance is higher than that of the first antireflection layer 9a alone, so that the photoelectric conversion efficiency of the solar cell element 1 can be improved.

  When the antireflection layer 9 is formed by forming a predetermined film thickness only with the first antireflection layer 9a having a low oxygen concentration, it is necessary to reduce the oxygen concentration in the film forming chamber of the CVD apparatus. For this reason, it is necessary to increase the flow rate of monosilane, ammonia, or the like in the film formation chamber during film formation and to reduce the pressure in the film formation chamber. However, in this case, the growth rate of the silicon nitride film decreases, and the productivity of the solar cell element decreases.

  On the other hand, in this embodiment, by providing the second antireflection layer 2b having an oxygen concentration lower than that of the first antireflection layer 9a on the first antireflection layer 9a, it is possible to suppress the influence of the decrease in the growth rate. . For this reason, generation | occurrence | production of a PID phenomenon can be suppressed and it becomes possible to provide a solar cell element with high reliability and productivity.

  Further, in the present embodiment, the first antireflection layer 9 a is disposed on the reverse conductivity type layer 8 of the semiconductor substrate 2. As a result, diffusion of oxygen atoms from the antireflection layer to the semiconductor substrate due to a heating process such as firing during the later-described electrode formation can be suppressed, and the lifetime of carriers in the reverse conductivity type layer 8 can be reduced. Shortening can be suppressed.

The oxygen concentration of the first antireflection layer 9a and the second antireflection layer 9b can be measured by secondary ion mass spectrometry (SIMS). In this analysis, comparison can be made with an average of oxygen concentrations at a plurality of points (for example, about 2 to 5 points) in a substantially central portion of each layer in the thickness direction. In tests repeatedly conducted by the inventors, it has been found that the appearance of the PID phenomenon can be more reliably suppressed when the oxygen concentration of the first antireflection layer 9a is 1 × 10 ²⁰ atoms / cm ³ or less. It was.

In the present embodiment, it is desirable that the thickness of the second antireflection layer 9b is larger than the thickness of the first antireflection layer 9a. That is, it has been found by repeated tests by the inventors that the appearance of the PID phenomenon can be suppressed if the thickness of the first antireflection layer 9a is about 5 to 15 nm. On the other hand, since the refractive index of the entire antireflection layer 9 is about 1.8 to 2.5 and the thickness is about 35 to 120 nm, the thickness of the first antireflection layer 9a is about 5 to 15 nm which is the minimum necessary. The remainder may be the second antireflection layer 9b. Thereby, it is possible to more reliably suppress the influence of the decrease in the growth rate.

  In the present embodiment, it is desirable that the refractive index of the first antireflection layer 9a is larger than the refractive index of the second antireflection layer 9b. That is, with such a structure, the refractive index can be increased stepwise from the refractive index of air (n = 1.0) to the refractive index of silicon (n = 4.2). Can be reduced. Thereby, the amount of light taken into the solar cell element 1 can be increased, and the photoelectric conversion efficiency of the solar cell element 1 can be improved. In this case, an example of the refractive index of the first antireflection layer 9a and the second antireflection layer 9b is, for example, that the refractive index of the first antireflection layer 9a is 2.2 or more and 2.5 or less, and the second reflection The refractive index of the prevention layer 9b is 1.8 or more and less than 2.2.

  In addition, this embodiment is not limited to said content, A various change can be added. For example, the back surface 1b of the solar cell element 1 may be provided with a passivation film made of aluminum oxide or the like, and the bus bar electrode 3 and the connection electrode 6 may be other than the above-described conductive paste mainly composed of silver. Alternatively, a conductive paste mainly composed of silver and copper may be used.

<Method for producing solar cell element>
Next, the manufacturing method of the solar cell element 1 is demonstrated.

  First, as shown in FIG. 4A, the semiconductor substrate 2 is prepared. The semiconductor substrate 2 is a polycrystalline silicon substrate having a one conductivity type with a specific resistance of about 0.2 to 2.0 Ω · cm. In addition, when the semiconductor substrate 2 is a single crystal silicon substrate, it is produced by, for example, the FZ (floating zone) method or the CZ (Czochralski) method. When the semiconductor substrate 2 is a polycrystalline silicon substrate, it is produced by, for example, a casting method. Hereinafter, an example in which a p-type polycrystalline silicon substrate is used as the semiconductor substrate 2 will be described.

  A method for manufacturing the semiconductor substrate 2 will be described. First, an ingot of polycrystalline silicon is produced by a casting method. Next, the p-type semiconductor substrate 2 is manufactured by slicing the ingot to a thickness of, for example, about 150 to 250 μm using a multi-wire saw or the like. Thereafter, in order to remove the mechanical damage layer and the contamination layer on the cut surface of the semiconductor substrate 2, the surface is etched with an alkali solution such as NaOH or KOH, or a solution such as a mixed solution of hydrofluoric acid and nitric acid, by about several μm. Wash and dry.

Thereafter, a texture structure having fine irregularities may be formed on substantially the entire surface 2a of the semiconductor substrate 2 using a reactive ion etching apparatus. In the present embodiment, for example, a three 20sccm the trifluoromethane (CHF _3), chlorine (Cl ₂₎ of 50 sccm, while flowing 80sccm oxygen _{(O 2)} of 10 sccm, and sulfur hexafluoride (SF _6), reaction pressure Dry etching is performed for about 3 minutes under conditions of 7 Pa and RF power for generating plasma of 500 W. Thereafter, the silicon residue on the surface 2a of the semiconductor substrate 2 is washed and removed.

Next, as shown in FIG. 4B, an n-type reverse conductivity type layer 8 is formed in the surface layer on the surface 2 a side of the semiconductor substrate 2. Such a reverse conductivity type layer 8 is formed by applying a thermal diffusion method in which paste 2 phosphorous pentoxide (P ₂ O ₅ ) is applied to the surface 2a of the semiconductor substrate 2 and thermally diffused, or in a gas state. It is formed by a vapor phase thermal diffusion method using phosphorus chloride (POCl ₃ ) as a diffusion source. The reverse conductivity type layer 8 is formed to have a thickness of about 0.1 to 1 μm and a sheet resistance of about 40 to 150Ω / □. When the reverse conductivity type layer 8 is formed by the vapor phase thermal diffusion method or the like, if the reverse conductivity type layer is also formed on the back surface 2b side, only the back surface 2b side of the semiconductor substrate 2 is mixed in a mixed solution of hydrofluoric acid and nitric acid. And the reverse conductivity type layer 8 on the back surface 2b side is etched and removed to expose the p-type one conductivity type region 7. As described above, a pn junction can be formed in the semiconductor substrate 2 by the p-type one conductivity type region 7 and the n-type reverse conductivity type layer 8.

  Next, as shown in FIG. 4C, the antireflection layer 9 including the first antireflection layer 9a and the second antireflection layer 9b is formed on the surface 2a side of the semiconductor substrate 2 as described above. The antireflection layer 9 is formed of a film made of silicon nitride or the like using a PECVD apparatus or the like.

  FIG. 5 shows an example of the structure of a parallel plate type PECVD apparatus according to this embodiment. In this case, the transfer cart 22 on which the semiconductor substrate 2 on which the pn junction is formed is loaded into the load lock chamber 23 from the entrance side by the transfer mechanism 26. Here, the air is exhausted from the atmospheric state to the reduced pressure state, and the temperature is raised to a predetermined temperature (for example, about 500 ° C.). Thereafter, the silicon nitride film is transferred to the film forming chamber 24 and the semiconductor substrate 2 and the transfer cart 22 are heated in the film forming chamber 24. Then, it is carried to the unload lock chamber 25, purged from the vacuum state to the atmospheric state, and carried out from the outlet side.

  In order to continuously perform the film forming process, the transport cart 22 carried out from the outlet side passes through the outside of the apparatus and is returned to the inlet side. At this time, a supply mechanism of the semiconductor substrate 2 is provided on the entrance side of the load lock chamber 23, and the semiconductor substrate 2 before film formation is supplied to a predetermined position of the transfer cart 22 by a robot or the like from the upper side of the transfer cart 22. A semiconductor substrate 2 recovery mechanism is provided on the outlet side of the unload lock chamber 25 to recover the semiconductor substrate 2 having a thin film formed thereon. Alternatively, supply and collection are performed at the entrance side at the same time.

  The transport cart 22 used in the PECVD apparatus according to the present embodiment has a structure in which a plate 37 is fitted into a metal frame 39 and fixed by a plate fixing jig 40 as shown in FIG. The transfer cart 22 is moved inside by the transfer mechanism of the PECVD apparatus, and is transferred by a transfer cart fixing jig 41 at predetermined positions in the load lock chamber 23, the film forming chamber 24, and the unload lock chamber 25. It is supposed to be fixed. The metal frame 39, the plate fixing jig 40, and the transport cart fixing jig 41 are made of stainless steel or the like.

  A large number of substrate positioning pins 38 are provided so that the semiconductor substrate 2 being transferred moves due to vibration or the like, so that the semiconductor substrates 2 do not overlap each other, and the semiconductor substrate 2 does not fall from the mounting plate 37. These substrate positioning pins 38 are implanted so that the distance between adjacent substrate positioning pins 38 is slightly larger than the size of the semiconductor substrate 2. The substrate positioning pins 38 are made of ceramic such as carbon or alumina, or stainless steel.

  In forming the silicon nitride film, the transport cart 22 on which the semiconductor substrate is placed is fixed at a predetermined position in the film forming chamber, and then the inside of the film forming chamber 24 is evacuated by the vacuum pump 30 and gas is generated from the mass flow controller 29. While being introduced into the membrane chamber 24, RF power is applied from a power supply means 28 such as an RF power source. Then, the introduced gas is excited into an active state, and plasma is generated between the electrode plate 27 and the transport cart 22 on the ground 31 side. Thereby, a silicon nitride film is formed on the upper surface of the semiconductor substrate 2.

In such a PECVD apparatus, in order to form the first antireflection layer 9a, for example, the flow rate of monosilane gas (SiH ₄ ) is 2000 sccm, the flow rate of ammonia gas (NH ₃ ) is 10000 sccm, and the flow rate of nitrogen gas (N ₂ ). The film formation time may be adjusted so as to obtain a predetermined film thickness under the conditions of 6700 sccm, pressure during film formation of 60 Pa, and RF power of 2100 w. In order to form the second antireflection layer 9b, for example, the flow rate of monosilane gas (SiH ₄ ) is 900 sccm, the flow rate of ammonia gas (NH ₃ ) is 4600 sccm, the flow rate of nitrogen gas (N ₂ ) is 3100 sccm, The film formation time may be adjusted so that a predetermined film thickness is obtained under the conditions of pressure of 90 Pa and RF power of 1800 w.

  The PECVD apparatus according to the present embodiment is not limited to the above contents, and various changes can be made. For example, two film forming chambers are prepared so as to correspond to mass production of the solar cell element 1, the first antireflection layer 9a is formed in the first film forming chamber, and the second reflection is performed in the second film forming chamber. The prevention layer 9b may be formed.

Next, as shown in FIG. 4 (d), a surface-side conductive paste 13 to be the bus bar electrode 3 and the finger electrode 4 is applied and disposed on the surface 2 a of the semiconductor substrate 2. As the surface-side conductive paste 13, a paste containing silver as a main component and containing about 70 to 85% by mass in the conductive paste and further kneaded with glass frit, an organic vehicle and the like is used. The organic vehicle is obtained, for example, by adding a resin component used as a binder to an organic solvent. As the binder, an acrylic resin or an alkyd resin is used in addition to a cellulose resin such as ethyl cellulose, and as the organic solvent, for example, diethylene glycol monobutyl ether acetate, terpineol or diethylene glycol monobutyl ether is used. The organic vehicle may be contained in an amount of about 5 to 20% by mass in the conductive paste. As the glass frit component, for example, a lead glass such as SiO ₂ —Bi ₂ O ₃ —PbO or Al ₂ O ₃ —SiO ₂ —PbO can be used as a glass material. Further, as other glass materials, non-lead glass such as B ₂ O ₃ —SiO ₂ —Bi ₂ O ₃ or B ₂ O ₃ —SiO ₂ —ZnO can be used. Glass frit should just be about 2-15 mass% in an electrically conductive paste. As a method of arranging the surface-side conductive paste 13, the surface-side conductive paste 13 to be the finger electrode 4 is arranged on the first texture structure region 11 by using a printing method using screen plate making. Apply. After this application, the solvent is dried by drying at a predetermined temperature.

  Next, as shown in FIG. 4E, the back side first conductive paste 14 for the connection electrode 6 is disposed on the back side 2 b of the semiconductor substrate 2. As the back side first conductive paste 14, the same conductive paste as the above-described front side conductive paste 13 can be used. After arrange | positioning the back surface side 1st electrically conductive paste 14, it is made to dry at predetermined temperature and a solvent is evaporated.

  Next, as shown in FIG. 4 (f), the back side second conductive paste 15 for the back side collecting electrode 5 is disposed. As the second conductive paste 15, for example, an aluminum paste containing a metal powder containing aluminum as a main component, glass frit, and an organic vehicle is used. As the coating method, a printing method or the like can be used. After applying the conductive paste in this manner, the solvent is evaporated by drying at a predetermined temperature.

  Next, the semiconductor substrate 2 on which the front-side conductive paste 13, the back-side first conductive paste 14, and the back-side second conductive paste 15 are placed is put into a firing furnace, and these are simultaneously heated to a temperature of about 600 to 850 ° C. Bake for several minutes. As a result, the glass frit melted during firing reacts with the outermost surface of the semiconductor substrate 2 and adheres to form an electrical contact between each electrode and the semiconductor substrate 2 and increase the mechanical adhesive strength. it can. At this time, the surface-side conductive paste 13 fires through the antireflection layer 9 to form bus bar electrodes 3 and finger electrodes 4 that are in direct contact with the semiconductor substrate 2. Further, by this firing, the back side first conductive paste 14 becomes the connection electrode 6, and the back side second conductive paste 15 becomes the current collecting electrode 5. At this time, the BSF region 10 is formed by diffusing aluminum into the semiconductor substrate 2 simultaneously with the formation of the collecting electrode 5. The solar cell element 1 shown in FIGS. 1 and 2 is completed through the above steps.

  In addition, the manufacturing method of the solar cell element 1 which concerns on this embodiment is not limited to said thing. For example, the firing step may be sequentially performed after the surface-side conductive paste 13, the back-side first conductive paste 14, and the back-side second conductive paste 15 are arranged. However, the surface-side conductive paste 13 and the back-side first conductive paste 14 may be performed simultaneously and further baked after the back-side second conductive paste 15 is arranged. As another method, after the front surface side conductive paste 13 is fired, the back side first conductive paste 14 and the back side second conductive paste 15 may be fired simultaneously.

<Solar cell module>
As shown in FIGS. 7A and 7B, the solar cell module 51 according to this embodiment is disposed on the solar cell panel 53 having the plurality of solar cell elements 1 and the outer peripheral portion of the solar cell panel 53. It has a frame 54. The solar cell module 51 has a first surface 51a (see FIG. 7A) that is a surface that mainly receives light, and a second surface 51b that corresponds to the back surface of the first surface 51a (FIG. 7B). See). And the solar cell module 51 has the terminal box 55 in the 2nd surface 51b, as shown in FIG.7 (b). The terminal box 55 is wired with an output cable 56 for supplying power generated by the solar cell module 51 to an external circuit.

  The solar cell element 1 constituting the solar cell module 51 may be that of the above-described embodiment. Adjacent solar cell elements 1 are electrically connected by a connection conductor 52 as shown in FIGS. 8 (a) and 8 (b). The connection conductor 52 may be, for example, a copper or aluminum metal foil having a thickness of about 0.1 to 0.3 mm. The metal foil has a surface coated with solder. This solder is provided by plating or dipping so as to have an average thickness of about 5 to 30 μm, for example. The width of the connection conductor 52 may be equal to or smaller than the width of the bus bar electrode 3 of the solar cell element. As a result, the connection conductor 52 can make it difficult to prevent the solar cell element 1 from receiving light. The connection conductor 52 may be connected to substantially the entire surface of the electrode region 6 a of the bus bar electrode 3 and the connection electrode 6. Thereby, the resistance component of the solar cell element 1 can be reduced. Here, when the semiconductor substrate 2 having a connection conductor 52 of about 150 mm square is used, the connection conductor 52 may have a width of about 1 to 3 mm and a length of about 260 to 300 mm.

  As shown in FIG. 8A, in the connection conductor 52 connected to one solar cell element 1, one connection conductor 52a is soldered to the bus bar electrode 3 on the surface 1a of the solar cell element 1, The other connection conductor 52 b is soldered to the connection electrode 6 on the back surface of the solar cell element 1.

  Moreover, as shown in FIG.8 (b), the adjacent solar cell element 1 (solar cell element 1S, 1T) connects the other end part of the connection conductor 52 connected to the bus-bar electrode 3 of the surface 1a of the solar cell element 1S. It connects by soldering to the connection electrode 6 of the back surface 1b of the solar cell element 1T. By repeating such connection to a plurality (for example, about 5 to 10) of solar cell elements 1, a solar cell string in which the plurality of solar cell elements 1 are linearly connected in series is formed.

  Next, a plurality of solar cell strings (for example, about 2 to 10) are prepared and aligned approximately in parallel at a predetermined interval of about 1 to 10 mm. Then, the solar cell elements 1 at each end of the solar cell string are connected to each other by soldering or the like with the lateral wiring 65. Moreover, the external lead-out wiring 66 is connected to the solar cell element 1 to which the lateral wiring 65 of the solar cell strings on both ends is not connected.

Next, the translucent substrate 61, the front surface side filler 62, the back surface side filler 63, and the back surface material 64 are prepared. As the translucent substrate 61, glass is used. Here, as the glass, for example, white plate glass, tempered glass, double tempered glass, or heat ray reflective glass having a thickness of about 3 to 5 mm is used.

  The front side filler 62 and the back side filler 63 are each made of an ethylene-vinyl acetate copolymer (hereinafter abbreviated as EVA) or polyvinyl butyral (PVB), and have a thickness of 0.4 to What was shape | molded in the sheet form of about 1 mm is used. These are heated and pressed under reduced pressure by a laminating apparatus, and are softened and fused to be integrated with other members.

  The back material 64 has a role of reducing moisture intrusion from the outside. As the back material 64, for example, a fluorine resin sheet having weather resistance with an aluminum foil sandwiched therebetween, a polyethylene terephthalate (PET) sheet on which alumina or silica is vapor-deposited, or the like is used. The back material 64 may be made of glass or polycarbonate resin when incident on light from the second surface 51b side of the solar cell module 51 is used for photovoltaic power generation.

  Next, as shown in FIG. 9, after the surface-side filler 62 is disposed on the translucent substrate 61, the solar cell element 1, the back-side filler 63, and the back-surface material 64 connected as described above are sequentially stacked. To produce a laminate.

  Next, this laminate is set in a laminating apparatus. And the solar cell panel 53 is producible by heating at 100-200 degreeC, for example for about 15 minutes-1 hour, pressurizing under reduced pressure.

  Finally, as shown in FIG. 7, the solar cell module 51 is completed by attaching the terminal box 55 to the outer periphery of the solar cell panel 53 on the frame 54 or the second surface 51b side as required. Thus, the solar cell module 51 excellent in reliability and cost can be provided by providing the above-described solar cell element 1.

DESCRIPTION OF SYMBOLS 1: Solar cell element 1a: Front surface 1b: Back surface 2: Semiconductor substrate 2a: Front surface 2b: Back surface 3: Busbar electrode 4: Finger electrode 5: Current collection electrode 6: Connection electrode 7: One conductivity type area | region 8: Reverse conductivity type layer 9: Antireflection layer 10: BSF region 13: Front side conductive paste 14: Back side first conductive paste 15: Back side second conductive paste 22: Transfer cart 23: Load lock chamber 24: Film formation chamber 25: Unload lock chamber 26: Transport mechanism 27: Electrode plate 28: Power supply means 29: Mass flow controller 30: Vacuum pump 31: Ground 32: Heater 37: Plate 38: Substrate positioning pin 39: Metal frame 40: Plate fixing jig 41: Transport cart fixing jig 42: portion 51 on which the substrate on the plate is not placed 51: solar cell module 51a: first surface 51b: Two surfaces 52: Connection conductor 53: Solar cell panel 54: Frame 55: Terminal box 56: Output cable 61: Translucent substrate 62: Front side filler 63: Back side filler 64: Back side material 65: Lateral wiring 66 : External lead-out wiring

Claims (5)

A solar cell element comprising a semiconductor substrate and an antireflection layer disposed on one main surface of the semiconductor substrate and containing silicon nitride,
The antireflection layer includes a first antireflection layer having a low oxygen concentration and a second antireflection layer having an oxygen concentration higher than that of the first antireflection layer, and the first antireflection layer from the semiconductor substrate side. The solar cell element according to claim 1, wherein the second antireflection layer is laminated in this order.   The solar cell element according to claim 1, wherein the thickness of the second antireflection layer is larger than the thickness of the first antireflection layer. ^3. The solar cell element according to claim 1, wherein an oxygen concentration at a central portion in the thickness direction of the first antireflection layer is 1 × 10 ¹⁹ (atoms / cm ³ ) or less.   The solar cell element according to any one of claims 1 to 3, wherein a refractive index of the first antireflection layer is larger than a refractive index of the second antireflection layer.   The solar cell module provided with the solar cell element in any one of Claims 1 thru | or 4.