JP2015159203A - Semiconductor light emitting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor light emitting device in which optical cross talk is inhibited to a large extent and which has high performance and high luminous efficiency.SOLUTION: A semiconductor light emitting device comprises: a mounting substrate 30 where first wiring NW is formed; a semiconductor structure layer SL which includes a first semiconductor layer 21 having a first conductivity type, a luminescent layer 22 and a second semiconductor layer 23 having a second conductivity type opposite to the first conductivity type, and which has a structure in which the second semiconductor layer, the luminescent layer and the first semiconductor layer are sequentially laminated on the mounting substrate in this order; a zoning groove group comprising a plurality of zoning grooves CT which pierces the second semiconductor layer and the luminescent layer from the second semiconductor layer side to reach the first semiconductor layer to zone the semiconductor structure layer into a plurality of light emitting segments S each having a polygonal shape; and at least one first electrode NE which is localized on a region of an intersection point of a plurality of zoning grooves and connected to the first wiring from a bottom face of the zoning groove to the first wiring in the intersection point region.

Description

  The present invention relates to a semiconductor light emitting device using a semiconductor light emitting element such as a light emitting diode (LED).

  In a semiconductor light emitting device, a semiconductor structure layer composed of an n type semiconductor layer, a light emitting layer and a p type semiconductor layer is usually grown on a growth substrate, and a voltage is applied to the n type semiconductor layer and the p type semiconductor layer, respectively. It is fabricated by forming an electrode and a p-electrode. Further, as a semiconductor light emitting device for improving heat dissipation performance, a semiconductor light emitting device is known in which a semiconductor structure layer is bonded to a support substrate different from a growth substrate and then the growth substrate is removed. Further, for example, the semiconductor light emitting device is manufactured by fixing the semiconductor light emitting element on a mounting substrate and sealing it with a resin or the like.

  Patent Document 1 discloses an LED array chip having an LED array composed of a plurality of LEDs formed by crystal growth on a substrate. Patent Document 2 discloses a light-emitting device including a plurality of first trenches that divide a plurality of light-emitting elements, and a plurality of second trenches that pass through active layers of the plurality of light-emitting elements, and a method for manufacturing the same. It is disclosed.

JP 2005-79202 A JP 2012-60115 A

  2. Description of the Related Art In recent years, attention has been paid to a technology for controlling a light distribution shape in real time according to the situation ahead, that is, the presence or absence of an oncoming vehicle or a preceding vehicle, and the position thereof. With this technology, for example, when an oncoming vehicle is detected while traveling with a light distribution shape, that is, a high beam, only the area of the oncoming vehicle among the areas irradiated on the headlight can be shielded in real time. It becomes possible. Therefore, it is possible to always give the driver a field of view close to a high beam, while preventing the oncoming vehicle from being dazzled (glare). Such a light distribution variable headlight system, for example, manufactures a semiconductor light emitting device in which a plurality of semiconductor light emitting elements are arranged in an array, and controls conduction and non-conduction to each of the semiconductor light emitting elements in real time. Can be realized.

  However, in general, in a semiconductor light emitting device in which a plurality of semiconductor light emitting elements are juxtaposed, part of light emitted from a conductive element may propagate to a non-conductive element. In this case, a weak light is emitted from the non-conducting element, and there is a case where light is irradiated to an unintended region. This problem of so-called light crosstalk further causes the problem that the boundary between the irradiation region and the non-irradiation region of the light emitting device is obscured and a desired light distribution shape cannot be obtained. In various application fields of light emitting devices using a plurality of elements, it is desirable that there is no crosstalk of light.

  The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor light emitting device with high performance and high light emission efficiency in which crosstalk of light to the outside of the element region is greatly suppressed.

  A semiconductor light emitting device according to the present invention includes a mounting substrate on which a first wiring is formed, a first semiconductor layer having a first conductivity type, a light emitting layer, and a second conductivity type opposite to the first conductivity type. A semiconductor structure layer having a structure in which the second semiconductor layer, the light emitting layer, and the first semiconductor layer are sequentially stacked in this order on the mounting substrate. A partition groove group composed of a plurality of partition grooves that penetrate the second semiconductor layer and the light emitting layer from the semiconductor layer side to the first semiconductor layer and partition the semiconductor structure layer into light emitting segments having a plurality of polygonal shapes; And at least one first electrode that is provided locally at the intersection region of the plurality of partition grooves and that is connected to the first wiring from the bottom surface of the partition groove in the intersection region to the first wiring. It is a feature.

(A) is a figure which shows typically the upper surface of the semiconductor light-emitting device which concerns on Example 1, (b) is sectional drawing which shows the structure of the semiconductor light-emitting device which concerns on Example 1. FIG. (A) is a figure which shows typically the upper surface of the semiconductor light-emitting device which concerns on the modification 1 of Example 1, (b) is sectional drawing which shows the structure of the semiconductor light-emitting device which concerns on the modification 1 of Example 1. is there. 3 is a top view of a semiconductor light emitting element of a semiconductor light emitting device according to Example 1-2. FIG. (A) is a figure which shows typically the upper surface of the semiconductor light-emitting device which concerns on the modification 3 of Example 1, (b) is sectional drawing which shows the structure of the semiconductor light-emitting device which concerns on the modification 3 of Example 1. is there. (A) And (b) is sectional drawing which shows the structure of the semiconductor light-emitting device which concerns on the modification 4 and 5 of Example 1, respectively.

  Examples of the present invention will be described in detail below.

  FIG. 1A is a cross-sectional view schematically showing the upper surface of the semiconductor light emitting device 10 of the first embodiment. FIG. 1B is a cross-sectional view taken along line VV in FIG. 1A, and is a cross-sectional view showing the structure of the semiconductor light emitting device 10. The semiconductor light emitting device 10 includes a semiconductor light emitting element 20 and a mounting portion 30 on which the semiconductor light emitting element 20 is mounted. The semiconductor light emitting element 20 has a partition groove group CT including a plurality of partition grooves CT1 to CT4 that partition the semiconductor light emitting element 20 into a plurality of light emitting segments S1 to S9.

  In this embodiment, as shown in FIG. 1A, the partition groove group CT is composed of four linear partition grooves CT1 to CT4, the partition grooves CT1 and CT2 are formed in parallel to each other, and the partition groove CT3. And CT4 are formed parallel to each other. The partition grooves CT1 and CT2 and the partition grooves CT3 and CT4 are formed so as to be orthogonal to each other in the four intersection areas CA1 to CA4. Therefore, in this embodiment, the semiconductor light emitting device 20 has a structure in which nine rectangular light emitting segments are partitioned in a matrix of 3 rows and 3 columns when viewed from a direction perpendicular to the semiconductor light emitting device 20. Yes.

  In addition, the intersection area | region CA of a partition groove | channel here means the area | region of the partition groove | channel containing the point where a partition groove | channel cross | intersects each other (intersection, overlap, common, and connect). An area other than the intersection area CA, that is, an area where no partition groove intersects (area of a partition groove alone) is referred to as a non-intersection area. For example, as shown in FIG. 1A, in this embodiment, the partition groove CT1 is distinguished into three non-intersection areas by an intersection area CA1 with the partition groove CT3 and an intersection area CA3 with the partition groove CT4. The

  The semiconductor light emitting device 20 includes an n electrode group (first electrode group) composed of n electrodes (first electrodes) NE1 to NE4 that are locally formed in the intersection regions CA1 to CA4 of the partition grooves CT1 to CT4. ) NE. For ease of understanding, in FIG. 1A, the formation region of the n-electrode NE is hatched.

  Each of the n electrodes NE <b> 1 to NE <b> 4 is electrically connected to each other, and is connected to an n-side pad NP formed on the mounting portion 30. The n electrode group NE functions as a common n electrode (common electrode) in the semiconductor light emitting element 20. Further, on the mounting portion 30, p-side pads PP1 to PP9 connected to the light emitting segments SE1 to SE9, respectively, are formed. Each of the p-side pads PP1 to PP9 is electrically isolated from each other. The semiconductor light emitting element 20 has a structure in which the light emitting segments S1 to S9 are connected in parallel between the n-side pad NP and the p-side pad PP.

FIG. 1B is a cross-sectional view taken along line VV in FIG. 1A, and is a cross-sectional view showing the structure of the semiconductor light emitting element 20. As shown in FIG. 1B, the semiconductor light emitting device 20 includes an n-type (first conductivity type) semiconductor layer (first semiconductor layer) 21, a light-emitting layer 22, and a conductivity type opposite to the n-type (first conductivity type). The semiconductor structure layer SL includes a p-type semiconductor layer (second semiconductor layer) 23 having a second conductivity type. The semiconductor structure layer SL of the semiconductor light emitting device 10 has a structure in which a p-type semiconductor layer 23, a light-emitting layer 22, and an n-type semiconductor layer 21 are sequentially stacked on the mounting portion 30 in this order. The n-type semiconductor layer 21, the light emitting layer 22, and the p-type semiconductor layer 23 have a composition of, for example, Al _x In _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1). Further, the surface of the n-type semiconductor layer 21 functions as a light extraction surface.

  Each of the partition grooves CT1 to CT4 of the partition groove group CT is formed so as to penetrate the p-type semiconductor layer 23 and the light emitting layer 22 from the p-type semiconductor layer 23 side to reach the n-type semiconductor layer 21. Each of the partition grooves CT1 to CT4 partitions the semiconductor structure layer SL of the semiconductor light emitting element 20 into a plurality of light emitting segments. In the present embodiment, a case where the light emitting layer 22 and the p-type semiconductor layer 23 of the semiconductor structure layer SL are partitioned into light emitting segments by the partition groove group CT will be described.

  Each of the n electrodes NE1 to NE4 is (locally) formed in each of the intersection regions CA1 to CA4 of the partitioning grooves, that is, each of the corners (tops) of the light emitting segments. In other words, each of the n electrodes NE <b> 1 to NE <b> 4 penetrates the p-type semiconductor layer 23 and the light-emitting layer 22 from the p-type semiconductor layer 23 side at the corners of the light-emitting segment, and is electrically connected to the n-type semiconductor layer 21. It is connected. Each of the n electrodes NE1 to NE4 is connected to the n-side wiring NW from the bottom surface of the partition groove CT in the intersection area CA of the partition groove CT to the n-side wiring NW. For example, the n-electrode NE1 is formed in the intersection area CA1 between the partition groove CT1 and the partition groove CT3. Each of the n electrodes NE1 to NE4 is made of a metal material such as Ti, Al, Pt, Au, or Ag. Each of the n electrodes NE <b> 1 to NE <b> 4 is desirably light-shielding (opaque or opaque) with respect to the light emitted from the light emitting layer 22.

  In each of the light emitting segments S1 to S9, a p electrode group (second electrode group) PE composed of p electrodes (second electrodes) PE1 to PE9 is formed on each of the p-type semiconductor layers 23. Yes. For example, as illustrated, the p-electrode PE1 is formed on the p-type semiconductor layer 23 of the light-emitting segment S1. The p electrode PE1 is formed, for example, so as to embed the transparent electrode layer M1 formed on the p-type semiconductor layer 23, the reflective metal layer M2 formed so as to cover the transparent electrode layer M1, and the reflective metal layer M2. A cap layer M3.

  The transparent electrode layer M1 is made of a conductive material having translucency such as ITO or IZO. The reflective metal layer M2 is made of a material having light reflectivity, such as Ag, Pt, Ni, Al, Pd, and alloys thereof. The transparent electrode layer M1 and the reflective metal layer M2 have a function of reflecting light emitted from the light emitting layer 22A toward the light extraction surface. The cap layer M3 is a layer that prevents migration of the material of the reflective metal layer M2, and can be formed using, for example, Ti, W, Pt, Pd, Mo, Ru, Ir, Au, or alloys thereof. In the present embodiment, the case where the p-electrode has the same structure for other light-emitting segments will be described. The n electrode group NE and the p electrode group PE are insulated by the insulating protective film 24.

  A light reflector RL is provided in a non-intersection area of the partition groove CT, that is, in a side surface portion of the light emitting segment S. It is preferable that the light reflector RL extends along the longitudinal direction of the non-intersection area. The light reflector RL is formed at a height exceeding the semiconductor structure layer SL from the bottom surface of the partition groove CT in the non-intersection region of the partition groove CT. The light reflector RL is made of a metal material that reflects light, such as Ti, Al, Pt, Au, and Ag. In this embodiment, the light reflector RL is formed by sequentially stacking Ti, Pt, and Au in this order on the bottom surface of the partition groove CT. In the present embodiment, the light reflector RL is insulated from the n electrode group NE and the p electrode group PE.

  The light reflector RL is configured such that light emitted from the light emitting layer 22 of each light emitting segment is extracted from the other light emitting segments to the outside, that is, from the region on the n-type semiconductor layer 21 on the other light emitting segments to the outside. Prevent it from being taken out. Specifically, for example, light emitted from the light-emitting layer 22 of the light-emitting segment S5 and directed onto the adjacent light-emitting segment S6 via the partition groove CT2 is reflected by the light reflector RL formed in the partition groove CT2. Proceed toward the light emitting segment S5. Accordingly, light is prevented from leaking from the light emitting segment to other adjacent light emitting segments via the side surfaces (partition grooves), and thus crosstalk of light can be prevented. Note that the partition groove CT is preferably formed by a groove deeper in the non-intersection area than in the intersection area CA. That is, it is preferable that the partition groove CT is formed deeper at the bottom of the non-intersection area than at the bottom of the intersection area CA.

  An n-electrode NE1 is formed at the corner of the light emitting segment S5, that is, at the intersection area CA1 of the partition groove. The n electrode NE1 can prevent crosstalk of light to the adjacent light emitting segment S1 via the corner of the light emitting segment S5, that is, the intersection area CA1. In the present embodiment, it is possible to prevent crosstalk of light from the light emitting segment S5 to the light emitting segment S1 formed obliquely opposite to the n electrode NE1 in a top view.

  The semiconductor light emitting element 20 is mounted on the mounting portion 30. The mounting unit 30 is provided on the mounting substrate 31, the n-side wiring (first wiring) NW provided on the mounting substrate 31 and connected to the n electrode group NE of the semiconductor light emitting element 20, and the mounting substrate 31. And p-side wirings (second wirings) PW1 to PW9 connected to the p-electrodes PE of the semiconductor light-emitting element 20, respectively. Each of the n electrodes NE is connected to each other via an n-side wiring (common wiring) NW. Further, the p-side wirings are electrically separated from each other and function as individual wirings of the semiconductor light emitting device 10. Each of the light emitting segments of the semiconductor light emitting element 20 emits light independently by controlling conduction and non-conduction of the p-side wiring. Hereinafter, the entire p-side wirings PW1 to PW9 may be referred to as a p-side wiring group PW.

  Specifically, on the mounting substrate 31, p-side wirings PW1, PW5, and PW6 are formed as the first layer. On the p-side wirings PW1, PW5, and PW6, an insulating layer 32 is formed as a second layer so as to cover the p-side wirings PW1, PW5, and PW6. On the insulating layer 32, an n-side wiring NE and p-side connection electrodes PC1, PC5, and PC6 are formed as a third layer. Further, the p-side wirings PW1, PW5, and PW6 and the p-side connection electrodes PC1, PC5, and PC6 are connected through a through hole provided in the insulating layer 32. The p-side wirings PW1, PW5, and PW6 are formed apart from each other in the first hierarchy. The light reflector RL is provided on the region of the n-side wiring NW, and the light reflector RL and the n-side wiring NW are insulated from each other through an insulator. The n-side wiring NE is connected to the n-type pad NP, and each p-side wiring of the p-side wiring group PW is connected to each p-side pad.

  The mounting substrate 31 is made of a material having high thermal conductivity, such as Si, AlN, Mo, W, or CuW. The n-side wiring NW and the p-side wiring group PW and the n-electrode group NE and the p-electrode group PE are made of Au and Sn, Au and In, Pd and In, Cu and Sn. , Ag and Sn, Ag and In, and Ni and Sn, or a combination of materials that are fused and joined together, or a material that is diffused and joined together such as Au.

  Next, a method for manufacturing the semiconductor light emitting device 10 will be described. In this example, first, a semiconductor structure layer SL was formed on a growth substrate (not shown), and then metal layers M1 to M3 to be a p-electrode group PE were formed. Subsequently, a part of the metal layer was removed, and a partition groove CT extending through the p-type semiconductor layer 23 and the light emitting layer 22 to the n-type semiconductor layer 21 was formed on the exposed surface of the p-type semiconductor layer 23. . Next, an insulating film was formed so as to cover the entire p electrode group PE and the partition groove CT. Thereafter, the bottom of the partition trench CT and a part of the insulating film on the p-type semiconductor layer were removed, and the metal layer M3 of the n-electrode group NE, the light reflector RL, and the p-electrode PE was formed.

  Subsequently, the mounting substrate 31 was prepared, the p-side wiring group PW was formed on the mounting substrate 31, and the insulating layer 32 was formed on the p-side wiring group PW. Next, an opening reaching the p-side wiring group PW is formed on the surface of the insulating layer 32 on the p-side wiring group PW, and the p-side connection electrodes PC1 to PC9 are formed in a region on the insulating layer 32 including the opening. Formed. An n-side wiring NW was formed on the insulating layer 32. Subsequently, the n-electrode group NE and the n-side wiring group NW were joined, and the p-electrode group PE and the p-side connection electrode PC were joined. Thereafter, the growth substrate was removed.

  Although not shown, a plurality of protrusions were formed on the exposed surface of the n-type semiconductor layer 21 to manufacture the semiconductor light emitting device 20. Although not shown, a phosphor layer was formed on the mounting substrate 31 so as to embed the semiconductor light emitting element 20. Each time, the n-side pad NP and the p-side pad PP were connected to a power source by wire bonding or the like, and the semiconductor light emitting device 10 was mounted.

  FIG. 2A is a diagram schematically illustrating the upper surface of the semiconductor light emitting device 10A according to the first modification of the first embodiment. FIG. 2B is a cross-sectional view taken along the line WW in FIG. 2A, and is a cross-sectional view showing the structure of the semiconductor light emitting device 10A. The semiconductor light emitting device 10A has the same structure as the semiconductor light emitting device 10 except for the structure of the semiconductor light emitting element. The semiconductor light emitting element 20A of the semiconductor light emitting device 10A has the same structure as the semiconductor light emitting element 20 except for the shape of the light emitting segment S in a top view and the structure of the light reflector RL. In FIG. 2A, some components of the semiconductor light emitting device are omitted, and the partition groove CT is indicated by a broken line.

  In this modification, the semiconductor structure layer SL of the semiconductor light emitting element 20A is partitioned into 16 light emitting segments S by eight partition grooves CT. The light emitting segment S has a triangular shape when viewed from a direction perpendicular to the semiconductor structure layer SL. In this modification, the light emitting segment to be driven can be selected to form an irradiation image having not only vertical and horizontal lines but also diagonal lines. Therefore, the light distribution shape can be formed with a high degree of freedom. For example, when the semiconductor light emitting device 10A according to this modification is used as a headlight light source for an automobile, it is possible to form a cut-off line at the time of passing light distribution, that is, at the time of low beam.

  Further, as shown in FIG. 2B, the light reflector RL is formed on the inner wall surface of the partition groove CT. When the light reflector RL is formed on the inner wall surface of the partition groove CT, the process of forming the light reflector RL is simplified. That is, in the present modification, the light reflector RL can be formed by forming the material of the light reflector RL on the inner wall surface of the partition groove CT after forming the partition groove CT. On the other hand, when the wall-shaped light reflector RL is formed as in the semiconductor light emitting device 20 of the first embodiment, a wall-shaped body made of the material of the light reflector RL is formed on the bottom surface of the partition groove CT, and on the mounting substrate. After forming the support part that supports the light reflector RL, it is necessary to go through at least three steps of joining the wall state and the support part. Therefore, the light reflector RL can be formed by a simple method.

  FIG. 3 is a diagram schematically illustrating a partially enlarged upper surface of the semiconductor light emitting element 20B of the semiconductor light emitting device 10B according to the second modification of the first embodiment. In FIG. 3, some components of the semiconductor light emitting device 10B are omitted. The semiconductor light emitting element 20B of this modification has a structure similar to that of the semiconductor light emitting element 20 except for the shape of the n electrode in a top view. In the present modification, the n-electrode NE has a cross shape composed of line segments along the longitudinal direction of the partition groove when viewed from the direction perpendicular to the semiconductor structure layer SL. Further, the line segment portion of the n-electrode NE constituting the cross-shaped n-electrode NE has a length larger than the distance between the adjacent light-emitting segments.

  In this modification, the n-electrode NE is also provided in a region between segments in the partition groove, that is, a part of a non-intersection region of the partition groove. Therefore, the effect of preventing crosstalk of light in the diagonal direction by the n-electrode NE is high. Note that not only this modification but also the crosstalk prevention effect is taken into consideration, the height of the n-electrode NE, that is, the formation depth of the n-electrode in the semiconductor structure layer SL is at least half in the stacking direction of the semiconductor structure layers. The depth is preferably greater than the center position in the stacking direction of the n-type semiconductor layer.

  Further, as in the present modification, the n electrode NE has a cross shape, so that the region of the n electrode NE, that is, the contact region between the n electrode and the n-type semiconductor layer 21, without reducing the region of the light emitting segment. Can be increased. In addition, it is possible to obtain an effect of diffusing current flowing from the n-electrode NE to the semiconductor structure layer SL.

  Specifically, in this embodiment and this modification, a voltage is applied to the semiconductor structure layer SL using a common n-electrode. The n electrode is formed only at the corners of the light emitting segment. Accordingly, no n-electrode is formed in the light emitting segment. With such a configuration, the n electrode does not block light in the light extraction direction of the light emitting segment. Therefore, it is difficult for a dark portion to exist in the irradiation region corresponding to the light emitting segment.

  However, when the area of the light emitting segment in a top view is increased, it may be difficult for current to flow through the central portion of the light emitting segment. In this case, uneven brightness may occur in the light emitting segment. By making the n electrode 10 o'clock, the distance from the n electrode to the farthest part in the light emitting segment can be reduced. Further, by extending the n-electrode region from the intersecting region of the partitioning grooves to the non-irradiation region of some of the partitioning grooves, the area of the n-electrode can be increased without sacrificing the region of the light emitting segment. . Therefore, it is possible to prevent luminance unevenness in the light emitting segment.

  FIG. 4A is a diagram schematically illustrating a partially enlarged upper surface of the semiconductor light emitting element 20C of the semiconductor light emitting device 10C according to the third modification of the first embodiment. FIG. 4B is a cross-sectional view taken along line XX in FIG. 4A, and is a cross-sectional view showing the structure of the semiconductor light emitting device 10C. The semiconductor light emitting device 10C has a structure similar to that of the semiconductor light emitting element 20 except for the structure of the semiconductor light emitting element.

  In this modification, an auxiliary electrode NS is provided in the light emitting segment S. Specifically, as illustrated in FIG. 4B, the semiconductor light emitting element 20 </ b> C penetrates the p type semiconductor layer 23 and the light emitting layer 22 from the p type semiconductor layer 23 side in the light emitting segment S, and forms an n type semiconductor. The auxiliary electrode NS is connected to the layer 21. This modification is advantageous in the case where luminance unevenness occurs in the light emitting segment S. Specifically, when the area of the light emitting segment in a top view is increased, as described in the modification example 2, it may be difficult for current to flow through the central portion of the light emitting layer 22 in the light emitting segment. The luminance unevenness due to the difference in current density in the light emitting segment is suppressed by providing the auxiliary electrode NS. This modification can be combined with Modification 2.

  In the above description, the light reflector is provided in the partition groove. However, the light reflector is not necessarily provided. Even if the light reflector is not provided and only the partition groove is provided, a certain crosstalk preventing effect between the light emitting segments can be obtained. Specifically, a boundary between the semiconductor and air (or a protective material such as sealing gas or filled resin) can be formed by the partition groove. At the interface between them, part of the light from the light emitting layer undergoes total reflection. Accordingly, a part of the light traveling toward the other light emitting segments can be guided toward the light extraction surface on the own light emitting segment. In order to cause this total reflection with high efficiency, the partition grooves are inclined so that the distance between the light emitting segments gradually increases toward the p-type semiconductor layer, as shown in FIG. It is preferable.

  In the above description, the case where the light reflector RL is formed in direct contact with the first semiconductor layer 21 at the bottom of the partition groove CT has been described. However, the light reflector RL may not be in direct contact with the semiconductor structure layer SL including the first semiconductor layer. For example, an insulating protective film may be interposed between the light reflector RL and the semiconductor structure layer SL.

  5A and 5B are cross-sectional views of the semiconductor light emitting devices 10D1 and 10D2 according to the fourth and fifth modifications of the first embodiment, respectively. As shown in FIGS. 5A and 5B, an insulating protective film 24A is formed at the bottom of the partition groove CT. The light reflector RL is formed on the insulating protective film 24A. The semiconductor light emitting devices 10D1 and 10D2 can be manufactured in the same process as the semiconductor light emitting devices 10 and 10A, for example, except that the insulating protective film is not removed in the non-intersection area of the partition trench CT.

  Since the insulating protective film 24A is formed on the entire inner wall surface in the non-intersection area of the partition groove CT, there is a high possibility that light undergoes total reflection at the interface between the semiconductor structure layer SL and the partition groove CT. Therefore, first, total reflection is caused by the insulating protective film 24A in the partition groove CT, and light can be extracted to the outside. Further, a part of the light that has entered the insulating protective film 24A without undergoing total reflection is reflected by the light reflector RL and taken out to the outside. Therefore, the light extraction efficiency is increased. Note that it is desirable that an insulating protective film is formed also in the intersection area CA of the partition groove CT except for the contact portion between the n-electrode NE and the n-type semiconductor layer.

  In the above description, the case where the first conductivity type is the n-type conductivity type and the second conductivity type is the p-type conductivity type opposite to the n-type has been described. May be p-type and the second conductivity type may be n-type. Further, either the first conductivity type or the second conductivity type may be an intrinsic conductivity type. That is, either the first semiconductor layer or the second semiconductor layer may be an intrinsic semiconductor layer (i layer). Moreover, although the case where each light emission segment was connected in parallel was demonstrated, each light emission segment may be mutually connected in series, and may mutually be isolate | separated electrically.

  In the above description, the light emitting segment has a rectangular or triangular shape when viewed from above, but the light emitting segment only needs to have a polygonal shape when viewed from a direction perpendicular to the semiconductor structure layer. The n-electrode is provided at each corner of the polygonal light-emitting segment. Moreover, the semiconductor structure layer may be partitioned into light emitting segments having different shapes. For example, a diamond-shaped light emitting segment and a triangular light-emitting segment may be mixed. Moreover, although the case where the n electrode is provided in each of the intersection regions has been described, the n electrode may be provided in at least one intersection region. Further, when the n electrode group is used as a common n electrode in the device, it is sufficient that at least one n electrode reaches the n side wiring and is connected to the n side wiring.

  Further, the case has been described in which the partition groove is formed at a depth from the p-type semiconductor layer to a part of the n-type semiconductor layer, that is, at a depth not reaching the n-type semiconductor layer in the n-type semiconductor layer. However, in regions other than the n-electrode formation region in the partition groove, the partition groove may partially penetrate the n-type semiconductor layer, that is, the entire semiconductor structure layer, and divide the light emitting segments. When the partition groove penetrates the semiconductor structure layer in the inter-segment region, a high crosstalk prevention effect can be obtained and the yield can be improved.

  Specifically, a laser lift-off method is generally used when removing the growth substrate, but gas is generated at the interface between the growth substrate and the semiconductor structure layer during the laser irradiation. When a part of the partition groove completely penetrates the semiconductor structure layer, the penetrated part functions as a gas escape path when the growth substrate is removed. Accordingly, it is possible to suppress the gas from remaining in the device in the subsequent etching process, sealing process, and mounting process. Therefore, not only the light emission efficiency and the light extraction efficiency are improved, but also the yield rate is improved.

  Also, in the divided light emitting segment, in the portion of the outermost light emitting segment that is not adjacent to the other light emitting segments, a groove or light reflector similar to the dividing groove may or may not be formed. Also good. The outermost part is a part corresponding to the outer edge of the light emitting part. For example, in applications where it is required to clarify the outline of the irradiation image of the apparatus, it is desirable that a light reflector is formed.

  In this embodiment, the second semiconductor layer side is penetrated through the second semiconductor layer and the light emitting layer to the first semiconductor layer, and the semiconductor structure layer is divided into a plurality of light emitting segments having a plurality of polygonal shapes. At least one first groove connected to the first wiring from the bottom surface of the partitioning groove in the intersection region to the first wiring is provided locally at the intersection region of the plurality of partitioning grooves. 1 electrode. Therefore, the light emitted from the light emitting segment is largely suppressed from being emitted to the outside from a region other than its own light extraction surface. Accordingly, it is possible to provide a semiconductor light emitting element and a semiconductor light emitting device in which crosstalk of light is greatly suppressed.

DESCRIPTION OF SYMBOLS 10 Semiconductor light-emitting device 20 Semiconductor light-emitting device 21 N type semiconductor layer (1st semiconductor layer)
22 Light emitting layer 23 p-type semiconductor layer (second semiconductor layer)
SL Semiconductor structure layer S Light emitting segment NE n electrode (first electrode)
PE p electrode (second electrode)
CT partition groove CA intersection region RL light reflector 31 mounting substrate NW n-side wiring (first wiring)
PW p-side wiring (second wiring)

Claims (9)

A mounting substrate on which a first wiring is formed;
A first semiconductor layer having a first conductivity type; a light-emitting layer; and a second semiconductor layer having a second conductivity type opposite to the first conductivity type, wherein the second semiconductor layer has a second conductivity type opposite to the first conductivity type. A semiconductor structure layer having a structure in which two semiconductor layers, the light emitting layer, and the first semiconductor layer are sequentially stacked in this order;
A plurality of partitions that penetrate from the second semiconductor layer side through the second semiconductor layer and the light emitting layer to the first semiconductor layer, and partition the semiconductor structure layer into light emitting segments having a plurality of polygonal shapes. A partition groove group consisting of grooves,
At least one first electrode that is provided locally in an intersection region of the plurality of partition grooves and that is connected to the first wiring from the bottom surface of the partition groove in the intersection region to the first wiring; And a semiconductor light emitting device.   2. The semiconductor light emitting device according to claim 1, wherein a light reflector is formed in a non-intersection area of the plurality of partition grooves.   The semiconductor light emitting device according to claim 2, wherein the light reflector extends along a longitudinal direction of the partition groove.   The semiconductor light emitting device according to claim 2, wherein the light reflector is formed on an inner wall surface of the partition groove.   5. The semiconductor light emitting device according to claim 1, wherein the partitioning groove is formed so as to partially penetrate the first semiconductor layer. 6.   The semiconductor light emitting device according to claim 1, wherein the first electrode has a cross shape including a line segment portion along a longitudinal direction of the partition groove.   The semiconductor light emitting device according to claim 6, wherein the line segment portion has a length larger than a distance between the adjacent light emitting segments.   The auxiliary light-emitting device includes an auxiliary electrode that penetrates the second semiconductor layer and the light emitting layer from the second semiconductor layer side in the light emitting segment and is connected to the first semiconductor layer. 8. The semiconductor light emitting device according to any one of 7 above. A second electrode, each provided on the second semiconductor layer in each of the light emitting segments;
9. A plurality of second wirings provided on the mounting substrate, connected to each of the second electrodes, and electrically separated from each other. Semiconductor light-emitting device as described in one.

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