JP2015154625A - Power conversion apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power conversion apparatus capable of determining the presence/absence of abnormality in an operational state.SOLUTION: In a power conversion apparatus 10 which exchanges electric power between a high-voltage battery 20 and a low-voltage battery 22, when performing potential drop operation processing, an upper arm switch 14p and a lower arm switch 14n are turned on and turned off in a complementary manner, such that a switching transition time becomes a target time. The switching transition time is a time from the implementation of an OFF operation command on the lower arm switch 14n to the reduction of an inter-terminal voltage of the upper arm switch 14p to a threshold voltage in response to the OFF operation command. On the assumption of such a configuration, under the situation where the upper arm switch 14p and the lower arm switch 14n are turned on and turned off in the complementary manner, the presence/absence of abnormality in an operational state of the power conversion apparatus 10 is determined on the basis of an inter-terminal voltage of the high-voltage battery 20, an inter-terminal voltage of the low-voltage battery 22 and ON operation times of the switches 14p and 14n.

Description

  The present invention relates to a power conversion device.

  2. Description of the Related Art Conventionally, in a power conversion device (DCDC converter) including a switching element and a reactor, a technique for determining the presence / absence of an operation abnormality of the power conversion device is known. As such a technique, as shown in, for example, Patent Document 1 below, there is known a technique for determining the presence or absence of an abnormality in a current sensor constituting a DCDC converter.

JP 2009-213246 A

  By the way, unlike the power converter of the said patent document 1, the present inventors decided to employ | adopt the power converter which can be controlled in a current critical mode, without providing the current sensor which detects the electric current which flows into a reactor. . In this case, a technique for determining the presence / absence of operation abnormality of the power converter is desired.

  The present invention has been made to solve the above-described problem, and an object of the present invention is to provide a power conversion device that can determine whether there is an abnormal operation in a power conversion device that does not include a current sensor that detects a current flowing through a reactor. There is to do.

  In order to solve the above problems, the present invention connects the reactor (16; 46a, 46b) and the power source (20, 22) to the reactor by being turned on, and supplies current to the reactor from the power source. Main switches (14p, 14n; 44a, 44b) for storing energy in the reactor, and the reactor is loaded (22, 20) by being turned on while the main switch is turned off. And a synchronous rectifier switch (14n, 14p; 44b, 44a) that discharges energy stored in the reactor and supplies current to the load from the reactor. And an operation means (30) for complementary on / off operation of the synchronous rectification switch, and the operation means Transition time detecting means (32b, 34; 37c, 34) for detecting a switching transition time, which is a time correlated with the rate of decrease in the voltage between the terminals of the main switch after the rectifier switch is switched off. And the operation means complementarily turns on and off the main switch and the synchronous rectification switch so that the switching transition time detected by the transition time detection means becomes the target time, and the operation means Under a situation where the main switch and the synchronous rectification switch are complementarily turned on and off, based on the input voltage from the power supply to the power converter and the output voltage from the power converter to the load, A threshold value calculating means for calculating a threshold value for determining the abnormality of the operating state of the power converter, and the operation means Under the situation where the main switch and the synchronous rectification switch are complementarily turned on / off, the on operation time of each of the main switch and the synchronous rectification switch set by the operation means and the threshold value calculation means are calculated. And an abnormality determining means for determining whether or not there is an abnormality in the operating state of the power conversion device based on the determined threshold value.

  In order to reduce the switching loss (turn-on loss) when the main switch is turned on when the power conversion device is controlled in the current critical mode, the main switch after the synchronous rectification switch is turned off. It is required to grasp the voltage between terminals. The transition of the voltage between the terminals of the main switch after the synchronous rectification switch is switched to the off state changes according to the current flowing through the reactor after the synchronous rectification switch is switched to the off state. Here, the current flowing through the reactor after the synchronous rectification switch is switched to the OFF state has a correlation with the switching transition time. For this reason, by controlling the switching transition time to the optimum value, the main switch can be switched to the on state while the voltage between the terminals of the main switch is low. In view of this point, the above invention includes an operation means and a transition time detection means. Thereby, the turn-on loss of the main switch can be reduced. In addition, the power conversion device can be controlled in the current critical mode without including a current sensor that detects a current flowing through the reactor.

  Here, in the situation where the main switch and the synchronous rectification switch are complementarily turned on and off by the current critical mode, the relationship between the on operation time of the main switch and the on operation time of the synchronous rectification switch is as follows. The predetermined relationship is determined from the voltage. This predetermined relationship deviates from the relationship assumed at the normal time when an abnormality occurs in the operation state of the power conversion device. That is, when an abnormality occurs in the operating state of the power conversion device, the on operation time of each of the main switch and the synchronous rectification switch set by the operation means may deviate from the normal value. In this case, although each ON operation time deviates from a normal value, it is considered that the above-described abnormality has not yet been reflected with respect to the input voltage and the output voltage. For this reason, when an abnormality occurs in the operating state of the power conversion device, the relationship between the on operation times is deviated from the initially assumed predetermined relationship determined from the input voltage and the output voltage.

  In view of this point, the above invention includes a threshold value calculation unit and an abnormality determination unit. The threshold value calculated by the threshold value calculation means based on the input voltage and the output voltage is determined from the ON operation time of the main switch and the ON operation time of the synchronous rectification switch when it is assumed that the operation state of the power conversion device is normal. Value. For this reason, the presence or absence of abnormality of the operation state of a power converter device can be determined based on the said threshold value and each ON operation time of a main switch and a synchronous rectification switch. Thereby, it can avoid that a power converter device continues being driven in the abnormal state from which it deviated from the current critical mode, and the increase in the loss of a power converter device and overheating can be avoided by extension.

A circuit diagram of a power converter concerning a 1st embodiment. The figure which shows the outline | summary of a pressure | voltage fall operation | movement process. The figure which shows transition of the reactor current at the time of pressure | voltage fall operation processing. The figure which shows transition of the voltage between terminals of an upper arm switch at the time of pressure | voltage fall operation processing. The figure which shows correlation with a reactor current and switching transition time. The figure which shows a switching transition time detection circuit. The figure which shows the detection method of the switching transition time at the time of pressure | voltage fall operation processing. The block diagram of the controller corresponding to step-down operation processing. The block diagram of the controller corresponding to a pressure | voltage rise operation process. The block diagram of a current estimator. The figure which shows the outline | summary of the output current estimation method at the time of a pressure | voltage fall operation process. The figure which shows the outline | summary of the output current estimation method at the time of a pressure | voltage rise operation process. The flowchart which shows the procedure of an abnormality determination process. The figure which shows the DC superimposition characteristic of a reactor. The figure which shows the DC superimposition characteristic of a reactor. The block diagram of the controller concerning 2nd Embodiment. The circuit diagram of the power converter device concerning 3rd Embodiment. The block diagram of a current estimator. The figure which shows the outline | summary of the output current estimation method at the time of a pressure | voltage fall operation process. The figure which shows the outline | summary of the output current estimation method at the time of a pressure | voltage rise operation process.

(First embodiment)
DESCRIPTION OF EMBODIMENTS Hereinafter, a first embodiment in which a power conversion device according to the present invention is mounted on a vehicle will be described with reference to the drawings.

  As shown in FIG. 1, the power conversion device 10 according to the present embodiment is a step-up / step-down DCDC converter (a so-called buck-boost converter). The power conversion device 10 includes first and second capacitors 12a and 12b, an upper arm switch 14p, a lower arm switch 14n, a reactor 16, and a control circuit 30. The power converter 10 transfers power between a high voltage battery 20 mounted on the vehicle and a low voltage battery 22 mounted on the vehicle. Here, the terminal voltage of the low voltage battery 22 is set lower than the terminal voltage of the high voltage battery 20. The high voltage battery 20 has a rated voltage of 48V, for example, and the low voltage battery 22 has a rated voltage of 12V, for example.

  The power conversion device 10 charges the low voltage battery 22 by performing a step-down operation process in which the output voltage of the high voltage battery 20 is stepped down and applied to the low voltage battery 22. Further, the power conversion device 10 charges the high voltage battery 20 by performing a boosting operation process in which the output voltage of the low voltage battery 22 is boosted and applied to the high voltage battery 20. In the present embodiment, when the step-down operation process is performed, the high voltage battery 20 is a power source and the low voltage battery 22 is a load. On the other hand, when the boosting operation process is performed, the low voltage battery 22 is a power source and the high voltage battery 20 is a load.

  The positive terminal of the high voltage battery 20 is connected to the first terminal T1 of the power conversion device 10, and the negative terminal of the high voltage battery 20 is connected to the second terminal T2 of the power conversion device 10. One end of the first capacitor 12a is connected to the first terminal T1, and the second terminal T2 is connected to the other end of the first capacitor 12a.

  A series connection body of an upper arm switch 14p and a lower arm switch 14n is connected in parallel to the first capacitor 12a. In the present embodiment, voltage controlled semiconductor switching elements are used as the switches 14p and 14n, and specifically, N-channel MOSFETs are used. In the figure, diodes 15p and 15n connected in antiparallel to the switches 14p and 14n indicate parasitic diodes of the switches 14p and 14n.

  The drain of the lower arm switch 14n is connected to the source of the upper arm switch 14p, and the connection point between the first capacitor 12a and the first terminal T1 is connected to the drain of the upper arm switch 14p. A connection point between the first capacitor 12a and the second terminal T2 is connected to the drain of the lower arm switch 14n.

  In the present embodiment, a capacitor (hereinafter referred to as an upper arm capacitor 18p) connected in parallel to the upper arm switch 14p indicates a parasitic capacitance of the upper arm switch 14p. A capacitor connected in parallel to the lower arm switch 14n (hereinafter referred to as a lower arm capacitor 18n) indicates a parasitic capacitance of the lower arm switch 14n.

  A series connection body of the reactor 16 and the second capacitor 12b is connected in parallel to the lower arm switch 14n. Specifically, one end of the reactor 16 is connected to a connection point between the lower arm switch 14n and the upper arm switch 14p.

  The third terminal T3 of the power converter 10 is connected to the side of the second capacitor 12b where the reactor 16 is connected. A fourth terminal T4 of the power conversion device 10 is connected to a side of the second capacitor 12b on which the lower arm switch 14n is connected. The positive terminal of the low voltage battery 22 is connected to the third terminal T3, and the negative terminal of the low voltage battery 22 is connected to the fourth terminal T4.

  The control circuit 30 is an “operation means” for operating the switches 14p and 14n. The control circuit 30 includes a controller 32, a switching transition time detection circuit 34, a current estimator 36, an operation state detector 39, a first drive circuit 38p for driving the upper arm switch 14p, and a second drive for driving the lower arm switch 14n. A drive circuit 38n is provided. In the present embodiment, each element such as the controller 32 is arranged in the single control circuit 30. However, the arrangement method of these elements is not limited to such an arrangement method.

  Subsequently, the step-down operation processing, the step-up operation processing, details of the control circuit 30, the output current estimation processing of the power conversion device 10, and the abnormality determination processing of the power conversion device 10 will be described.

<1. Step-down operation processing>
This process is shown in FIG. Here, FIG. 2A shows the transition of the current flowing through the reactor 16 (hereinafter, reactor current IL), and FIG. 2B is inputted from the first drive circuit 38p to the gate of the upper arm switch 14p. The transition of the first operation signal gp is shown, and FIG. 2C shows the transition of the second operation signal gn input from the second drive circuit 38n to the gate of the lower arm switch 14n. When the step-down operation process is performed, the reactor current IL shown in FIG. 2A has a positive flow direction from the connection point side of each switch 14p, 14n to the second capacitor 12b side at both ends of the reactor 16. It is defined as In the present embodiment, when the step-down operation process is performed, the upper arm switch 14p corresponds to a “main switch”, and the lower arm switch 14n corresponds to a “synchronous rectification switch”.

  As shown in FIG. 2, the upper arm switch 14p and the lower arm switch 14n are complementarily turned on and off. Specifically, the first operation signal gp is turned on and the upper arm switch 14p is turned on, and the second operation signal gn is turned off and the lower arm switch 14n is turned off. As a result, the high voltage battery 20 is connected to the reactor 16, current is supplied from the high voltage battery 20 to the reactor 16, and magnetic energy is accumulated in the reactor 16. At this time, the reactor current IL gradually increases with time.

  Thereafter, the first operation signal gp is turned off and the upper arm switch 14p is turned off, and the second operation signal gn is turned on and the lower arm switch 14n is turned on. As a result, the reactor 16 is connected to the low voltage battery 22 and the magnetic energy accumulated in the reactor 16 is released, and a current flows from the reactor 16 to the low voltage battery 22. At this time, the reactor current IL gradually decreases with time.

  By repeating such an operation, power is supplied from the high voltage battery 20 to the low voltage battery 22, and the low voltage battery 22 is charged.

  In particular, in the present embodiment, the power converter 10 is controlled in the current critical mode without providing the power converter 10 with a current sensor that detects the reactor current IL. In such a configuration, in order to reduce the turn-on loss of the upper arm switch 14p by zero voltage switching (ZVS) of the upper arm switch 14p, the reactor current IL becomes slightly negative from 0 as shown in FIG. The lower arm switch 14n is turned off.

  When the lower arm switch 14n is turned off, the capacitors 18p and 18n are charged by the reactor current IL having a slightly negative value. Therefore, as shown in FIG. 4, the potential at the connection point of the upper and lower arm switches 14p, 14n (hereinafter referred to as the target voltage Varm) with respect to the source potential of the lower arm switch 14n rises, and the output voltage of the high voltage battery 20 is eventually V1. Here, when the reactor current IL in the negative direction is larger than the optimum value, the rate at which the capacitors 18p and 18n are charged by the reactor current IL is increased, and thus the increase rate of the target voltage Varm is increased. On the other hand, when the negative reactor current IL is smaller than the optimum value, the increase rate of the target voltage Varm is low.

  The inter-terminal voltage V14p of the upper arm switch 14p (potential difference between the source and drain) is obtained by subtracting the target voltage Varm from the inter-terminal voltage V1 of the high-voltage battery 20 (input voltage of the power conversion device 10 during the step-down operation process). Value. For this reason, when the reactor current IL in the negative direction is larger than the optimum value, the rate of decrease of the inter-terminal voltage V14p of the upper arm switch 14p is increased as shown by a one-dot chain line in FIG. As a result, the time from when the second operation signal gn to the lower arm switch 14n is switched to the OFF operation command until the voltage V14p between the terminals of the upper arm switch 14p decreases to the threshold voltage Vth is shortened. In the present embodiment, this time is referred to as a switching transition time. In the present embodiment, the threshold voltage Vth is set to 10% of the inter-terminal voltage V1 of the high voltage battery 20.

  On the other hand, when the reactor current IL in the negative direction is smaller than the optimum value, the rate of decrease in the inter-terminal voltage V14p of the upper arm switch 14p is reduced as shown by the broken line in FIG. As a result, the switching transition time becomes long.

  That is, between the reactor current IL and the switching transition time, as shown in FIG. 5, when the reactor current IL has a negative value, the switching transition time becomes shorter as the absolute value of the reactor current IL becomes larger. There is a relationship. For this reason, the reactor current IL can be grasped from the switching transition time. Then, a target value of the switching transition time (hereinafter referred to as target time Ttgt) is set so that the reactor current IL becomes an optimum value, and the actual switching transition time is controlled to the target time Ttgt. Thereby, ZVS is implement | achieved and the power converter device 10 can be controlled in a current critical mode, without providing the power converter device 10 with the current sensor which detects the reactor current IL.

<2. Boost operation processing>
In the step-up operation process, ZVS of the lower arm switch 14n is realized, and the turn-on loss of the lower arm switch 14n is reduced. In the case where the boosting operation process is performed, the reactor current IL is defined as positive in the direction in which both ends of the reactor 16 flow from the second capacitor 12b side to the connection point side of the switches 14p and 14n. In the present embodiment, when the step-up operation process is performed, the lower arm switch 14n corresponds to a “main switch”, and the upper arm switch 14p corresponds to a “synchronous rectification switch”.

  During the step-up operation process, the lower arm switch 14n is turned on and the upper arm switch 14p is turned off, so that the low voltage battery 22 is connected to the reactor 16, and the low voltage battery 22 is connected to the reactor 16 Is supplied with current, and magnetic energy is accumulated in the reactor 16. Thereafter, the lower arm switch 14n is switched to the off state, and the upper arm switch 14p is switched to the on state, whereby the reactor 16 is connected to the high voltage battery 20 and the magnetic energy accumulated in the reactor 16 is released. The Thereby, a current flows from reactor 16 to high voltage battery 20. By repeating such an operation, power is supplied from the low voltage battery 22 to the high voltage battery 20, and the high voltage battery 20 is charged.

  Here, in the present embodiment, the switching transition time during the step-up operation processing is such that the voltage between the terminals of the lower arm switch 14n decreases after the first operation signal gp for the upper arm switch 14p is switched to the OFF operation command. The time until the threshold voltage Vth is reached.

<3. Details of Control Circuit 30>
Subsequently, the step-down boost operation process among the processes performed by the control circuit 30 will be described with reference to FIGS. 2 and 6 to 9.

  As shown in FIG. 6, the switching transition time detection circuit 34 includes first to fifth resistors 34a to 34e, first and second comparators 34f and 34g, and first and second XOR circuits 34h and 34i. ing.

  The first to third resistors 34a to 34c are connected in series. The drain of the upper arm switch 14p is connected to the opposite side of the both ends of the first resistor 34a from the connection point with the second resistor 34b. The source of the lower arm switch 14n is connected to the opposite side of the both ends of the third resistor 34c from the connection point with the second resistor 34b.

  The fourth resistor 34d and the fifth resistor 34e are connected in series. Of both ends of the series connection body of the resistors 34d and 34e, the connection point of the upper and lower arm switches 14p and 14n is connected to the fourth resistor 34d side, and the lower arm is connected to the fifth resistor 34e side. The source of the switch 14n is connected.

  The connection point of the first and second resistors 34a and 34b is connected to the non-inverting input terminal of the first comparator 34f, and the connection point of the fourth and fifth resistors 34d and 34e is connected to the inverting input terminal. Has been. On the other hand, the connection point of the fourth and fifth resistors 34d and 34e is connected to the non-inverting input terminal of the second comparator 34g, and the connection point of the second and third resistors 34b and 34c is connected to the inverting input terminal. Is connected.

  The output signal of the first comparator 34f is input to the first input terminal of the first XOR circuit 34h, and the second operation signal gn of the lower arm switch 14n is supplied from the controller 32 to the second input terminal of the first XOR circuit 34h. Entered. On the other hand, the output signal of the second comparator 34g is input to the first input terminal of the second XOR circuit 34i, and the first operation signal gp of the upper arm switch 14p is supplied to the second input terminal of the second XOR circuit 34i. 32. The output signal Sig1 from the first XOR circuit 34h and the output signal Sig2 from the second XOR circuit 34i are input to a transition time measuring unit 32b described later.

  Here, as shown in FIG. 7, the resistance values of the first to fifth resistors 34a to 34e are the voltage V14p between the terminals of the upper arm switch 14p after the second operation signal gn is switched to the OFF operation command. Is set so that the logic of the output signal of the first XOR circuit 34h becomes “H” during a period (time t1 to t2) until the threshold voltage Vth starts to decrease. This setting is made to detect the switching transition time during the step-down operation process. 7A shows the transition of the reactor current IL, and FIGS. 7B to 7E correspond to FIGS. 4A to 4D. FIG. 7F shows the transition of the output signal of the first comparator 34f, and FIG. 7G shows the transition of the output signal Sig1 of the first XOR circuit 34h.

  In addition, the resistance values of the first to fifth resistors 34a to 34e are equal to the threshold voltage Vth after the first operation signal gp is switched to the off operation command and the voltage across the terminals of the lower arm switch 14n starts to decrease. In the period up to, the logic of the output signal Sig2 of the second XOR circuit 34i is set to “H”. This setting is made to detect the switching transition time during the boosting operation process.

  Next, the configuration of the controller 32 will be described with reference to the block diagrams of FIGS.

  First, the configuration of the controller 32 corresponding to the step-down operation process will be described with reference to FIG.

  As illustrated, the controller 32 includes a target voltage Vtgt input from the outside of the power converter 10, a voltage V1 between terminals of the high voltage battery 20 (input voltage V1), and a voltage V2 between terminals of the low voltage battery 22 ( The circuit generates and outputs first and second operation signals gp and gn based on the output voltage V2) and the switching transition time. The controller 32 is composed mainly of a microcomputer, for example. The target voltage Vtgt is a target value of the voltage applied to the low voltage battery 22 from between the third and fourth terminals T3 and T4.

  The duty ratio calculation unit 32a calculates on-time ratios Dutyp and Duty for the upper and lower arm switches 14p and 14n based on the input voltage V1, the target voltage Vtgt, and the output voltage V2. Here, the ON time ratio is a ratio of ON operation time to one cycle of ON / OFF operation (switching cycle Tsw) of each switch. In the present embodiment, the on-time ratio takes a value from 0 to 1. In the present embodiment, the duty ratio calculation unit 32a corresponds to “on time ratio calculation means”.

  The transition time measuring unit 32b detects the pulse width of the output signal Sig1 of the first XOR circuit 34h (the time when the logic is “H”) as the switching transition time. In the present embodiment, the transition time measurement unit 32b and the switching transition time detection circuit 34 correspond to “transition time detection means”.

  The time deviation calculation unit 32c calculates a time deviation between the target time Ttgt and the switching transition time output from the transition time measurement unit 32b. Specifically, the time deviation is calculated as a value obtained by subtracting the switching transition time from the target time Ttgt. Thus, when the time deviation becomes a positive value, it indicates that the reactor current IL flowing from the second capacitor 12b side to the connection point side of each switch 14p, 14n is excessive. On the other hand, the negative time deviation indicates that the reactor current IL flowing from the second capacitor 12b side to the connection point side of each switch 14p, 14n is too small.

  Here, in the present embodiment, the target time Ttgt is a fixed value set in advance. The target time Ttgt is set based on the resonance period of the resonance circuit constituted by the inductance “L” of the reactor 16 and the capacitances of the capacitors 18p and 18n. Specifically, for example, the target time Ttgt can be set to ¼ of the resonance period. Also, the target time Ttgt may be set to about 80% of 1/4 of the resonance period in consideration of variations in the signal delay time in the switching transition time detection circuit 34 and the signal delay times in the drive circuits 38p and 38n. it can.

  The transition time control unit 32d calculates a correction value ΔD for correcting each on-time ratio Dutyp, Dutyn by proportional-integral control of the time deviation output from the time deviation calculation unit 32c. In the present embodiment, the transition time control unit 32d corresponds to “correction value calculation means”.

  The first correction unit 32e adds the correction value ΔD output from the transition time control unit 32d to the on-time ratio Dutyp for the upper arm switch 14p output from the duty ratio calculation unit 32a. On the other hand, the second correction unit 32f subtracts the correction value ΔD output from the transition time control unit 32d from the on-time ratio Duty for the lower arm switch 14n output from the duty ratio calculation unit 32a. As a result, when the reactor current IL is excessive when the time deviation is positive, the on-operation time of the lower arm switch 14n is shortened and the on-operation time of the upper arm switch 14p is extended (reactor current IL Each on-time ratio Dutyp, Dutyn is corrected so as to reduce the negative peak value. In the present embodiment, the correction units 32e and 32f correspond to “correction means”.

  The voltage deviation calculator 32g calculates a voltage deviation between the target voltage Vtgt and the output voltage V2. The voltage control unit 32h calculates a conversion coefficient for feedback control of the output voltage V2 to the target voltage Vtgt by proportional-integral control of the voltage deviation output from the voltage deviation calculation unit 32g. This conversion coefficient corresponds to the switching period of each switch 14p, 14n.

  The first on-time calculating unit 32i calculates the on-operation time Tmon for the upper arm switch 14p by multiplying the output value “Dutyp + ΔD” of the first correcting unit 32e by the conversion coefficient output from the voltage control unit 32h. . On the other hand, the second on-time calculation unit 32j multiplies the output value “Dutyp−ΔD” of the second correction unit 32f by the conversion coefficient output from the voltage control unit 32h, so that the on-operation time for the lower arm switch 14n. Calculate Tron.

  The operation signal generator 32k generates and outputs operation signals gp and gn for the upper and lower arm switches 14p and 14n based on the ON operation times Tmon and Tron output from the ON time calculators 32i and 32j. Here, in order to avoid that both the upper and lower arm switches 14p and 14n are turned on, a dead time is given to each operation signal gp and gn. The drive circuits 38p and 38n shown in FIG. 1 turn on and off the switches 14p and 14n based on the operation signals gp and gn output from the operation signal generation unit 32k.

  According to such a configuration, the switching transition time is controlled to be the target time Ttgt. That is, the reactor current IL is controlled so as to be an optimum value. Thereby, power converter 10 can be controlled in the current critical mode during the step-down operation process without detecting reactor current IL.

  Next, the configuration of the controller 32 corresponding to the boosting operation process will be described with reference to FIG. In FIG. 9, the same components as those in FIG. 8 are given the same reference numerals for the sake of convenience.

  During the boosting operation process, the voltage V2 between the terminals of the low voltage battery 22 becomes the input voltage V2 of the power converter 10, and the voltage V1 between the terminals of the high voltage battery 20 becomes the output voltage V1 of the power converter 10. In addition, the target voltage Vtgt is a target value of a voltage applied to the high voltage battery 20 from between the first and second terminals T1 and T2.

  The transition time measurement unit 32b detects the pulse width of the output signal Sig2 of the second XOR circuit 34i as a switching transition time. The voltage deviation calculation unit 32g calculates a voltage deviation between the target voltage Vtgt and the output voltage V1.

  The first correction unit 32e subtracts the correction value ΔD output from the transition time control unit 32d from the on-time ratio Dutyp for the upper arm switch 14p output from the duty ratio calculation unit 32a. On the other hand, the second correction unit 32f adds the correction value ΔD output from the transition time control unit 34d to the on-time ratio Duty for the lower arm switch 14n output from the duty ratio calculation unit 32a. As a result, when the reactor current IL has a positive time deviation, the on-operation time of the upper arm switch 14p is shortened and the on-operation time of the lower arm switch 14n is extended (reactor current IL Each on-time ratio Dutyp, Dutyn is corrected so as to reduce the negative peak value.

  According to such a configuration, the power conversion device 10 can be controlled in the current critical mode during the boosting operation process.

<4. Output current estimation processing>
The output current estimation process of the power conversion device 10 will be described with reference to FIGS. In the present embodiment, the current estimator 36 corresponds to “current estimation means”.

  The current estimator 36 estimates the output current Iest of the power converter 10 based on the inter-terminal voltage V1 of the high-voltage battery 20, the inter-terminal voltage V2 of the low-voltage battery 22, and the on operation times Tmon and Tron. This estimation method uses the fact that the waveform of the reactor current IL becomes a triangular waveform that repeatedly reciprocates the maximum value Imax and the minimum value Imin of the current by controlling the power conversion device 10 in the current critical mode. Is.

  Specifically, in this embodiment, the output current Iest is estimated by the following equation (eq1).

上式（ｅｑ１）において、「Ｉｍｉｎ」は、リアクトル電流ＩＬの最小値である。この最小値Ｉｍｉｎは、各コンデンサ１８ｐ，１８ｎのそれぞれの容量「Ｃ／２」と、リアクトル１６のインダクタンス「Ｌ」を用いると、下式（ｅｑ２）によって算出できる。

In the above equation (eq1), “Imin” is the minimum value of the reactor current IL. The minimum value Imin can be calculated by the following equation (eq2) using the capacitance “C / 2” of each of the capacitors 18p and 18n and the inductance “L” of the reactor 16.

上式（ｅｑ２）は、以下のように導かれる。詳しくは、電流臨界モード制御によってリアクトル電流ＩＬが最適値に制御されている状況において、各コンデンサ１８ｐ，１８ｎと、リアクトル１６とによって共振が生じる。この場合、リアクトル電流ＩＬが負側のピーク値となるタイミングは、リアクトル１６の端子間電圧が０となる（すなわち、対象電圧Ｖａｒｍが低電圧バッテリ２２の端子間電圧Ｖ２となる）タイミングである。このタイミングにおけるリアクトル電流Ｉｍｉｎによってリアクトル１６に蓄積されているエネルギ「１／２×Ｌ×Ｉｍｉｎ＾２」が、各コンデンサ１８ｐ，１８ｎの容量「Ｃ」を充電するために必要なエネルギ「１／２×Ｃ×（Ｖ１−Ｖ２）＾２」になるとの関係から、上式（ｅｑ２）を導くことができる。

The above equation (eq2) is derived as follows. Specifically, in the situation where the reactor current IL is controlled to the optimum value by the current critical mode control, resonance occurs between the capacitors 18p and 18n and the reactor 16. In this case, the timing at which the reactor current IL reaches the negative peak value is the timing at which the voltage between the terminals of the reactor 16 becomes 0 (that is, the target voltage Varm becomes the voltage V2 between the terminals of the low-voltage battery 22). The energy “1/2 × L × Imin ^ 2” stored in the reactor 16 by the reactor current Imin at this timing is the energy “1/2” required to charge the capacitance “C” of each capacitor 18p, 18n. From the relationship that “× C × (V1−V2) ^ 2”, the above equation (eq2) can be derived.

  Here, during the step-down operation process, the current amplitude ΔIpp in the above equation (eq1) can be calculated by the following equation (eq3).

上式（ｅｑ３）の中辺は、出力電流が最小値Ｉｍｉｎから最大値Ｉｍａｘへと時間経過とともに漸増する場合の出力電流が、上アームスイッチ１４ｐのオン操作時間Ｔｍｏｎと、リアクトル１６の端子間電圧とに基づき推定できることに基づく。この場合におけるリアクトル１６の端子間電圧は、高電圧バッテリ２０の端子間電圧Ｖ１から低電圧バッテリ２２の端子間電圧Ｖ２を減算した値として算出することができる。

The middle side of the above equation (eq3) indicates that the output current when the output current gradually increases from the minimum value Imin to the maximum value Imax over time, the on-operation time Tmon of the upper arm switch 14p, and the voltage between the terminals of the reactor 16 Based on what can be estimated based on. In this case, the inter-terminal voltage of the reactor 16 can be calculated as a value obtained by subtracting the inter-terminal voltage V2 of the low-voltage battery 22 from the inter-terminal voltage V1 of the high-voltage battery 20.

  On the other hand, the right side of the above equation (eq3) shows that when the output current gradually decreases from the maximum value Imax to the minimum value Imin, the output current is between the ON operation time Tron of the lower arm switch 14n and the terminal of the reactor 16. Based on what can be estimated based on voltage. In this case, the terminal voltage of the reactor 16 is the terminal voltage V <b> 2 of the low voltage battery 22.

  FIG. 11 shows an example of the output current estimation process during the step-down operation process. In FIG. 11, the dead time set between the on-operation times Tmon and Tron is ignored. This is because the influence of the dead time on the estimation of the output current is small.

  As shown in the figure, in the present embodiment, both the period in which the output current gradually increases (time t1 to t2, t3 to t4) and the period in which the output current gradually decreases (time t2 to t3, t4 to t5). The output current Iest is estimated. Here, for example, the output current Iest may be estimated each time (each processing cycle) by calculating the current amplitude ΔIpp and the minimum value Imin each time (specifically, every processing cycle in the control circuit 30). Specifically, the output current Iest may be estimated every time the controller 32 newly calculates the ON operation times Tmon and Tron.

  Returning to FIG. 10, the current amplitude ΔIpp can be calculated by the following equation (eq4) during the boosting operation process.

上式（ｅｑ４）の中辺は、出力電流が最小値Ｉｍｉｎから最大値Ｉｍａｘへと時間経過とともに漸増する場合の出力電流が、下アームスイッチ１４ｎのオン操作時間Ｔｒｏｎと、リアクトル１６の端子間電圧とに基づき推定できることに基づく。一方、上式（ｅｑ４）の右辺は、出力電流が最大値Ｉｍａｘから最小値Ｉｍｉｎへと時間経過とともに漸減する場合の出力電流が、上アームスイッチ１４ｐのオン操作時間Ｔｍｏｎと、リアクトル１６の端子間電圧とに基づき推定できることに基づく。

The middle side of the above equation (eq4) indicates that the output current when the output current gradually increases from the minimum value Imin to the maximum value Imax with the passage of time is the ON operation time Tron of the lower arm switch 14n and the voltage across the terminals of the reactor 16 Based on what can be estimated based on. On the other hand, the right side of the above equation (eq4) shows that the output current when the output current gradually decreases with time from the maximum value Imax to the minimum value Imin is between the ON operation time Tmon of the upper arm switch 14p and the terminal of the reactor 16 Based on what can be estimated based on voltage.

  FIG. 12 shows an example of the output current estimation process during the boosting operation process.

  As shown in the figure, in the present embodiment, both the period in which the output current gradually increases (time t1 to t2, t3 to t4) and the period in which the output current gradually decreases (time t2 to t3, t4 to t5). The output current Iest is estimated.

<5. Abnormality judgment processing>
FIG. 13 shows the procedure of the abnormality determination process. This process is repeatedly executed by the operation state detector 39, for example, at a predetermined processing cycle.

  In this series of processing, first, in step S10, the voltage V1 between terminals of the high voltage battery 20, the voltage V2 between terminals of the low voltage battery 22, the ON operation times Tmon and Tron output from the controller 32, and the current estimator. The output current Iest estimated by 36 is obtained.

  In the subsequent step S12, the determination on-time ratio Djde is calculated from the acquired on-operation times Tmon and Tron using the following equation (eq5).

続くステップＳ１４（「閾値算出手段」，「補正手段」に相当）では、取得された端子間電圧Ｖ１，Ｖ２と、出力電流Ｉｅｓｔとに基づき、下限閾値Ｄｍｉｎと、下限閾値Ｄｍｉｎよりも大きい上限閾値Ｄｍａｘとを算出する。各閾値Ｄｍｉｎ，Ｄｍａｘは、電力変換装置１０の動作状態の異常判定用のものである。以下、各閾値Ｄｍｉｎ，Ｄｍａｘの算出手法について説明する。

In the subsequent step S14 (corresponding to “threshold calculation means” and “correction means”), based on the acquired inter-terminal voltages V1 and V2 and the output current Iest, a lower limit threshold Dmin and an upper limit threshold larger than the lower limit threshold Dmin. Dmax is calculated. Each of the threshold values Dmin and Dmax is for determining an abnormality in the operating state of the power conversion device 10. Hereinafter, a method of calculating the threshold values Dmin and Dmax will be described.

  In the situation where the upper arm switch 14p and the lower arm switch 14n are complementarily turned on / off by the current critical mode, the relationship between the on operation times Tmon, Tron and the inter-terminal voltages V1, V2 is the power conversion. Regardless of the output current of the device 10, the relationship is theoretically expressed by the following equation (eq6).

上式（ｅｑ６）は、上式（ｅｑ３）から導かれる式である。上式（ｅｑ６）を変形すると、下式（ｅｑ７）が導かれる。

The above formula (eq6) is a formula derived from the above formula (eq3). When the above equation (eq6) is transformed, the following equation (eq7) is derived.

上式（ｅｑ７）の関係は、降圧動作処理及び昇圧動作処理の双方について成立する。上式（ｅｑ７）の関係は、電力変換装置１０の動作状態に異常が生じた場合、正常時に想定した関係からずれることとなる。つまり、電力変換装置１０の動作状態に異常が生じると、制御器３２から出力される各オン操作時間Ｔｍｏｎ，Ｔｒｏｎが正常時の値からずれ得る。この場合、例えば降圧動作処理時において、各オン操作時間Ｔｍｏｎ，Ｔｒｏｎは正常時の値からずれるものの、上記異常が発生したタイミングから間もない期間は、入力電圧Ｖ１及び出力電圧Ｖ２に上記異常の影響が未だ反映されていない期間であると考えられる。このため、電力変換装置１０の動作状態に異常が生じた場合、制御器３２から出力される各オン操作時間Ｔｍｏｎ，Ｔｒｏｎに基づき定まる上式（ｅｑ７）の左辺と、入力電圧Ｖ１と出力電圧Ｖ２とから定まる上式（ｅｑ７）の右辺とがずれることとなる。したがって、上式（ｅｑ７）の右辺を、異常判定用の閾値として用いることができる。特に、この閾値「Ｖ２／Ｖ１」は、ばらつきの大きいリアクトル１６のインダクタンス値を含まないことから、異常判定精度の向上にも寄与する。

The relationship of the above equation (eq7) is established for both the step-down operation process and the step-up operation process. The relationship of the above equation (eq7) will deviate from the relationship assumed during normal operation when an abnormality occurs in the operating state of the power conversion device 10. That is, when an abnormality occurs in the operating state of the power conversion device 10, the on operation times Tmon and Tron output from the controller 32 may deviate from normal values. In this case, for example, during the step-down operation process, the on-operation times Tmon and Tron are deviated from normal values, but the input voltage V1 and the output voltage V2 are not affected by the abnormality during the period immediately after the abnormality occurs. It is considered that the period has not yet been affected. For this reason, when an abnormality occurs in the operating state of the power conversion device 10, the left side of the above equation (eq7) determined based on the on-operation times Tmon and Tron output from the controller 32, the input voltage V1, and the output voltage V2 The right side of the above equation (eq7) determined from Therefore, the right side of the above equation (eq7) can be used as a threshold value for abnormality determination. In particular, the threshold value “V2 / V1” does not include the inductance value of the reactor 16 having a large variation, and thus contributes to improvement in abnormality determination accuracy.

  Here, in the present embodiment, the threshold value “V2 / V1” has a width for preventing erroneous determination. In this embodiment, the voltage detection error α (α: a value expressed as a percentage) and the input of the main circuit of the power converter 10 (circuits from the terminals T1 and T2 to the terminals T3 and T4 of the power converter 10). The threshold “V2 / V1” is given a width in consideration of the output impedance, and the lower limit threshold Dmin and the upper limit threshold Dmax are calculated as upper and lower limits. Specifically, first, considering the voltage detection error, the threshold values Dmin and Dmax are expressed by the following equation (eq8).

続いて、入出力インピーダンスの考慮について説明する。本実施形態では、出力電流Ｉｅｓｔが大きいほど、各閾値Ｄｍｉｎ，Ｄｍａｘを増大補正する。これは、電力変換装置１０が高負荷で駆動されて出力電流が大きくなる場合において、電力変換装置１０の内部抵抗による電圧降下に起因した電力変換装置１０の動作状態の誤判定を回避するためのものである。

Next, consideration of input / output impedance will be described. In the present embodiment, the threshold values Dmin and Dmax are corrected to increase as the output current Iest increases. This is to avoid erroneous determination of the operating state of the power converter 10 due to a voltage drop due to the internal resistance of the power converter 10 when the power converter 10 is driven with a high load and the output current becomes large. Is.

  In addition, you may consider a design margin further in the setting of each threshold value Dmin and Dmax. Moreover, you may use the input electric current of the power converter device 10 for correction | amendment of each threshold value Dmin and Dmax. The input current is used to avoid the erroneous determination due to the voltage drop due to the internal resistance of the power conversion device 10. Here, the input current can be estimated from, for example, the output current Iest, the inter-terminal voltages V1 and V2, and the conversion efficiency of the power conversion device 10.

  In subsequent step S16, it is determined whether or not the logical sum of the condition that the determination on-time ratio Djde exceeds the upper threshold Dmax and the condition that the determination on-time ratio Djde falls below the lower threshold Dmin is true. To do.

  When a negative determination is made in step S <b> 16, the process proceeds to step S <b> 18 and it is determined that the operating state of the power conversion device 10 is normal. On the other hand, when an affirmative determination is made in step S <b> 16, the process proceeds to step S <b> 20 and it is determined that an abnormality has occurred in the operating state of the power converter 10. In the present embodiment, an operation stop command for instructing the controller 32 to stop the operation is further output. More specifically, a command for stopping the driving of the switches 14p and 14n is output. Incidentally, in addition to the operation stop command or instead of the operation stop command, the fact that an abnormality has occurred is indicated by a control device higher than the control circuit 30 (for example, a control device external to the power converter 10, You may notify to the control apparatus which supervises vehicle control.

  In addition, when the process of step S18, S20 is completed, this series of processes is once complete | finished.

  FIG. 14 shows the DC superimposition characteristics of the reactor 16, and FIG. 15 shows the transition of the reactor current. Here, the solid lines in FIGS. 14 and 15 correspond to each other, and the broken lines also correspond to each other. The relationship of the above equation (eq7) is established even when the inductance of the reactor 16 varies depending on the DC superposition characteristics shown in FIG. Specifically, when the saturation state of the reactor 16 is within the allowable range, the power conversion apparatus 10 can operate in the current critical mode, and the reactor current IL returns to the minimum value Imin for each cycle, the above formula ( eq7) holds.

  As described above, in the present embodiment, the abnormality determination process is performed based on the ON operation times Tmon and Tron, the voltage V1 between the terminals of the high voltage battery 20, and the voltage V2 between the terminals of the low voltage battery 22. When it is determined that an abnormality has occurred, an operation stop command is output. Thereby, it can avoid that the power converter device 10 continues being driven in the abnormal state which deviated from the current critical mode, and the increase in the loss and overheating of the power converter device 10 can be avoided.

  In particular, in the present embodiment, increasing the respective threshold values Dmin and Dmax as the output current Iest is increased contributes to improvement in abnormality determination accuracy.

(Second Embodiment)
Hereinafter, the second embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  In the present embodiment, the configuration of the controller is changed.

  FIG. 16 shows a configuration of the controller 37 according to the present embodiment. In the present embodiment, the step-down operation process will be described as an example.

  As illustrated, the voltage deviation calculation unit 37a calculates a voltage deviation between the target voltage Vtgt input from the outside and the output voltage V2. The voltage deviation calculation unit 37a has the same configuration as the voltage deviation calculation unit 32g of the first embodiment.

  The voltage control unit 37b calculates the on-time ratios Dutyp and Duty for the upper and lower arm switches 14p and 14n based on the voltage deviation output from the voltage deviation calculation unit 37a. In the present embodiment, the voltage control unit 37b corresponds to an “on time ratio calculation unit”.

  The transition time measurement unit 37c and the time deviation calculation unit 37d have the same configuration as the transition time measurement unit 32b and the time deviation calculation unit 32c of the first embodiment.

  The transition time control unit 37e calculates a switching cycle Tsw for each of the switches 14p and 14n by proportional-integral control of the time deviation output from the time deviation calculation unit 37d. As a result, when the reactor current IL is excessive when the time deviation is a positive value, the switching period is shortened to decrease the reactor current IL. On the other hand, when the reactor current IL is excessively small, the switching period is extended to increase the reactor current IL. In the present embodiment, the transition time control unit 37e corresponds to “period calculation means”.

  The on-time calculation unit 37f multiplies each on-time ratio Dutyp, Dutyn output from the voltage control unit 37b by the switching period Tsw output from the transition time control unit 37e, thereby obtaining each on-operation time Tmon, Tron. Is calculated. The operation signal generation unit 37g has the same configuration as the previous operation signal generation unit 32k.

  Incidentally, the configuration shown in FIG. 16 can be similarly applied to the boosting operation process.

  According to the present embodiment described above, the same effect as that obtained in the first embodiment can be obtained.

(Third embodiment)
Hereinafter, the third embodiment will be described with reference to the drawings with a focus on differences from the second embodiment.

  In this embodiment, a flyback converter is used as a power converter.

  In FIG. 17, the structure of the power converter device concerning this embodiment is shown. In FIG. 17, the same components as those shown in FIG. 1 are given the same reference numerals for the sake of convenience.

  As shown in FIG. 17, the power conversion device 40 includes first and second capacitors 42 a and 42 b, a first switch 44 a, a second switch 44 b, a transformer 46, and a control circuit 30. The power conversion device 40 transfers power between the batteries 20 and 22 while electrically insulating the high voltage battery 20 and the low voltage battery 22.

  One end of the first capacitor 42a is connected to the first terminal T1 of the power conversion device 10, and the second terminal T2 is connected to the other end of the first capacitor 42a. A series connection body of a first switch 44 a and a first winding 46 a constituting the transformer 46 is connected in parallel to the first capacitor 42 a. In the present embodiment, voltage-controlled semiconductor switching elements are used as the switches 44p and 44n, and specifically, N-channel MOSFETs are used. In the figure, diodes 45p and 45n connected in antiparallel to the switches 44p and 44n are parasitic diodes of the switches 44p and 44n. In the present embodiment, the capacitor 48a connected in parallel to the first switch 44a indicates the parasitic capacitance of the first switch 44a. A capacitor 48b connected in parallel to the second switch 44b indicates the parasitic capacitance of the second switch 44b. In the present embodiment, the capacitance of each of the capacitors 48a and 48b is “C / 2”.

  A series connection body of a second switch 44b and a second capacitor 42b is connected in parallel to the second winding 46b constituting the transformer 46. The third terminal T3 of the power conversion device 10 is connected to the side of the second capacitor 42b where the second switch 44b is connected. The 4th terminal T4 of the power converter device 10 is connected to the side where the 2nd coil | winding 46b was connected among the both ends of the 2nd capacitor | condenser 42b. Here, in the present embodiment, the turn ratio “N1 / N2 = RL”, which is the ratio of the turn “N1” of the first winding 46a to the turn “N2” of the second winding 46b, is set to a value greater than 1. Has been.

  Subsequently, the step-down operation processing according to the present embodiment will be described. In the step-down operation process, the first winding 46a corresponds to the “primary winding”, and the second winding 46b corresponds to the “secondary winding”. The first switch 44a corresponds to a “main switch”, and the second switch 44b corresponds to a “synchronous rectification switch”.

  The first switch 44a and the second switch 44b are complementarily turned on and off. Specifically, the first operation signal gp is turned on, and the first switch 44a is turned on. The second operation signal gn is turned off, and the second switch 44b is turned off. As a result, the high voltage battery 20 is connected to the first winding 46 a, current is supplied from the high voltage battery 20 to the first winding 46 a, and magnetic energy is accumulated in the transformer 46.

  Thereafter, the first operation signal gp is turned off and the first switch 44a is turned off, and the second operation signal gn is turned on and the second switch 44b is turned on. As a result, the second winding 46b is connected to the low voltage battery 22 and the magnetic energy accumulated in the transformer 46 is released, and a current flows from the second winding 46b to the low voltage battery 22. By repeating such an operation, power is supplied from the high voltage battery 20 to the low voltage battery 22, and the low voltage battery 22 is charged.

  Next, the boosting operation process will be described. In the step-up operation process, the second winding 46b corresponds to the “primary winding”, and the first winding 46a corresponds to the “secondary winding”. The second switch 44b corresponds to a “main switch”, and the first switch 44a corresponds to a “synchronous rectification switch”.

  During the step-up operation process, the second switch 44b is turned on and the first switch 44p is turned off, whereby the low voltage battery 22 is connected to the second winding 46b, and the low voltage battery 22 is turned on. Current is supplied to the second winding 46b, and magnetic energy is accumulated in the transformer 46. Thereafter, the second switch 44b is switched to the off state, and the first switch 44a is switched to the on state, whereby the first winding 46a is connected to the high voltage battery 20 and the magnetic energy stored in the transformer 46 is stored. Is released. As a result, a current flows from the first winding 46 a to the high voltage battery 20. By repeating such an operation, power is supplied from the low voltage battery 22 to the high voltage battery 20, and the high voltage battery 20 is charged.

  The control circuit 30 includes first and second drive circuits 50a and 50b. The first drive circuit 50a turns on / off the first switch 44a based on the first operation signal gp output from the controller 37. The second drive circuit 50b turns on / off the second switch 44b based on the second operation signal gn output from the controller 37.

  The switching transition time detection circuit 34 receives the voltage between the terminals of the first switch 44a and the voltage between the terminals of the second switch 44b. Here, in order to detect the voltage between the terminals of the second switch 44b, the path connecting the both ends of the second switch 44b and the switching transition time detection circuit 34 is actually connected to the second switch 44b and the switching transition time. An insulating circuit capable of transmitting a signal between the detection circuit 34 and the detection circuit 34 is provided. Also, an insulating circuit is provided in a path for inputting the inter-terminal voltage V <b> 2 of the low voltage battery 22 to the controller 37.

  In the present embodiment, the switching transition time detection circuit 34 decreases the voltage between the terminals of the first switch 44a after the second operation signal gn for the second switch 44b is switched to the OFF operation command during the step-down operation process. In the period until the threshold voltage Vth is reached, the output signal Sig1 of logic “H” is output. The control mode during the step-down operation process can be realized by the configuration shown in FIG.

  According to such a configuration, similarly to the first embodiment, the switching transition time is controlled to the target time Ttgt. As a result, the power conversion device 40 can be controlled in the current critical mode without providing the power conversion device 40 with a current sensor that detects the reactor current IL.

  Incidentally, the configuration of the present embodiment can be similarly applied to the boosting operation process. Here, the switching transition time detection circuit 34 reduces the threshold voltage when the first operation signal gp for the first switch 44a is switched to the OFF operation command during the step-up operation process, and the voltage across the terminals of the second switch 44b decreases. In the period until the voltage Vth is reached, the output signal Sig2 of logic “H” is output. The control mode during the boosting operation process can be realized by a configuration according to the configuration shown in FIG.

  Next, the output current estimation process according to this embodiment will be described.

  As illustrated in FIG. 18, the current estimator 36 a estimates the output current Iest of the power conversion device 40 during the step-down operation process and the step-up operation process. Specifically, during the step-down operation process, based on the voltage V2 between the terminals of the low voltage battery 22, the ON operation time Tron of the second switch 44b, and the switching cycle Tsw output from the transition time control unit 37e of FIG. The output current Iest is estimated by the following equation (eq9).

ここで、上式（ｅｑ９）の「Ｌ２」は、第２巻線４６ｂの自己インダクタンスを示す。また、本実施形態では、上式（ｅｑ９）の「Ｔｍｏｎ＋Ｔｒｏｎ」としてスイッチング周期Ｔｓｗを用いる。上式（ｅｑ９）は、図１９に示すように、第２スイッチ４４ｂのオン操作時間Ｔｒｏｎにおいて第２巻線４６ｂに流れる電流の時間積分値を、スイッチング周期Ｔｓｗで平均した値が出力電流となることから導かれる。なお、本実施形態では、第２巻線４６ｂに流れる負電流が出力電流Ｉｅｓｔの推定の及ぼす影響が微小であるとして、負電流の影響を無視する。また、図１９では、出力電流が漸増する期間（時刻ｔ１〜ｔ２，ｔ３〜ｔ４）におけるリアクトル電流として、第１巻線４６ａに流れる電流を示し、出力電流が漸減する期間（時刻ｔ２〜ｔ３，ｔ４〜ｔ５）におけるリアクトル電流として、第２巻線４６ｂに流れる電流を示している。

Here, “L2” in the above equation (eq9) indicates the self-inductance of the second winding 46b. In the present embodiment, the switching cycle Tsw is used as “Tmon + Tron” in the above equation (eq9). In the above equation (eq9), as shown in FIG. 19, the value obtained by averaging the time integral value of the current flowing through the second winding 46b during the ON operation time Tron of the second switch 44b in the switching cycle Tsw is the output current. Derived from that. In the present embodiment, the influence of the negative current is ignored on the assumption that the negative current flowing through the second winding 46b has a small influence on the estimation of the output current Iest. In FIG. 19, the current flowing through the first winding 46a is shown as the reactor current in the period in which the output current gradually increases (time t1 to t2, t3 to t4), and the period in which the output current gradually decreases (time t2 to t3, time t2 to t3). The current flowing through the second winding 46b is shown as the reactor current at t4 to t5).

  On the other hand, during the boosting operation process, the output current Iest is estimated by the following equation (eq9) based on the voltage V1 between the terminals of the high voltage battery 20, the ON operation time Tmon of the first switch 44a, and the switching cycle Tsw.

ここで、上式（ｅｑ１０）の「Ｌ１」は、第１巻線４６ａの自己インダクタンスを示す。上式（ｅｑ１０）は、図２０に示すように、第１スイッチ４４ａのオン操作時間Ｔｍｏｎにおいて第１巻線４６ａに流れる電流の時間積分値を、スイッチング周期Ｔｓｗで平均した値が出力電流となることから導かれる。なお、図２０では、出力電流が漸増する期間（時刻ｔ１〜ｔ２，ｔ３〜ｔ４）におけるリアクトル電流として、第２巻線４６ｂに流れる電流を示し、出力電流が漸減する期間（時刻ｔ２〜ｔ３，ｔ４〜ｔ５）におけるリアクトル電流として、第１巻線４６ａに流れる電流を示している。

Here, “L1” in the above equation (eq10) indicates the self-inductance of the first winding 46a. In the above equation (eq10), as shown in FIG. 20, the value obtained by averaging the time integral value of the current flowing through the first winding 46a during the ON operation time Tmon of the first switch 44a in the switching cycle Tsw is the output current. Derived from that. In FIG. 20, the current flowing through the second winding 46b is shown as the reactor current in the period in which the output current gradually increases (time t1 to t2, t3 to t4), and the period in which the output current gradually decreases (time t2 to t3, time t2 to t3). The current flowing through the first winding 46a is shown as the reactor current at t4 to t5).

  Using the output current Iest thus estimated, the threshold values Dmin and Dmax can be corrected in step S14 of FIG.

  Subsequently, the abnormality determination process according to the present embodiment will be described. In the following description, only the differences from the first embodiment will be described.

  In the present embodiment, the determination on-time ratio Djde can be calculated by the following equation (eq10).

また、上式（ｅｑ７）の右辺に対応する閾値のベース値は、「ＲＬ×Ｖ２／Ｖ１」によって算出することができる。

Further, the base value of the threshold corresponding to the right side of the above equation (eq7) can be calculated by “RL × V2 / V1”.

  That is, assuming that the influence of the negative current flowing through the second winding 46b on the estimation of the output current Iest is negligible, if the influence of the negative current is ignored, the current peak values of the windings 46a and 46b shown in FIG. From the relationship, the following equation (eq12) is derived.

上式（ｅｑ１２）において、第１巻線４６ａの電流ピーク値ΔＩｐ１は、上式（ｅｑ１０）に示されるものであり、第２巻線４６ｂの電流ピーク値ΔＩｐ２は、上式（ｅｑ９）に示されるものである。上式（ｅｑ１２）から、上式（ｅｑ７）に相当するものとして、下式（ｅｑ１３）が導かれる。

In the above equation (eq12), the current peak value ΔIp1 of the first winding 46a is represented by the above equation (eq10), and the current peak value ΔIp2 of the second winding 46b is represented by the above equation (eq9). It is what From the above equation (eq12), the following equation (eq13) is derived as equivalent to the above equation (eq7).

なお、上記判定用オン時間比Ｄｊｄｅと、閾値の上記ベース値とは、降圧動作処理及び昇圧動作処理の双方において用いることができる。

The on-time ratio for determination Djde and the base value of the threshold can be used in both the step-down operation process and the step-up operation process.

  According to the present embodiment described above, the same effect as that obtained in the third embodiment can be obtained.

(Other embodiments)
Each of the above embodiments may be modified as follows.

  The switching transition time is not limited to that exemplified in the first embodiment. For example, in the step-down operation process, after the second operation signal gn for the lower arm switch 14n is switched to the off operation command, the voltage between the terminals of the switch 14n rises to a specified voltage different from the threshold voltage Vth. The timing may be a timing start timing of the switching transition time. Even at the switching transition time thus detected, it is possible to grasp the rate of decrease in the voltage between the terminals of the upper arm switch 14p after the lower arm switch 14n is switched to the OFF state. For this reason, the turn-off loss of the upper arm switch 14p can be reduced by ZVS.

  In the first embodiment, the average value of the reactor current IL is estimated as the output current Iest. However, the present invention is not limited to this. For example, the peak value “Imin + ΔIpp” of the reactor current IL may be estimated as the output current Iest.

  In FIG. 11 of the first embodiment, the output current Iest may be estimated only in one of the period in which the output current gradually increases and the period in which the output current gradually decreases. The same applies to the current estimation during the boosting operation process.

  -In the said 1st Embodiment, you may make the power converter device 10 shown in FIG. 1 function only as a buck converter, or may function only as a boost converter.

  The main switch and the synchronous rectification switch are not limited to N-channel MOSFETs, but may be other voltage-controlled semiconductor switching elements (for example, IGBT).

  In the first embodiment, the capacitance corresponding to each of the switches 14p and 14n is not limited to the same value “C / 2”, but may be different values. In this case, the capacitance C in the calculation of the minimum value Imin in the current estimator 36 is a value obtained by adding the capacitance corresponding to the upper arm switch 14p and the capacitance corresponding to the lower arm switch 14n. A snubber circuit including a capacitor (passive element) may be connected in parallel to each of the switches 14p and 14n. In this case, in the calculation of the minimum value Imin in the current estimator 36, the capacity of the snubber circuit is added to the capacity C.

  In the estimation of the output current in the first embodiment, the minimum value Imin may not be calculated for each processing cycle, and the minimum value Imin may be a fixed value. Specifically, for example, the minimum value Imin may be set to the median value of the minimum output current that can be taken by the mass-produced power converter 10. In this case, if the minimum value Imin is small, the minimum value Imin may be set to “0”.

  In the first embodiment, a current sensor that detects an output current (for example, a current output from the third terminal T3) of the power conversion device 10 as an output current used for correcting each of the threshold values Dmin and Dmax (hereinafter, referred to as “current sensor”) It may be detected by a first current sensor). It should be noted that the first current sensor is not required to have responsiveness like a current sensor that detects a high-frequency current flowing through the reactor 16 (for example, the reactor current IL shown in FIG. 11 above).

  In Steps S16 and S20 in FIG. 13 of the first embodiment, it is determined that an abnormality has occurred in the operating state of the power converter 10 when it has been determined that the logical sum is true for a predetermined time. May be.

  In the first embodiment, the past value of the output current Iest (for example, the value from the previous processing cycle to the processing cycle several steps before) may be stored in the storage means (for example, memory). And in step S14 of previous FIG. 13, you may correct | amend each threshold value Dmin and Dmax using the output current Iest before the last process cycle memorize | stored in the memory | storage means. This is in preparation for the concern that the calculation accuracy of each of the on-operation times Tmon and Tron will decrease and the estimation accuracy of the output current will decrease after the timing when an abnormality occurs in the operating state of the power conversion device 10.

  14p, 14n ... upper and lower arm switches, 16 ... reactor, 20 ... high voltage battery, 22 ... low voltage battery, 30 ... control circuit.

Claims (9)

Reactor (16; 46a, 46b);
Main switches (14p, 14n; 44a, 44b) for connecting a power source (20, 22) to the reactor by being turned on, supplying current from the power source to the reactor, and storing energy in the reactor; ,
When the main switch is turned off, the reactor is turned on to connect the reactor to the load (22, 20), and the energy accumulated in the reactor is released to transfer the reactor to the load. A power converter including a synchronous rectifier switch (14n, 14p; 44b, 44a) for supplying current;
Operation means (30) for performing on / off operations of the main switch and the synchronous rectification switch in a complementary manner;
Transition time detecting means (32b, 34; 37c) for detecting a switching transition time, which is a time correlated with the rate of decrease of the voltage between the terminals of the main switch after the synchronous rectifier switch is turned off by the operating means. , 34), and
The operation means complementarily turns on and off the main switch and the synchronous rectification switch so that the switching transition time detected by the transition time detection means becomes the target time.
In a situation where the main switch and the synchronous rectification switch are complementarily turned on and off by the operation means, an input voltage from the power source to the power converter and an output voltage from the power converter to the load And a threshold value calculation means for calculating a threshold value for determining an abnormality in the operating state of the power converter,
In a situation where the main switch and the synchronous rectification switch are complementarily turned on and off by the operation means, the on operation time of each of the main switch and the synchronous rectification switch set by the operation means, An abnormality determining means for determining the presence or absence of an abnormality in the operating state of the power converter based on the threshold value calculated by the threshold value calculating means;
A power conversion device comprising: The ratio of the ON operation time to the switching period of each of the main switch and the synchronous rectification switch is defined as an ON time ratio,
The operation means includes
An on-time ratio calculating means (37b) for setting the on-time ratio of each of the main switch and the synchronous rectifier switch based on a deviation between the output voltage and the target voltage;
Cycle calculation means (37e) for calculating the switching cycle of each of the main switch and the synchronous rectification switch based on a deviation between the switching transition time and the target time,
The main switch and the synchronous rectification switch are complementarily turned on and off based on the on-time ratio calculated by the on-time ratio calculating unit and the switching cycle calculated by the cycle calculating unit. The power conversion device according to claim 1. The ratio of the ON operation time to the switching period of each of the main switch and the synchronous rectification switch is defined as an ON time ratio,
The operation means includes
An on-time ratio calculating means (32a) for calculating the on-time ratio of each of the main switch and the synchronous rectification switch based on the output voltage and the input voltage;
Correction value calculating means (32d) for calculating a correction value for setting the switching transition time as the target time based on a deviation between the switching transition time and the target time;
Correction means (32e, 32f) for correcting the on-time ratio calculated by the on-time ratio calculation means with the correction value calculated by the correction value calculation means,
2. The power conversion device according to claim 1, wherein the main switch and the synchronous rectification switch are complementarily turned on and off based on the on-time ratio corrected by the correction means.   The transition time detection unit is configured to determine a time from when an off operation command is issued to the synchronous rectification switch until a voltage between the terminals of the main switch decreases to a threshold voltage due to the off operation command. It detects as time, The power converter device of any one of Claims 1-3 characterized by the above-mentioned. The main switch (14p) and the synchronous rectification switch (14n) are connected in series,
One end of the reactor (16) is connected to the connection point of the main switch and the synchronous rectification switch,
When the main switch is turned on, a closed circuit including the power source (20), the main switch, the reactor, and the load (22) is formed,
The said synchronous rectification switch is provided so that the closed circuit provided with the said load, the said synchronous rectification switch, and the said reactor may be formed by being turned on. The power converter device of Claim 1. The main switch (14n) and the synchronous rectification switch (14p) are connected in series,
One end of the reactor (16) is connected to the connection point of the main switch and the synchronous rectification switch,
The main switch is provided so that a closed circuit including the power source (22), the reactor, and the main switch is formed by being turned on,
The synchronous rectification switch is provided so that a closed circuit including the power source, the reactor, the synchronous rectification switch, and the load (20) is formed by being turned on. Item 6. The power conversion device according to any one of Items 1 to 5. The reactor is a transformer (46) having a primary winding (46a, 46b) and a secondary winding (46b, 46a) magnetically coupled to the primary winding,
The main switch (44a, 44b) and the primary winding are formed so that a closed circuit including the power source, the main switch, and the primary winding is formed when the main switch is turned on. Provided,
The synchronous rectification switch and the secondary winding are provided such that a closed circuit including the secondary winding, the synchronous rectification switch, and the load is formed when the synchronous rectification switch is turned on. The power converter according to claim 1, wherein the power converter is provided.   The threshold value calculating means includes a threshold value correcting means for increasing and correcting the threshold value when the output current flowing from the reactor to the load is large than when the output current is small. The power converter of any one of Claims. In a situation where the main switch and the synchronous rectification switch are complementarily turned on and off by the operation means, at least one of an on operation time of the main switch and an on operation time of the synchronous rectification switch, and the input Current estimation means (36; 36a) for estimating an output current flowing from the reactor to the load based on at least one of a voltage and the output voltage;
9. The power converter according to claim 8, wherein the threshold correction unit corrects the threshold to be increased when the output current estimated by the current estimation unit is large than when the estimated output current is small. .

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