JP2015165762A - power converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power converter in which the output current can be estimated, while avoiding increase in the physique and cost.SOLUTION: In a power converter 10 for transferring power between a high voltage battery 20 and a low voltage battery 22, an upper arm switch 14p and a lower arm switch 14n are turned on/off complementarily, when step-down operation is performed, so that the switching transition time becomes a target time. The switching transition time is a time elapsed after an off operation command is given to the lower arm switch 14n, before the voltage between the terminals of the upper arm switch 14p drops by an off operation command, and reaches a threshold voltage. Under a situation where the upper arm switch 14p and lower arm switch 14n are turned on/off complementarily, output current from the power converter 10 is estimated based on the on operation time of the upper arm switch 14p, and the voltage between the terminals of a reactor 16.

Description

  The present invention relates to a power conversion device.

  2. Description of the Related Art Conventionally, as can be seen in Patent Document 1 below, in a power conversion device (switching power supply device) that converts a DC input voltage into a predetermined DC voltage and outputs the same, a technique for estimating the output current of this device is known. Yes. Specifically, this device includes a current transformer provided on the input side of the device, an input voltage detection circuit that detects a secondary side voltage of the current transformer, and an output voltage detection circuit that detects an output voltage of the power converter. And a control unit. The control unit calculates the duty ratio and voltage average value of the secondary side voltage based on the secondary side voltage waveform detected by the input voltage detection circuit. The control unit estimates the output current of the power converter based on the calculated duty ratio, the voltage average value, and the output voltage detected by the output voltage detection circuit.

JP 2012-90406 A

  However, in the technique described in Patent Document 1, it is required to provide a current transformer in the power conversion device in order to estimate the output current. In this case, there is a concern that the physique and cost of the power converter increase due to an increase in the number of parts of the power converter.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a power converter that can estimate an output current while avoiding an increase in physique and cost.

  In order to achieve the above object, the present invention connects the reactor (16; 46a, 46b) and the power source (20, 22) to the reactor by being turned on, and supplies current to the reactor from the power source. Main switches (14p, 14n; 44a, 44b) for storing energy in the reactor, and the reactor is loaded (22, 20) by being turned on while the main switch is turned off. And a synchronous rectifier switch (14n, 14p; 44b, 44a) for discharging the energy stored in the reactor and supplying a current from the reactor to the load. And an operation means (30) for complementary on / off operation of the synchronous rectification switch, and the operation means Transition time detecting means for detecting a switching transition time, which is a time correlated with a rate of decrease in voltage between the terminals of the main switch after the rectifying switch is switched to the OFF state, and the operating means includes the transition The main switch and the synchronous rectification switch are complementarily turned on and off so that the switching transition time detected by the time detection means becomes the target time, and the main switch and the synchronous rectification switch are turned on by the operation means. In a situation where the ON / OFF operation is performed in a complementary manner, at least one of the ON operation time of the main switch and the ON operation time of the synchronous rectification switch, the input voltage from the power source to the power converter, and the power converter Based on at least one of the output voltages from to the load. Current estimating means for estimating an output current flowing from Torr to said load (36; 36a), characterized in that it comprises a.

  In order to reduce the switching loss (turn-on loss) when the main switch is turned on when the power conversion device is controlled in the current critical mode, the main switch after the synchronous rectification switch is turned off. It is required to grasp the voltage between terminals. The transition of the voltage between the terminals of the main switch after the synchronous rectification switch is switched to the off state changes according to the current flowing through the reactor after the synchronous rectification switch is switched to the off state. Here, the current flowing through the reactor after the synchronous rectification switch is switched to the OFF state has a correlation with the switching transition time. For this reason, by controlling the switching transition time to the optimum value, the main switch can be switched to the on state while the voltage between the terminals of the main switch is low. In view of this point, the above invention includes an operation means and a transition time detection means. Thereby, the turn-on loss of the main switch can be reduced. In addition, the power conversion device can be controlled in the current critical mode without including a current sensor that detects a current flowing through the reactor.

  Here, when the main switch and the synchronous rectifying switch are complementarily turned on and off by the operating means, the waveform of the output current (output current of the power converter) flowing from the reactor to the load is the maximum value and the minimum value of the output current. It becomes a triangular wave waveform that reciprocates repeatedly. Specifically, the output current when the output current gradually increases from the minimum value to the maximum value over time should be estimated based on both the input voltage and the output voltage, or the input voltage and the ON operation time of the main switch. Can do. On the other hand, when the output current gradually decreases from the maximum value to the minimum value over time, the output current should be estimated based on both the input voltage and the output voltage, or the output voltage and the ON operation time of the synchronous rectifier switch. Can do. Here, since the power conversion device is controlled in the current critical mode, the on-operation time of the main switch and the on-operation time of the synchronous rectification switch are determined without providing a current sensor for detecting the current flowing through the reactor. be able to. In view of these points, the present invention includes current estimation means. Thereby, in the power converter device which is not provided with the above-mentioned current sensor, the output current can be estimated.

A circuit diagram of a power converter concerning a 1st embodiment. The figure which shows the outline | summary of a pressure | voltage fall operation | movement process. The figure which shows transition of the reactor current at the time of pressure | voltage fall operation processing. The figure which shows transition of the voltage between terminals of an upper arm switch at the time of pressure | voltage fall operation processing. The figure which shows correlation with a reactor current and switching transition time. The figure which shows a switching transition time detection circuit. The figure which shows the detection method of the switching transition time at the time of pressure | voltage fall operation processing. The block diagram of the controller corresponding to step-down operation processing. The block diagram of the controller corresponding to a pressure | voltage rise operation process. The block diagram of a current estimator. The figure which shows the outline | summary of the output current estimation method at the time of a pressure | voltage fall operation process. The figure which shows the outline | summary of the output current estimation method at the time of a pressure | voltage rise operation process. The block diagram of the controller concerning 2nd Embodiment. The block diagram of the controller concerning 3rd Embodiment. The circuit diagram of the power converter device concerning 4th Embodiment. The block diagram of a current estimator. The figure which shows the outline | summary of the output current estimation method at the time of a pressure | voltage fall operation process. The figure which shows the outline | summary of the output current estimation method at the time of a pressure | voltage rise operation process. The block diagram of the current estimator concerning 5th Embodiment. The figure which shows the outline | summary of the output current estimation method at the time of a pressure | voltage fall operation process. The figure which shows the outline | summary of the output current estimation method at the time of a pressure | voltage rise operation process. The figure which shows the comparison result of the estimated value and output value of output current. The block diagram of the current estimator concerning 6th Embodiment. The figure which shows the outline | summary of the output current estimation method at the time of a pressure | voltage fall operation process. The flowchart which shows the procedure of the electric current estimation process concerning 7th Embodiment.

(First embodiment)
DESCRIPTION OF EMBODIMENTS Hereinafter, a first embodiment in which a power conversion device according to the present invention is mounted on a vehicle will be described with reference to the drawings.

  As shown in FIG. 1, the power conversion device 10 according to the present embodiment is a step-up / step-down DCDC converter (a so-called buck-boost converter). The power conversion device 10 includes first and second capacitors 12a and 12b, an upper arm switch 14p, a lower arm switch 14n, a reactor 16, and a control circuit 30. The power converter 10 transfers power between a high voltage battery 20 mounted on the vehicle and a low voltage battery 22 mounted on the vehicle. Here, the terminal voltage of the low voltage battery 22 is set lower than the terminal voltage of the high voltage battery 20. The high voltage battery 20 has a rated voltage of 48V, for example, and the low voltage battery 22 has a rated voltage of 12V, for example.

  The power conversion device 10 charges the low voltage battery 22 by performing a step-down operation process in which the output voltage of the high voltage battery 20 is stepped down and applied to the low voltage battery 22. Further, the power conversion device 10 charges the high voltage battery 20 by performing a boosting operation process in which the output voltage of the low voltage battery 22 is boosted and applied to the high voltage battery 20. In the present embodiment, when the step-down operation process is performed, the high voltage battery 20 is a power source and the low voltage battery 22 is a load. On the other hand, when the boosting operation process is performed, the low voltage battery 22 is a power source and the high voltage battery 20 is a load.

  The positive terminal of the high voltage battery 20 is connected to the first terminal T1 of the power conversion device 10, and the negative terminal of the high voltage battery 20 is connected to the second terminal T2 of the power conversion device 10. One end of the first capacitor 12a is connected to the first terminal T1, and the second terminal T2 is connected to the other end of the first capacitor 12a.

  A series connection body of an upper arm switch 14p and a lower arm switch 14n is connected in parallel to the first capacitor 12a. In the present embodiment, voltage controlled semiconductor switching elements are used as the switches 14p and 14n, and specifically, N-channel MOSFETs are used. In the figure, diodes 15p and 15n connected in antiparallel to the switches 14p and 14n indicate parasitic diodes of the switches 14p and 14n.

  The drain of the lower arm switch 14n is connected to the source of the upper arm switch 14p, and the connection point between the first capacitor 12a and the first terminal T1 is connected to the drain of the upper arm switch 14p. A connection point between the first capacitor 12a and the second terminal T2 is connected to the drain of the lower arm switch 14n.

  In the present embodiment, a capacitor (hereinafter referred to as an upper arm capacitor 18p) connected in parallel to the upper arm switch 14p indicates a parasitic capacitance of the upper arm switch 14p. A capacitor connected in parallel to the lower arm switch 14n (hereinafter referred to as a lower arm capacitor 18n) indicates a parasitic capacitance of the lower arm switch 14n.

  A series connection body of the reactor 16 and the second capacitor 12b is connected in parallel to the lower arm switch 14n. Specifically, one end of the reactor 16 is connected to a connection point between the lower arm switch 14n and the upper arm switch 14p.

  The third terminal T3 of the power converter 10 is connected to the side of the second capacitor 12b where the reactor 16 is connected. A fourth terminal T4 of the power conversion device 10 is connected to a side of the second capacitor 12b on which the lower arm switch 14n is connected. The positive terminal of the low voltage battery 22 is connected to the third terminal T3, and the negative terminal of the low voltage battery 22 is connected to the fourth terminal T4.

  The control circuit 30 is an “operation means” for operating the switches 14p and 14n. The control circuit 30 includes a controller 32, a switching transition time detection circuit 34, a current estimator 36, a first drive circuit 38p for driving the upper arm switch 14p, and a second drive circuit 38n for driving the lower arm switch 14n. Yes. In the present embodiment, each element such as the controller 32 is arranged in the single control circuit 30. However, the arrangement method of these elements is not limited to such an arrangement method.

  Subsequently, the step-down operation processing, the step-up operation processing, the details of the control circuit 30, and the output current estimation processing of the power conversion device 10 will be described.

<1. Step-down operation processing>
This process is shown in FIG. Here, FIG. 2A shows the transition of the current flowing through the reactor 16 (hereinafter, reactor current IL), and FIG. 2B is inputted from the first drive circuit 38p to the gate of the upper arm switch 14p. The transition of the first operation signal gp is shown, and FIG. 2C shows the transition of the second operation signal gn input from the second drive circuit 38n to the gate of the lower arm switch 14n. When the step-down operation process is performed, the reactor current IL shown in FIG. 2A has a positive flow direction from the connection point side of each switch 14p, 14n to the second capacitor 12b side at both ends of the reactor 16. It is defined as In the present embodiment, when the step-down operation process is performed, the upper arm switch 14p corresponds to a “main switch”, and the lower arm switch 14n corresponds to a “synchronous rectification switch”.

  As shown in FIG. 2, the upper arm switch 14p and the lower arm switch 14n are complementarily turned on and off. Specifically, the first operation signal gp is turned on and the upper arm switch 14p is turned on, and the second operation signal gn is turned off and the lower arm switch 14n is turned off. As a result, the high voltage battery 20 is connected to the reactor 16, current is supplied from the high voltage battery 20 to the reactor 16, and magnetic energy is accumulated in the reactor 16. At this time, the reactor current IL gradually increases with time.

  Thereafter, the first operation signal gp is turned off and the upper arm switch 14p is turned off, and the second operation signal gn is turned on and the lower arm switch 14n is turned on. As a result, the reactor 16 is connected to the low voltage battery 22 and the magnetic energy accumulated in the reactor 16 is released, and a current flows from the reactor 16 to the low voltage battery 22. At this time, the reactor current IL gradually decreases with time.

  By repeating such an operation, power is supplied from the high voltage battery 20 to the low voltage battery 22, and the low voltage battery 22 is charged.

  In particular, in the present embodiment, the power converter 10 is controlled in the current critical mode without providing the power converter 10 with a current sensor that detects the reactor current IL. In such a configuration, in order to reduce the turn-on loss of the upper arm switch 14p by zero voltage switching (ZVS) of the upper arm switch 14p, the reactor current IL becomes slightly negative from 0 as shown in FIG. The lower arm switch 14n is turned off.

  When the lower arm switch 14n is turned off, the capacitors 18p and 18n are charged by the reactor current IL having a slightly negative value. For this reason, as shown in FIG. 4, the potential at the connection point of the upper and lower arm switches 14p and 14n (hereinafter referred to as the target voltage Varm) with respect to the source potential of the lower arm switch 14n increases, and the output voltage of the high voltage battery 20 eventually. V1. Here, when the reactor current IL in the negative direction is larger than the optimum value, the rate at which the capacitors 18p and 18n are charged by the reactor current IL is increased, and thus the increase rate of the target voltage Varm is increased. On the other hand, when the negative reactor current IL is smaller than the optimum value, the increase rate of the target voltage Varm is low.

  The inter-terminal voltage V14p of the upper arm switch 14p (potential difference between the source and drain) is obtained by subtracting the target voltage Varm from the inter-terminal voltage V1 of the high-voltage battery 20 (input voltage of the power conversion device 10 during the step-down operation process). Value. For this reason, when the reactor current IL in the negative direction is larger than the optimum value, the rate of decrease of the inter-terminal voltage V14p of the upper arm switch 14p is increased as shown by a one-dot chain line in FIG. As a result, the time from when the second operation signal gn to the lower arm switch 14n is switched to the OFF operation command until the voltage V14p between the terminals of the upper arm switch 14p decreases to the threshold voltage Vth is shortened. In the present embodiment, this time is referred to as a switching transition time. In the present embodiment, the threshold voltage Vth is set to 10% of the inter-terminal voltage V1 of the high voltage battery 20.

  On the other hand, when the reactor current IL in the negative direction is smaller than the optimum value, the rate of decrease in the inter-terminal voltage V14p of the upper arm switch 14p is reduced as shown by the broken line in FIG. As a result, the switching transition time becomes long.

  That is, between the reactor current IL and the switching transition time, as shown in FIG. 5, when the reactor current IL has a negative value, the switching transition time becomes shorter as the absolute value of the reactor current IL becomes larger. There is a relationship. For this reason, the reactor current IL can be grasped from the switching transition time. Then, a target value of the switching transition time (hereinafter referred to as target time Ttgt) is set so that the reactor current IL becomes an optimum value, and the actual switching transition time is controlled to the target time Ttgt. Thereby, ZVS is implement | achieved and the power converter device 10 can be controlled in a current critical mode, without providing the power converter device 10 with the current sensor which detects the reactor current IL.

<2. Boost operation processing>
In the step-up operation process, ZVS of the lower arm switch 14n is realized, and the turn-on loss of the lower arm switch 14n is reduced. In the case where the boosting operation process is performed, the reactor current IL is defined as positive in the direction in which both ends of the reactor 16 flow from the second capacitor 12b side to the connection point side of the switches 14p and 14n. In the present embodiment, when the step-up operation process is performed, the lower arm switch 14n corresponds to a “main switch”, and the upper arm switch 14p corresponds to a “synchronous rectification switch”.

  During the step-up operation process, the lower arm switch 14n is turned on and the upper arm switch 14p is turned off, so that the low voltage battery 22 is connected to the reactor 16, and the low voltage battery 22 is connected to the reactor 16 Is supplied with current, and magnetic energy is accumulated in the reactor 16. Thereafter, the lower arm switch 14n is switched to the off state, and the upper arm switch 14p is switched to the on state, whereby the reactor 16 is connected to the high voltage battery 20 and the magnetic energy accumulated in the reactor 16 is released. The Thereby, a current flows from reactor 16 to high voltage battery 20. By repeating such an operation, power is supplied from the low voltage battery 22 to the high voltage battery 20, and the high voltage battery 20 is charged.

  Here, in the present embodiment, the switching transition time during the step-up operation processing is such that the voltage between the terminals of the lower arm switch 14n decreases after the first operation signal gp for the upper arm switch 14p is switched to the OFF operation command. The time until the threshold voltage Vth is reached.

<3. Details of Control Circuit 30>
Subsequently, the step-down boost operation process among the processes performed by the control circuit 30 will be described with reference to FIGS. 2 and 6 to 9.

  As shown in FIG. 6, the switching transition time detection circuit 34 includes first to fifth resistors 34a to 34e, first and second comparators 34f and 34g, and first and second XOR circuits 34h and 34i. ing.

  The first to third resistors 34a to 34c are connected in series. The drain of the upper arm switch 14p is connected to the opposite side of the both ends of the first resistor 34a from the connection point with the second resistor 34b. The source of the lower arm switch 14n is connected to the opposite side of the both ends of the third resistor 34c from the connection point with the second resistor 34b.

  The fourth resistor 34d and the fifth resistor 34e are connected in series. Of both ends of the series connection body of the resistors 34d and 34e, the connection point of the upper and lower arm switches 14p and 14n is connected to the fourth resistor 34d side, and the lower arm is connected to the fifth resistor 34e side. The source of the switch 14n is connected.

  The connection point of the first and second resistors 34a and 34b is connected to the non-inverting input terminal of the first comparator 34f, and the connection point of the fourth and fifth resistors 34d and 34e is connected to the inverting input terminal. Has been. On the other hand, the connection point of the fourth and fifth resistors 34d and 34e is connected to the non-inverting input terminal of the second comparator 34g, and the connection point of the second and third resistors 34b and 34c is connected to the inverting input terminal. Is connected.

  The output signal of the first comparator 34f is input to the first input terminal of the first XOR circuit 34h, and the second operation signal gn of the lower arm switch 14n is supplied from the controller 32 to the second input terminal of the first XOR circuit 34h. Entered. On the other hand, the output signal of the second comparator 34g is input to the first input terminal of the second XOR circuit 34i, and the first operation signal gp of the upper arm switch 14p is supplied to the second input terminal of the second XOR circuit 34i. 32. The output signal Sig1 from the first XOR circuit 34h and the output signal Sig2 from the second XOR circuit 34i are input to a transition time measuring unit 32b described later.

  Here, as shown in FIG. 7, the resistance values of the first to fifth resistors 34a to 34e are the voltage V14p between the terminals of the upper arm switch 14p after the second operation signal gn is switched to the OFF operation command. Is set so that the logic of the output signal of the first XOR circuit 34h becomes “H” during a period (time t1 to t2) until the threshold voltage Vth starts to decrease. This setting is made to detect the switching transition time during the step-down operation process. 7A shows the transition of the reactor current IL, and FIGS. 7B to 7E correspond to FIGS. 4A to 4D. FIG. 7F shows the transition of the output signal of the first comparator 34f, and FIG. 7G shows the transition of the output signal Sig1 of the first XOR circuit 34h.

  In addition, the resistance values of the first to fifth resistors 34a to 34e are equal to the threshold voltage Vth after the first operation signal gp is switched to the off operation command and the voltage across the terminals of the lower arm switch 14n starts to decrease. In the period up to, the logic of the output signal Sig2 of the second XOR circuit 34i is set to “H”. This setting is made to detect the switching transition time during the boosting operation process.

  Next, the configuration of the controller 32 will be described with reference to the block diagrams of FIGS.

  First, the configuration of the controller 32 corresponding to the step-down operation process will be described with reference to FIG.

  As illustrated, the controller 32 includes a target voltage Vtgt input from the outside of the power converter 10, a voltage V1 between terminals of the high voltage battery 20 (input voltage V1), and a voltage V2 between terminals of the low voltage battery 22 ( The circuit generates and outputs first and second operation signals gp and gn based on the output voltage V2) and the switching transition time. The controller 32 is composed mainly of a microcomputer, for example. The target voltage Vtgt is a target value of the voltage applied to the low voltage battery 22 from between the third and fourth terminals T3 and T4.

  The duty ratio calculation unit 32a calculates on-time ratios Dutyp and Duty for the upper and lower arm switches 14p and 14n based on the input voltage V1, the target voltage Vtgt, and the output voltage V2. Here, the ON time ratio is a ratio of ON operation time to one cycle of ON / OFF operation (switching cycle Tsw) of each switch. In the present embodiment, the on-time ratio takes a value from 0 to 1. In the present embodiment, the duty ratio calculation unit 32a corresponds to “on time ratio calculation means”.

  The transition time measuring unit 32b detects the pulse width of the output signal Sig1 of the first XOR circuit 34h (the time when the logic is “H”) as the switching transition time. In the present embodiment, the transition time measurement unit 32b and the switching transition time detection circuit 34 correspond to “transition time detection means”.

  The time deviation calculation unit 32c calculates a time deviation between the target time Ttgt and the switching transition time output from the transition time measurement unit 32b. Specifically, the time deviation is calculated as a value obtained by subtracting the switching transition time from the target time Ttgt. Thus, when the time deviation becomes a positive value, it indicates that the reactor current IL flowing from the second capacitor 12b side to the connection point side of each switch 14p, 14n is excessive. On the other hand, the negative time deviation indicates that the reactor current IL flowing from the second capacitor 12b side to the connection point side of each switch 14p, 14n is too small.

  Here, in the present embodiment, the target time Ttgt is a fixed value set in advance. The target time Ttgt is set based on the resonance period of the resonance circuit constituted by the inductance “L” of the reactor 16 and the capacitances of the capacitors 18p and 18n. Specifically, for example, the target time Ttgt can be set to ¼ of the resonance period. Also, the target time Ttgt may be set to about 80% of 1/4 of the resonance period in consideration of variations in the signal delay time in the switching transition time detection circuit 34 and the signal delay times in the drive circuits 38p and 38n. it can.

  The transition time control unit 32d calculates a correction value ΔD for correcting each on-time ratio Dutyp, Dutyn by proportional-integral control of the time deviation output from the time deviation calculation unit 32c. In the present embodiment, the transition time control unit 32d corresponds to “correction value calculation means”.

  The first correction unit 32e adds the correction value ΔD output from the transition time control unit 32d to the on-time ratio Dutyp for the upper arm switch 14p output from the duty ratio calculation unit 32a. On the other hand, the second correction unit 32f subtracts the correction value ΔD output from the transition time control unit 32d from the on-time ratio Duty for the lower arm switch 14n output from the duty ratio calculation unit 32a. As a result, when the reactor current IL is excessive when the time deviation is positive, the on-operation time of the lower arm switch 14n is shortened and the on-operation time of the upper arm switch 14p is extended (reactor current IL Each on-time ratio Dutyp, Dutyn is corrected so as to reduce the negative peak value. In the present embodiment, the correction units 32e and 32f correspond to “correction means”.

  The voltage deviation calculator 32g calculates a voltage deviation between the target voltage Vtgt and the output voltage V2. The voltage control unit 32h calculates a conversion coefficient for feedback control of the output voltage V2 to the target voltage Vtgt by proportional-integral control of the voltage deviation output from the voltage deviation calculation unit 32g. This conversion coefficient corresponds to the switching period Tsw of each switch 14p, 14n.

  The first on-time calculating unit 32i calculates the on-operation time Tmon for the upper arm switch 14p by multiplying the output value “Dutyp + ΔD” of the first correcting unit 32e by the conversion coefficient output from the voltage control unit 32h. . On the other hand, the second on-time calculation unit 32j multiplies the output value “Dutyp−ΔD” of the second correction unit 32f by the conversion coefficient output from the voltage control unit 32h, so that the on-operation time for the lower arm switch 14n. Calculate Tron.

  The operation signal generator 32k generates and outputs operation signals gp and gn for the upper and lower arm switches 14p and 14n based on the ON operation times Tmon and Tron output from the ON time calculators 32i and 32j. Here, in order to avoid that both the upper and lower arm switches 14p and 14n are turned on, a dead time is given to each operation signal gp and gn. The drive circuits 38p and 38n shown in FIG. 1 turn on and off the switches 14p and 14n based on the operation signals gp and gn output from the operation signal generation unit 32k.

  According to such a configuration, the switching transition time is controlled to be the target time Ttgt. That is, the reactor current IL is controlled so as to be an optimum value. Thereby, power converter 10 can be controlled in the current critical mode during the step-down operation process without detecting reactor current IL.

  Next, the configuration of the controller 32 corresponding to the boosting operation process will be described with reference to FIG. In FIG. 9, the same components as those in FIG. 8 are given the same reference numerals for the sake of convenience.

  During the boosting operation process, the voltage V2 between the terminals of the low voltage battery 22 becomes the input voltage V2 of the power converter 10, and the voltage V1 between the terminals of the high voltage battery 20 becomes the output voltage V1 of the power converter 10. In addition, the target voltage Vtgt is a target value of a voltage applied to the high voltage battery 20 from between the first and second terminals T1 and T2.

  The transition time measurement unit 32b detects the pulse width of the output signal Sig2 of the second XOR circuit 34i as a switching transition time. The voltage deviation calculation unit 32g calculates a voltage deviation between the target voltage Vtgt and the output voltage V1.

  The first correction unit 32e subtracts the correction value ΔD output from the transition time control unit 32d from the on-time ratio Dutyp for the upper arm switch 14p output from the duty ratio calculation unit 32a. On the other hand, the second correction unit 32f adds the correction value ΔD output from the transition time control unit 34d to the on-time ratio Duty for the lower arm switch 14n output from the duty ratio calculation unit 32a. As a result, when the reactor current IL has a positive time deviation, the on-operation time of the upper arm switch 14p is shortened and the on-operation time of the lower arm switch 14n is extended (reactor current IL Each on-time ratio Dutyp, Dutyn is corrected so as to reduce the negative peak value.

  According to such a configuration, the power conversion device 10 can be controlled in the current critical mode during the boosting operation process.

<4. Output current estimation processing>
The output current estimation process of the power conversion device 10 will be described with reference to FIGS. In the present embodiment, the current estimator 36 corresponds to “current estimation means”.

  The current estimator 36 estimates the output current Iest of the power converter 10 based on the inter-terminal voltage V1 of the high-voltage battery 20, the inter-terminal voltage V2 of the low-voltage battery 22, and the on operation times Tmon and Tron. This estimation method uses the fact that the waveform of the reactor current IL becomes a triangular waveform that repeatedly reciprocates the maximum value Imax and the minimum value Imin of the current by controlling the power conversion device 10 in the current critical mode. Is.

  Specifically, in this embodiment, the output current Iest is estimated by the following equation (eq1).

上式（ｅｑ１）において、「Ｉｍｉｎ」は、リアクトル電流ＩＬの最小値である。この最小値Ｉｍｉｎは、各コンデンサ１８ｐ，１８ｎのそれぞれの容量「Ｃ／２」と、リアクトル１６のインダクタンス「Ｌ」を用いると、下式（ｅｑ２）によって算出できる。

In the above equation (eq1), “Imin” is the minimum value of the reactor current IL. The minimum value Imin can be calculated by the following equation (eq2) using the capacitance “C / 2” of each of the capacitors 18p and 18n and the inductance “L” of the reactor 16.

上式（ｅｑ２）は、以下のように導かれる。詳しくは、電流臨界モード制御によってリアクトル電流ＩＬが最適値に制御されている状況において、各コンデンサ１８ｐ，１８ｎと、リアクトル１６とによって共振が生じる。この場合、リアクトル電流ＩＬが負側のピーク値となるタイミングは、リアクトル１６の端子間電圧が０となる（すなわち、対象電圧Ｖａｒｍが低電圧バッテリ２２の端子間電圧Ｖ２となる）タイミングである。このタイミングにおけるリアクトル電流Ｉｍｉｎによってリアクトル１６に蓄積されているエネルギ「１／２×Ｌ×Ｉｍｉｎ＾２」が、各コンデンサ１８ｐ，１８ｎの容量「Ｃ」を充電するために必要なエネルギ「１／２×Ｃ×（Ｖ１−Ｖ２）＾２」になるとの関係から、上式（ｅｑ２）を導くことができる。

The above equation (eq2) is derived as follows. Specifically, in the situation where the reactor current IL is controlled to the optimum value by the current critical mode control, resonance occurs between the capacitors 18p and 18n and the reactor 16. In this case, the timing at which the reactor current IL reaches the negative peak value is the timing at which the voltage between the terminals of the reactor 16 becomes 0 (that is, the target voltage Varm becomes the voltage V2 between the terminals of the low-voltage battery 22). The energy “1/2 × L × Imin ^ 2” stored in the reactor 16 by the reactor current Imin at this timing is the energy “1/2” required to charge the capacitance “C” of each capacitor 18p, 18n. From the relationship that “× C × (V1−V2) ^ 2”, the above equation (eq2) can be derived.

  Here, during the step-down operation process, the current amplitude ΔIpp in the above equation (eq1) can be calculated by the following equation (eq3).

上式（ｅｑ３）の中辺は、出力電流が最小値Ｉｍｉｎから最大値Ｉｍａｘへと時間経過とともに漸増する場合の出力電流が、上アームスイッチ１４ｐのオン操作時間Ｔｍｏｎと、リアクトル１６の端子間電圧とに基づき推定できることに基づく。この場合におけるリアクトル１６の端子間電圧は、高電圧バッテリ２０の端子間電圧Ｖ１から低電圧バッテリ２２の端子間電圧Ｖ２を減算した値として算出することができる。

The middle side of the above equation (eq3) indicates that the output current when the output current gradually increases from the minimum value Imin to the maximum value Imax over time, the on-operation time Tmon of the upper arm switch 14p, and the voltage between the terminals of the reactor 16 Based on what can be estimated based on. In this case, the inter-terminal voltage of the reactor 16 can be calculated as a value obtained by subtracting the inter-terminal voltage V2 of the low-voltage battery 22 from the inter-terminal voltage V1 of the high-voltage battery 20.

  On the other hand, the right side of the above equation (eq3) shows that when the output current gradually decreases from the maximum value Imax to the minimum value Imin, the output current is between the ON operation time Tron of the lower arm switch 14n and the terminal of the reactor 16. Based on what can be estimated based on voltage. In this case, the terminal voltage of the reactor 16 is the terminal voltage V <b> 2 of the low voltage battery 22.

  FIG. 11 shows an example of the output current estimation process during the step-down operation process. In FIG. 11, the dead time DT set between the on-operation times Tmon and Tron is ignored. This is because in the present embodiment, it is assumed that the influence of the dead time DT on the estimation of the output current is small.

  As shown in the figure, in the present embodiment, both the period in which the output current gradually increases (time t1 to t2, t3 to t4) and the period in which the output current gradually decreases (time t2 to t3, t4 to t5). The output current Iest is estimated. Here, for example, the output current Iest may be estimated each time (each processing cycle) by calculating the current amplitude ΔIpp and the minimum value Imin each time (specifically, every processing cycle in the control circuit 30). Specifically, the output current Iest may be estimated every time the controller 32 newly calculates the ON operation times Tmon and Tron.

  Returning to FIG. 10, the current amplitude ΔIpp can be calculated by the following equation (eq4) during the boosting operation process.

上式（ｅｑ４）の中辺は、出力電流が最小値Ｉｍｉｎから最大値Ｉｍａｘへと時間経過とともに漸増する場合の出力電流が、下アームスイッチ１４ｎのオン操作時間Ｔｒｏｎと、リアクトル１６の端子間電圧とに基づき推定できることに基づく。一方、上式（ｅｑ４）の右辺は、出力電流が最大値Ｉｍａｘから最小値Ｉｍｉｎへと時間経過とともに漸減する場合の出力電流が、上アームスイッチ１４ｐのオン操作時間Ｔｍｏｎと、リアクトル１６の端子間電圧とに基づき推定できることに基づく。

The middle side of the above equation (eq4) indicates that the output current when the output current gradually increases from the minimum value Imin to the maximum value Imax with the passage of time is the ON operation time Tron of the lower arm switch 14n and the voltage across the terminals of the reactor 16 Based on what can be estimated based on. On the other hand, the right side of the above equation (eq4) shows that the output current when the output current gradually decreases with time from the maximum value Imax to the minimum value Imin is between the ON operation time Tmon of the upper arm switch 14p and the terminal of the reactor 16 Based on what can be estimated based on voltage.

  FIG. 12 shows an example of the output current estimation process during the boosting operation process.

  As shown in the figure, in the present embodiment, both the period in which the output current gradually increases (time t1 to t2, t3 to t4) and the period in which the output current gradually decreases (time t2 to t3, t4 to t5). The output current Iest is estimated.

  According to this embodiment described above, the output current of the power conversion device 10 can be estimated in the power conversion device 10 that does not include a current sensor that detects the reactor current IL. The estimated output current Iest is output to, for example, an external device (for example, a control circuit higher than the control circuit 30) different from the power conversion device 10.

(Second Embodiment)
Hereinafter, the second embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  In the present embodiment, the configuration of the controller is changed.

  FIG. 13 shows the configuration of the controller according to this embodiment. In FIG. 13, the same components as those shown in FIG. 8 are given the same reference numerals for the sake of convenience. Further, in the present embodiment, description will be given taking the step-down operation process as an example.

  The controller 32 includes a voltage controller 32l, a selector 32m, a current deviation calculator 32n, and a current controller 32o. The controller 32 further uses the output current Iest estimated by the current estimator 36 to generate the operation signals gp and gn.

  Specifically, the voltage control unit 32l calculates the first target current I1tgt by proportional-integral control of the voltage deviation output from the voltage deviation calculation unit 32g. In the present embodiment, the voltage control unit 32l corresponds to “first target value calculation means”.

  The selection unit 32m selects the smaller one of the first target current I1tgt output from the voltage control unit 32l and the second target current I2tgt input from the outside of the power converter 10 as the final target current Itgt. And output. Here, the second target current Itgt2 is set to, for example, the upper limit value of the output current that can maintain the reliability of the power conversion device 10. In the present embodiment, the selection unit 32m corresponds to “final target value calculation unit”.

  The current deviation calculation unit 32n calculates a deviation between the target current Itgt output from the selection unit 32m and the output current Iest estimated by the current estimator 36. The current control unit 32o calculates a conversion coefficient by proportional-integral control of the deviation output from the current deviation calculation unit 32n. This conversion coefficient corresponds to the switching period of each switch 14p, 14n. The calculated conversion coefficient is input to each of the on-time calculation units 32i and 32j.

  According to such a configuration, when the output current of the power converter 10 exceeds the second target current I2tgt, the output current of the power converter 10 is limited by the target current I2tgt. Incidentally, the configuration shown in FIG. 13 can be similarly applied to the boosting operation process.

  According to the present embodiment described above, the same effect as that obtained in the first embodiment can be obtained.

(Third embodiment)
Hereinafter, the third embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  In the present embodiment, the configuration of the controller is changed.

  FIG. 14 shows a configuration of the controller 37 according to the present embodiment. In the present embodiment, the step-down operation process will be described as an example.

  As illustrated, the voltage deviation calculation unit 37a calculates a voltage deviation between the target voltage Vtgt input from the outside and the output voltage V2. The voltage deviation calculation unit 37a has the same configuration as the voltage deviation calculation unit 32g of the first embodiment.

  The voltage control unit 37b calculates the on-time ratios Dutyp and Duty for the upper and lower arm switches 14p and 14n based on the voltage deviation output from the voltage deviation calculation unit 37a. In the present embodiment, the voltage control unit 37b corresponds to an “on time ratio calculation unit”.

  The transition time measurement unit 37c and the time deviation calculation unit 37d have the same configuration as the transition time measurement unit 32b and the time deviation calculation unit 32c of the first embodiment.

  The transition time control unit 37e calculates a switching cycle Tsw for each of the switches 14p and 14n by proportional-integral control of the time deviation output from the time deviation calculation unit 37d. As a result, when the reactor current IL is excessive when the time deviation is a positive value, the switching period is shortened to decrease the reactor current IL. On the other hand, when the reactor current IL is excessively small, the switching period is extended to increase the reactor current IL. In the present embodiment, the transition time control unit 37e corresponds to “period calculation means”.

  The on-time calculation unit 37f multiplies each on-time ratio Dutyp, Dutyn output from the voltage control unit 37b by the switching period Tsw output from the transition time control unit 37e, thereby obtaining each on-operation time Tmon, Tron. Is calculated. The operation signal generation unit 37g has the same configuration as the previous operation signal generation unit 32k.

  Incidentally, the configuration shown in FIG. 14 can be similarly applied to the boosting operation process.

  According to the present embodiment described above, the same effect as that obtained in the first embodiment can be obtained.

(Fourth embodiment)
Hereinafter, the fourth embodiment will be described with reference to the drawings with a focus on differences from the third embodiment.

  In this embodiment, a flyback converter is used as a power converter.

  FIG. 15 shows a configuration of the power converter according to the present embodiment. In FIG. 15, the same components as those shown in FIG. 1 are given the same reference numerals for the sake of convenience.

  As shown in FIG. 15, the power conversion device 40 includes first and second capacitors 42 a and 42 b, a first switch 44 a, a second switch 44 b, a transformer 46, and the control circuit 30. The power conversion device 40 transfers power between the batteries 20 and 22 while electrically insulating the high voltage battery 20 and the low voltage battery 22.

  One end of the first capacitor 42a is connected to the first terminal T1 of the power conversion device 10, and the second terminal T2 is connected to the other end of the first capacitor 42a. A series connection body of a first switch 44 a and a first winding 46 a constituting the transformer 46 is connected in parallel to the first capacitor 42 a. In the present embodiment, voltage-controlled semiconductor switching elements are used as the switches 44p and 44n, and specifically, N-channel MOSFETs are used. In the figure, diodes 45p and 45n connected in antiparallel to the switches 44p and 44n are parasitic diodes of the switches 44p and 44n. In the present embodiment, the capacitor 48a connected in parallel to the first switch 44a indicates the parasitic capacitance of the first switch 44a. A capacitor 48b connected in parallel to the second switch 44b indicates the parasitic capacitance of the second switch 44b. In the present embodiment, the capacitance of each of the capacitors 48a and 48b is “C / 2”.

  A series connection body of a second switch 44b and a second capacitor 42b is connected in parallel to the second winding 46b constituting the transformer 46. The third terminal T3 of the power conversion device 10 is connected to the side of the second capacitor 42b where the second switch 44b is connected. The 4th terminal T4 of the power converter device 10 is connected to the side where the 2nd coil | winding 46b was connected among the both ends of the 2nd capacitor | condenser 42b. Here, in the present embodiment, the turn ratio “N1 / N2 = RL”, which is the ratio of the turn “N1” of the first winding 46a to the turn “N2” of the second winding 46b, is set to a value greater than 1. Has been.

  Subsequently, the step-down operation processing according to the present embodiment will be described. In the step-down operation process, the first winding 46a corresponds to the “primary winding”, and the second winding 46b corresponds to the “secondary winding”. The first switch 44a corresponds to a “main switch”, and the second switch 44b corresponds to a “synchronous rectification switch”.

  The first switch 44a and the second switch 44b are complementarily turned on and off. Specifically, the first operation signal gp is turned on, and the first switch 44a is turned on. The second operation signal gn is turned off, and the second switch 44b is turned off. As a result, the high voltage battery 20 is connected to the first winding 46 a, current is supplied from the high voltage battery 20 to the first winding 46 a, and magnetic energy is accumulated in the transformer 46.

  Thereafter, the first operation signal gp is turned off and the first switch 44a is turned off, and the second operation signal gn is turned on and the second switch 44b is turned on. As a result, the second winding 46b is connected to the low voltage battery 22 and the magnetic energy accumulated in the transformer 46 is released, and a current flows from the second winding 46b to the low voltage battery 22. By repeating such an operation, power is supplied from the high voltage battery 20 to the low voltage battery 22, and the low voltage battery 22 is charged.

  Next, the boosting operation process will be described. In the step-up operation process, the second winding 46b corresponds to the “primary winding”, and the first winding 46a corresponds to the “secondary winding”. The second switch 44b corresponds to a “main switch”, and the first switch 44a corresponds to a “synchronous rectification switch”.

  During the step-up operation process, the second switch 44b is turned on and the first switch 44p is turned off, whereby the low voltage battery 22 is connected to the second winding 46b, and the low voltage battery 22 is turned on. Current is supplied to the second winding 46b, and magnetic energy is accumulated in the transformer 46. Thereafter, the second switch 44b is switched to the off state, and the first switch 44a is switched to the on state, whereby the first winding 46a is connected to the high voltage battery 20 and the magnetic energy stored in the transformer 46 is stored. Is released. As a result, a current flows from the first winding 46 a to the high voltage battery 20. By repeating such an operation, power is supplied from the low voltage battery 22 to the high voltage battery 20, and the high voltage battery 20 is charged.

  The control circuit 30 includes first and second drive circuits 50a and 50b. The first drive circuit 50a turns on / off the first switch 44a based on the first operation signal gp output from the controller 37. The second drive circuit 50b turns on / off the second switch 44b based on the second operation signal gn output from the controller 37.

  The switching transition time detection circuit 34 receives the voltage between the terminals of the first switch 44a and the voltage between the terminals of the second switch 44b. Here, in order to detect the voltage between the terminals of the second switch 44b, the path connecting the both ends of the second switch 44b and the switching transition time detection circuit 34 is actually connected to the second switch 44b and the switching transition time. An insulating circuit capable of transmitting a signal between the detection circuit 34 and the detection circuit 34 is provided. Also, an insulating circuit is provided in a path for inputting the inter-terminal voltage V <b> 2 of the low voltage battery 22 to the controller 37.

  In the present embodiment, the switching transition time detection circuit 34 decreases the voltage between the terminals of the first switch 44a after the second operation signal gn for the second switch 44b is switched to the OFF operation command during the step-down operation process. In the period until the threshold voltage Vth is reached, the output signal Sig1 of logic “H” is output. The control mode during the step-down operation process can be realized by the configuration shown in FIG.

  According to such a configuration, similarly to the first embodiment, the switching transition time is controlled to the target time Ttgt. As a result, the power conversion device 40 can be controlled in the current critical mode without providing the power conversion device 40 with a current sensor that detects the reactor current IL.

  Incidentally, the configuration of the present embodiment can be similarly applied to the boosting operation process. Here, the switching transition time detection circuit 34 reduces the threshold voltage when the first operation signal gp for the first switch 44a is switched to the OFF operation command during the step-up operation process, and the voltage across the terminals of the second switch 44b decreases. In the period until the voltage Vth is reached, the output signal Sig2 of logic “H” is output. The control mode during the boosting operation process can be realized by a configuration according to the configuration shown in FIG.

  Next, the output current estimation process according to this embodiment will be described.

  As illustrated in FIG. 16, the current estimator 36 a estimates the output current Iest of the power conversion device 40 during the step-down operation process and the step-up operation process. Specifically, during the step-down operation process, based on the voltage V2 between the terminals of the low-voltage battery 22, the ON operation time Tron of the second switch 44b, and the switching cycle Tsw output from the transition time control unit 37e of FIG. The output current Iest is estimated by the following equation (eq5).

ここで、上式（ｅｑ５）の「Ｌ２」は、第２巻線４６ｂの自己インダクタンスを示す。また、本実施形態では、上式（ｅｑ５）の「Ｔｍｏｎ＋Ｔｒｏｎ」としてスイッチング周期Ｔｓｗを用いる。上式（ｅｑ５）は、図１７に示すように、第２スイッチ４４ｂのオン操作時間Ｔｒｏｎにおいて第２巻線４６ｂに流れる電流の時間積分値を、スイッチング周期Ｔｓｗで平均した値が出力電流となることから導かれる。なお、本実施形態では、２次巻線４６ｂに流れる負電流が出力電流Ｉｅｓｔの推定の及ぼす影響が微小であるとして、負電流の影響を無視する。また、図１７では、出力電流が漸増する期間（時刻ｔ１〜ｔ２，ｔ３〜ｔ４）におけるリアクトル電流として、第１巻線４６ａに流れる電流を示し、出力電流が漸減する期間（時刻ｔ２〜ｔ３，ｔ４〜ｔ５）におけるリアクトル電流として、第２巻線４６ｂに流れる電流を示している。

Here, “L2” in the above equation (eq5) indicates the self-inductance of the second winding 46b. In the present embodiment, the switching cycle Tsw is used as “Tmon + Tron” in the above equation (eq5). As shown in FIG. 17, the above equation (eq5) is obtained by averaging the time integral value of the current flowing through the second winding 46b during the ON operation time Tron of the second switch 44b in the switching cycle Tsw. Derived from that. In the present embodiment, the influence of the negative current is ignored on the assumption that the negative current flowing through the secondary winding 46b has a small influence on the estimation of the output current Iest. In FIG. 17, the current flowing through the first winding 46a is shown as the reactor current in the period in which the output current gradually increases (time t1 to t2, t3 to t4), and the period in which the output current gradually decreases (time t2 to t3, time t2 to t3). The current flowing through the second winding 46b is shown as the reactor current at t4 to t5).

  Incidentally, the input current Iin of the power conversion device 10 during the step-down operation process can be calculated by the following equation (eq6).

一方、昇圧動作処理時においては、高電圧バッテリ２０の端子間電圧Ｖ１、第１スイッチ４４ａのオン操作時間Ｔｍｏｎ、及びスイッチング周期Ｔｓｗに基づき、下式（ｅｑ７）によって出力電流Ｉｅｓｔを推定する。

On the other hand, during the boosting operation process, the output current Iest is estimated by the following equation (eq7) based on the voltage V1 between the terminals of the high-voltage battery 20, the ON operation time Tmon of the first switch 44a, and the switching cycle Tsw.

ここで、上式（ｅｑ７）の「Ｌ１」は、第１巻線４６ａの自己インダクタンスを示す。上式（ｅｑ７）は、図１８に示すように、第１スイッチ４４ａのオン操作時間Ｔｍｏｎにおいて第１巻線４６ａに流れる電流の時間積分値を、スイッチング周期Ｔｓｗで平均した値が出力電流となることから導かれる。なお、図１８では、出力電流が漸増する期間（時刻ｔ１〜ｔ２，ｔ３〜ｔ４）におけるリアクトル電流として、第２巻線４６ｂに流れる電流を示し、出力電流が漸減する期間（時刻ｔ２〜ｔ３，ｔ４〜ｔ５）におけるリアクトル電流として、第１巻線４６ａに流れる電流を示している。

Here, “L1” in the above equation (eq7) indicates the self-inductance of the first winding 46a. In the above equation (eq7), as shown in FIG. 18, the value obtained by averaging the time integral value of the current flowing through the first winding 46a during the ON operation time Tmon of the first switch 44a in the switching cycle Tsw is the output current. Derived from that. In FIG. 18, the current flowing through the second winding 46b is shown as the reactor current in the period in which the output current gradually increases (time t1 to t2, t3 to t4), and the period in which the output current gradually decreases (time t2 to t3). The current flowing through the first winding 46a is shown as the reactor current at t4 to t5).

  Incidentally, the input current Iin of the power conversion device 10 during the boosting operation process can be calculated by the following equation (eq8).

以上説明した本実施形態によっても、上記第１の実施形態で得られる効果と同様の効果を得ることができる。

According to the present embodiment described above, the same effect as that obtained in the first embodiment can be obtained.

(Fifth embodiment)
Hereinafter, the fifth embodiment will be described with reference to the drawings with a focus on differences from the first to third embodiments. In the first to third embodiments, the output current is estimated when the resonance time TLC of the LC resonance circuit at the dead time DT given to the operation signals gp and gn is sufficiently small to be negligible with respect to the switching period Tsw. The method has been described (see FIG. 10 above). In the present embodiment, an output current estimation method when the resonance time TLC cannot be ignored with respect to the switching period Tsw will be described.

  Here, the situation where the resonance time TLC cannot be ignored occurs when the output current (load current) of the power converter 10 becomes small. Specifically, when the load current is reduced, the charging time of the reactor 16 is shortened with respect to the resonance time TLC. As a result, the resonance time TLC during the dead time DT cannot be ignored with respect to the switching period Tsw, and the estimation accuracy of the output current decreases.

  Incidentally, the resonance time TLC is, for example, in the step-down operation process, after the reactor current IL becomes a negative current, the time differential value dIL / dt of the reactor current IL becomes 0 and the upper arm switch 14p is turned on. It is time until.

  The output current estimation process according to the present embodiment will be described with reference to FIG. The current estimator 36 uses the above equations (eq1), (eq2) based on the inter-terminal voltage V1 of the high-voltage battery 20, the inter-terminal voltage V2 of the low-voltage battery 22, and the first ON operation time Tpon during the step-down operation process. ) And the following equation (eq9), the output current Iest of the power converter 10 is estimated. Here, the first on operation time Tpon is a time obtained by subtracting the dead time DT from the on operation time Tmon of the upper arm switch 14p. In the present embodiment, the first on operation time Tpon is calculated based on the dead time DT calculated from the operation signals gp and gn and the on operation time Tmon for the upper arm switch 14p.

一方、昇圧動作処理時においては、高電圧バッテリ２０の端子間電圧Ｖ１、低電圧バッテリ２２の端子間電圧Ｖ２、及び第２オン操作時間Ｔｎｏｎに基づき、上式（ｅｑ１），（ｅｑ２）及び下式（ｅｑ１０）によって出力電流Ｉｅｓｔを推定する。ここで、第２オン操作時間Ｔｎｏｎは、下アームスイッチ１４ｎのオン操作時間ＴｒｏｎからデッドタイムＤＴを減算した時間である。本実施形態では、第２オン操作時間Ｔｎｏｎを、各操作信号ｇｐ，ｇｎから算出されたデッドタイムＤＴと、下アームスイッチ１４ｎに対するオン操作時間Ｔｒｏｎとに基づき算出する。

On the other hand, during the step-up operation process, the above equations (eq1), (eq2) and the following are calculated based on the inter-terminal voltage V1 of the high-voltage battery 20, the inter-terminal voltage V2 of the low-voltage battery 22, and the second on operation time Tnon. The output current Iest is estimated by the equation (eq10). Here, the second on operation time Tnon is a time obtained by subtracting the dead time DT from the on operation time Tron of the lower arm switch 14n. In the present embodiment, the second on operation time Tnon is calculated based on the dead time DT calculated from the operation signals gp and gn and the on operation time Tron for the lower arm switch 14n.

以下、図２０及び図２１を用いて、上式（ｅｑ９），（ｅｑ１０）について説明する。まず、図２０を用いて、降圧動作処理時に対応する上式（ｅｑ９）について説明する。ここで、図２０（ａ）〜（ｄ）は、先の図２（ａ），図４（ａ），（ｃ），（ｄ）に対応している。

Hereinafter, the above equations (eq9) and (eq10) will be described with reference to FIGS. First, the above equation (eq9) corresponding to the step-down operation process will be described with reference to FIG. Here, FIGS. 20A to 20D correspond to FIGS. 2A, 4A, 4C, and 4D.

  As illustrated, in period 1 in which the upper arm switch 14p is turned on, the reactor current IL increases monotonously. For this reason, the maximum value Imax of the output current can be expressed by the following equation (eq11).

下アームスイッチ１４ｎがオン操作される期間２，３においては、リアクトル電流ＩＬが単調減少する。また、デッドタイムＤＴである期間４においては、リアクトル１６と、各コンデンサ１８ｐ，１８ｎとの間でＬＣ共振が生じる。この共振現象に基づいて、出力電流の最小値Ｉｍｉｎを上式（ｅｑ２）によって表すことができる。電流振幅ΔＩｐｐは、出力電流の最大値Ｉｍａｘから最小値Ｉｍｉｎを減算した値である。このため、上式（ｅｑ１１），（ｅｑ２）から上式（ｅｑ９）を導くことができる。

In periods 2 and 3 in which the lower arm switch 14n is turned on, the reactor current IL decreases monotonously. In the period 4 which is the dead time DT, LC resonance occurs between the reactor 16 and the capacitors 18p and 18n. Based on this resonance phenomenon, the minimum value Imin of the output current can be expressed by the above equation (eq2). The current amplitude ΔIpp is a value obtained by subtracting the minimum value Imin from the maximum value Imax of the output current. For this reason, the above equation (eq9) can be derived from the above equations (eq11) and (eq2).

  Next, the above equation (eq10) corresponding to the boosting operation process will be described with reference to FIG. Here, FIGS. 21A to 21D correspond to FIGS. 20A to 20D. In addition, reactor current IL shown to Fig.21 (a) defines the direction which flows to the connection point side of each switch 14p and 14n from the 2nd capacitor | condenser 12b side among the both ends of the reactor 16 as positive.

  As illustrated, in period 1 in which the lower arm switch 14n is turned on, the reactor current IL increases monotonously. For this reason, the maximum value Imax of the output current can be expressed by the following equation (eq12).

上アームスイッチ１４ｐがオン操作される期間２，３においては、リアクトル電流ＩＬが単調減少する。また、デッドタイムＤＴである期間４においては、リアクトル１６と、各コンデンサ１８ｐ，１８ｎとの間でＬＣ共振が生じる。「ΔＩｐｐ＝Ｉｍａｘ−Ｉｍｉｎ」の関係が成立するため、上式（ｅｑ１２），（ｅｑ２）から、上式（ｅｑ１０）を導くことができる。

In periods 2 and 3 in which the upper arm switch 14p is turned on, the reactor current IL decreases monotonously. In the period 4 which is the dead time DT, LC resonance occurs between the reactor 16 and the capacitors 18p and 18n. Since the relationship of “ΔIpp = Imax−Imin” is established, the above equation (eq10) can be derived from the above equations (eq12) and (eq2).

  FIG. 22 shows an estimation result and an actual measurement result of the output current according to the present embodiment. Here, FIG. 22 shows a result of the step-down operation process when the load current is low. As shown in the figure, according to the present embodiment, the output current can be accurately estimated even when the load current is low.

  Incidentally, if the inductance L of the reactor 16 is large or the electrostatic capacitance C of each capacitor 18p, 18n is small, the minimum value Imin approaches 0, so the above equations (eq9), (eq10) Get closer to.

  According to the present embodiment described above, it is possible to improve the estimation accuracy of the output current when the load current is low.

(Sixth embodiment)
Hereinafter, the sixth embodiment will be described with reference to the drawings with a focus on differences from the fourth embodiment. In the fourth embodiment, the output current estimation method when the resonance time during the dead time DT is sufficiently small to be negligible with respect to the switching period Tsw has been described (see FIG. 16 above). In the present embodiment, an output current estimation method when the resonance time cannot be ignored with respect to the switching period Tsw will be described.

  The output current estimation process according to this embodiment will be described with reference to FIG. During the step-down operation process, the current estimator 36a uses the above equation (eq2) based on the inter-terminal voltage V1 of the high-voltage battery 20, the inter-terminal voltage V2 of the low-voltage battery 22, the first ON operation time T1on, and the switching cycle Tsw. ) And the following equation (eq13), the output current Iest of the power converter 10 is estimated. Here, the first on operation time T1on is a time obtained by subtracting the dead time DT from the on operation time Tmon of the first switch 44a. In the present embodiment, the first on operation time T1on is calculated based on the dead time DT calculated from the operation signals gp and gn and the on operation time Tmon for the first switch 44a.

一方、昇圧動作処理時においては、高電圧バッテリ２０の端子間電圧Ｖ１、低電圧バッテリ２２の端子間電圧Ｖ２、第２オン操作時間Ｔ２ｏｎ、及びスイッチング周期Ｔｓｗに基づき、上式（ｅｑ２）及び下式（ｅｑ１４）によって出力電流Ｉｅｓｔを推定する。ここで、第２オン操作時間Ｔ２ｏｎは、第２スイッチ４４ｂのオン操作時間ＴｒｏｎからデッドタイムＤＴを減算した時間である。本実施形態では、第２オン操作時間Ｔ２ｏｎを、各操作信号ｇｐ，ｇｎから算出されたデッドタイムＤＴと、第２スイッチ４４ｂに対するオン操作時間Ｔｒｏｎとに基づき算出する。

On the other hand, at the time of the boosting operation process, the above equation (eq2) and lower The output current Iest is estimated by the equation (eq14). Here, the second on operation time T2on is a time obtained by subtracting the dead time DT from the on operation time Tron of the second switch 44b. In the present embodiment, the second on operation time T2on is calculated based on the dead time DT calculated from the operation signals gp and gn and the on operation time Tron for the second switch 44b.

以下、図２４を用いて、上式（ｅｑ１３），（ｅｑ１４）について説明する。まず、図２４を用いて、降圧動作処理時に対応する上式（ｅｑ１３）について説明する。なお、図２４（ａ）は、先の図１７に対応し、図２４（ｂ），（ｃ）は、先の図２０（ｃ），（ｄ）に対応している。

Hereinafter, the above equations (eq13) and (eq14) will be described with reference to FIG. First, the above equation (eq13) corresponding to the step-down operation process will be described with reference to FIG. 24A corresponds to the previous FIG. 17, and FIGS. 24B and 24C correspond to the previous FIGS. 20C and 20D.

  In the step-down operation process, the average value of the input current can be expressed by the following equation (eq15).

上式（ｅｑ１５）において、「Ｔｍｏｎ＝ＤＴ＋Ｔ１ｏｎ」の関係が成立する。ここで、電力変換装置１０の入出力電力が一定であるとの関係から、下式（ｅｑ１６）が導かれる。

In the above equation (eq15), the relationship “Tmon = DT + T1on” is established. Here, the following expression (eq16) is derived from the relationship that the input / output power of the power conversion device 10 is constant.

上式（ｅｑ１５），（ｅｑ１６）から上式（ｅｑ１３）を導くことができる。

The above equation (eq13) can be derived from the above equations (eq15) and (eq16).

  Next, the above equation (eq14) corresponding to the boosting operation process will be described. During the boosting operation, the average value of the input current can be expressed by the following equation (eq17).

上式（ｅｑ１７）において、「Ｔｒｏｎ＝ＤＴ＋Ｔ２ｏｎ」の関係が成立する。ここで、上式（ｅｑ１７），（ｅｑ１６）から上式（ｅｑ１４）が導かれる。なお、上式（ｅｑ１３），（ｅｑ１４）では、各巻線４６ａ，４６ｂに流れる負電流を考慮したが、負電流が出力電流Ｉｅｓｔの推定の及ぼす影響が微小であるとして、負電流の影響を無視してもよい。具体的には例えば、上式（ｅｑ１３），（ｅｑ１４）において最小値Ｉｍｉｎを０とすればよい。

In the above equation (eq17), the relationship “Tron = DT + T2on” is established. Here, the above equation (eq14) is derived from the above equations (eq17) and (eq16). In the above equations (eq13) and (eq14), the negative current flowing through each of the windings 46a and 46b is considered. However, the influence of the negative current is neglected because the influence of the negative current on the estimation of the output current Iest is very small. May be. Specifically, for example, the minimum value Imin may be set to 0 in the above equations (eq13) and (eq14).

  According to the present embodiment described above, it is possible to improve the estimation accuracy of the output current when the load current is low.

(Seventh embodiment)
Hereinafter, the seventh embodiment will be described with reference to the drawings with a focus on differences from the fifth embodiment. In this embodiment, a current estimation formula is selected based on the load current.

  FIG. 25 shows a procedure of current estimation processing during the step-down operation processing according to the present embodiment. This process is repeatedly executed by the current estimator 36 at a predetermined cycle, for example.

  In this series of processes, first, in step S10, it is determined whether or not the load current set value Iload is equal to or less than a specified current Ith that is greater than zero. This process is a process for determining whether or not the load current is low. Note that the load current set value Iload may be, for example, the estimated output current Iest or the first target current I1tgt output from the voltage control unit 32l of FIG.

  If a negative determination is made in step S10, the process proceeds to step S11, and the output current Iest is estimated using the above equations (eq1), (eq2), and (eq3).

  On the other hand, if an affirmative determination is made in step S10, the process proceeds to step S12, and the output current Iest is estimated using the above equations (eq1), (eq2), and (eq9).

  It should be noted that the selection method according to the present embodiment can be similarly applied to the boosting operation process. Specifically, the process of step S11 may be a process of estimating the output current Iest using the above equations (eq1), (eq2), and (eq4). Moreover, what is necessary is just to make the process of said step S12 the process which estimates the output electric current Iest using the said Formula (eq1), (eq2), (eq10).

  Thus, according to the present embodiment, the current estimation equation can be changed according to the load current.

(Other embodiments)
Each of the above embodiments may be modified as follows.

  The switching transition time is not limited to that exemplified in the first embodiment. For example, in the step-down operation process, after the second operation signal gn for the lower arm switch 14n is switched to the OFF operation command, the timing at which the voltage between the terminals of the switch 14n rises to the specified voltage is set to the switching transition time. It is good also as timing start timing. Even at the switching transition time thus detected, it is possible to grasp the rate of decrease in the voltage between the terminals of the upper arm switch 14p after the lower arm switch 14n is switched to the OFF state. For this reason, the turn-off loss of the upper arm switch 14p can be reduced by ZVS.

  In the first embodiment, the average value of the reactor current IL is estimated as the output current Iest. However, the present invention is not limited to this. For example, the peak value “Imin + ΔIpp” of the reactor current IL may be estimated as the output current Iest.

  In FIG. 11 of the first embodiment, the output current Iest may be estimated only in one of the period in which the output current gradually increases and the period in which the output current gradually decreases. The same applies to the current estimation during the boosting operation process.

  In the first embodiment, the input current of the power conversion device 10 may be estimated based on the estimated output current Iest. Specifically, when the step-down operation process is described as an example, the conversion efficiency η of the power conversion device 10, the voltage V1 between the terminals of the high voltage battery 20, the voltage V2 between the terminals of the low voltage battery 22, and the output current Iest are expressed as follows. By using the following equation (eq18), the input current I1 can be estimated.

さらに、下式（ｅｑ１９）を用いて、降圧動作処理時における電力変換装置１０の入力電力Ｐ１を推定してもよい。

Furthermore, you may estimate the input electric power P1 of the power converter device 10 at the time of a pressure | voltage fall operation process using the following Formula (eq19).

なお、上式（ｅｑ１８），（ｅｑ１９）において、変換効率ηは、固定値（例えば１）に設定したり、出力電流Ｉｅｓｔに基づきマップ等で補正したりしてもよい。

In the above equations (eq18) and (eq19), the conversion efficiency η may be set to a fixed value (for example, 1) or may be corrected with a map or the like based on the output current Iest.

  -In the said 1st Embodiment, you may make the power converter device 10 shown in FIG. 1 function only as a buck converter, or may function only as a boost converter.

  The main switch and the synchronous rectification switch are not limited to N-channel MOSFETs, but may be other voltage-controlled semiconductor switching elements (for example, IGBT).

  In the first embodiment, the capacitance corresponding to each of the switches 14p and 14n is not limited to the same value “C / 2”, but may be different values. In this case, the capacitance C in the calculation of the minimum value Imin in the current estimator 36 is a value obtained by adding the capacitance corresponding to the upper arm switch 14p and the capacitance corresponding to the lower arm switch 14n. A snubber circuit including a capacitor (passive element) may be connected in parallel to each of the switches 14p and 14n. In this case, in the calculation of the minimum value Imin in the current estimator 36, the capacity of the snubber circuit is added to the capacity C.

  In the estimation of the output current in the first embodiment, the minimum value Imin may not be calculated for each processing cycle, and the minimum value Imin may be a fixed value. Specifically, for example, the minimum value Imin may be set to the median value of the minimum output current that can be taken by the mass-produced power converter 10. In this case, if the minimum value Imin is small, the minimum value Imin may be set to “0”.

  -In the said 6th Embodiment, you may employ | adopt the structure which selects the current estimation method demonstrated in the said 4th, 5th embodiment based on load current.

  14p, 14n ... upper and lower arm switches, 16 ... reactor, 20 ... high voltage battery, 22 ... low voltage battery, 30 ... control circuit.

Claims (12)

Reactor (16; 46a, 46b);
Main switches (14p, 14n; 44a, 44b) for connecting a power source (20, 22) to the reactor by being turned on, supplying current from the power source to the reactor, and storing energy in the reactor; ,
When the main switch is turned off, the reactor is turned on to connect the reactor to the load (22, 20), and the energy accumulated in the reactor is released to transfer the reactor to the load. A power converter including a synchronous rectifier switch (14n, 14p; 44b, 44a) for supplying current;
Operation means (30) for performing on / off operations of the main switch and the synchronous rectification switch in a complementary manner;
Transition time detecting means (32b, 34; 37c) for detecting a switching transition time, which is a time correlated with the rate of decrease of the voltage between the terminals of the main switch after the synchronous rectifier switch is turned off by the operating means. , 34), and
The operation means complementarily turns on and off the main switch and the synchronous rectification switch so that the switching transition time detected by the transition time detection means becomes the target time.
In a situation where the main switch and the synchronous rectification switch are complementarily turned on and off by the operation means, at least one of an on operation time of the main switch and an on operation time of the synchronous rectification switch, and the power source Current estimating means (36; 36a) for estimating an output current flowing from the reactor to the load based on at least one of an input voltage from the power converter to the power converter and an output voltage from the power converter to the load A power conversion device comprising: The operation means includes
An on-time ratio calculating means (37b) for calculating an on-time ratio, which is a ratio of an on-operation time with respect to the switching period of each of the main switch and the synchronous rectifier switch, based on a deviation between the output voltage and the target voltage;
Cycle calculation means (37e) for calculating the switching cycle of each of the main switch and the synchronous rectification switch based on the deviation between the switching transition time and the target time,
The main switch and the synchronous rectification switch are complementarily turned on and off based on the on-time ratio calculated by the on-time ratio calculating unit and the switching cycle calculated by the cycle calculating unit. The power conversion device according to claim 1. The operation means includes
An on-time ratio calculating means (32a) for calculating an on-time ratio, which is a ratio of an on-operation time with respect to the switching period of each of the main switch and the synchronous rectifier switch, based on the output voltage and the input voltage;
Correction value calculating means (32d) for calculating a correction value for setting the switching transition time as the target time based on a deviation between the switching transition time and the target time;
Correction means (32e, 32f) for correcting the on-time ratio calculated by the on-time ratio calculation means with the correction value calculated by the correction value calculation means,
2. The power conversion device according to claim 1, wherein the main switch and the synchronous rectification switch are complementarily turned on and off based on the on-time ratio corrected by the correction unit. The operation means includes
First target value calculating means (321) for calculating a first target value of the output current based on a deviation between the output voltage and the target voltage;
A final target value calculating means (32m) for calculating a smaller one of the first target value and the second target value input from the outside as a final target value of the output current;
Based on the deviation between the output current estimated by the current estimation means and the final target value, the main switch and the synchronous rectifier switch are complemented so that the estimated output current is less than or equal to the final target value. The power conversion device according to claim 3, wherein an on / off operation is performed.   The transition time detection unit is configured to determine a time from when an off operation command is issued to the synchronous rectification switch until a voltage between the terminals of the main switch decreases to a threshold voltage due to the off operation command. It detects as time, The power converter device of any one of Claims 1-4 characterized by the above-mentioned. The operating means complementarily turns on and off the main switch and the synchronous rectification switch while sandwiching a dead time during which both the main switch and the synchronous rectification switch are turned off.
The main switch (14p) and the synchronous rectification switch (14n) are connected in series,
One end of the reactor (16) is connected to the connection point of the main switch and the synchronous rectification switch,
When the main switch is turned on, a closed circuit including the power source (20), the main switch, the reactor, and the load (22) is formed,
The synchronous rectification switch is provided so that a closed circuit including the load, the synchronous rectification switch, and the reactor is formed by being turned on,
The said current estimation means (36) performs the low load current estimation process which estimates the said output current based on the said dead time, the ON operation time of the said main switch, the said output voltage, and the said input voltage. Item 6. The power conversion device according to any one of Items 1 to 5. The operating means complementarily turns on and off the main switch and the synchronous rectification switch while sandwiching a dead time during which both the main switch and the synchronous rectification switch are turned off.
The main switch (14n) and the synchronous rectification switch (14p) are connected in series,
One end of the reactor (16) is connected to the connection point of the main switch and the synchronous rectification switch,
The main switch is provided so that a closed circuit including the power source (22), the reactor, and the main switch is formed by being turned on,
The synchronous rectification switch is provided so that a closed circuit including the power source, the reactor, the synchronous rectification switch, and the load (20) is formed by being turned on,
The said current estimation means (36) performs the low load current estimation process which estimates the said output current based on the said dead time, the ON operation time of the said main switch, the said output voltage, and the said input voltage. Item 7. The power conversion device according to any one of Items 1 to 6. The operating means complementarily turns on and off the main switch and the synchronous rectification switch while sandwiching a dead time during which both the main switch and the synchronous rectification switch are turned off.
The reactor is a transformer (46) having a primary winding (46a, 46b) and a secondary winding (46b, 46a) magnetically coupled to the primary winding,
The main switch (44a, 44b) and the primary winding are formed so that a closed circuit including the power source, the main switch, and the primary winding is formed when the main switch is turned on. Provided,
The synchronous rectification switch and the secondary winding are provided such that a closed circuit including the secondary winding, the synchronous rectification switch, and the load is formed when the synchronous rectification switch is turned on. ,
The current estimating means (36a) is configured to estimate the output current based on the dead time, the ON operation time of the main switch, the input voltage, and the switching period of the main switch and the synchronous rectifier switch. The power converter according to claim 1, wherein processing is performed.   The current estimation means estimates the output current by the low load current estimation process on condition that an output current flowing from the reactor to the load is equal to or less than a specified current greater than zero. Item 9. The power conversion device according to any one of Items 6 to 8. The main switch (14p) and the synchronous rectification switch (14n) are connected in series,
One end of the reactor (16) is connected to the connection point of the main switch and the synchronous rectification switch,
When the main switch is turned on, a closed circuit including the power source (20), the main switch, the reactor, and the load (22) is formed,
The synchronous rectification switch is provided so that a closed circuit including the load, the synchronous rectification switch, and the reactor is formed by being turned on,
The current estimating means (36) includes a first parameter group including an ON operation time of the main switch, the output voltage, and the input voltage, and a second parameter including an ON operation time of the synchronous rectification switch and the output voltage. The power conversion device according to claim 1, wherein the output current is estimated based on at least one parameter group among the groups. The main switch (14n) and the synchronous rectification switch (14p) are connected in series,
One end of the reactor (16) is connected to the connection point of the main switch and the synchronous rectification switch,
The main switch is provided so that a closed circuit including the power source (22), the reactor, and the main switch is formed by being turned on,
The synchronous rectification switch is provided so that a closed circuit including the power source, the reactor, the synchronous rectification switch, and the load (20) is formed by being turned on,
The current estimation means (36) includes a third parameter group including an ON operation time of the main switch and the input voltage, and a fourth parameter group including an ON operation time of the synchronous rectification switch, the output voltage and the input voltage. The power conversion device according to claim 1, wherein the output current is estimated based on at least one parameter group. The reactor is a transformer (46) having a primary winding (46a, 46b) and a secondary winding (46b, 46a) magnetically coupled to the primary winding,
The main switch (44a, 44b) and the primary winding are formed so that a closed circuit including the power source, the main switch, and the primary winding is formed when the main switch is turned on. Provided,
The synchronous rectification switch and the secondary winding are provided such that a closed circuit including the secondary winding, the synchronous rectification switch, and the load is formed when the synchronous rectification switch is turned on. ,
The current estimation means (36a) includes a fifth parameter group including an on operation time of the main switch and the input voltage, and a sixth parameter group including an on operation time of the synchronous rectification switch and the output voltage. The power converter according to any one of claims 1 to 5, wherein the output current is estimated based on at least one parameter group.

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