JP2015144531A - Power converter, loading device, and control method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To securely prevent single operation of a distributed power source.SOLUTION: A power converter Y includes: a power conversion part Y11 that converts alternating-current power to direct-current power; and a frequency shift promotion part Y13 that feedback controls an operation frequency of the power conversion part Y11 to a direction promoting a wavelength shift by detecting a system frequency or a deviation of the system frequency.

Description

  The present invention relates to a power converter that converts AC power into DC power, a load device that operates by receiving supply of AC power, and a control method.

  2. Description of the Related Art Conventionally, a distributed power source linked to an AC power system has been provided with an isolated operation prevention function for the purpose of surely disconnecting itself from the AC power system in the event of a power failure in the AC power system.

  As an example of the related art related to the above, Patent Document 1 by the applicant of the present application can be cited.

Japanese Patent No. 3227480

  Incidentally, some load devices (customer loads) that operate upon receiving AC power supply have a function (such as a power factor improvement function or a harmonic response function) that adjusts an input current waveform to a sine waveform. Since such a load device works as an active constant power load, there is a possibility that the function for preventing isolated operation of the distributed power source may be hindered. In particular, the power purchase operation (charging operation of the storage battery using commercial AC power) of the bidirectional inverter device in the photovoltaic power generation system provided with the storage battery has a large capacity as a load, and therefore the influence thereof cannot be ignored.

  In view of the above circumstances, it can be said that it is desirable to take some measures on the load device side in order to reliably and quickly prevent the independent operation of the distributed power source. However, the prior art disclosed in Patent Document 1 is merely an inverter device (for example, a PV [photovoltaic] panel incorporated in a distributed power source) that converts DC power generated into AC power to be supplied to a load device. This is a technology for which a power conditioner for photovoltaic power generation) is applied, and a load device that operates by receiving supply of AC power is not considered at all.

  In view of the above-described problems, an object of the present invention is to provide a power converter, a load device, and a control method capable of ensuring prevention of isolated operation of a distributed power source.

  In order to achieve the above object, a power converter according to the present invention includes a power converter that converts AC power into DC power, and a direction that detects a system frequency or a deviation of the system frequency and promotes a frequency shift thereof. A configuration (first configuration) having a frequency shift facilitating unit that feedback-controls the operating frequency of the power conversion unit is preferable.

  Further, in the power converter having the first configuration, the frequency shift facilitating unit includes a system frequency measuring unit that measures the system frequency, and an amount of the power factor that is changed from the system frequency or the deviation of the system frequency. A configuration including a frequency feedback unit that calculates and promotes the frequency shift, and a power factor step change unit that changes the power factor in a stepped manner to promote the frequency shift when the deviation of the system frequency is small ( The second configuration may be used.

  In the power converter having the second configuration, the frequency feedback unit includes a moving average calculation unit that calculates a moving average value of the system frequency, and a frequency that calculates a deviation of the system frequency from the moving average value. A configuration (third configuration) including a deviation calculating unit and a power factor change amount calculating unit that calculates the amount of the power factor to be changed according to the deviation is preferable.

  In the power converter having the second or third configuration, the power factor step changing unit includes a fundamental voltage measuring circuit that measures a fundamental voltage, a harmonic voltage measuring circuit that measures a harmonic voltage, and A fundamental voltage calculator that calculates a change amount of the fundamental voltage, a harmonic voltage calculator that calculates a change amount of the harmonic voltage, and outputs of the fundamental voltage calculator and the harmonic voltage calculator A power factor step change condition determining unit that determines whether or not a condition for changing the power factor according to the condition is satisfied, and a step of calculating the amount of the power factor to be changed according to the output of the power factor step change condition determining unit The change amount calculation unit may be included (fourth configuration).

  In addition, the load device according to the present invention includes a power conversion unit that converts AC power into DC power and outputs the power to the load, and the power conversion in a direction that promotes frequency shift by detecting a system frequency or a deviation of the system frequency. And a frequency shift facilitating unit that feedback-controls the operating frequency of the unit (a fifth configuration).

  A power converter control method according to the present invention is a power converter control method that receives AC power from a grid-connected distributed power source, and detects a system frequency or a deviation of the system frequency. The configuration is such that the operating frequency of the power converter is feedback-controlled in a direction that promotes the frequency shift of the deviation (sixth configuration).

  Further, in the load device having the fifth configuration, the power conversion unit converts AC power into DC power by waveform control synchronized with a zero cross point of the output waveform, and the frequency shift facilitating unit includes: A configuration (seventh configuration) may be used that distorts the zero cross point of the output waveform and a predetermined section in the vicinity thereof so as to facilitate the function of preventing the isolated operation of the distributed power source.

  In the load device having the fifth or seventh configuration, the power conversion unit may have a configuration (eighth configuration) having a function of adjusting an input current waveform to a sine waveform.

  In the load device having the fifth, seventh, or eighth configuration, the power conversion unit is an AC / DC converter that converts AC power into DC power and outputs the DC power to the load (first). 9).

  In the load device having any one of the fifth and seventh to ninth configurations, the power conversion unit converts AC power into DC power and outputs the DC power to the load. It is good to set it as the structure (10th structure) which is the bidirectional | two-way inverter part which converts the input direct-current power into alternating current power and carries out grid connection.

  In the load device having the tenth configuration, the load may be a storage battery, and the DC power source may be a PV module (an eleventh configuration).

  The isolated operation prevention promotion system according to the present invention includes a distributed power source having an isolated operation prevention function, a power converter having any one of the first to fourth configurations, or the fifth and seventh to tenth configurations. And a load device having any one of the configurations (a twelfth configuration).

  In the above-described twelfth configuration, the distributed power source includes a grid-connected inverter that converts DC power supplied from a DC power source into AC power and grid-links; It is good to make it the structure (13th structure) which has an independent operation prevention function part which detects an isolated operation from a change and stops the said grid connection inverter.

  In the isolated operation prevention promotion system having the thirteenth configuration, the DC power source may be a PV module (fourteenth configuration).

  With the load device according to the present invention, it is possible to promote the function of preventing the independent operation of the distributed power source, and thus it is possible to ensure the prevention of the isolated operation of the distributed power source.

Block diagram showing a first configuration example of an inverter device The figure which shows the apparent waveform pattern of integral data e ' The figure which shows the waveform pattern of the inverter output produced based on the integral data e ' The figure which shows the relationship between the predetermined period (alpha) and the frequency of load supply voltage Vo. Block diagram showing a second configuration example of the inverter device The figure explaining how to distort PWM data Dp ' The figure which shows the 1st example of the apparent waveform in PWM data Dp ' The figure which shows the 2nd example of the apparent waveform in PWM data Dp ' The figure which shows the 3rd example of the apparent waveform in PWM data Dp ' The figure which shows the 4th example of the apparent waveform in PWM data Dp ' Diagram showing an example of how the inverter output frequency fluctuates The figure which shows an example of the positive feedback loop used for control of an inverter output frequency Figure showing the measurement results of islanding detection ability Overall block diagram of active single operation system Diagram showing system frequency (period) measurement algorithm Image of frequency deviation calculation Image of moving average update Diagram showing frequency deviation vs. reactive power characteristics The figure for demonstrating the 1st conditions (fundamental voltage fluctuation) of step injection generation The figure for demonstrating the 2nd conditions (harmonic voltage fluctuation) of step injection generation Block diagram showing an example of application to an inverter device Block diagram showing an example of application to a load device Block diagram showing an example of application to a bidirectional inverter device

<Inverter device (first embodiment)>
FIG. 1 is a block diagram illustrating a first configuration example of an inverter device. The inverter device 1 of this configuration example includes an inverter main circuit 4 that converts DC power input from a DC power supply 2 into AC power and supplies the AC power to the load 3, and a voltage that detects the load supply voltage Vo supplied to the load 3. A detector 5; a zero-crossing detection circuit 6 for generating an output synchronization signal Vs based on the load supply voltage Vo; and a current detector for detecting an output current Io of an AC output (hereinafter referred to as inverter output) of the inverter main circuit 4. 7, an A / D converter 8 for A / D converting the output current Io, and a DSP (digital signal processor) for controlling the inverter main circuit 4 by PWM [pulse width modulation] based on the output current Io and the output synchronization signal Vs. ], The voltage abnormality detection circuit 10 for detecting the voltage abnormality of the load supply voltage Vo supplied to the load 3, and the gate pulse signal Gp based on the PWM data output from the DSP 9. And a gate drive circuit 12 that controls switching of a switching element (not shown) of the inverter main circuit 4 based on the gate pulse signal Gp. Between the inverter main circuit 4 and the load 3, there is provided a filter 15 that includes a reactor 13 and a capacitor 14 and removes a high-frequency component of the inverter output.

  Separately from the inverter device 1, AC power is supplied to the load 3 from the commercial power system 16 via the circuit breaker 17 and the pole transformer 18. The inverter device 1 is connected to the commercial power system 16. It is driving.

  The DSP 9 sequentially reads out the current reference waveform data Wb from the current reference waveform data 19 and the current reference waveform data Wb from the current reference waveform memory 19, and generates the current reference signal Ic by multiplying it with the output command signal Vc. A multiplier 20, an error signal generator 21 for calculating an error between the output current Io and the current reference signal Ic to generate a current error signal e, and a current error signal e having a period of the output synchronization signal Vs as one section. An error waveform pattern integration circuit 22 that integrates the waveform pattern, a PWM processing circuit 23 that generates PWM data Dp by pulse width modulating the integration data e ′ output from the error waveform pattern integration circuit 22, and PWM data Dp PWM memory 24 to be stored, calculation of frequency of load supply voltage Vo, output of frequency abnormality signal Fe indicating frequency abnormality of load supply voltage Vo, Al to have a zero-crossing cycle detection processing circuit 25 for output of the non-integral interval designation signal B.

  Next, the operation of the inverter device 1 will be described in order. The output current Io of the inverter output detected by the current detector 7 is A / D converted by the A / D converter 8 and then input to the error signal creation unit 21.

  On the other hand, the load supply voltage Vo detected by the voltage detector 5 is input to the zero cross detection circuit 6. The zero cross detection circuit 6 creates an output synchronization signal Vs based on the input load supply voltage Vo and outputs it to the current reference waveform memory 19. The current reference waveform memory 19 reads out the stored current reference waveform data Wb in synchronization with the input output synchronization signal Vs and outputs it to the multiplication unit 20. The multiplier 20 multiplies the input current reference waveform data Wb and the output command signal Vc to generate a current reference signal Ic and outputs it to the error signal generator 21.

  The error signal generator 21 to which the output current Io and the current reference signal Ic are input generates a current error signal e that is an error between the output current Io and the current reference signal Ic and outputs the current error signal e to the error waveform pattern integration circuit 22. To do. The error waveform pattern integration circuit 22 receives the output synchronization signal Vs from the zero-cross detection circuit 6, and the error waveform pattern integration circuit 22 sets the waveform pattern of the current error signal e as a period of the output synchronization signal Vs. Integrate. The integration data e ′ thus created is stored in the error waveform pattern integration circuit 22 and is output to the PWM processing circuit 23 for use in integration calculation at the next sampling.

  In the PWM processing circuit 23, the input integration data e ′ is subjected to pulse width modulation to generate PWM data Dp and stored in the PWM memory 24. The PWM memory 24 outputs the PWM data Dp to the timer / counter circuit 11 for each sampling while synchronizing with the output synchronization signal Vs input from the zero cross detection circuit 6.

  In the timer / counter circuit 11, the gate pulse signal Gp is created based on the PWM data Dp created in the above-described procedure in the DSP 9, and is output to the gate drive circuit 12. The gate drive circuit 12 drives the inverter main circuit 4 by switching control of switching elements (not shown) of the inverter main circuit 4 based on the input gate pulse signal Gp.

  In the inverter device 1, when the AC voltage system 16 is in a single operation state due to a power failure or the like, the single operation state is detected and the inverter output is stopped as follows. That is, when the inverter device 1 enters the single operation state when the reactive power supplied by the inverter device 1 and the reactive power required by the load 3 do not match, the load supply voltage Vo (inverter in the single operation state) The frequency of the output becomes equal to the rated frequency (50/60 Hz), and accordingly, the voltage value of the load supply voltage Vo also varies. Therefore, the voltage abnormality detection circuit 10 detects whether or not the load supply voltage Vo is abnormal. When an overvoltage abnormality or an undervoltage abnormality occurs in the load supply voltage Vo, a voltage abnormality signal Ve is output to the gate drive circuit 12. To do. Further, the zero cross cycle detection circuit 25 detects the frequency of the load supply voltage Vo, compares the detected frequency of the load supply voltage Vo with the rated frequency f0, calculates the deviation between them, and the calculated deviation is determined in advance. When the set threshold value is exceeded, the frequency abnormality signal Fe is output to the gate drive circuit 12.

  In the gate drive circuit 12, when the voltage abnormality signal Ve or the frequency abnormality signal Fe is input, the switching control of the inverter main circuit 4 is stopped by assuming that the inverter device 1 is in the single operation state, and thereby the inverter main circuit 4 Stops inverter output.

  Next, an operation that characterizes the inverter device 1 will be described. When the reactive power supplied by the inverter device 1 and the reactive power required by the load 3 substantially match (the power factor of the load impedance is close to 1) and the inverter device 1 enters the single operation state, the load The frequency of the supply voltage Vo hardly fluctuates. Therefore, the abnormality of the load supply voltage Vo cannot be detected in the voltage abnormality detection circuit 10 or the zero cross cycle detection processing circuit 25. Therefore, in the inverter device 1, the following distortion is applied to the integral data e ′ of the error waveform pattern e, so that the frequency of the load supply voltage Vo in the single operation state is obtained regardless of the power factor of the load impedance. Fluctuations are generated to reliably detect the single operation state of the inverter device 1. Hereinafter, the application of the distortion will be described in detail.

  The zero-crossing period detection processing circuit 25 gives a no-integration section designation signal B to the error waveform pattern integration circuit 22. The non-integral section designation signal B is a signal for performing the following designation. That is, the non-integral section designation signal B is a command signal that designates the predetermined section α of the waveform pattern in the integral data e ′ and sets the output of the predetermined section α to zero. Here, the predetermined section α is a section provided in the half cycle of the waveform pattern with the zero cross point as the end point of the period.

  The operation of the error waveform pattern integration circuit 22 that has received the no-integration section designation signal B will be described with reference to FIGS. FIG. 2 is an example of an apparent waveform pattern of the integration data e ′, and FIG. 3 is an example of an inverter output waveform pattern created based on the integration data e ′ of FIG. 2. 2 and 3 show data for a half cycle. In FIG. 2, the number of data points at the rated frequency is 300, for example.

  If the inverter output maintains the rated frequency f0, the waveform pattern of the integration data e ′ of the previous cycle stored in the error waveform pattern integration circuit 22 is, for example, as shown in FIG. It becomes a sine wave waveform of T0. Further, the periodic waveform of the inverter output created based on the integration data e 'of the sine wave waveform is also a sine wave waveform of the period T0 as shown in FIG.

  Here, the error waveform pattern integration circuit 22 to which the non-integral section designation signal B is input from the zero-crossing period detection processing circuit 25 is the predetermined section designated by the non-integration section designation signal B in the integral data e ′ of the period T0. The integral data e ′ shown in FIG. 2B is output in which the integral data during α is zero. Since the apparent cycle in the integral data e ′ is shorter than the cycle of the rated frequency f0, when the inverter main circuit 4 creates an inverter output based on the integral data e ′, the detection timing of the zero cross point is As a result of being accelerated by the period α, the period becomes T1 slightly shorter than T0 as shown in FIG. 3B, and the frequency of the inverter output slightly increases.

  Further, when an inverter output having a frequency corresponding to the period T1 is output, the error waveform pattern integration circuit 22 outputs a predetermined interval α specified by the non-integration interval specifying signal B in the integration data of the cycle T1. The integration data e ′ shown in FIG. 2C with the integration data set to zero is output. Since the apparent period in the integral data e ′ is further shorter than the period T1, when the inverter output is created based on the integral data e ′, the detection timing of the zero cross point is further advanced by the period α. As shown in FIG. 3C, the period becomes T2, which is slightly shorter than T1, and the frequency of the inverter output further increases slightly. In this way, the frequency of the inverter output gradually increases.

  Such frequency fluctuations occur even if the power factor of the load impedance is approximately 1. Therefore, such frequency fluctuations or voltage changes caused by the frequency fluctuations are detected by the zero cross period detection processing circuit 25 or the voltage abnormality detection circuit. By detecting by 10, the single operation state of the inverter device 1 is reliably detected. Note that the length of the predetermined section α is adjusted by the zero cross period of the load supply voltage Vo.

  In addition, such a frequency variation occurs only when the inverter device 1 is operating alone, and when the inverter device 1 is linked to the commercial power system 16, the frequency of the load supply voltage Vo. Will not occur because it is maintained on the commercial power system 16 side.

  By the way, in the zero cross period detection processing circuit 25, the length of the predetermined section α in which the integration data e ′ described above is made zero is varied as follows. That is, as shown in FIG. 4, when the frequency of the load supply voltage Vo during the single operation is in the vicinity of the rated frequency f0, the length of the predetermined section α is shortened while the frequency of the inverter output is changed from the rated frequency f0. The predetermined section α is increased as the distance deviates. As a result, during the period in which the interconnection with the commercial power system 16 is maintained, the distortion generated in the load supply voltage Vo is reduced, while the frequency of the inverter output when the system is disconnected and enters the single operation state. The change is accelerated to ensure the detection of the isolated operation state.

  Further, in the zero cross cycle detection processing circuit 25, as shown in FIG. 4, when the frequency of the load supply voltage Vo during the single operation reaches the upper limit value f1, the predetermined section α is returned to zero. As a result, when the frequency of the inverter output becomes f1 during the independent operation of the inverter device 1, the predetermined interval α becomes zero and the frequency does not rise above f1, thereby suppressing the frequency divergence.

  Further, in the zero cross cycle detection processing circuit 25, when the frequency of the load supply voltage Vo deviates from the rated frequency f0 of the commercial power system 16, the value of the integral data e ′ is decreased at a predetermined rate, and the inverter output is decreased. As a result, during the independent operation of the inverter device 1, the frequency fluctuation of the inverter output is promoted to accelerate the detection of the independent operation, and the inverter device 1 is safely stopped.

  FIG. 5 is a block diagram illustrating a second configuration example of the inverter device. The inverter device 30 of the second configuration example basically includes the same configuration as the inverter device 1 of the first configuration example described above, and the same or similar parts are denoted by the same reference numerals and are duplicated. Description is omitted.

  The inverter device 30 of the second configuration example is characterized by the configuration of a zero cross cycle detection processing circuit 31 that distorts the inverter output. That is, the zero cross cycle detection processing circuit 31 outputs the read address designation signal C to the PWM memory 24. The zero-crossing period detection processing circuit 25 of the first configuration example outputs a non-integration section designation signal B to the error waveform pattern integration circuit 22, and both are different in this respect.

  Next, operations that characterize the inverter device 30 will be described. When the reactive power supplied by the inverter device 30 and the reactive power required by the load 3 substantially match (the power factor of the load impedance is close to 1) and the inverter device 30 enters the single operation state, the load The frequency of the supply voltage Vo hardly fluctuates. Therefore, the abnormality of the load supply voltage Vo cannot be detected in the voltage abnormality detection circuit 10 or the zero cross cycle detection processing circuit 31. Therefore, in the inverter device 30, by applying the following distortion to the PWM data Dp ′ output from the PWM memory 24, the frequency of the load supply voltage Vo in the single operation state regardless of the power factor of the load impedance. Thus, the single operation state of the inverter device 30 is reliably detected. Hereinafter, the application of distortion will be described in detail.

  The read address designation signal C given to the PWM memory 24 by the zero cross period detection processing circuit 31 is a signal for performing the following designation. That is, as shown in FIG. 6, the read address designation signal C indicates the increase rate (g-rate) of the read counter (g-count) to the PWM memory 24 when the PWM data Dp is read. By changing each time, the PWM data Dp is distorted.

That is, in the read address designation signal C, if the read address of the PWM data Dp is m and the time change of the PWM data Dp taken out from the PWM data memory 24 is Y (n),
m = int (g-rate x g-count) (1)
g-count = n mod N (2)
Y (n) = Dpm (3)
Is an address designation signal.

  The PWM data Dp ′ read from the PWM memory 24 based on the read address designation signal C set in this way is input to the timer / counter circuit 11. Based on this PWM data Dp ′, the timer / counter circuit 11 creates a gate pulse signal Gp ′ and outputs it to the gate drive circuit 12. In the gate drive circuit 12, the inverter main circuit 4 is subjected to switching control by the input gate pulse signal Gp '.

  Here, when g-rate> 1, as shown in FIG. 7, the inverter output waveform is given a distortion in which the predetermined period β that ends the zero crossing point is zero, and the PWM data Dp The apparent period T3 at 'is shorter than the period T0 of the rated frequency f0, and when an inverter output is created based on this PWM data Dp', the detection timing of the zero cross point is advanced only by the period β. The output frequency rises above the rated frequency f0.

  On the other hand, when g-rate <1, the inverter output waveform is given distortion to output an arbitrary offset on the descending waveform path side from the peak height to the zero cross point, as shown in FIG. When the apparent period T4 in the PWM data Dp ′ is longer than the period T0 of the rated frequency f0, and the inverter output is created based on this PWM data Dp ′, the apparent period T4 becomes longer and the zero cross point As a result, the inverter output frequency falls below the rated frequency f0.

  Such frequency fluctuations occur even if the power factor of the load impedance is approximately 1. Therefore, such frequency fluctuations or voltage changes caused by the frequency fluctuations are detected by the zero-cross cycle detection processing circuit 31 or the voltage abnormality detection circuit. By detecting by 10, the single operation state of the inverter device 30 is reliably detected.

  Inverter output waveform is distorted by inverter device 30 as shown in FIG. 7 and FIG. 8, as shown in FIG. 9. You may give to an output waveform. Then, the apparent period TT in the PWM data Dp ′ becomes shorter than the period T0 of the rated frequency f0, and as a result, the frequency of the inverter output (load supply voltage Vo) varies from the rated frequency f0.

  Furthermore, as shown in FIG. 10, distortion that causes the zero cross point to output an arbitrary offset on both peak sides may be added to the inverter output waveform. Then, the apparent period T6 in the PWM data Dp ′ becomes longer than the period T0 of the rated frequency f0, and as a result, the frequency of the inverter output varies from the rated frequency f0.

  In order to give the inverter output waveform the distortion as shown in FIG. 9 or FIG. 10, the function for designating the read address in the read address designating signal C may be changed. 7 to 10, the solid line indicates an apparent output waveform in the PWM data Dp ′, and the dotted line indicates an output waveform at the rated frequency f0.

  By the way, the frequency of the inverter output when the inverter device 30 is operating alone is also affected by the type of the load 3 to which the inverter device 30 is connected, and when the load 3 is an inductive load, The inverter output frequency increases, and when the load 3 is a capacitive load, the inverter output frequency during single operation decreases. Therefore, in the case where the absolute value of the frequency fluctuation amount is equal to the frequency fluctuation amount due to the distortion applied to the inverter output waveform and the frequency fluctuation amount due to the load 3, and the fluctuation direction is opposite, the distortion is applied. In some cases, the frequency fluctuation due to the load 3 and the frequency fluctuation due to the load 3 cancel each other, making it difficult for the frequency fluctuation to occur.

  On the other hand, in the inverter device 30, as described above, the inverter output frequency is set to the rated frequency f 0 depending on how the increase rate (g-rate) of the reading counter (g-count) is set. Can be raised or lowered. Therefore, in the inverter device 30, as shown in FIG. 11, a period M1 during which the first distortion (see FIG. 7) in which the inverter output frequency rises by a predetermined fluctuation width Δf is applied, and the inverter output frequency has a predetermined fluctuation width. The period M2 for applying the second distortion (see FIG. 8) that decreases by Δf is alternately and repeatedly set. Therefore, the inverter output frequency repeats alternately rising and falling, and even if the frequency fluctuation effect due to the distortion and the frequency fluctuation action due to the load 3 cancel each other in a certain period M1 (M2), the next period Since M2 (M1) does not cancel out, the inverter output frequency fluctuates reliably. Therefore, the independent operation state of the inverter device 30 is reliably detected regardless of the power balance with the load 3.

  Further, in the inverter device 30, a non-distortion applying period M3 for maintaining the rated frequency f0 is provided between the period M1 for applying the first distortion and the period M2 for applying the second distortion. As a result, in the normal operating state of the inverter device 30, that is, the state where the inverter device 30 is operating at the rated frequency f0 in conjunction with the commercial power system 16, distortion is less likely to occur in the load supply voltage Vo.

  As the periods M1 and M2 for applying the first and second distortions, for example, seven periods of the inverter output frequency are appropriate, and for the distortion-free period M3, three periods of the inverter output frequency are appropriate. As the fluctuation range Δf, for example, ± 0.2 Hz is appropriate. However, these values are merely examples, and it goes without saying that the variation width Δf of each of the periods M1, M2, and M3 may be other values. Needless to say, the distortion-free period M3 exhibits the same effect even if it is installed in the inverter device 1 of the first configuration example described above.

  Further, in the inverter device 30, the inverter output is controlled by the positive feedback loop shown in FIG. In FIG. 12, the horizontal axis represents the output frequency of the load supply voltage Vo detected by the zero cross cycle detection processing circuit 31 (corresponding to the frequency of the inverter output when the inverter device 30 is operated alone), and the vertical axis Indicates an apparent frequency Fout in the PWM data Dp ′. As can be seen from this figure, the inverter device 30 (specifically, the zero-cross cycle detection processing circuit 31) is suitable for the load supply voltage Vo with a predetermined frequency period (for example, a period of ± 0.2 Hz) sandwiching the rated frequency f0. Is not limited to this period), the dead zone K, the + side abnormal frequency region L + which is a frequency region higher than the dead zone K, and the − side abnormal frequency region L which is a frequency region lower than the dead zone K. It is divided into-.

  In the dead zone K, as shown in FIG. 11, a period M1 during which the first distortion (see FIG. 7) in which the inverter output frequency is increased, a distortion-free period M3, and a period in which the inverter output frequency is decreased. The period M2 for applying the distortion of 2 (see FIG. 8) is set alternately. In the abnormal frequency region L +, a positive feedback loop in which the apparent frequency Fout in the PWM data Dp ′ formed based on the frequency Fin is higher than the frequency Fin of the load supply voltage Vo. , PWM data Dp ′ is generated to perform inverter control. Further, in the abnormal frequency region L−, the positive feedback such that the apparent frequency Fout in the PWM data Dp ′ formed based on the frequency Fin is lower than the frequency Fin of the load supply voltage Vo. In a loop, PWM data Dp ′ is created to perform inverter control. Such control may be performed by changing the function for designating the read address by the read address designation signal C by feedback control based on the load supply voltage Vo.

  By performing the above-described control, the frequency of the load supply voltage Vo rapidly changes when the inverter device 30 is operated alone. That is, the inverter device 30 has a power factor of load impedance of approximately 1 during single operation, and even if the load supply voltage Vo does not leave the dead zone K in the prior art, the first distortion is first applied to the inverter output. And the second distortion are applied, the load supply voltage Vo departs from the dead zone K and shifts to the abnormal frequency regions L + and L−. If the load supply voltage Vo shifts to the abnormal frequency regions L + and L−, the frequency fluctuation is accelerated by frequency control in the positive feedback loop. Therefore, if the inverter device 30 starts an independent operation, the zero cross cycle detection processing circuit 31 and the voltage abnormality detection circuit 10 will promptly detect it.

  Further, in the inverter device 30, as shown in FIG. 12, when the frequency of the load supply voltage Vo is stopped in the abnormal frequency regions L + and L−, the change amount of the frequency Fout with respect to the frequency Fin is increased. The slope of the feedback loop is changed. That is, the zero cross period detection processing circuit 31 measures a period in which the frequency Fin is in the abnormal frequency region L +, L−, and a period in which the frequency Fin is set in advance (for example, a period of five cycles of Fin is appropriate. When the frequency Fin exceeds a preset period, the control is performed based on the positive feedback loop P1 having a relatively small slope. Control is performed based on the positive feedback loop P2 having a large target inclination. Thereby, the frequency fluctuation of the frequency Fin shifted to the abnormal frequency regions L + and L− can be further accelerated, and when the inverter device 30 starts the single operation, the zero-cross cycle detection processing circuit 31 and the voltage abnormality detection are detected more quickly. It will be detected by the circuit 10.

  Further, as described above, depending on whether the load 3 is an inductive load or a capacitive load, the frequency of the load supply voltage Vo fluctuates due to the action on the load 3 side. It is conceivable that frequency fluctuations due to If this happens, the fluctuation speed of the frequency of the load supply voltage Vo becomes slow, which is not convenient. However, as shown in FIG. 12, since the two positive feedback loops P1 and P2 are switched, in the control of the positive feedback loop P1 having a relatively small inclination, the frequency fluctuation caused by the load 3 and the frequency fluctuation caused by the distortion are applied. Even if the frequency fluctuates and the frequency fluctuation speed becomes slow, switching to the positive feedback loop P2 having a relatively large inclination cancels this canceling relationship, and the frequency fluctuates greatly.

  By the way, in the inverter device 30, the PWM data Dp ′ read from the PWM memory 24 is distorted. In addition, the current reference waveform data Wb read from the current reference waveform memory 19 is distorted. Also good. In this case, a read address designation signal corresponding to the above-described read address designation signal C may be output from the zero cross cycle detection processing circuit 31 to the current reference waveform memory 19. When the current reference waveform data Wb is read, the read address designation signal is distorted into the current reference waveform data Wb by changing the increase rate (g-rate) of the read counter (g-count) for each zero cross period. Anything that gives

  In FIG. 13, the load power is balanced with respect to the inverter rated output (3 kW) or set so that the equilibrium state is broken within a certain range (± 300 w, ± 300 Var range), and then when the commercial power system 16 fails. This is a result of measuring how long the inverter devices 1 to 30 can detect an isolated operation. In this figure, the above-described balanced state is shown by the difference between the inverter output and the load power, and the vertical axis shows the balanced state of active power. Here, the axis value indicates the value obtained by subtracting the load power from the inverter output. When this axis value is zero, the active power is balanced. It shows that it has collapsed by the numerical value. On the other hand, the horizontal axis indicates the reactive power equilibrium state. The measurement is performed at each point from (1) to (17) in the figure, and the time until the inverter devices 1 to 30 are detected and stopped is indicated next to each point.

  As is apparent from this figure, the inverter devices 1 to 30 reliably detect an isolated operation even in a load equilibrium state (the power factor of the load inverter is 1) or in the vicinity of the equilibrium state (a power factor is near 1). I understand that I can do it.

<Active islanding detection method (second embodiment)>
The distributed power supply isolated operation detection method described so far provides a frequency bias that is an active signal for steadily injecting reactive power to promote the deviation of the operating frequency during isolated operation, and the isolated operation is detected by frequency shift operation. However, in an environment in which a plurality of distributed power sources are installed, there is a technical drawback that active signals from each other's distributed power sources interfere with each other and cancel each other. In order to eliminate this drawback, an active islanding detection method, which is an islanding operation detection method capable of cooperating with a centralized interconnection, has been known recently. The outline is as follows. Characteristic functions include a function (frequency feedback function) that promotes frequency shift by calculating reactive power injected from system frequency deviation, and intentional in a state where the output power of the distributed power source and the power consumption of the system load are balanced. Is equipped with a function to generate frequency changes (reactive power step injection function), capable of high-speed detection of isolated operation, no unnecessary operation, no mutual interference with other systems, and small influence on system by active signal With features such as. Such an isolated operation detection method is referred to as an “active isolated operation detection method (frequency feedback method with step injection)”, and its contents will be described in detail.

  FIG. 14 is an overall block diagram of a power conditioner (hereinafter referred to as a PCS [power conditioning system]) that employs the above active islanding system. The PCS 100 of this configuration example includes a system frequency measurement unit 110, a frequency feedback unit (reactive power injection unit) 120, a reactive power step injection unit 130, an isolated operation detection unit 140, a current control processing unit 150, and an inverter unit. 160.

  The system frequency measurement unit 110 is a control unit that measures a system frequency used for calculating a frequency deviation, and includes a frequency detection circuit 111, a frequency measurement processing unit 112, and a phase difference measurement synchronization processing unit 113. FIG. 15 is a diagram showing an algorithm for system frequency (period) measurement.

  The frequency detection circuit 111 generates a square wave signal synchronized with the system voltage and outputs the square wave signal to the frequency measurement processing unit 112 (see the upper part of FIG. 15). The frequency detection circuit 111 is implemented as a hardware unit.

  The frequency measurement processing unit 112 monitors the square wave signal input from the frequency detection circuit 111 and measures system voltage period data (frequency data) (see the middle part of FIG. 15). More specifically, the frequency measurement processing unit 112 calculates the intermediate value when counting from the falling edge to the rising edge of the square wave signal and the intermediate value when counting from the next falling edge to the rising edge. Is obtained as period data (frequency data). The frequency measurement processing unit 112 has sufficient resolution (for example, 2.5 MHz or more (400 ns or less)) for measuring the system frequency, and the frequency measurement processing unit 112 is implemented as a software unit.

  The phase difference measurement synchronization processing unit 113 synchronizes the period data (frequency data) measured by the frequency measurement processing unit 112 with the rising edge of the square wave signal (see the lower part of FIG. 15). The phase difference measurement synchronization processing unit 113 is implemented as a software unit.

  The frequency feedback unit 120 is a control unit that calculates the reactive power to be injected from the frequency deviation (periodic deviation) of the system frequency calculated by the moving average process, and promotes the frequency shift. 2 moving average calculation part 122, frequency deviation calculation part 123, reactive power injection amount calculation part 124, and addition part 125 are included.

  The first moving average calculation unit 121 calculates a first moving average value (corresponding to the latest cycle) of the system frequency (system cycle). The first moving average calculation unit 121 is implemented as a software unit.

  The 2nd moving average calculation part 122 calculates the 2nd moving average value (equivalent to a past period) of a system | strain frequency (system | strain period). The second moving average calculation unit 122 is implemented as a software unit.

  The frequency deviation calculation unit 123 calculates the frequency deviation (period deviation) of the system frequency from the difference between the first moving average value and the second moving average value. The frequency deviation calculation unit 123 is implemented as a software unit.

  FIG. 16 is an image diagram of frequency deviation calculation, and FIG. 17 is an update image diagram of a moving average value. Period data used for calculating the frequency deviation is updated for each period of the system voltage. The moving average value used for the calculation of the frequency deviation is updated every time t1 (for example, t1 = 5 ms), and the calculation of the frequency deviation itself is also performed every time t1. The time t1 is uniform without depending on the frequency (50 Hz / 60 Hz) of the commercial power system. As the first moving average value (most recent cycle), a moving average value for time t2 (for example, t2 = 40 ms) is used with the acquisition timing of the latest cycle as an end point. On the other hand, as the second moving average value (past cycle), the moving average value for time t4 (for example, t4 = 80 ms) with the timing retroactive from the acquisition timing of the latest cycle by time t3 (for example, t2 = 200 ms) as the end point. Is used.

  The reactive power injection amount calculation unit 124 calculates reactive power to be injected according to the frequency deviation (periodic deviation) calculated by the frequency deviation calculation unit 123. The reactive power injection amount calculation unit 124 is implemented as a software unit.

  FIG. 18 is a diagram showing frequency deviation-reactive power characteristics. As shown in this figure, the reactive power injection amount calculation unit 124 has a frequency deviation of ± f [Hz] (for example, f = 0.01 Hz (± 4.0 μs @ 50 Hz, ± 2.8 μs @ 60 Hz) as a boundary). The upper and lower limits of the reactive power to be injected are set to ± A [pu] (for example, A = 0.25 pu), where p. [per unit] is a symbol used to express the ratio to the reference value (rated capacity) in the unit method, for example, when the reference value (rated capacity) is 4 kW, ± 0.25 p.u. = ± 1 kW (± 1 Var for reactive power).

  The addition unit 125 adds the reactive power injection amount calculated by the reactive power injection amount calculation unit 124 and the reactive power step injection amount calculated by the step injection amount calculation unit 136 described later, and performs current control processing. Transmitted to the unit 150. The adding unit 125 is implemented as a software unit.

  The reactive power step injection unit 130 generates reactive power to promote a frequency shift under the condition that the output power of the PCS 100 and the power consumption of the load device are balanced and the deviation of the system frequency is small when the distributed power source is operated alone. The step-injection control unit includes a fundamental voltage measurement circuit 131, a harmonic voltage measurement circuit 132, a fundamental voltage calculation unit 133, a harmonic voltage calculation unit 134, a step injection occurrence condition determination unit 135, a step An injection amount calculation unit 136.

  The fundamental wave voltage measurement circuit 131 measures a fundamental wave component included in the output current of the PCS 100 as a fundamental wave voltage. The fundamental wave voltage measurement circuit 131 is implemented as a hardware unit.

  The harmonic voltage measurement circuit 132 measures a harmonic component included in the output current of the PCS 100 as a harmonic voltage. The harmonic voltage measurement circuit 132 is implemented as a hardware unit.

  The fundamental wave voltage calculation unit 133 calculates the amount of change in the fundamental wave voltage. The fundamental wave voltage calculation unit 133 is implemented as a software unit.

  The harmonic voltage calculation unit 134 calculates the amount of change in the harmonic voltage. For the calculation of the harmonic voltage, second to seventh or higher harmonics are used. Further, the following discrete Fourier analysis may be used for the calculation of the harmonic voltage. The harmonic voltage calculation unit 134 is implemented as a software unit.

  For the variables in the above equation, n is a sampling point (N) (n = 0, 1, 2,..., N−1), and f1 is a fundamental frequency (f1 = 1 / (NT) = fs / N). , Fs is the sampling frequency, T is the sampling interval (T = 1 / fs), k is the number of harmonic times (k = 0, 1, 2,..., N / 2), and A [k] is the kth cosine. Amplitude, B [k] represents the amplitude of the kth sine, and Harm [k] represents the kth harmonic voltage (peak voltage).

  The step injection generation condition determination unit 135 determines whether or not the step injection generation condition is satisfied according to the outputs of the fundamental voltage calculation unit 133 and the harmonic voltage calculation 134 unit. More specifically, the step injection occurrence condition determination unit 135 has a frequency deviation within a predetermined minute range (for example, within ± 0.01 Hz), and a change amount of the fundamental voltage or the harmonic voltage is a predetermined value. When the condition is satisfied, it is determined that the need for step injection has occurred. Note that the fundamental voltage and the harmonic voltage are one of the changing elements other than the system frequency generated when the single operation occurs. Step injection generation condition determination unit 133 is implemented as a software unit.

  Here, the frequency deviation being within a predetermined minute range means that when the feedback unit urges a frequency shift based on the frequency deviation within this minute range, the operation is a single operation within a specified time (for example, 200 ms). This refers to the frequency deviation when the amount of change in the frequency of the condition to be judged is not reached.

  FIG. 19 is a diagram for explaining a first condition (fundamental wave voltage fluctuation) for occurrence of step injection. In the figure, Mi represents a fundamental wave voltage before i cycles, and Mavr represents an average value of three from three cycles before to five cycles. The fundamental wave voltage calculation unit 133 calculates a change amount (Mk−Mavr) (where k = 0 to 5) of the fundamental wave voltage, and the step injection generation condition determination unit 135 determines that each change amount is a predetermined condition. When the expression is satisfied, it is determined that the fluctuation of the fundamental voltage has occurred.

  FIG. 20 is a diagram for explaining the second condition (harmonic voltage fluctuation) for occurrence of step injection. In this figure, Ni indicates the secondary to seventh-order total harmonic voltage effective value THD [total harmonic distortion] before i cycle, and Navr is the average value of three from 3 cycles before to 5 cycles before Is shown. The harmonic voltage calculation unit 134 calculates a change amount (Nk−Navr) of the harmonic voltage (where k = 0 to 5), and the step injection generation condition determination unit 135 determines that each change amount is a predetermined condition. When the expression is satisfied, it is determined that the fluctuation of the harmonic voltage has occurred.

  The step injection amount calculation unit 136 calculates the step injection amount of reactive power according to the determination result of the step injection generation condition determination unit 135. The injection time is set to a predetermined number of cycles or less (for example, 3 cycles or less). A predetermined upper limit value (for example, 0.1 p.u.) is determined for the injection amount. The reactive power is injected in the direction of delaying the current phase as viewed from the PCS 100 (the direction of decreasing the frequency). The reactive power step injection is performed within a half cycle of the system frequency (period) after the above-described condition is satisfied. The step injection amount calculation unit 136 is implemented as a software unit.

  The isolated operation detection unit 140 is a control unit that determines whether or not an isolated operation has occurred based on a change in system frequency, and includes an active isolated operation detection unit 141 and a passive isolated operation detection unit 142.

  The current control processing unit 150 performs current control of the inverter unit 160 so as to inject appropriate reactive power while performing synchronization processing based on the output of the system frequency measurement unit 110. As a specific reactive power injection method, for example, the current control of the inverter unit 160 described with reference to FIGS. 1 to 13 may be performed.

  The inverter unit 160 is a power conversion unit that converts DC power supplied from a DC power source (for example, a PV panel) into AC power and connects it to the commercial power system PW.

  FIG. 14 shows an example in which the above-described components are divided into a hardware part (other than the CPU) and a software part (CPU), but the division boundary is not limited to this.

  If the PCS 100 adopts such an active islanding detection method, the PCS 100 that has entered the islanding state can be stopped at high speed without delay (for example, within 0.2 s after the occurrence of islanding).

  In addition, with the PCS 100, the CPU interrupt time (target waveform interval) can be changed based on the past system frequency (system cycle), so even if the system frequency (cycle) changes, the distortion amount can be set relative. Can be reduced.

  Even if a large number of photovoltaic power generation systems are linked to a common commercial power system by the above active islanding detection method, the islanding operation detection functions of each PCS do not interfere with each other, Since it is possible to construct an environment that can satisfy the requirements, it is possible to smoothly promote the introduction of a photovoltaic power generation system into a house or the like.

<Application example (third embodiment)>
FIG. 21 is a block diagram showing an example in which the active islanding detection method is applied to a PCS (inverter device). In this application example, the consumer H is provided with a solar power generation system X and a load device Y. The solar power generation system X is an example of a distributed power source, and includes a PCSX1 and a PV panel X2.

  PCSX1 is an example of an inverter device, and includes an isolated operation prevention function unit X12 and an isolated operation prevention promotion unit X13 as means for implementing the active isolated operation detection method in addition to the grid interconnection inverter unit X11. .

  The grid interconnection inverter unit X11 converts the DC power supplied from the PV panel X2 into AC power and grid-links it to the AC power system PW.

  The isolated operation prevention function unit X12 is a functional block that detects isolated operation from changes in the system frequency and system voltage and stops the system interconnection inverter X11. For example, the isolated operation detection unit 140 in FIG. 14 corresponds to this. .

  The frequency shift facilitating part X13 is a functional block that controls the grid interconnection inverter part X11 so as to promote the isolated operation prevention function. More specifically, the frequency shift facilitating unit X13 is a functional block that detects the system frequency and feedback-controls the operating frequency of the system interconnection inverter unit X11 in the direction of promoting the frequency change. For example, FIG. The system frequency measurement unit 110, the frequency feedback unit (reactive power injection unit) 120, the reactive power step injection unit 130, and the current control processing unit 150 correspond to this.

  Thus, if it is PCSX1 of this application example, it will become possible to stop PCSX1 which fell into the independent operation state at high speed without delay.

  FIG. 22 is a block diagram illustrating an example in which the active islanding detection method is applied to a load device. Also in this application example, the consumer H is provided with the solar power generation system X and the load device Y. However, unlike FIG. 21, it is sufficient for the PCSX1 to include the grid interconnection inverter unit X11 and the isolated operation prevention function unit X12, and the frequency shift facilitating unit X13 is not an essential component.

  On the other hand, the load device Y includes an AC / DC converter unit Y11 and a load Y12, and also includes a frequency shift facilitating unit Y13 as means for implementing the active islanding detection method.

  The AC / DC converter Y11 is a power converter that converts AC power into DC power and outputs the DC power to the load Y12. The load device Y may have a configuration in which the load Y12 is incorporated, or a configuration in which the load Y12 is externally attached (a configuration in which the load device Y is provided as a so-called AC adapter).

  The frequency shift facilitating unit Y13 is a functional block that controls the AC / DC converter unit Y11 so as to promote the isolated operation prevention function of the photovoltaic power generation system X interconnected to the AC power system PW. More specifically, the frequency shift facilitating unit Y13 is a functional block that detects the system frequency and feedback-controls the operating frequency of the AC / DC converter unit Y11 in the direction of facilitating the frequency shift. The system frequency measurement unit 110, the frequency feedback unit (reactive power injection unit) 120, the reactive power step injection unit 130, and the current control processing unit 150 in FIG. 14 correspond to this.

  Heretofore, the frequency shift facilitating function on the power supply side has been described, but in the present application example, the frequency shift facilitating function is mounted on the load device Y. Injecting reactive power on the power supply side and changing its power factor on the load side are almost synonymous, but the appropriate expression changes depending on the viewing direction. Therefore, when the frequency shift facilitating portion Y13 of the load device Y is described in detail, it is desirable to partially replace the wording used in the previous description. This will be specifically described below.

  As described above, the frequency shift facilitating unit Y13 basically includes the system frequency measurement unit 110, the frequency feedback unit 120, the reactive power step injection unit 130, and the current control processing unit 150 of FIG. . However, among these components, the frequency feedback unit 120 is not a circuit block that calculates the “reactive power injection amount” from the system frequency or the deviation of the system frequency and promotes frequency shift, but the system frequency or system frequency. It may be understood that the circuit block is a circuit block that calculates the “amount of power factor to be changed” from the deviation and promotes frequency shift. Also, the reactive power step injection unit 130 does not “step-inject reactive power” but “changes the power factor in steps” in order to promote a frequency shift when the system frequency deviation is small. It may be understood as a “rate step changing section”.

  The reactive power injection amount calculation unit 124 included in the frequency feedback unit 120 and the step injection generation condition determination unit 135 and the step injection amount calculation unit 136 included in the reactive power step injection unit 130 are basically the same as described above. Can be replaced.

  More specifically, the reactive power injection amount calculation unit 124 does not calculate the “reactive power injection amount” according to the frequency deviation, but calculates “the power factor change amount”. What is necessary is just to read as "amount calculation part." The step injection generation condition determination unit 135 does not determine whether the “step injection generation condition” is satisfied according to the outputs of the fundamental wave voltage calculation unit 133 and the harmonic voltage calculation unit 134, It may be understood as a “power factor step change condition determination unit” that determines whether or not the “condition for changing the rate” is satisfied. The step injection amount calculation unit 136 calculates a “amount of power factor to be changed” instead of calculating a “step injection amount of reactive power” according to the above condition determination output. ".

  Thus, by combining the photovoltaic power generation system X provided with the isolated operation prevention function unit X12 and the load device Y provided with the frequency shift facilitating unit Y13, the active single system described above as the entire system in the consumer H is obtained. It becomes possible to construct an independent driving prevention promotion system to which the driving detection method is applied.

  In particular, when the AC / DC conversion unit Y11 has a power factor improvement function and a harmonic response function, the load device Y functions as an active constant power load, and the solar power generation system X is prevented from being operated independently. May be disturbed. In view of such circumstances, it can be said that it is desirable to provide the frequency shift facilitating portion Y13 on the load device Y side in order to reliably and rapidly prevent the solar power generation system X from operating independently.

  FIG. 23 is a block diagram showing an example in which the active islanding detection method is applied to a power storage compatible PCS (bidirectional inverter device). In this application example, a consumer power generation system X and a load device Y1 are installed in the consumer H1. However, unlike FIG. 21, it is sufficient for the PCSX1 to include the grid interconnection inverter unit X11 and the isolated operation prevention function unit X12, and the frequency shift facilitating unit X13 is not an essential component.

  On the other hand, the consumer H2 is provided with a photovoltaic power generation system Z having a power storage function and a load device Y2. The photovoltaic power generation system Z includes a power storage compatible PCSZ1, a PV panel Z2, and a storage battery Z3. The solar power generation system Z functions as one of distributed power sources connected to the AC power system PW when selling power to the AC power system PW (when generating power from the PV panel Z2). When purchasing power from the AC power system PW (when charging the storage battery Z3), it behaves as a load device that operates upon receipt of AC power.

  The power storage-compatible PCSZ1 is an example of a bidirectional inverter device. In addition to the bidirectional inverter unit Z11, an isolated operation prevention function unit Z12 and a frequency shift facilitating unit Z13 are provided as means for implementing an active isolated operation detection method. including.

  The bidirectional inverter unit Z11 converts AC power into DC power and outputs it to the storage battery Z3 when purchasing power from the AC power system PW, while from the PV panel Z2 or the storage battery Z3 when selling power to the AC power system PW. Input DC power is converted to AC power and connected to the grid.

  The isolated operation prevention function unit Z12 is a functional block that detects isolated operation from changes in the system frequency and system voltage and stops the bidirectional inverter Z11. For example, the isolated operation detection unit 140 in FIG. 14 corresponds to this.

  The frequency shift facilitating unit Z13 is a functional block that controls the bidirectional inverter unit Z11 so as to promote the isolated operation preventing function of the PCSX1 or the PCSZ1 that can be stored. More specifically, the frequency shift facilitating unit Z13 is a functional block that detects the system frequency and feedback-controls the operating frequency of the bidirectional inverter unit Z11 in a direction that facilitates the frequency shift. For example, FIG. The system frequency measurement unit 110, the frequency feedback unit (reactive power injection unit) 120, the reactive power step injection unit 130, and the current control processing unit 150 correspond to this. In order to understand the configuration and operation of the frequency shift facilitating unit Z13, “reactive power injection” in the description of FIG. 14 may be read as “change in power factor” as described above.

  Thus, if it is PCSZ1 corresponding to the electrical storage of this application example, not only the independent operation of the solar power generation system Z on which it is mounted, but also other solar power generation systems connected to the common AC power system PW. It is also possible to ensure this with respect to prevention of isolated operation of X.

  In particular, in consideration of the large capacity as a load of the power storage operation of the PCSZ1 for storage (charging operation of the storage battery Z3), the solar power generation system Z provided with the storage function is provided with an independent operation prevention assisting unit Z13. It is desirable to keep it.

  In FIGS. 21 to 23, the PCS, the load device, and the bidirectional inverter device each having a frequency shift facilitating function have been described as examples. However, the frequency shift facilitating function described above is The present invention can also be applied to power converters (AC adapters used for notebook PCs, power conditioners that charge storage batteries, and the like).

<Other variations>
The configuration of the present invention can be variously modified in addition to the above-described embodiment without departing from the gist of the invention. That is, the above-described embodiment is an example in all respects and should not be considered as limiting, and the technical scope of the present invention is not the description of the above-described embodiment, but the claims. It should be understood that all modifications that come within the meaning and range of equivalents of the claims are included.

  The present invention can be used as a technique for preventing a single operation of a distributed power source (for example, a photovoltaic power generation system) reliably and at high speed.

DESCRIPTION OF SYMBOLS 1, 30 Inverter apparatus 2 DC power supply 3 Load 4 Inverter main circuit 5 Voltage detector 6 Zero cross detection circuit 7 Current detector 8 A / D converter 9 DSP
DESCRIPTION OF SYMBOLS 10 Voltage abnormality detection circuit 11 Timer / counter circuit 12 Gate drive circuit 13 Reactor 14 Capacitor 15 Filter 16 Commercial power system 17 Circuit breaker 18 Pillar transformer 19 Current reference waveform memory 20 Multiplication part 21 Error signal preparation part 22 Error waveform pattern integration circuit 23 PWM processing circuit 24 PWM memory 25, 31 Zero cross period detection processing circuit 100 Power conditioner (PCS)
110 System Frequency Measurement Unit 111 Frequency Detection Circuit 112 Frequency Measurement Processing Unit 113 Phase Difference Measurement Synchronization Processing Unit 120 Frequency Feedback Unit (Reactive Power Injection Unit)
121 First Moving Average Calculation Unit 122 Second Moving Average Calculation Unit 123 Frequency Deviation Calculation Unit 124 Reactive Power Injection Amount Calculation Unit 125 Addition Unit 130 Reactive Power Step Injection Unit 131 Fundamental Voltage Measurement Circuit 132 Harmonic Voltage Measurement Circuit 133 Fundamental Wave Voltage calculation unit 134 Harmonic voltage calculation unit 135 Step injection generation condition determination unit 136 Step injection amount calculation unit 140 Single operation detection unit 141 Active single operation detection unit 142 Passive single operation detection unit 150 Current control processing unit 160 Inverter unit PW AC power system X Solar power generation system (distributed power supply)
X1 PCS (Inverter device)
X2 PV panel X11 Grid interconnection inverter unit X12 Independent operation prevention function unit X13 Frequency shift facilitating unit Y, Y1, Y2 Load device Y11 AC / DC converter unit (power conversion unit)
Y12 Load Y13 Frequency Shift Assistance Section Z Solar power generation system (but functions as a load device when purchasing power)
Z1 PCS for power storage (bidirectional inverter device)
Z2 PV panel Z3 Storage battery Z11 Bidirectional inverter unit (power conversion unit)
Z12 Isolated operation prevention function part Z13 Frequency shift promotion part H, H1, H2

Claims (6)

A power converter that converts AC power to DC power;
A frequency shift facilitating unit that feedback-controls the operating frequency of the power converter in a direction that promotes the frequency shift by detecting a system frequency or deviation of the system frequency; and
A power converter characterized by comprising: The frequency shift facilitator is
A system frequency measurement unit for measuring the system frequency;
A frequency feedback unit that calculates the amount of power factor to be changed from the system frequency or deviation of the system frequency and promotes the frequency shift;
A power factor step changing unit that changes the power factor in a stepwise manner to promote the frequency shift when the deviation of the system frequency is small;
The power converter according to claim 1, comprising: The frequency feedback unit includes:
A moving average calculation unit for calculating a moving average value of the system frequency;
A frequency deviation calculating unit for calculating a deviation of the system frequency from the moving average value;
A power factor change amount calculation unit for calculating a power factor amount to be changed according to the deviation;
The power converter according to claim 2, comprising: The power factor step changing unit is
A fundamental voltage measuring circuit for measuring a fundamental voltage;
A harmonic voltage measuring circuit for measuring the harmonic voltage;
A fundamental voltage calculator that calculates the amount of change in the fundamental voltage;
A harmonic voltage calculator that calculates the amount of change in the harmonic voltage;
A power factor step change condition determination unit that determines whether or not a condition for changing a power factor is satisfied in accordance with outputs of the fundamental voltage calculation unit and the harmonic voltage calculation unit;
A step change amount calculation unit for calculating an amount of a power factor to be changed according to an output of the power factor step change condition determination unit;
The power converter according to claim 2, wherein the power converter is included. A power converter that converts alternating current power into direct current power and outputs it to a load;
A frequency shift facilitating unit that feedback-controls the operating frequency of the power conversion unit in a direction that promotes a frequency shift by detecting a system frequency or deviation of the system frequency; and
A load device comprising: A method of controlling a power converter that receives AC power from a grid-connected distributed power source,
A method for controlling a power converter, comprising detecting a system frequency or a deviation of the system frequency and feedback-controlling an operating frequency of the power converter in a direction that promotes a frequency shift of the deviation.

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