JP2015142116A - semiconductor module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor module which interrupts overcurrent, inhibits parasitic inductance, and enables downsizing.SOLUTION: A semiconductor module of the invention includes: a first semiconductor element included in an upper arm; a first heat radiation electrode connected with the first semiconductor element; a second semiconductor element which is located adjacent to the first semiconductor element, is connected with the first heat radiation electrode on a first surface, and included in a lower arm; a second heat radiation electrode connected with a second surface of the second semiconductor element; and an interruption semiconductor element which is located adjacent to the second semiconductor element and connected with the second heat radiation electrode on one surface.

Description

    The present invention relates to a semiconductor module.

  2. Description of the Related Art Conventionally, there is a power module in which an emitter electrode of a semiconductor element and a collector electrode of another semiconductor element are electrically connected via a connection member that also functions as a fuse (see, for example, Patent Document 1).

  In addition, there is a semiconductor device that is electrically connected by a bonding wire that melts when an overcurrent flows between a semiconductor chip and a power terminal (see, for example, Patent Document 2).

  In addition, there is a semiconductor device in which the emitter of one IGBT (Insulated Gate Bipolar Transistor) connected in series and the collector of another IGBT are connected by a thin metal plate such as a lead frame (for example, see Patent Documents 3-4). reference).

JP 2006-120970 A JP-A-10-012806 JP 2008-020991 A JP 2006-222149 A

  However, in the technique of Patent Document 1-2, the parasitic inductance may increase in the fuse portion. Further, the module may be enlarged due to the fuse portion.

  Moreover, in the technique of patent document 3-4, when overcurrent generate | occur | produces, interruption | blocking of overcurrent cannot be performed.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor module that can cut down an overcurrent and reduce parasitic inductance to reduce the size.

  The semiconductor module according to the present invention includes a first semiconductor element included in an upper arm, a first heat radiation electrode connected to the first semiconductor element, and the first semiconductor element adjacent to the first semiconductor element. A second semiconductor element included in a lower arm connected to the heat radiation electrode of the second semiconductor element, a second heat radiation electrode connected to the second surface of the second semiconductor element, And a blocking semiconductor element connected to the second heat radiation electrode on one surface adjacent to the second semiconductor element.

  According to the embodiment of the present invention, it is possible to provide a semiconductor module capable of reducing the size while blocking an overcurrent and suppressing a parasitic inductance.

Configuration diagram showing the electrical circuit of a semiconductor module Side view of semiconductor module Top view of semiconductor module Side view around the shutoff switch

  Hereinafter, an embodiment which is an example of the present invention will be described with reference to the drawings.

  FIG. 1 is a configuration diagram showing an electric circuit of a semiconductor module.

  In FIG. 1, a semiconductor module 1 includes an upper phase switch 10 as a first semiconductor element, a lower phase switch 20 as a second semiconductor element, and a cutoff semiconductor element between a high voltage side wiring P and a low voltage side wiring N. Switch 30 is provided.

  A DC voltage is applied to the high-voltage side wiring P and the low-voltage side wiring N from a high-voltage power source (not shown). As for the upper phase switch 10 and the lower phase switch 20, FIG. 1 illustrates an n-channel IGBT. The upper phase switch 10 and the lower phase switch 20 are connected in series, and are driven by a gate drive circuit (not shown) to supply current from a midpoint of the upper phase switch 10 and the lower phase switch 20 to a load (not shown) via a midpoint wiring. To do. The load is, for example, a motor.

  The cutoff switch 30 is a power transistor such as IGBT + Diode, for example. A power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) can also be used. In FIG. 1, a contact switch is illustrated, but a semiconductor element is used as the cutoff switch 30. By using a semiconductor element, the switch can be miniaturized and overcurrent can be interrupted at high speed.

  The upper-phase switch 10 connected to the high-voltage side wiring P constitutes an upper arm that drives a load with a reflux diode 11 connected in parallel. Further, the lower phase switch 20 connected to the low-voltage side wiring N constitutes a lower arm that drives a load by connecting a reflux diode 21 in parallel. The electric circuit of the semiconductor module 1 shown in FIG. 1 exemplifies an upper arm and a lower arm in one phase of a three-phase inverter module configured by, for example, a U-phase, V-phase, and W-phase three-phase semiconductor module. Yes.

  The high voltage side wiring P is electrically connected to the collector of the upper phase switch 10 through the upper collector electrode 40. The emitter of the upper phase switch 10 and the collector of the lower phase switch 20 are soldered and electrically connected to the upper emitter / lower collector electrode 50. The emitter of the lower phase switch 20 and the collector of the cutoff switch 30 are soldered and electrically connected to the lower emitter / cutoff collector electrode 60. Further, the emitter of the cutoff switch 30 is soldered and electrically connected to the cutoff emitter electrode 70.

  next. The external appearance of the semiconductor module 1 is demonstrated using FIG. 2 and FIG. FIG. 2 is a side view of the semiconductor module 1. FIG. 3 is a top view of the semiconductor module 1.

  2 and 3, the upper collector electrode 40 is soldered and electrically connected to the first surface 101 on the collector side of the upper phase switch 10. For example, the trapezoidal portion between the upper collector electrode 40 and the upper phase switch 10 shown in FIG. 2 represents a soldered fillet.

  In the upper phase switch 10 and the lower phase switch 20, the second surface 102 on the emitter side of the upper phase switch 10 and the first surface 201 on the collector side of the lower phase switch 20 are the same surface of the upper emitter / lower collector electrode 50. The upper phase switch 10 and the lower phase switch 20 are soldered so as to be adjacent to each other.

  In the lower phase switch 20 and the cutoff switch 30, the second surface 202 on the emitter side of the lower phase switch 20 and the first side on the collector side of the cutoff switch are on the same surface of the lower emitter / cutoff collector electrode 60. The lower phase switch 20 and the cutoff switch 30 are soldered so as to be adjacent to each other.

  By arranging the upper phase switch 10 and the lower phase switch 20 and the lower phase switch 20 and the cutoff switch 30 adjacent to each other on the same electrode, the semiconductor module 1 can be reduced in size.

  The second surface 302 on the emitter side of the cutoff switch 30 is soldered to the cutoff emitter electrode 70.

  The upper collector electrode 40, the upper emitter / lower collector electrode 50, the lower emitter / cut-off collector electrode 60, and the cut-off emitter electrode 70 are conductive metal plates. For example, a lead frame can be used.

  The upper collector electrode 40 has a P power terminal 401, and the P power terminal 401 is connected to the high voltage side wiring P described in FIG. The upper emitter / lower collector electrode 50 has a midpoint power terminal 501, and a midpoint wiring is connected to the midpoint power terminal 501. In addition, the cutoff emitter electrode 70 has an N power terminal 701, and the low voltage side wiring N is connected to the N power terminal 701.

  The upper phase switch 10 and the lower phase switch 20 generate a large amount of heat from the inside due to the switching operation for driving the load. Accordingly, the upper collector electrode 40, the upper emitter / lower collector electrode 50, and the lower emitter / cut-off collector electrode 60 are used as heat radiation electrodes for releasing heat generated in the upper phase switch 10 or the lower phase switch 20. . A metal plate having a predetermined plate thickness is used for the heat radiation electrode in order to absorb and diffuse heat.

  The upper phase switch 10 is cooled on both the upper and lower surfaces by connecting the upper collector electrode 40 and the upper emitter / lower collector electrode 50 to the first surface 101 and the second surface 102 shown in the vertical direction in FIG. . Similarly, the lower phase switch 20 includes an upper emitter / lower collector electrode 50 as a first heat radiation electrode and a lower emitter / cut-off electrode as a second heat radiation electrode on the first surface 201 and the second surface 202. Both collector electrodes 60 are connected to perform double-sided cooling.

  On the other hand, since the cutoff switch 30 is always in an ON state, the amount of heat generated is smaller than that of the upper phase switch 10 or the lower phase switch 20. Therefore, the cutoff switch 30 can be cooled on one side by the lower emitter / cutoff collector electrode 60 connected to the first surface 301. By performing single-sided cooling, the second surface 302 does not require cooling performance.

  Next, a method of using the second surface 302 that does not require cooling performance will be described with reference to FIG. FIG. 4 is a side view of the periphery of the cutoff switch 30.

  In FIG. 4, a cutoff emitter electrode 70 is soldered to the second surface 302 of the cutoff switch 30. The plate thickness of the blocking emitter electrode 70 does not require cooling performance and can be made thinner than the plate thickness of the lower emitter / cutting collector electrode 60. Further, since it is not necessary to connect the blocking emitter electrode 70 to the entire surface of the second surface 302, only a part of the second surface 302 can be soldered to the blocking emitter electrode 70. For example, W / B (Wire Bonding) for electrically connecting the small signal terminal 80 can be connected to a portion of the second surface 302 that is not covered with the blocking emitter electrode 70.

  The small signal terminal 80 is a terminal for inputting, for example, a signal for detecting an overcurrent to an overcurrent detection circuit (not shown). The second surface 302 may be soldered with a small signal PAD for temperature detection, for example.

  As mentioned above, although the form for implementing this invention was explained in full detail, this invention is not limited to such specific embodiment, In the range of the summary of this invention described in the claim, Various modifications and changes are possible.

DESCRIPTION OF SYMBOLS 1 Semiconductor module 10 Upper phase switch 20 Lower phase switch 30 Shut-off switch 101, 201, 301 First surface 102, 202, 302 Second surface 40 Upper collector electrode 401 P power terminal 50 Upper emitter / lower collector electrode 501 Point power terminal 60 Lower emitter / cutoff collector electrode 70 Cutoff emitter electrode 701 N power terminal 80 Small signal terminal 801 Small signal W / B

Claims (1)

A first semiconductor element included in the upper arm;
A first heat dissipation electrode connected to the first semiconductor element;
A second semiconductor element included in a lower arm, connected to the first heat radiation electrode adjacent to the first semiconductor element on a first surface;
A second heat radiation electrode connected to the second surface of the second semiconductor element;
A blocking semiconductor element connected on one side to the second heat radiation electrode adjacent to the second semiconductor element;
A semiconductor module comprising:

Images